From patchwork Thu Feb 6 17:53:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 11369015 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3C8E6138D for ; Thu, 6 Feb 2020 17:53:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 24358214AF for ; Thu, 6 Feb 2020 17:53:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 24358214AF Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=chris-wilson.co.uk Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AB8376FAE5; Thu, 6 Feb 2020 17:53:30 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (unknown [77.68.26.236]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4C4A46FAE5 for ; Thu, 6 Feb 2020 17:53:29 +0000 (UTC) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from haswell.alporthouse.com (unverified [78.156.65.138]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 20140151-1500050 for multiple; Thu, 06 Feb 2020 17:53:21 +0000 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Thu, 6 Feb 2020 17:53:20 +0000 Message-Id: <20200206175320.2595743-1-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200206174658.2576421-1-chris@chris-wilson.co.uk> References: <20200206174658.2576421-1-chris@chris-wilson.co.uk> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915/gt: Apply Enable Boot Fetch to MBC control register X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Mika spotted that we should be setting BIT(4) of MBCTL prior to execution. "The driver must set this bit in the following scenarios: - To reload the HW boot context every time it gets loaded through the OS. - After an FLR clears the register (the BIOS won’t run afterwards)." Make it so. Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 61106129287f..bd3c0f7a9c8a 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -680,6 +680,18 @@ int intel_engine_emit_ctx_wa(struct i915_request *rq) return 0; } +static void +gen6_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) +{ + wa_write_or(wal, GEN6_MBCTL, GEN6_MBCTL_ENABLE_BOOT_FETCH); +} + +static void +gen7_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) +{ + wa_write_or(wal, GEN6_MBCTL, GEN6_MBCTL_ENABLE_BOOT_FETCH); +} + static void gen9_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) { @@ -962,7 +974,11 @@ gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal) bxt_gt_workarounds_init(i915, wal); else if (IS_SKYLAKE(i915)) skl_gt_workarounds_init(i915, wal); - else if (INTEL_GEN(i915) <= 8) + else if (IS_GEN(i915, 7)) + gen7_gt_workarounds_init(i915, wal); + else if (IS_GEN(i915, 6)) + gen6_gt_workarounds_init(i915, wal); + else if (INTEL_GEN(i915) < 6) return; else MISSING_CASE(INTEL_GEN(i915));