From patchwork Mon Feb 10 17:53:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 11373857 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C7E5F1395 for ; Mon, 10 Feb 2020 17:53:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A8DAB20715 for ; Mon, 10 Feb 2020 17:53:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="jaRWKO3B" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726896AbgBJRxT (ORCPT ); Mon, 10 Feb 2020 12:53:19 -0500 Received: from mail-pf1-f193.google.com ([209.85.210.193]:43675 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726831AbgBJRxT (ORCPT ); Mon, 10 Feb 2020 12:53:19 -0500 Received: by mail-pf1-f193.google.com with SMTP id s1so4046935pfh.10 for ; Mon, 10 Feb 2020 09:53:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id; bh=VysTmKPrB0aqop6ZxUaGM1sAaj8tjmbLT3VN6PP9BSw=; b=jaRWKO3Buodb6+fPH/4t49o2yNF6uaWuSh4ah5MQClx7pn6V+o1H9Uxp8SNEBqKhdr fNdJ//1TK1ZsD9e3EMjuKAUVOdBijIfFw3Xh2Ts5JlU1vaTF+FBib8PnMQxCPp2JSFTn OYsZN0cY270OYDRcSFM6NIRSdGHUoePsAEzmrsvJM7bVuOSQaRAquNy0jTvx2chzXt8X JoOBHRrTmINUJXmtNZMR3XtWDGOcMTuFPToWk2xyg++dG7CA7/g47x8Qc3J/QhwEEwSf EHISgdTxUcDqes1C9R59m7KMO+M0TbtMNkXdOeG5D/63F0S45Ql3SluPCnwdCLOYEb9y YOjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=VysTmKPrB0aqop6ZxUaGM1sAaj8tjmbLT3VN6PP9BSw=; b=gts2l2nEJiJvyAI8wuatkGbgPV5GV57791oYp7+VA1p1+8Gfc9Q87ovyMFdiLc1xyk QYBA8NdwYKD/ZJuVxyhZUe4sWlp1ld/oJeOeFTnMszH56b6XAezNw/TT1FsXKh9XIgOb lFxIEwbr2Sg8S9k7BQdd2t7XX1x09OTUTn+NBl3GpC/39Jx5EGFS55KjqxcItwEEd9KN 80tPxRFiW1aVGvjhzz0m88s0EDf8q8FOvxmLC2fOCPHN2n0L/wl5qPO6K7NrU5mjRVlD m1yL/8hG7nNBiA8l0Qqh8dsWVJG7B2dRwtKu8VB6A96ymTJYtLhsSOIFYaNZc38Ww4Di Rwhg== X-Gm-Message-State: APjAAAXU03nQwajdWynGlO6giGhAVvMmnIW1cN+KCQNph/W8xU8mMOmb jWsIT+HozU8EXoBKEiXfyf28iXgG X-Google-Smtp-Source: APXvYqyhAVwyAgrTVmpWSCEKldgsAIicOEVEyrB9GHaHfMIIC2q27ROmp1g0YS/orq1ZlL7KVnG1gQ== X-Received: by 2002:a63:a1e:: with SMTP id 30mr2988607pgk.238.1581357198339; Mon, 10 Feb 2020 09:53:18 -0800 (PST) Received: from localhost ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id x197sm1079352pfc.1.2020.02.10.09.53.17 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Feb 2020 09:53:17 -0800 (PST) From: Guenter Roeck To: Hardware Monitoring Cc: Jean Delvare , Guenter Roeck Subject: [PATCH 1/3] hwmon: (k10temp) Swap Tdie and Tctl on Family 17h CPUs Date: Mon, 10 Feb 2020 09:53:12 -0800 Message-Id: <20200210175314.32643-1-linux@roeck-us.net> X-Mailer: git-send-email 2.17.1 Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Traditionally, the temperature displayed by k10temp was Tctl. On Family 17h CPUs, Tdie was displayed instead. To reduce confusion, Tctl was added later as second temperature. This resulted in Tdie being reported as temp1_input, and Tctl as temp2_input. This is different to non-Ryzen CPUs, where Tctl is displayed as temp1_input. Swap temp1_input and temp2_input on Family 17h CPUs, such that Tctl is now reported as temp1_input and Tdie is reported as temp2_input, to align with other CPUs, streamline the code, and make it less confusing. Coincidentally, this also aligns the code with its documentation, which states that Tdie is reported as temp2_input. Signed-off-by: Guenter Roeck --- drivers/hwmon/k10temp.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c index e39354ffe973..b38547cd7ba3 100644 --- a/drivers/hwmon/k10temp.c +++ b/drivers/hwmon/k10temp.c @@ -180,8 +180,8 @@ static long get_raw_temp(struct k10temp_data *data) } const char *k10temp_temp_label[] = { - "Tdie", "Tctl", + "Tdie", "Tccd1", "Tccd2", "Tccd3", @@ -269,13 +269,13 @@ static int k10temp_read_temp(struct device *dev, u32 attr, int channel, switch (attr) { case hwmon_temp_input: switch (channel) { - case 0: /* Tdie */ - *val = get_raw_temp(data) - data->temp_offset; + case 0: /* Tctl */ + *val = get_raw_temp(data); if (*val < 0) *val = 0; break; - case 1: /* Tctl */ - *val = get_raw_temp(data); + case 1: /* Tdie */ + *val = get_raw_temp(data) - data->temp_offset; if (*val < 0) *val = 0; break; @@ -334,9 +334,9 @@ static umode_t k10temp_is_visible(const void *_data, switch (attr) { case hwmon_temp_input: switch (channel) { - case 0: /* Tdie, or Tctl if we don't show it */ + case 0: /* Tctl */ break; - case 1: /* Tctl */ + case 1: /* Tdie */ if (!data->show_tdie) return 0; break; @@ -372,8 +372,8 @@ static umode_t k10temp_is_visible(const void *_data, if (!data->show_tdie) return 0; switch (channel) { - case 0: /* Tdie */ - case 1: /* Tctl */ + case 0: /* Tctl */ + case 1: /* Tdie */ break; case 2 ... 9: /* Tccd{1-8} */ if (!(data->show_tccd & BIT(channel - 2))) From patchwork Mon Feb 10 17:53:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 11373859 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 45FB714B4 for ; Mon, 10 Feb 2020 17:53:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1F7B02080C for ; Mon, 10 Feb 2020 17:53:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="SkrNvI5F" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726961AbgBJRxU (ORCPT ); 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Use a separate flag, independent of Tdie support, to indicate if the system is running on a Ryzen CPU. Signed-off-by: Guenter Roeck --- drivers/hwmon/k10temp.c | 50 +++++++++++++++-------------------------- 1 file changed, 18 insertions(+), 32 deletions(-) diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c index b38547cd7ba3..3f37d5d81fe4 100644 --- a/drivers/hwmon/k10temp.c +++ b/drivers/hwmon/k10temp.c @@ -96,13 +96,20 @@ struct k10temp_data { void (*read_tempreg)(struct pci_dev *pdev, u32 *regval); int temp_offset; u32 temp_adjust_mask; - bool show_tdie; - u32 show_tccd; + u32 show_temp; u32 svi_addr[2]; + bool is_zen; bool show_current; int cfactor[2]; }; +#define TCTL_BIT 0 +#define TDIE_BIT 1 +#define TCCD_BIT(x) ((x) + 2) + +#define HAVE_TEMP(d, channel) ((d)->show_temp & BIT(channel)) +#define HAVE_TDIE(d) HAVE_TEMP(d, TDIE_BIT) + struct tctl_offset { u8 model; char const *id; @@ -333,23 +340,11 @@ static umode_t k10temp_is_visible(const void *_data, case hwmon_temp: switch (attr) { case hwmon_temp_input: - switch (channel) { - case 0: /* Tctl */ - break; - case 1: /* Tdie */ - if (!data->show_tdie) - return 0; - break; - case 2 ... 9: /* Tccd{1-8} */ - if (!(data->show_tccd & BIT(channel - 2))) - return 0; - break; - default: + if (!HAVE_TEMP(data, channel)) return 0; - } break; case hwmon_temp_max: - if (channel || data->show_tdie) + if (channel || data->is_zen) return 0; break; case hwmon_temp_crit: @@ -368,20 +363,9 @@ static umode_t k10temp_is_visible(const void *_data, return 0; break; case hwmon_temp_label: - /* No labels if we don't show the die temperature */ - if (!data->show_tdie) - return 0; - switch (channel) { - case 0: /* Tctl */ - case 1: /* Tdie */ - break; - case 2 ... 9: /* Tccd{1-8} */ - if (!(data->show_tccd & BIT(channel - 2))) - return 0; - break; - default: + /* Show temperature labels only on Zen CPUs */ + if (!data->is_zen || !HAVE_TEMP(data, channel)) return 0; - } break; default: return 0; @@ -480,7 +464,7 @@ static void k10temp_init_debugfs(struct k10temp_data *data) char name[32]; /* Only show debugfs data for Family 17h/18h CPUs */ - if (!data->show_tdie) + if (!data->is_zen) return; scnprintf(name, sizeof(name), "k10temp-%s", pci_name(data->pdev)); @@ -546,7 +530,7 @@ static void k10temp_get_ccd_support(struct pci_dev *pdev, amd_smn_read(amd_pci_dev_to_node_id(pdev), F17H_M70H_CCD_TEMP(i), ®val); if (regval & F17H_M70H_CCD_TEMP_VALID) - data->show_tccd |= BIT(i); + data->show_temp |= BIT(TCCD_BIT(i)); } } @@ -573,6 +557,7 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id) return -ENOMEM; data->pdev = pdev; + data->show_temp |= BIT(TCTL_BIT); /* Always show Tctl */ if (boot_cpu_data.x86 == 0x15 && ((boot_cpu_data.x86_model & 0xf0) == 0x60 || @@ -582,7 +567,8 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id) } else if (boot_cpu_data.x86 == 0x17 || boot_cpu_data.x86 == 0x18) { data->temp_adjust_mask = CUR_TEMP_RANGE_SEL_MASK; data->read_tempreg = read_tempreg_nb_f17; - data->show_tdie = true; + data->show_temp |= BIT(TDIE_BIT); /* show Tdie */ + data->is_zen = true; switch (boot_cpu_data.x86_model) { case 0x1: /* Zen */ From patchwork Mon Feb 10 17:53:14 2020 Content-Type: text/plain; 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Mon, 10 Feb 2020 09:53:21 -0800 (PST) Received: from localhost ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id q25sm1111159pfg.41.2020.02.10.09.53.20 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Feb 2020 09:53:20 -0800 (PST) From: Guenter Roeck To: Hardware Monitoring Cc: Jean Delvare , Guenter Roeck Subject: [PATCH 3/3] hwmon: (k10temp) Update driver documentation Date: Mon, 10 Feb 2020 09:53:14 -0800 Message-Id: <20200210175314.32643-3-linux@roeck-us.net> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200210175314.32643-1-linux@roeck-us.net> References: <20200210175314.32643-1-linux@roeck-us.net> Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Document temperature, voltage, and current sensors available with Family 17h and later CPUs. Signed-off-by: Guenter Roeck --- Documentation/hwmon/k10temp.rst | 29 ++++++++++++++++++++++++++--- 1 file changed, 26 insertions(+), 3 deletions(-) diff --git a/Documentation/hwmon/k10temp.rst b/Documentation/hwmon/k10temp.rst index 4451d59b9425..8557e26281c3 100644 --- a/Documentation/hwmon/k10temp.rst +++ b/Documentation/hwmon/k10temp.rst @@ -100,9 +100,10 @@ socket type, not the processor's actual capabilities. Therefore, if you are using an AM3 processor on an AM2+ mainboard, you can safely use the "force=1" parameter. -There is one temperature measurement value, available as temp1_input in -sysfs. It is measured in degrees Celsius with a resolution of 1/8th degree. -Please note that it is defined as a relative value; to quote the AMD manual:: +For CPUs older than Family 17h, there is one temperature measurement value, +available as temp1_input in sysfs. It is measured in degrees Celsius with a +resolution of 1/8th degree. Please note that it is defined as a relative +value; to quote the AMD manual:: Tctl is the processor temperature control value, used by the platform to control cooling systems. Tctl is a non-physical temperature on an @@ -126,3 +127,25 @@ it. Models from 17h family report relative temperature, the driver aims to compensate and report the real temperature. + +On Family 17h and Family 18h CPUs, additional temperature sensors may report +Core Complex Die (CCD) temperatures. Up to 8 such temperatures are reported +as temp{3..10}_input, labeled Tccd{1..8}. Actual support depends on the CPU +variant. + +Various Family 17h and 18h CPUs report voltage and current telemetry +information. The following attributes may be reported. + +Attribute Label Description +=============== ======= ================ +in0_input Vcore Core voltage +in1_input Vsoc SoC voltage +curr1_input Icore Core current +curr2_input Isoc SoC current +=============== ======= ================ + +Current values are raw (unscaled) as reported by the CPU. Core current is +reported as multiples of 1A / LSB. SoC is reported as multiples of 0.25A +/ LSB. The real current is board specific. Reported currents should be seen +as rough guidance, and should be scaled using sensors3.conf as appropriate +for a given board.