From patchwork Tue Feb 11 08:38:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zenghui Yu X-Patchwork-Id: 11375073 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A056B139A for ; Tue, 11 Feb 2020 08:40:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7558520848 for ; Tue, 11 Feb 2020 08:40:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727728AbgBKIkn (ORCPT ); Tue, 11 Feb 2020 03:40:43 -0500 Received: from szxga06-in.huawei.com ([45.249.212.32]:52208 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727653AbgBKIkn (ORCPT ); Tue, 11 Feb 2020 03:40:43 -0500 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 8259A53757EA3401812D; Tue, 11 Feb 2020 16:40:40 +0800 (CST) Received: from DESKTOP-8RFUVS3.china.huawei.com (10.173.222.27) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.439.0; Tue, 11 Feb 2020 16:40:33 +0800 From: Zenghui Yu To: , , CC: , , Zenghui Yu Subject: [kvm-unit-tests PATCH 1/3] arm/arm64: gic: Move gic_state enumeration to asm/gic.h Date: Tue, 11 Feb 2020 16:38:59 +0800 Message-ID: <20200211083901.1478-2-yuzenghui@huawei.com> X-Mailer: git-send-email 2.23.0.windows.1 In-Reply-To: <20200211083901.1478-1-yuzenghui@huawei.com> References: <20200211083901.1478-1-yuzenghui@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.173.222.27] X-CFilter-Loop: Reflected Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The status of each interrupt are defined by the GIC architecture and maintained by GIC hardware. They're not specified to the timer HW. Let's move this software enumeration to a more proper place. Signed-off-by: Zenghui Yu --- arm/timer.c | 7 ------- lib/arm/asm/gic.h | 7 +++++++ 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arm/timer.c b/arm/timer.c index dea364f..94543f2 100644 --- a/arm/timer.c +++ b/arm/timer.c @@ -17,13 +17,6 @@ #define ARCH_TIMER_CTL_IMASK (1 << 1) #define ARCH_TIMER_CTL_ISTATUS (1 << 2) -enum gic_state { - GIC_STATE_INACTIVE, - GIC_STATE_PENDING, - GIC_STATE_ACTIVE, - GIC_STATE_ACTIVE_PENDING, -}; - static void *gic_isactiver; static void *gic_ispendr; static void *gic_isenabler; diff --git a/lib/arm/asm/gic.h b/lib/arm/asm/gic.h index 09826fd..a72e0cd 100644 --- a/lib/arm/asm/gic.h +++ b/lib/arm/asm/gic.h @@ -47,6 +47,13 @@ #ifndef __ASSEMBLY__ #include +enum gic_state { + GIC_STATE_INACTIVE, + GIC_STATE_PENDING, + GIC_STATE_ACTIVE, + GIC_STATE_ACTIVE_PENDING, +}; + /* * gic_init will try to find all known gics, and then * initialize the gic data for the one found. From patchwork Tue Feb 11 08:39:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zenghui Yu X-Patchwork-Id: 11375071 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 30215924 for ; Tue, 11 Feb 2020 08:40:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0E560206CC for ; Tue, 11 Feb 2020 08:40:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727697AbgBKIkm (ORCPT ); Tue, 11 Feb 2020 03:40:42 -0500 Received: from szxga06-in.huawei.com ([45.249.212.32]:52202 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726973AbgBKIkm (ORCPT ); Tue, 11 Feb 2020 03:40:42 -0500 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 7E00E77A104706A55F6E; Tue, 11 Feb 2020 16:40:40 +0800 (CST) Received: from DESKTOP-8RFUVS3.china.huawei.com (10.173.222.27) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.439.0; Tue, 11 Feb 2020 16:40:34 +0800 From: Zenghui Yu To: , , CC: , , Zenghui Yu Subject: [kvm-unit-tests PATCH 2/3] arm64: timer: Use the proper RDist register name in GICv3 Date: Tue, 11 Feb 2020 16:39:00 +0800 Message-ID: <20200211083901.1478-3-yuzenghui@huawei.com> X-Mailer: git-send-email 2.23.0.windows.1 In-Reply-To: <20200211083901.1478-1-yuzenghui@huawei.com> References: <20200211083901.1478-1-yuzenghui@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.173.222.27] X-CFilter-Loop: Reflected Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org We're actually going to read GICR_ISACTIVER0 and GICR_ISPENDR0 (in SGI_base frame of the redistribitor) to get the active/pending state of the timer interrupt. Fix this typo. And since they have the same value, there's no functional change. Signed-off-by: Zenghui Yu Reviewed-by: Alexandru Elisei --- arm/timer.c | 4 ++-- lib/arm/asm/gic-v3.h | 4 ++++ 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arm/timer.c b/arm/timer.c index 94543f2..10a88f3 100644 --- a/arm/timer.c +++ b/arm/timer.c @@ -351,8 +351,8 @@ static void test_init(void) gic_icenabler = gicv2_dist_base() + GICD_ICENABLER; break; case 3: - gic_isactiver = gicv3_sgi_base() + GICD_ISACTIVER; - gic_ispendr = gicv3_sgi_base() + GICD_ISPENDR; + gic_isactiver = gicv3_sgi_base() + GICR_ISACTIVER0; + gic_ispendr = gicv3_sgi_base() + GICR_ISPENDR0; gic_isenabler = gicv3_sgi_base() + GICR_ISENABLER0; gic_icenabler = gicv3_sgi_base() + GICR_ICENABLER0; break; diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h index 0dc838b..e2736a1 100644 --- a/lib/arm/asm/gic-v3.h +++ b/lib/arm/asm/gic-v3.h @@ -32,6 +32,10 @@ #define GICR_IGROUPR0 GICD_IGROUPR #define GICR_ISENABLER0 GICD_ISENABLER #define GICR_ICENABLER0 GICD_ICENABLER +#define GICR_ISPENDR0 GICD_ISPENDR +#define GICR_ICPENDR0 GICD_ICPENDR +#define GICR_ISACTIVER0 GICD_ISACTIVER +#define GICR_ICACTIVER0 GICD_ICACTIVER #define GICR_IPRIORITYR0 GICD_IPRIORITYR #define ICC_SGI1R_AFFINITY_1_SHIFT 16 From patchwork Tue Feb 11 08:39:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zenghui Yu X-Patchwork-Id: 11375077 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D2E16138D for ; Tue, 11 Feb 2020 08:40:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A76EA20870 for ; Tue, 11 Feb 2020 08:40:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727840AbgBKIkr (ORCPT ); Tue, 11 Feb 2020 03:40:47 -0500 Received: from szxga06-in.huawei.com ([45.249.212.32]:52310 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727742AbgBKIkr (ORCPT ); Tue, 11 Feb 2020 03:40:47 -0500 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 945D616D4F7F1FABDD1A; Tue, 11 Feb 2020 16:40:45 +0800 (CST) Received: from DESKTOP-8RFUVS3.china.huawei.com (10.173.222.27) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.439.0; Tue, 11 Feb 2020 16:40:35 +0800 From: Zenghui Yu To: , , CC: , , Zenghui Yu Subject: [kvm-unit-tests PATCH 3/3] arm64: timer: Use existing helpers to access counter/timers Date: Tue, 11 Feb 2020 16:39:01 +0800 Message-ID: <20200211083901.1478-4-yuzenghui@huawei.com> X-Mailer: git-send-email 2.23.0.windows.1 In-Reply-To: <20200211083901.1478-1-yuzenghui@huawei.com> References: <20200211083901.1478-1-yuzenghui@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.173.222.27] X-CFilter-Loop: Reflected Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org We already have some good helpers to access the counter and timer registers. Use them to avoid open coding the accessors again. Signed-off-by: Zenghui Yu --- arm/timer.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arm/timer.c b/arm/timer.c index 10a88f3..f5cf775 100644 --- a/arm/timer.c +++ b/arm/timer.c @@ -331,7 +331,7 @@ static void test_init(void) vtimer_info.irq_flags = fdt32_to_cpu(data[8]); install_exception_handler(EL1H_SYNC, ESR_EL1_EC_UNKNOWN, ptimer_unsupported_handler); - read_sysreg(cntp_ctl_el0); + ptimer_info.read_ctl(); install_exception_handler(EL1H_SYNC, ESR_EL1_EC_UNKNOWN, NULL); if (ptimer_unsupported && !ERRATA(7b6b46311a85)) { @@ -366,15 +366,15 @@ static void print_timer_info(void) { printf("CNTFRQ_EL0 : 0x%016lx\n", read_sysreg(cntfrq_el0)); - if (!ptimer_unsupported){ - printf("CNTPCT_EL0 : 0x%016lx\n", read_sysreg(cntpct_el0)); - printf("CNTP_CTL_EL0 : 0x%016lx\n", read_sysreg(cntp_ctl_el0)); - printf("CNTP_CVAL_EL0: 0x%016lx\n", read_sysreg(cntp_cval_el0)); + if (!ptimer_unsupported) { + printf("CNTPCT_EL0 : 0x%016lx\n", ptimer_info.read_counter()); + printf("CNTP_CTL_EL0 : 0x%016lx\n", ptimer_info.read_ctl()); + printf("CNTP_CVAL_EL0: 0x%016lx\n", ptimer_info.read_cval()); } - printf("CNTVCT_EL0 : 0x%016lx\n", read_sysreg(cntvct_el0)); - printf("CNTV_CTL_EL0 : 0x%016lx\n", read_sysreg(cntv_ctl_el0)); - printf("CNTV_CVAL_EL0: 0x%016lx\n", read_sysreg(cntv_cval_el0)); + printf("CNTVCT_EL0 : 0x%016lx\n", vtimer_info.read_counter()); + printf("CNTV_CTL_EL0 : 0x%016lx\n", vtimer_info.read_ctl()); + printf("CNTV_CVAL_EL0: 0x%016lx\n", vtimer_info.read_cval()); } int main(int argc, char **argv)