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@@ -746,7 +746,8 @@ drm_public int amdgpu_bo_va_op(amdgpu_bo_handle bo, return amdgpu_bo_va_op_raw(dev, bo, offset, size, addr, AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE | - AMDGPU_VM_PAGE_EXECUTABLE, ops); + AMDGPU_VM_PAGE_EXECUTABLE | + extra_flags, ops); } drm_public int amdgpu_bo_va_op_raw(amdgpu_device_handle dev, From patchwork Thu Sep 27 19:05:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Grodzovsky X-Patchwork-Id: 10618475 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6785D112B for ; Thu, 27 Sep 2018 19:06:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 540582BA62 for ; Thu, 27 Sep 2018 19:06:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 488252BA78; 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Thu, 27 Sep 2018 14:05:38 -0500 From: Andrey Grodzovsky To: Subject: [PATCH libdrm 2/3] amdgpu/test: Allow flags to be passed to amdgpu_bo_va_op Date: Thu, 27 Sep 2018 15:05:08 -0400 Message-ID: <1538075109-3759-2-git-send-email-andrey.grodzovsky@amd.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538075109-3759-1-git-send-email-andrey.grodzovsky@amd.com> References: <1538075109-3759-1-git-send-email-andrey.grodzovsky@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(376002)(136003)(346002)(39860400002)(396003)(2980300002)(428003)(189003)(199004)(48376002)(36756003)(50226002)(47776003)(34290500001)(6916009)(4326008)(6666003)(8936002)(86362001)(81156014)(7696005)(450100002)(81166006)(8676002)(51416003)(53936002)(76176011)(14444005)(2906002)(54906003)(16586007)(104016004)(316002)(97736004)(77096007)(50466002)(356003)(426003)(446003)(305945005)(68736007)(44832011)(186003)(336012)(53416004)(106466001)(5660300001)(486006)(11346002)(105586002)(26005)(72206003)(478600001)(476003)(126002)(2616005)(2351001); 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@@ -290,7 +290,7 @@ amdgpu_bo_alloc_wrap(amdgpu_device_handle dev, unsigned size, request.alloc_size = size; request.phys_alignment = alignment; request.preferred_heap = heap; - request.flags = flags; + request.flags = alloc_flags; r = amdgpu_bo_alloc(dev, &request, &buf_handle); if (r) @@ -302,9 +302,9 @@ amdgpu_bo_alloc_wrap(amdgpu_device_handle dev, unsigned size, } static inline int -amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size, - unsigned alignment, unsigned heap, uint64_t flags, - amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address, +amdgpu_bo_alloc_and_map_raw(amdgpu_device_handle dev, unsigned size, + unsigned alignment, unsigned heap, uint64_t alloc_flags, + uint64_t mapping_flags, amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address, amdgpu_va_handle *va_handle) { struct amdgpu_bo_alloc_request request = {}; @@ -316,7 +316,7 @@ amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size, request.alloc_size = size; request.phys_alignment = alignment; request.preferred_heap = heap; - request.flags = flags; + request.flags = alloc_flags; r = amdgpu_bo_alloc(dev, &request, &buf_handle); if (r) @@ -329,7 +329,7 @@ amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size, if (r) goto error_va_alloc; - r = amdgpu_bo_va_op(buf_handle, 0, size, vmc_addr, 0, AMDGPU_VA_OP_MAP); + r = amdgpu_bo_va_op(buf_handle, 0, size, vmc_addr, mapping_flags, AMDGPU_VA_OP_MAP); if (r) goto error_va_map; @@ -355,6 +355,16 @@ error_va_alloc: } static inline int +amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size, + unsigned alignment, unsigned heap, uint64_t alloc_flags, + amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address, + amdgpu_va_handle *va_handle) +{ + return amdgpu_bo_alloc_and_map_raw(dev, size, alignment, heap, + alloc_flags, 0, bo, cpu, mc_address, va_handle); +} + +static inline int amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle va_handle, uint64_t mc_addr, uint64_t size) { From patchwork Thu Sep 27 19:05:09 2018 Content-Type: text/plain; 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Enable the test for AI and RV. Signed-off-by: Andrey Grodzovsky --- tests/amdgpu/deadlock_tests.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/tests/amdgpu/deadlock_tests.c b/tests/amdgpu/deadlock_tests.c index 304482d..292ec4e 100644 --- a/tests/amdgpu/deadlock_tests.c +++ b/tests/amdgpu/deadlock_tests.c @@ -80,6 +80,8 @@ static uint32_t minor_version; static pthread_t stress_thread; static uint32_t *ptr; +int use_uc_mtype = 0; + static void amdgpu_deadlock_helper(unsigned ip_type); static void amdgpu_deadlock_gfx(void); static void amdgpu_deadlock_compute(void); @@ -92,13 +94,14 @@ CU_BOOL suite_deadlock_tests_enable(void) &minor_version, &device_handle)) return CU_FALSE; - if (device_handle->info.family_id == AMDGPU_FAMILY_AI || - device_handle->info.family_id == AMDGPU_FAMILY_SI || - device_handle->info.family_id == AMDGPU_FAMILY_RV) { + if (device_handle->info.family_id == AMDGPU_FAMILY_SI) { printf("\n\nCurrently hangs the CP on this ASIC, deadlock suite disabled\n"); enable = CU_FALSE; } + if (device_handle->info.family_id >= AMDGPU_FAMILY_AI) + use_uc_mtype = 1; + if (amdgpu_device_deinitialize(device_handle)) return CU_FALSE; @@ -183,8 +186,8 @@ static void amdgpu_deadlock_helper(unsigned ip_type) r = amdgpu_cs_ctx_create(device_handle, &context_handle); CU_ASSERT_EQUAL(r, 0); - r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096, - AMDGPU_GEM_DOMAIN_GTT, 0, + r = amdgpu_bo_alloc_and_map_raw(device_handle, 4096, 4096, + AMDGPU_GEM_DOMAIN_GTT, 0, use_uc_mtype ? AMDGPU_VM_MTYPE_UC : 0, &ib_result_handle, &ib_result_cpu, &ib_result_mc_address, &va_handle); CU_ASSERT_EQUAL(r, 0);