From patchwork Wed Feb 12 16:49:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 11378799 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A5AB91800 for ; Wed, 12 Feb 2020 16:51:33 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 825F720658 for ; Wed, 12 Feb 2020 16:51:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=citrix.com header.i=@citrix.com header.b="btBJXa1Z" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 825F720658 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=citrix.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1j1vDS-0007qx-Pw; Wed, 12 Feb 2020 16:50:22 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1j1vDS-0007qs-CI for xen-devel@lists.xenproject.org; Wed, 12 Feb 2020 16:50:22 +0000 X-Inumbo-ID: bf76362a-4db7-11ea-aa99-bc764e2007e4 Received: from esa2.hc3370-68.iphmx.com (unknown [216.71.145.153]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id bf76362a-4db7-11ea-aa99-bc764e2007e4; Wed, 12 Feb 2020 16:50:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1581526218; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6BvJkuibN7HhfH8kxdvVgvoJvORSwTv2YVrgWCXFkl0=; b=btBJXa1ZAZE2jCqtXPQXqZ6cyZhBFsj7bepuG2Ah1ZEW8PyiYf4oc4A3 mGwAkkxegA2xjW6Q0JfH56y9cgVRFoKUVxMU9Ep0SThxUObiBBFKtLQqe ATctTFFw8PB8etmIK6iTBizT+nxghnHyTgCp/onZcDlsquY4W/0W6kqiG M=; Authentication-Results: esa2.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none; spf=None smtp.pra=roger.pau@citrix.com; spf=Pass smtp.mailfrom=roger.pau@citrix.com; spf=None smtp.helo=postmaster@mail.citrix.com Received-SPF: None (esa2.hc3370-68.iphmx.com: no sender authenticity information available from domain of roger.pau@citrix.com) identity=pra; client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="roger.pau@citrix.com"; x-conformance=sidf_compatible Received-SPF: Pass (esa2.hc3370-68.iphmx.com: domain of roger.pau@citrix.com designates 162.221.158.21 as permitted sender) identity=mailfrom; client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="roger.pau@citrix.com"; x-conformance=sidf_compatible; x-record-type="v=spf1"; x-record-text="v=spf1 ip4:209.167.231.154 ip4:178.63.86.133 ip4:195.66.111.40/30 ip4:85.115.9.32/28 ip4:199.102.83.4 ip4:192.28.146.160 ip4:192.28.146.107 ip4:216.52.6.88 ip4:216.52.6.188 ip4:162.221.158.21 ip4:162.221.156.83 ip4:168.245.78.127 ~all" Received-SPF: None (esa2.hc3370-68.iphmx.com: no sender authenticity information available from domain of postmaster@mail.citrix.com) identity=helo; client-ip=162.221.158.21; receiver=esa2.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: XDQ/qvj5N9aUwT/C8orCEfen/f6aLpmjivf723f3GIOqqOjnFJmUUqpqMVQR3Zc4A6BhI6kZle b0HDu7ZCkTM0eTVAuoodQ2nkWbfGa+YaaHOkTMXCHiqa8I2tUlSfhdDvuaN+9+xTvmBunUW9H+ GiHC8UCVHkO/oM+JGKaBwGQNpJ77mq7V9+o9AETOtMVD/tIe0Hz+Iq4tle/4bbSzDjA/t3JT3y c3/ptIvKymwV60hStlDXoUJRRbIpKk4tWvwZixDBEc85X4aIfDiHDiKsNLg0YfV02HHXTR8HK2 TBo= X-SBRS: 2.7 X-MesageID: 12353165 X-Ironport-Server: esa2.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.70,433,1574139600"; d="scan'208";a="12353165" From: Roger Pau Monne To: Date: Wed, 12 Feb 2020 17:49:47 +0100 Message-ID: <20200212164949.56434-2-roger.pau@citrix.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200212164949.56434-1-roger.pau@citrix.com> References: <20200212164949.56434-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH 1/3] x86/smp: unify header includes in smp.h X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Wei Liu , Jan Beulich , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Unify the two adjacent header includes that are both gated with ifndef __ASSEMBLY__. No functional change intended. Signed-off-by: Roger Pau Monné Reviewed-by: Wei Liu Acked-by: Jan Beulich --- xen/include/asm-x86/smp.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/xen/include/asm-x86/smp.h b/xen/include/asm-x86/smp.h index 1aa55d41e1..92d69a5ea0 100644 --- a/xen/include/asm-x86/smp.h +++ b/xen/include/asm-x86/smp.h @@ -5,13 +5,10 @@ * We need the APIC definitions automatically as part of 'smp.h' */ #ifndef __ASSEMBLY__ +#include #include #include #include -#endif - -#ifndef __ASSEMBLY__ -#include #include #endif From patchwork Wed Feb 12 16:49:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 11378797 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 40EBF1805 for ; Wed, 12 Feb 2020 16:51:27 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1D4D920724 for ; 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d="scan'208";a="12353169" From: Roger Pau Monne To: Date: Wed, 12 Feb 2020 17:49:48 +0100 Message-ID: <20200212164949.56434-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200212164949.56434-1-roger.pau@citrix.com> References: <20200212164949.56434-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH 2/3] x86/smp: use a dedicated scratch cpumask in send_IPI_mask X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Sander Eikelenboom , Wei Liu , Jan Beulich , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Using scratch_cpumask in send_IPI_mak is not safe because it can be called from interrupt context, and hence Xen would have to make sure all the users of the scratch cpumask disable interrupts while using it. Instead introduce a new cpumask to be used by send_IPI_mask, and disable interrupts while using. Fixes: 5500d265a2a8 ('x86/smp: use APIC ALLBUT destination shorthand when possible') Reported-by: Sander Eikelenboom Signed-off-by: Roger Pau Monné --- xen/arch/x86/smp.c | 14 +++++++++++++- xen/arch/x86/smpboot.c | 9 ++++++++- 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c index 9bc925616a..384c3ba924 100644 --- a/xen/arch/x86/smp.c +++ b/xen/arch/x86/smp.c @@ -59,6 +59,7 @@ static void send_IPI_shortcut(unsigned int shortcut, int vector, apic_write(APIC_ICR, cfg); } +DECLARE_PER_CPU(cpumask_var_t, send_ipi_cpumask); /* * send_IPI_mask(cpumask, vector): sends @vector IPI to CPUs in @cpumask, * excluding the local CPU. @cpumask may be empty. @@ -67,7 +68,8 @@ static void send_IPI_shortcut(unsigned int shortcut, int vector, void send_IPI_mask(const cpumask_t *mask, int vector) { bool cpus_locked = false; - cpumask_t *scratch = this_cpu(scratch_cpumask); + cpumask_t *scratch = this_cpu(send_ipi_cpumask); + unsigned long flags; /* * This can only be safely used when no CPU hotplug or unplug operations @@ -81,7 +83,15 @@ void send_IPI_mask(const cpumask_t *mask, int vector) local_irq_is_enabled() && (cpus_locked = get_cpu_maps()) && (park_offline_cpus || cpumask_equal(&cpu_online_map, &cpu_present_map)) ) + { + /* + * send_IPI_mask can be called from interrupt context, and hence we + * need to disable interrupts in order to protect the per-cpu + * send_ipi_cpumask while being used. + */ + local_irq_save(flags); cpumask_or(scratch, mask, cpumask_of(smp_processor_id())); + } else { if ( cpus_locked ) @@ -89,6 +99,7 @@ void send_IPI_mask(const cpumask_t *mask, int vector) put_cpu_maps(); cpus_locked = false; } + local_irq_save(flags); cpumask_clear(scratch); } @@ -97,6 +108,7 @@ void send_IPI_mask(const cpumask_t *mask, int vector) else alternative_vcall(genapic.send_IPI_mask, mask, vector); + local_irq_restore(flags); if ( cpus_locked ) put_cpu_maps(); } diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c index e83e4564a4..82e89201b3 100644 --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -57,6 +57,9 @@ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_mask); DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, scratch_cpumask); static cpumask_t scratch_cpu0mask; +DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, send_ipi_cpumask); +static cpumask_t send_ipi_cpu0mask; + cpumask_t cpu_online_map __read_mostly; EXPORT_SYMBOL(cpu_online_map); @@ -930,6 +933,8 @@ static void cpu_smpboot_free(unsigned int cpu, bool remove) FREE_CPUMASK_VAR(per_cpu(cpu_core_mask, cpu)); if ( per_cpu(scratch_cpumask, cpu) != &scratch_cpu0mask ) FREE_CPUMASK_VAR(per_cpu(scratch_cpumask, cpu)); + if ( per_cpu(send_ipi_cpumask, cpu) != &send_ipi_cpu0mask ) + FREE_CPUMASK_VAR(per_cpu(send_ipi_cpumask, cpu)); } cleanup_cpu_root_pgt(cpu); @@ -1034,7 +1039,8 @@ static int cpu_smpboot_alloc(unsigned int cpu) if ( !(cond_zalloc_cpumask_var(&per_cpu(cpu_sibling_mask, cpu)) && cond_zalloc_cpumask_var(&per_cpu(cpu_core_mask, cpu)) && - cond_alloc_cpumask_var(&per_cpu(scratch_cpumask, cpu))) ) + cond_alloc_cpumask_var(&per_cpu(scratch_cpumask, cpu)) && + cond_alloc_cpumask_var(&per_cpu(send_ipi_cpumask, cpu))) ) goto out; rc = 0; @@ -1175,6 +1181,7 @@ void __init smp_prepare_boot_cpu(void) cpumask_set_cpu(cpu, &cpu_present_map); #if NR_CPUS > 2 * BITS_PER_LONG per_cpu(scratch_cpumask, cpu) = &scratch_cpu0mask; + per_cpu(send_ipi_cpumask, cpu) = &send_ipi_cpu0mask; #endif get_cpu_info()->use_pv_cr3 = false; From patchwork Wed Feb 12 16:49:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 11378801 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D65701805 for ; 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x-conformance=sidf_compatible IronPort-SDR: imis5REQngC0ypixDKgrG+VNfdZUMAPioPOuTWUK1JBT9apKHF1MnlSoANwWGqfMZP+yoMAaIr 8dOYMVOXH48BRpT0MUoSB6NZ0rHIsujYNlv2/sL/B3PJvAjE12RKpbipxDyHPx7mNVjZuBY5UB cfSnOnTibqJf7FftVHCbf1hsWY50/8yaswuN/V+e6cA5qeqNnSXom1aIoJs9mTeNcQFnmzTkdM mkpXrw54ur29hdynW2eua8u0/lhMfpis0O0KI53yzYHithRl6v7wHkvDC4dPVKjDY5xXdno8fm Mm4= X-SBRS: 2.7 X-MesageID: 12716981 X-Ironport-Server: esa5.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.70,433,1574139600"; d="scan'208";a="12716981" From: Roger Pau Monne To: Date: Wed, 12 Feb 2020 17:49:49 +0100 Message-ID: <20200212164949.56434-4-roger.pau@citrix.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200212164949.56434-1-roger.pau@citrix.com> References: <20200212164949.56434-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH 3/3] x86: add accessors for scratch cpu mask X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Wei Liu , Jan Beulich , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Current usage of the per-CPU scratch cpumask is dangerous since there's no way to figure out if the mask is already being used except for manual code inspection of all the callers and possible call paths. This is unsafe and not reliable, so introduce a minimal get/put infrastructure to prevent nested usage of the scratch mask and usage in interrupt context. Signed-off-by: Roger Pau Monné --- xen/arch/x86/io_apic.c | 6 ++++-- xen/arch/x86/irq.c | 13 ++++++++++--- xen/arch/x86/mm.c | 30 +++++++++++++++++++++--------- xen/arch/x86/msi.c | 4 +++- xen/arch/x86/smpboot.c | 24 ++++++++++++++++++++++++ xen/include/asm-x86/smp.h | 10 ++++++++++ 6 files changed, 72 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index e98e08e9c8..4ee261b632 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -2236,10 +2236,11 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a entry.vector = vector; if (cpumask_intersects(desc->arch.cpu_mask, TARGET_CPUS)) { - cpumask_t *mask = this_cpu(scratch_cpumask); + cpumask_t *mask = get_scratch_cpumask(); cpumask_and(mask, desc->arch.cpu_mask, TARGET_CPUS); SET_DEST(entry, logical, cpu_mask_to_apicid(mask)); + put_scratch_cpumask(); } else { printk(XENLOG_ERR "IRQ%d: no target CPU (%*pb vs %*pb)\n", irq, CPUMASK_PR(desc->arch.cpu_mask), CPUMASK_PR(TARGET_CPUS)); @@ -2433,10 +2434,11 @@ int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val) if ( cpumask_intersects(desc->arch.cpu_mask, TARGET_CPUS) ) { - cpumask_t *mask = this_cpu(scratch_cpumask); + cpumask_t *mask = get_scratch_cpumask(); cpumask_and(mask, desc->arch.cpu_mask, TARGET_CPUS); SET_DEST(rte, logical, cpu_mask_to_apicid(mask)); + put_scratch_cpumask(); } else { diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index cc2eb8e925..7ecf5376e3 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -196,7 +196,7 @@ static void _clear_irq_vector(struct irq_desc *desc) { unsigned int cpu, old_vector, irq = desc->irq; unsigned int vector = desc->arch.vector; - cpumask_t *tmp_mask = this_cpu(scratch_cpumask); + cpumask_t *tmp_mask = get_scratch_cpumask(); BUG_ON(!valid_irq_vector(vector)); @@ -223,7 +223,10 @@ static void _clear_irq_vector(struct irq_desc *desc) trace_irq_mask(TRC_HW_IRQ_CLEAR_VECTOR, irq, vector, tmp_mask); if ( likely(!desc->arch.move_in_progress) ) + { + put_scratch_cpumask(); return; + } /* If we were in motion, also clear desc->arch.old_vector */ old_vector = desc->arch.old_vector; @@ -236,6 +239,7 @@ static void _clear_irq_vector(struct irq_desc *desc) per_cpu(vector_irq, cpu)[old_vector] = ~irq; } + put_scratch_cpumask(); release_old_vec(desc); desc->arch.move_in_progress = 0; @@ -1152,10 +1156,11 @@ static void irq_guest_eoi_timer_fn(void *data) break; case ACKTYPE_EOI: - cpu_eoi_map = this_cpu(scratch_cpumask); + cpu_eoi_map = get_scratch_cpumask(); cpumask_copy(cpu_eoi_map, action->cpu_eoi_map); spin_unlock_irq(&desc->lock); on_selected_cpus(cpu_eoi_map, set_eoi_ready, desc, 0); + put_scratch_cpumask(); return; } @@ -2531,12 +2536,12 @@ void fixup_irqs(const cpumask_t *mask, bool verbose) unsigned int irq; static int warned; struct irq_desc *desc; + cpumask_t *affinity = get_scratch_cpumask(); for ( irq = 0; irq < nr_irqs; irq++ ) { bool break_affinity = false, set_affinity = true; unsigned int vector; - cpumask_t *affinity = this_cpu(scratch_cpumask); if ( irq == 2 ) continue; @@ -2640,6 +2645,8 @@ void fixup_irqs(const cpumask_t *mask, bool verbose) irq, CPUMASK_PR(affinity)); } + put_scratch_cpumask(); + /* That doesn't seem sufficient. Give it 1ms. */ local_irq_enable(); mdelay(1); diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 9b33829084..bded19717b 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -1271,7 +1271,7 @@ void put_page_from_l1e(l1_pgentry_t l1e, struct domain *l1e_owner) (l1e_owner == pg_owner) ) { struct vcpu *v; - cpumask_t *mask = this_cpu(scratch_cpumask); + cpumask_t *mask = get_scratch_cpumask(); cpumask_clear(mask); @@ -1288,6 +1288,7 @@ void put_page_from_l1e(l1_pgentry_t l1e, struct domain *l1e_owner) if ( !cpumask_empty(mask) ) flush_tlb_mask(mask); + put_scratch_cpumask(); } #endif /* CONFIG_PV_LDT_PAGING */ put_page(page); @@ -2912,7 +2913,7 @@ static int _get_page_type(struct page_info *page, unsigned long type, * vital that no other CPUs are left with mappings of a frame * which is about to become writeable to the guest. */ - cpumask_t *mask = this_cpu(scratch_cpumask); + cpumask_t *mask = get_scratch_cpumask(); BUG_ON(in_irq()); cpumask_copy(mask, d->dirty_cpumask); @@ -2928,6 +2929,7 @@ static int _get_page_type(struct page_info *page, unsigned long type, perfc_incr(need_flush_tlb_flush); flush_tlb_mask(mask); } + put_scratch_cpumask(); /* We lose existing type and validity. */ nx &= ~(PGT_type_mask | PGT_validated); @@ -3644,7 +3646,7 @@ long do_mmuext_op( case MMUEXT_TLB_FLUSH_MULTI: case MMUEXT_INVLPG_MULTI: { - cpumask_t *mask = this_cpu(scratch_cpumask); + cpumask_t *mask = get_scratch_cpumask(); if ( unlikely(currd != pg_owner) ) rc = -EPERM; @@ -3654,12 +3656,17 @@ long do_mmuext_op( mask)) ) rc = -EINVAL; if ( unlikely(rc) ) + { + put_scratch_cpumask(); break; + } if ( op.cmd == MMUEXT_TLB_FLUSH_MULTI ) flush_tlb_mask(mask); else if ( __addr_ok(op.arg1.linear_addr) ) flush_tlb_one_mask(mask, op.arg1.linear_addr); + put_scratch_cpumask(); + break; } @@ -3692,7 +3699,7 @@ long do_mmuext_op( else if ( likely(cache_flush_permitted(currd)) ) { unsigned int cpu; - cpumask_t *mask = this_cpu(scratch_cpumask); + cpumask_t *mask = get_scratch_cpumask(); cpumask_clear(mask); for_each_online_cpu(cpu) @@ -3700,6 +3707,7 @@ long do_mmuext_op( per_cpu(cpu_sibling_mask, cpu)) ) __cpumask_set_cpu(cpu, mask); flush_mask(mask, FLUSH_CACHE); + put_scratch_cpumask(); } else rc = -EINVAL; @@ -4165,12 +4173,13 @@ long do_mmu_update( * Force other vCPU-s of the affected guest to pick up L4 entry * changes (if any). */ - unsigned int cpu = smp_processor_id(); - cpumask_t *mask = per_cpu(scratch_cpumask, cpu); + cpumask_t *mask = get_scratch_cpumask(); - cpumask_andnot(mask, pt_owner->dirty_cpumask, cpumask_of(cpu)); + cpumask_andnot(mask, pt_owner->dirty_cpumask, + cpumask_of(smp_processor_id())); if ( !cpumask_empty(mask) ) flush_mask(mask, FLUSH_TLB_GLOBAL | FLUSH_ROOT_PGTBL); + put_scratch_cpumask(); } perfc_add(num_page_updates, i); @@ -4361,7 +4370,7 @@ static int __do_update_va_mapping( mask = d->dirty_cpumask; break; default: - mask = this_cpu(scratch_cpumask); + mask = get_scratch_cpumask(); rc = vcpumask_to_pcpumask(d, const_guest_handle_from_ptr(bmap_ptr, void), mask); @@ -4381,7 +4390,7 @@ static int __do_update_va_mapping( mask = d->dirty_cpumask; break; default: - mask = this_cpu(scratch_cpumask); + mask = get_scratch_cpumask(); rc = vcpumask_to_pcpumask(d, const_guest_handle_from_ptr(bmap_ptr, void), mask); @@ -4392,6 +4401,9 @@ static int __do_update_va_mapping( break; } + if ( mask && mask != d->dirty_cpumask ) + put_scratch_cpumask(); + return rc; } diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c index c85cf9f85a..1ec1cc51d3 100644 --- a/xen/arch/x86/msi.c +++ b/xen/arch/x86/msi.c @@ -159,13 +159,15 @@ void msi_compose_msg(unsigned vector, const cpumask_t *cpu_mask, struct msi_msg if ( cpu_mask ) { - cpumask_t *mask = this_cpu(scratch_cpumask); + cpumask_t *mask; if ( !cpumask_intersects(cpu_mask, &cpu_online_map) ) return; + mask = get_scratch_cpumask(); cpumask_and(mask, cpu_mask, &cpu_online_map); msg->dest32 = cpu_mask_to_apicid(mask); + put_scratch_cpumask(); } msg->address_hi = MSI_ADDR_BASE_HI; diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c index 82e89201b3..67ee490f94 100644 --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -57,6 +57,30 @@ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_mask); DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, scratch_cpumask); static cpumask_t scratch_cpu0mask; +#ifndef NDEBUG +cpumask_t *scratch_cpumask(const char *fn) +{ + static DEFINE_PER_CPU(const char *, scratch_cpumask_use); + + /* + * Scratch cpumask cannot be used in IRQ context, or else we would have to + * make sure all users have interrupts disabled while using the scratch + * mask. + */ + BUG_ON(in_irq()); + + if ( fn && unlikely(this_cpu(scratch_cpumask_use)) ) + { + printk("%s: scratch CPU mask already in use by %s\n", + fn, this_cpu(scratch_cpumask_use)); + BUG(); + } + this_cpu(scratch_cpumask_use) = fn; + + return fn ? this_cpu(scratch_cpumask) : NULL; +} +#endif + DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, send_ipi_cpumask); static cpumask_t send_ipi_cpu0mask; diff --git a/xen/include/asm-x86/smp.h b/xen/include/asm-x86/smp.h index 92d69a5ea0..28f2044bb7 100644 --- a/xen/include/asm-x86/smp.h +++ b/xen/include/asm-x86/smp.h @@ -23,6 +23,16 @@ DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_mask); DECLARE_PER_CPU(cpumask_var_t, cpu_core_mask); DECLARE_PER_CPU(cpumask_var_t, scratch_cpumask); +#ifndef NDEBUG +/* Not to be called directly, use {get/put}_scratch_cpumask(). */ +cpumask_t *scratch_cpumask(const char *fn); +#define get_scratch_cpumask() scratch_cpumask(__func__) +#define put_scratch_cpumask() ((void)scratch_cpumask(NULL)) +#else +#define get_scratch_cpumask() this_cpu(scratch_cpumask) +#define put_scratch_cpumask() +#endif + /* * Do we, for platform reasons, need to actually keep CPUs online when we * would otherwise prefer them to be off?