From patchwork Wed Feb 12 17:09:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Minnekhanov X-Patchwork-Id: 11378855 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CD40113A4 for ; Wed, 12 Feb 2020 17:09:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AC1F820658 for ; Wed, 12 Feb 2020 17:09:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="d2Nx9id/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728576AbgBLRJu (ORCPT ); Wed, 12 Feb 2020 12:09:50 -0500 Received: from mail-lf1-f66.google.com ([209.85.167.66]:33082 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727264AbgBLRJt (ORCPT ); Wed, 12 Feb 2020 12:09:49 -0500 Received: by mail-lf1-f66.google.com with SMTP id n25so2162623lfl.0; Wed, 12 Feb 2020 09:09:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RzAlCoqAZDSn2TyJo2MiPAMETy9dxfPAIY1/YsUVGt4=; b=d2Nx9id/JrT0eXUr1xLLPwoTcuiTj9wmz7xhTbXCNS7YqS8RYRhkFHhsDhHPPEfywd IjEeizaeKNtsfyoGwM/n6UCuvSZ3NfRQJ44eW7w7IcazWT3b1tCu0qsCm93oGrEem/oK HiW1QzmrjQ59z3nJKCFMWba/cLz8yORL35V7omBKCmu+JqfwhNNe6rjmiUF6e2CuUcL3 y7xnHzTblBbmHjLtR7BIwZewTmOz26BuqzjW5To3T2FNRLrJDagenb4BJhr2X4eoTcx4 GaNEt1eHnrjEnONI//6Hp1T4NcSApXf32I799KbFq8lZw2G5wD/uSJJhrly5pT0kgmLd 4n2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RzAlCoqAZDSn2TyJo2MiPAMETy9dxfPAIY1/YsUVGt4=; b=jBg9B3V1CHRBH2bsDN5cSzBsfRbG1K9jaak9CslrrK0TcvydaapiOqlF6mZV4baA8+ atc4OK7RNJPdPl79+/C+917azZXSZ/lnEJg9BsuP4rnX5CXx830UWgbi4MZQsToowH/v kI/UOPY9tvGXbknsL2IvDNAf9DlioetkE7QIoXFNG3DgQaHgPuNmVzLzWp95RWLS21wg aBCiKrtfET4QAOS065Z5LL33aUN2lgcH52/ekijA7ZzF1ezS0HnuoW8t+Hn9srxasxeT wTjbds5c841a8lUhiI6Yl2jNmhW9LZTmu3VTkNvC1t18D8FT64evOUYVj2Slv8wchULo tXFQ== X-Gm-Message-State: APjAAAVsVnPSKS+QL4K0/c0Y1dSERsIKrcdmr7gzNMpYK0NPJIeY/HDG aQciOnGZgXn6X0jmgH5Imd8= X-Google-Smtp-Source: APXvYqy8pKirAFGJW8gENb6o/zFLNS7p3rMsxgaWdFoS4acwGWb2X0f4yu3RCqhZABJCSC1CtM4Usg== X-Received: by 2002:a19:7b0a:: with SMTP id w10mr7196691lfc.90.1581527387704; Wed, 12 Feb 2020 09:09:47 -0800 (PST) Received: from emb-minnehanov-OptiPlex-7060.collabio.net ([77.244.21.162]) by smtp.gmail.com with ESMTPSA id b20sm607955ljp.20.2020.02.12.09.09.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Feb 2020 09:09:47 -0800 (PST) From: Alexey Minnekhanov To: Andy Gross , Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Rob Herring , Mark Rutland , devicetree@vger.kernel.org, Alexey Minnekhanov Subject: [PATCH 1/5] dt-bindings: Add vendor prefix for Xiaomi Date: Wed, 12 Feb 2020 20:09:12 +0300 Message-Id: <20200212170916.7494-2-alexey.min@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200212170916.7494-1-alexey.min@gmail.com> References: <20200212170916.7494-1-alexey.min@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Xiaomi Corporation is a Chinese electronics company. Signed-off-by: Alexey Minnekhanov --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 6046f4555852..7cef5ee734d6 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1054,6 +1054,8 @@ patternProperties: description: X-Powers "^xes,.*": description: Extreme Engineering Solutions (X-ES) + "^xiaomi,.*": + description: Xiaomi Technology Co., Ltd. "^xillybus,.*": description: Xillybus Ltd. "^xlnx,.*": From patchwork Wed Feb 12 17:09:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Minnekhanov X-Patchwork-Id: 11378857 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0E0ED13A4 for ; Wed, 12 Feb 2020 17:10:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E20A821739 for ; Wed, 12 Feb 2020 17:10:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Xo3polnJ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727111AbgBLRJ7 (ORCPT ); Wed, 12 Feb 2020 12:09:59 -0500 Received: from mail-lj1-f195.google.com ([209.85.208.195]:46493 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727054AbgBLRJ6 (ORCPT ); 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Wed, 12 Feb 2020 09:09:56 -0800 (PST) Received: from emb-minnehanov-OptiPlex-7060.collabio.net ([77.244.21.162]) by smtp.gmail.com with ESMTPSA id b20sm607955ljp.20.2020.02.12.09.09.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Feb 2020 09:09:55 -0800 (PST) From: Alexey Minnekhanov To: Andy Gross , Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Rob Herring , Mark Rutland , devicetree@vger.kernel.org, Alexey Minnekhanov Subject: [PATCH 2/5] dt-bindings: arm: Add kryo260 compatible Date: Wed, 12 Feb 2020 20:09:13 +0300 Message-Id: <20200212170916.7494-3-alexey.min@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200212170916.7494-1-alexey.min@gmail.com> References: <20200212170916.7494-1-alexey.min@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Kryo260 is found in SDM660, so add it in list of cpu compatibles Signed-off-by: Alexey Minnekhanov --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index c23c24ff7575..d994c066a8bd 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -155,6 +155,7 @@ properties: - nvidia,tegra194-carmel - qcom,krait - qcom,kryo + - qcom,kryo260 - qcom,kryo385 - qcom,kryo485 - qcom,scorpion From patchwork Wed Feb 12 17:09:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Minnekhanov X-Patchwork-Id: 11378859 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 806B1109A for ; Wed, 12 Feb 2020 17:10:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5FAE521739 for ; Wed, 12 Feb 2020 17:10:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="nYGyzxcl" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727264AbgBLRKF (ORCPT ); Wed, 12 Feb 2020 12:10:05 -0500 Received: from mail-lf1-f68.google.com ([209.85.167.68]:34506 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727054AbgBLRKF (ORCPT ); Wed, 12 Feb 2020 12:10:05 -0500 Received: by mail-lf1-f68.google.com with SMTP id l18so2160468lfc.1; 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Wed, 12 Feb 2020 09:10:03 -0800 (PST) Received: from emb-minnehanov-OptiPlex-7060.collabio.net ([77.244.21.162]) by smtp.gmail.com with ESMTPSA id b20sm607955ljp.20.2020.02.12.09.10.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Feb 2020 09:10:03 -0800 (PST) From: Alexey Minnekhanov To: Andy Gross , Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Rob Herring , Mark Rutland , devicetree@vger.kernel.org, Alexey Minnekhanov Subject: [PATCH 3/5] dt-bindings: arm: qcom: Add sdm630 and sdm660 SoCs Date: Wed, 12 Feb 2020 20:09:14 +0300 Message-Id: <20200212170916.7494-4-alexey.min@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200212170916.7494-1-alexey.min@gmail.com> References: <20200212170916.7494-1-alexey.min@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add a SoC strings for the Qualcomm SDM630 and SDM660 SoCs. Also document the new xiaomi,lavender compatible used in a device tree binding. Signed-off-by: Alexey Minnekhanov --- Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 529d924931f1..c5af92acd427 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -36,6 +36,8 @@ description: | msm8994 msm8996 sc7180 + sdm630 + sdm660 sdm845 The 'board' element must be one of the following strings: @@ -125,6 +127,11 @@ properties: - samsung,a5u-eur - const: qcom,msm8916 + - items: + - enum: + - xiaomi,lavender + - const: qcom,sdm660 + - items: - const: qcom,msm8996-mtp From patchwork Wed Feb 12 17:09:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Minnekhanov X-Patchwork-Id: 11378861 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 93C2B109A for ; Wed, 12 Feb 2020 17:10:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5D90F20658 for ; Wed, 12 Feb 2020 17:10:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="JNaFNUrX" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728742AbgBLRKO (ORCPT ); Wed, 12 Feb 2020 12:10:14 -0500 Received: from mail-lj1-f196.google.com ([209.85.208.196]:42841 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728921AbgBLRKN (ORCPT ); Wed, 12 Feb 2020 12:10:13 -0500 Received: by mail-lj1-f196.google.com with SMTP id d10so3184068ljl.9; Wed, 12 Feb 2020 09:10:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=I+NQgjmMsmFtLG1PUD69gXmQ8NgXiKUXUcIf+0EOQyg=; b=JNaFNUrXFNK1D9ddpj3KXYX3CCbExmbbeXCvPpdpQTcVdiDxi4WnRq7vGKBNLXmK/O adug5pB9M+ZWrIPwPUQBq1o5kqSv7pbcaQHGYZ/fG+CAKhvV2S9mNteyN4IJETfOJ8nk j0PNHkBlpTu4I683i+DY1ymluZH+vG2LGxMycW/7KZqB5yb1Kc0sFtVTaZjTpfY58KM7 CrQOkSBvDNHSgQH3VpPkjwsMT9O+fx8/t0JiT6jE0PXl4ku9WyIFZxt0StSR0LNyiaXt D8CiXHA2mDS0glCtwzLBdNL0rXYr+ebwluOzXi1HiclKPY9k6LIhbO083iNqZE5Pzm5j qdMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=I+NQgjmMsmFtLG1PUD69gXmQ8NgXiKUXUcIf+0EOQyg=; b=HYKb2ylVVSlVJiT/cfEabTnU6qTMcch49SWx4o3qGB9NNVVzd1XkVmPgWd0VIqqzDp v46lzV0jY7tHrw0Tf5h9sDI8Fui7vMhk1YGgORXsrP7+3JRYmXmps5yUMEecfNrANTUd EpuJ1WlkG7zFp2mFxlHB6/8Ycib0nYlIFvklfhGABsezi0vD6Qzc00AGwKxVsD8q9E95 SpKcEAxeV8+IcnRW25FimAikO8vgEaesqjOKg1SKW/nJBXGF1p3Wx9KiBSqJ6uREb2Ol 8eiMjo3/5XrSkAonQJNgL1OYLeDb/V3B9VSXzV5pgPvl/v4AuegF7aBNWZV/zYBTjh2n DXCQ== X-Gm-Message-State: APjAAAUaDnKgasglSuwWjYD+XBr9elxnyBgQitHuyKF2dMoi9ls2IRQV Oomvdr7L0tFwogNoGkkK5tk= X-Google-Smtp-Source: APXvYqxc5tYINuZ0RNgTAI63YJ89etc0uLE4lKjO1MtgR6vEsLzoMqch6+OSOMKUqyH0zCulR/RhpA== X-Received: by 2002:a2e:e12:: with SMTP id 18mr8544521ljo.123.1581527410646; Wed, 12 Feb 2020 09:10:10 -0800 (PST) Received: from emb-minnehanov-OptiPlex-7060.collabio.net ([77.244.21.162]) by smtp.gmail.com with ESMTPSA id b20sm607955ljp.20.2020.02.12.09.10.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Feb 2020 09:10:10 -0800 (PST) From: Alexey Minnekhanov To: Andy Gross , Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Rob Herring , Mark Rutland , devicetree@vger.kernel.org, Alexey Minnekhanov , Craig Tatlor Subject: [PATCH 4/5] arm64: dts: qcom: Add SDM660 SoC support Date: Wed, 12 Feb 2020 20:09:15 +0300 Message-Id: <20200212170916.7494-5-alexey.min@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200212170916.7494-1-alexey.min@gmail.com> References: <20200212170916.7494-1-alexey.min@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Initial device tree support for Qualcomm SDM660 SoC. SDM660 is based off MSM8998 and uses some of its drivers. SDM630/636 are based off SDM660 SoC and they are pin and software compatible. The device tree is based on the CAF 4.4 kernel tree. Features: * CPU nodes * Timer nodes * Interrupt controller * Global Clock Controller * Top Level Mode Multiplexer (pin controller) * UART node This is inspired by and based on the work of Craig Tatlor in https://patchwork.kernel.org/patch/10563667/ Signed-off-by: Craig Tatlor Signed-off-by: Alexey Minnekhanov --- arch/arm64/boot/dts/qcom/sdm660.dtsi | 373 +++++++++++++++++++++++++++ 1 file changed, 373 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sdm660.dtsi diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi new file mode 100644 index 000000000000..1187f2f98bd0 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi @@ -0,0 +1,373 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2018, Craig Tatlor. + * Copyright (c) 2020, Alexey Minnekhanov + */ + +#include +#include + +/ { + interrupt-parent = <&intc>; + + #address-cells = <2>; + #size-cells = <2>; + + chosen { }; + + clocks { + xo_board: xo_board { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <19200000>; + clock-output-names = "xo_board"; + }; + + sleep_clk: sleep_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32764>; + clock-output-names = "sleep_clk"; + }; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + CPU0: cpu@100 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x100>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + next-level-cache = <&L2_1>; + L2_1: l2-cache { + compatible = "cache"; + cache-level = <2>; + }; + L1_I_100: l1-icache { + compatible = "cache"; + }; + L1_D_100: l1-dcache { + compatible = "cache"; + }; + }; + + CPU1: cpu@101 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x101>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + next-level-cache = <&L2_1>; + L1_I_101: l1-icache { + compatible = "cache"; + }; + L1_D_101: l1-dcache { + compatible = "cache"; + }; + }; + + CPU2: cpu@102 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x102>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + next-level-cache = <&L2_1>; + L1_I_102: l1-icache { + compatible = "cache"; + }; + L1_D_102: l1-dcache { + compatible = "cache"; + }; + }; + + CPU3: cpu@103 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x103>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + next-level-cache = <&L2_1>; + L1_I_103: l1-icache { + compatible = "cache"; + }; + L1_D_103: l1-dcache { + compatible = "cache"; + }; + }; + + CPU4: cpu@0 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x0>; + enable-method = "psci"; + capacity-dmips-mhz = <640>; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + compatible = "cache"; + cache-level = <2>; + }; + L1_I_0: l1-icache { + compatible = "cache"; + }; + L1_D_0: l1-dcache { + compatible = "cache"; + }; + }; + + CPU5: cpu@1 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x1>; + enable-method = "psci"; + capacity-dmips-mhz = <640>; + next-level-cache = <&L2_0>; + L1_I_1: l1-icache { + compatible = "cache"; + }; + L1_D_1: l1-dcache { + compatible = "cache"; + }; + }; + + CPU6: cpu@2 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x2>; + enable-method = "psci"; + capacity-dmips-mhz = <640>; + next-level-cache = <&L2_0>; + L1_I_2: l1-icache { + compatible = "cache"; + }; + L1_D_2: l1-dcache { + compatible = "cache"; + }; + }; + + CPU7: cpu@3 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x3>; + enable-method = "psci"; + capacity-dmips-mhz = <640>; + next-level-cache = <&L2_0>; + L1_I_3: l1-icache { + compatible = "cache"; + }; + L1_D_3: l1-dcache { + compatible = "cache"; + }; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU4>; + }; + + core1 { + cpu = <&CPU5>; + }; + + core2 { + cpu = <&CPU6>; + }; + + core3 { + cpu = <&CPU7>; + }; + }; + + cluster1 { + core0 { + cpu = <&CPU0>; + }; + + core1 { + cpu = <&CPU1>; + }; + + core2 { + cpu = <&CPU2>; + }; + + core3 { + cpu = <&CPU3>; + }; + }; + }; + }; + + firmware { + scm { + compatible = "qcom,scm"; + }; + }; + + memory { + device_type = "memory"; + /* We expect the bootloader to fill in the reg */ + reg = <0 0 0 0>; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + soc: soc { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + compatible = "simple-bus"; + + gcc: clock-controller@100000 { + compatible = "qcom,gcc-sdm660"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + reg = <0x00100000 0x94000>; + }; + + tlmm: pinctrl@3100000 { + compatible = "qcom,sdm660-pinctrl"; + reg = <0x03100000 0x400000>, + <0x03500000 0x400000>, + <0x03900000 0x400000>; + reg-names = "south", "center", "north"; + interrupts = ; + gpio-controller; + gpio-ranges = <&tlmm 0 0 114>; + gpio-reserved-ranges = <8 4>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + + uart_console_active: uart_console_active { + pinmux { + pins = "gpio4", "gpio5"; + function = "blsp_uart2"; + }; + + pinconf { + pins = "gpio4", "gpio5"; + drive-strength = <2>; + bias-disable; + }; + }; + }; + + spmi_bus: spmi@800f000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x0800f000 0x1000>, + <0x08400000 0x1000000>, + <0x09400000 0x1000000>, + <0x0a400000 0x220000>, + <0x0800a000 0x3000>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + interrupt-names = "periph_irq"; + interrupts = ; + qcom,ee = <0>; + qcom,channel = <0>; + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + cell-index = <0>; + }; + + blsp1_uart2: serial@c170000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x0c170000 0x1000>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + timer@17920000 { + #address-cells = <1>; + #size-cells = <1>; + ranges; + compatible = "arm,armv7-timer-mem"; + reg = <0x17920000 0x1000>; + + frame@17921000 { + frame-number = <0>; + interrupts = , + ; + reg = <0x17921000 0x1000>, + <0x17922000 0x1000>; + }; + + frame@17923000 { + frame-number = <1>; + interrupts = ; + reg = <0x17923000 0x1000>; + status = "disabled"; + }; + + frame@17924000 { + frame-number = <2>; + interrupts = ; + reg = <0x17924000 0x1000>; + status = "disabled"; + }; + + frame@17925000 { + frame-number = <3>; + interrupts = ; + reg = <0x17925000 0x1000>; + status = "disabled"; + }; + + frame@17926000 { + frame-number = <4>; + interrupts = ; + reg = <0x17926000 0x1000>; + status = "disabled"; + }; + + frame@17927000 { + frame-number = <5>; + interrupts = ; + reg = <0x17927000 0x1000>; + status = "disabled"; + }; + + frame@17928000 { + frame-number = <6>; + interrupts = ; + reg = <0x17928000 0x1000>; + status = "disabled"; + }; + }; + + intc: interrupt-controller@17a00000 { + compatible = "arm,gic-v3"; + reg = <0x17a00000 0x10000>, + <0x17b00000 0x100000>; + #interrupt-cells = <3>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + interrupt-controller; + #redistributor-regions = <1>; + redistributor-stride = <0x0 0x20000>; + interrupts = ; + }; + }; +}; From patchwork Wed Feb 12 17:09:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Minnekhanov X-Patchwork-Id: 11378863 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3085013A4 for ; Wed, 12 Feb 2020 17:10:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0FF2324649 for ; Wed, 12 Feb 2020 17:10:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="l1kW+okF" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728794AbgBLRKR (ORCPT ); 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Wed, 12 Feb 2020 09:10:14 -0800 (PST) From: Alexey Minnekhanov To: Andy Gross , Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Rob Herring , Mark Rutland , devicetree@vger.kernel.org, Alexey Minnekhanov Subject: [PATCH 5/5] arm64: dts: qcom: Add Xiaomi Redmi Note 7 (lavender) Date: Wed, 12 Feb 2020 20:09:16 +0300 Message-Id: <20200212170916.7494-6-alexey.min@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200212170916.7494-1-alexey.min@gmail.com> References: <20200212170916.7494-1-alexey.min@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This adds the initial device tree support for Xiaomi Redmi Note 7 (lavender) phone. It is based on SDM660 SoC. Currently it can be booted into initrd with a shell over UART and you can get kernel boot logs from a pstore-ramoops. Signed-off-by: Alexey Minnekhanov --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/sdm660-xiaomi-lavender.dts | 42 +++++++++++++++++++ 2 files changed, 43 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 973c0f079659..a61b1089bd9a 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -15,6 +15,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-hp-envy-x2.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-lenovo-miix-630.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-lavender.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r3.dtb diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts new file mode 100644 index 000000000000..676efba0e16b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, Alexey Minnekhanov + */ + +/dts-v1/; + +#include "sdm660.dtsi" + +/ { + model = "Xiaomi Redmi Note 7"; + compatible = "xiaomi,lavender", "qcom,sdm660"; + + aliases { + serial0 = &blsp1_uart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ramoops@a0000000 { + compatible = "ramoops"; + reg = <0x0 0xa0000000 0x0 0x400000>; + console-size = <0x20000>; + record-size = <0x20000>; + ftrace-size = <0x0>; + pmsg-size = <0x20000>; + }; + }; +}; + +&blsp1_uart2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart_console_active>; +};