From patchwork Mon Feb 17 03:19:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joakim Zhang X-Patchwork-Id: 11385099 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 452B418E8 for ; Mon, 17 Feb 2020 03:26:59 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 21B5D21744 for ; Mon, 17 Feb 2020 03:26:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="uT0dukuc" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 21B5D21744 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=z4+LT2WldjXBfa35VEuv/GXPplzfrzvY6UXepYnT2VM=; b=uT0dukuccRIgFo2hQ/8dXiRkOV bkaQ4BXI6WGLOo/4EpKOkfGM3S7rqpVGX+8l2k3uObTflOJVR1cun5jGj392VyxJpaBWJ+1Fu6h4L QtO9hoMfeUdSS+BE12aXZTzHyNj31n2RYZF0xKZx/s153iRPTFK68GWlS5/UbOGqHjS9rIupMA6OQ RZrTDyjqreMdyW35ga9vZGhf/f59DFMOVVqgEyh+TRI0mM+kf+8tm3/+908lBKWHKUN/PNZYMqy73 zsf4aXDCw8IdN7eQtKbE/g/qXFiy6P8hFdszOa3TEjahSXDsRLiwCdcI4aGMZvLHOU9s67FMgIeG9 4V4vUSkw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1j3X3c-0007hZ-Pk; Mon, 17 Feb 2020 03:26:52 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1j3X3P-0007US-AV for linux-arm-kernel@lists.infradead.org; Mon, 17 Feb 2020 03:26:40 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id B025A1A1F4B; Mon, 17 Feb 2020 04:26:35 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id ED05F1A1F30; Mon, 17 Feb 2020 04:26:25 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 41A8F402ED; Mon, 17 Feb 2020 11:26:14 +0800 (SGT) From: Joakim Zhang To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, s.hauer@pengutronix.de Subject: [PATCH 1/7] firmware: imx: scu-pd: add power domain for I2C and INTMUX in CM40 SS Date: Mon, 17 Feb 2020 11:19:15 +0800 Message-Id: <1581909561-12058-2-git-send-email-qiangqing.zhang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1581909561-12058-1-git-send-email-qiangqing.zhang@nxp.com> References: <1581909561-12058-1-git-send-email-qiangqing.zhang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200216_192639_494249_480C8456 X-CRM114-Status: UNSURE ( 8.30 ) X-CRM114-Notice: Please train this message. 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Signed-off-by: Joakim Zhang --- drivers/firmware/imx/scu-pd.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c index b556612207e5..e803dcf60d14 100644 --- a/drivers/firmware/imx/scu-pd.c +++ b/drivers/firmware/imx/scu-pd.c @@ -158,6 +158,10 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { /* DC SS */ { "dc0", IMX_SC_R_DC_0, 1, false, 0 }, { "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, true, 0 }, + + /* CM40 SS */ + { "cm40_i2c", IMX_SC_R_M4_0_I2C, 1, 0 }, + { "cm40_intmux", IMX_SC_R_M4_0_INTMUX, 1, 0 }, }; static const struct imx_sc_pd_soc imx8qxp_scu_pd = { From patchwork Mon Feb 17 03:19:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joakim Zhang X-Patchwork-Id: 11385111 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A5CB6159A for ; Mon, 17 Feb 2020 03:27:24 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8479E21744 for ; Mon, 17 Feb 2020 03:27:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="BVdelxpo" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8479E21744 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=gJjjfmY05/w2TR+nLu+qV93GAWkBZqwAYhHkLo7aFok=; b=BVdelxpoqZ37XRbynb1fHOXvCq CN5cM9WKqnheyoquOsTlXBCAEaFhr+5CFa/iFTyRBYihTZM60FCy4UFuqGFQA7Dqx8LxY0hl6PVSq Ls1mSclfI9bV0sv1CsNZ8+8FkWEi8ghDItpYQh80WVadOBag7FPVjU0xrK7PRNMrcEgI0L1E2+oJo 7hyy99K4bwCt1NmakfSw+kComkErp+ohFHRB6vi8FjNV9TNvPitXPqBZTsknSgd9XRN5ZKpOc3gXi e5sX59Ka4MxDDjYvCBvaqiegEgKllIEsLKiPUumDbTUTCakx+JdOg5FU3y5xBFLh4ovbmRuH+LJWB F9VZHEuA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1j3X43-0008B1-Ft; Mon, 17 Feb 2020 03:27:19 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1j3X3Q-0007UT-9N for linux-arm-kernel@lists.infradead.org; Mon, 17 Feb 2020 03:26:41 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 479B01A1F2C; Mon, 17 Feb 2020 04:26:37 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 81E9F1A1F31; Mon, 17 Feb 2020 04:26:27 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id CAAF74030D; Mon, 17 Feb 2020 11:26:15 +0800 (SGT) From: Joakim Zhang To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, s.hauer@pengutronix.de Subject: [PATCH 2/7] clk: imx8: Add SCU and LPCG clocks for I2C in CM40 SS Date: Mon, 17 Feb 2020 11:19:16 +0800 Message-Id: <1581909561-12058-3-git-send-email-qiangqing.zhang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1581909561-12058-1-git-send-email-qiangqing.zhang@nxp.com> References: <1581909561-12058-1-git-send-email-qiangqing.zhang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200216_192640_463276_B37B1004 X-CRM114-Status: UNSURE ( 7.47 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [92.121.34.13 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aisheng.dong@nxp.com, devicetree@vger.kernel.org, peng.fan@nxp.com, fugang.duan@nxp.com, Anson.Huang@nxp.com, festevam@gmail.com, linux-kernel@vger.kernel.org, Joakim Zhang , linux-imx@nxp.com, kernel@pengutronix.de, leonard.crestez@nxp.com, daniel.baluta@nxp.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add SCU and LPCG clocks for I2C in CM40 SS. Signed-off-by: Joakim Zhang --- include/dt-bindings/clock/imx8-clock.h | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/imx8-clock.h b/include/dt-bindings/clock/imx8-clock.h index 673a8c662340..84a442be700f 100644 --- a/include/dt-bindings/clock/imx8-clock.h +++ b/include/dt-bindings/clock/imx8-clock.h @@ -131,7 +131,12 @@ #define IMX_ADMA_PWM_CLK 188 #define IMX_ADMA_LCD_CLK 189 -#define IMX_SCU_CLK_END 190 +/* CM40 SS */ +#define IMX_CM40_IPG_CLK 200 +#define IMX_CM40_I2C_CLK 205 + +#define IMX_SCU_CLK_END 220 + /* LPCG clocks */ @@ -290,4 +295,10 @@ #define IMX_ADMA_LPCG_CLK_END 45 +/* CM40 SS LPCG */ +#define IMX_CM40_LPCG_I2C_IPG_CLK 0 +#define IMX_CM40_LPCG_I2C_CLK 1 + +#define IMX_CM40_LPCG_CLK_END 2 + #endif /* __DT_BINDINGS_CLOCK_IMX_H */ From patchwork Mon Feb 17 03:19:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joakim Zhang X-Patchwork-Id: 11385109 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3A30F159A for ; Mon, 17 Feb 2020 03:27:14 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 14F1E20659 for ; Mon, 17 Feb 2020 03:27:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="X9UXCoxN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 14F1E20659 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=Se5t5YNOm0M1IVg4Jew6ovhthjsRov9fm5eWHb57IN4=; b=X9UXCoxNsXJ/VT1wRZc89TgMc3 KhoTTS1Dd/WaLQff0Spysz1G8ylXmdkVI0wIwkio7XW1Eu4LLjhHkF9kr3QPvTqURblo+Pd+RolCM liA2RXGMgSdDkWhJ+zQ8q+7zroiZgBBH2IrF/1vKrsm11mxuVVyIsnQIpvRPRT5dISJhRMhcWFJbW Ep5e78hMyAX28MXLMSME6Oh5vxrU+Jz5v+qYMuhCkmBj+JV3Y+xLaGtPpbucuLrYZHICDeiXLWTnt DG0tuT02AomMbTZJUOmVVOwx2bMZlZryDtGyBx4FlpWOXby90EYl1FY0qmtM8y+9u5Ehdf/PLz9J9 ldY8ZIFw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1j3X3r-0007xd-Ce; Mon, 17 Feb 2020 03:27:07 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1j3X3P-0007UV-Ig for linux-arm-kernel@lists.infradead.org; Mon, 17 Feb 2020 03:26:41 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 61CEA1A1F30; Mon, 17 Feb 2020 04:26:38 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 9D2761A1F34; Mon, 17 Feb 2020 04:26:28 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 5F0E4402DD; Mon, 17 Feb 2020 11:26:17 +0800 (SGT) From: Joakim Zhang To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, s.hauer@pengutronix.de Subject: [PATCH 3/7] bindings: clock: imx8qxp: add "fsl, imx8qxp-lpcg-cm40" compatible string Date: Mon, 17 Feb 2020 11:19:17 +0800 Message-Id: <1581909561-12058-4-git-send-email-qiangqing.zhang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1581909561-12058-1-git-send-email-qiangqing.zhang@nxp.com> References: <1581909561-12058-1-git-send-email-qiangqing.zhang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200216_192639_749049_95061F20 X-CRM114-Status: UNSURE ( 7.53 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [92.121.34.13 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aisheng.dong@nxp.com, devicetree@vger.kernel.org, peng.fan@nxp.com, fugang.duan@nxp.com, Anson.Huang@nxp.com, festevam@gmail.com, linux-kernel@vger.kernel.org, Joakim Zhang , linux-imx@nxp.com, kernel@pengutronix.de, leonard.crestez@nxp.com, daniel.baluta@nxp.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add "fsl,imx8qxp-lpcg-cm40" compatible string. Signed-off-by: Joakim Zhang Acked-by: Rob Herring --- Documentation/devicetree/bindings/clock/imx8qxp-lpcg.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.txt b/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.txt index 965cfa42e025..dcb9208a0e02 100644 --- a/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.txt +++ b/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.txt @@ -21,6 +21,7 @@ Required properties: "fsl,imx8qxp-lpcg-img", "fsl,imx8qxp-lpcg-lsio", "fsl,imx8qxp-lpcg-vpu" + "fsl,imx8qxp-lpcg-cm40" - reg: Address and length of the register set - #clock-cells: Should be <1> From patchwork Mon Feb 17 03:19:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joakim Zhang X-Patchwork-Id: 11385113 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 59774159A for ; Mon, 17 Feb 2020 03:27:36 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 37B0520659 for ; Mon, 17 Feb 2020 03:27:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="AKW5mymE" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 37B0520659 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=RzGb6jA7ozvWDBYzvNoQ07w8hHtfwOuZkw8ZHdyBmXw=; b=AKW5mymEAD++zQIXnxlFWVhoag vTi4+jj8Q1v5SEvApPene47lxaLLs5Mxqjkzl37eQbJPU7MvYXoV0t5ZmnL7E+xx1mo3kCdyCL5LL NX+wXuUdQ4s/QLUwt9MEqs7vRUYtPXzal/S5Sbp/HRlIJiapU1oXDDDQgLIKtwHnhhOTEhNip3378 XjWzG2JLnTHvtkCwcI7PkLDETTuhI83T6Rd1+hyykbaP3PozdmUfcEXlODhbU5gvSBE3kKrIAj3iM B5gyPSHXAEop2T4rHEJq/8ILx1MwA4h8d2p+XsfRDTZ6F7aiqb/ggqyhLSCu+TIumAYJez40/Yy0D L6vWaSgA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1j3X4F-0008OS-V6; Mon, 17 Feb 2020 03:27:31 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1j3X3R-0007Vj-DR for linux-arm-kernel@lists.infradead.org; Mon, 17 Feb 2020 03:26:43 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 319131A1F31; Mon, 17 Feb 2020 04:26:40 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 29A4D1A1F41; Mon, 17 Feb 2020 04:26:30 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id E78E340320; Mon, 17 Feb 2020 11:26:18 +0800 (SGT) From: Joakim Zhang To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, s.hauer@pengutronix.de Subject: [PATCH 4/7] clk: imx: imx8qxp: Enable SCU and LPCG clocks for I2C in CM40 SS Date: Mon, 17 Feb 2020 11:19:18 +0800 Message-Id: <1581909561-12058-5-git-send-email-qiangqing.zhang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1581909561-12058-1-git-send-email-qiangqing.zhang@nxp.com> References: <1581909561-12058-1-git-send-email-qiangqing.zhang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200216_192641_766463_083E7DE3 X-CRM114-Status: UNSURE ( 9.68 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [92.121.34.13 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aisheng.dong@nxp.com, devicetree@vger.kernel.org, peng.fan@nxp.com, fugang.duan@nxp.com, Anson.Huang@nxp.com, festevam@gmail.com, linux-kernel@vger.kernel.org, Joakim Zhang , linux-imx@nxp.com, kernel@pengutronix.de, leonard.crestez@nxp.com, daniel.baluta@nxp.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Enable SCU and LPCG clocks for I2C in CM40 SS. Signed-off-by: Joakim Zhang --- drivers/clk/imx/clk-imx8qxp-lpcg.c | 12 ++++++++++++ drivers/clk/imx/clk-imx8qxp-lpcg.h | 3 +++ drivers/clk/imx/clk-imx8qxp.c | 4 ++++ 3 files changed, 19 insertions(+) diff --git a/drivers/clk/imx/clk-imx8qxp-lpcg.c b/drivers/clk/imx/clk-imx8qxp-lpcg.c index 04c8ee35e14c..795909ecfba6 100644 --- a/drivers/clk/imx/clk-imx8qxp-lpcg.c +++ b/drivers/clk/imx/clk-imx8qxp-lpcg.c @@ -151,6 +151,17 @@ static const struct imx8qxp_lpcg_data imx8qxp_lpcg_lsio[] = { { IMX_LSIO_LPCG_PWM6_IPG_MSTR_CLK, "pwm6_lpcg_ipg_mstr_clk", "pwm6_clk", 0, LSIO_PWM_6_LPCG, 24, 0, }, }; +static const struct imx8qxp_lpcg_data imx8qxp_lpcg_cm40[] = { + { IMX_CM40_LPCG_I2C_CLK, "cm40_lpcg_i2c_clk", "cm40_i2c_clk", 0, CM40_I2C_LPCG, 0, 0, }, + { IMX_CM40_LPCG_I2C_IPG_CLK, "cm40_lpcg_i2c_ipg_clk", "cm40_ipg_clk_root", 0, CM40_I2C_LPCG, 16, 0, }, +}; + +static const struct imx8qxp_ss_lpcg imx8qxp_ss_cm40 = { + .lpcg = imx8qxp_lpcg_cm40, + .num_lpcg = ARRAY_SIZE(imx8qxp_lpcg_cm40), + .num_max = IMX_CM40_LPCG_CLK_END, +}; + static const struct imx8qxp_ss_lpcg imx8qxp_ss_lsio = { .lpcg = imx8qxp_lpcg_lsio, .num_lpcg = ARRAY_SIZE(imx8qxp_lpcg_lsio), @@ -219,6 +230,7 @@ static const struct of_device_id imx8qxp_lpcg_match[] = { { .compatible = "fsl,imx8qxp-lpcg-adma", &imx8qxp_ss_adma, }, { .compatible = "fsl,imx8qxp-lpcg-conn", &imx8qxp_ss_conn, }, { .compatible = "fsl,imx8qxp-lpcg-lsio", &imx8qxp_ss_lsio, }, + { .compatible = "fsl,imx8qxp-lpcg-cm40", &imx8qxp_ss_cm40, }, { /* sentinel */ } }; diff --git a/drivers/clk/imx/clk-imx8qxp-lpcg.h b/drivers/clk/imx/clk-imx8qxp-lpcg.h index 2a37ce57c500..28ca730dd135 100644 --- a/drivers/clk/imx/clk-imx8qxp-lpcg.h +++ b/drivers/clk/imx/clk-imx8qxp-lpcg.h @@ -99,4 +99,7 @@ #define ADMA_FLEXCAN_1_LPCG 0x1ce0000 #define ADMA_FLEXCAN_2_LPCG 0x1cf0000 +/* CM40 SS */ +#define CM40_I2C_LPCG 0x60000 + #endif /* _IMX8QXP_LPCG_H */ diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c index 5e2903efc488..d051073ff042 100644 --- a/drivers/clk/imx/clk-imx8qxp.c +++ b/drivers/clk/imx/clk-imx8qxp.c @@ -53,6 +53,7 @@ static int imx8qxp_clk_probe(struct platform_device *pdev) clks[IMX_HSIO_PER_CLK] = clk_hw_register_fixed_rate(NULL, "hsio_per_clk_root", NULL, 0, 133333333); clks[IMX_LSIO_MEM_CLK] = clk_hw_register_fixed_rate(NULL, "lsio_mem_clk_root", NULL, 0, 200000000); clks[IMX_LSIO_BUS_CLK] = clk_hw_register_fixed_rate(NULL, "lsio_bus_clk_root", NULL, 0, 100000000); + clks[IMX_CM40_IPG_CLK] = clk_hw_register_fixed_rate(NULL, "cm40_ipg_clk_root", NULL, 0, 132000000); /* ARM core */ clks[IMX_A35_CLK] = imx_clk_scu("a35_clk", IMX_SC_R_A35, IMX_SC_PM_CLK_CPU); @@ -128,6 +129,9 @@ static int imx8qxp_clk_probe(struct platform_device *pdev) clks[IMX_GPU0_CORE_CLK] = imx_clk_scu("gpu_core0_clk", IMX_SC_R_GPU_0_PID0, IMX_SC_PM_CLK_PER); clks[IMX_GPU0_SHADER_CLK] = imx_clk_scu("gpu_shader0_clk", IMX_SC_R_GPU_0_PID0, IMX_SC_PM_CLK_MISC); + /* CM40 SS */ + clks[IMX_CM40_I2C_CLK] = imx_clk_scu("cm40_i2c_clk", IMX_SC_R_M4_0_I2C, IMX_SC_PM_CLK_PER); + for (i = 0; i < clk_data->num; i++) { if (IS_ERR(clks[i])) pr_warn("i.MX clk %u: register failed with %ld\n", From patchwork Mon Feb 17 03:19:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joakim Zhang X-Patchwork-Id: 11385115 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E0BFE159A for ; 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Mon, 17 Feb 2020 04:26:31 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 72D68402E0; Mon, 17 Feb 2020 11:26:20 +0800 (SGT) From: Joakim Zhang To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, s.hauer@pengutronix.de Subject: [PATCH 5/7] arch: arm64: dts: imx8qxp: add device node for I2C and INTMUX in CM40 SS Date: Mon, 17 Feb 2020 11:19:19 +0800 Message-Id: <1581909561-12058-6-git-send-email-qiangqing.zhang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1581909561-12058-1-git-send-email-qiangqing.zhang@nxp.com> References: <1581909561-12058-1-git-send-email-qiangqing.zhang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200216_192643_240735_DA43B7E4 X-CRM114-Status: GOOD ( 10.34 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [92.121.34.13 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aisheng.dong@nxp.com, devicetree@vger.kernel.org, peng.fan@nxp.com, fugang.duan@nxp.com, Anson.Huang@nxp.com, festevam@gmail.com, linux-kernel@vger.kernel.org, Joakim Zhang , linux-imx@nxp.com, kernel@pengutronix.de, leonard.crestez@nxp.com, daniel.baluta@nxp.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add device node for I2C and INTMUX in CM40 SS. Signed-off-by: Joakim Zhang --- arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 27 +++++++++++ arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 47 +++++++++++++++++++ 2 files changed, 74 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts index d3d26cca7d52..f88402ee650c 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts @@ -30,6 +30,26 @@ }; }; +&cm40_i2c { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cm40_i2c>; + status = "okay"; + + pca6416: gpio@20 { + compatible = "nxp,pca6416"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&cm40_intmux { + status = "okay"; +}; + &adma_lpuart0 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lpuart0>; @@ -161,6 +181,13 @@ }; &iomuxc { + pinctrl_cm40_i2c: cm40i2cgrp { + fsl,pins = < + IMX8QXP_ADC_IN1_M40_I2C0_SDA 0x0600004c + IMX8QXP_ADC_IN0_M40_I2C0_SCL 0x0600004c + >; + }; + pinctrl_fec1: fec1grp { fsl,pins = < IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020 diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index fb5f752b15fe..cd10519eced7 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -213,6 +213,53 @@ clock-output-names = "xtal_24MHz"; }; + cm40_subsys: bus@34000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x34000000 0x0 0x34000000 0x4000000>; + + cm40_lpcg: clock-controller@375d0000 { + compatible = "fsl,imx8qxp-lpcg-cm40"; + reg = <0x375d0000 0x70000>; + #clock-cells = <1>; + }; + + cm40_i2c: i2c@37230000 { + compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; + reg = <0x37230000 0x1000>; + interrupts = <9 0>; + interrupt-parent = <&cm40_intmux>; + clocks = <&cm40_lpcg IMX_CM40_LPCG_I2C_CLK>, + <&cm40_lpcg IMX_CM40_LPCG_I2C_IPG_CLK>; + clock-names = "per", "ipg"; + assigned-clocks = <&clk IMX_CM40_I2C_CLK>; + assigned-clock-rates = <24000000>; + power-domains = <&pd IMX_SC_R_M4_0_I2C>; + status = "disabled"; + }; + + cm40_intmux: intmux@37400000 { + compatible = "fsl,imx-intmux"; + reg = <0x37400000 0x1000>; + interrupts = , + , + , + , + , + , + , + ; + interrupt-controller; + interrupt-parent = <&gic>; + #interrupt-cells = <2>; + clocks = <&clk IMX_CM40_IPG_CLK>; + clock-names = "ipg"; + power-domains = <&pd IMX_SC_R_M4_0_INTMUX>; + status = "disabled"; + }; + }; + adma_subsys: bus@59000000 { compatible = "simple-bus"; #address-cells = <1>; From patchwork Mon Feb 17 03:19:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joakim Zhang X-Patchwork-Id: 11385117 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F2F23139A for ; Mon, 17 Feb 2020 03:28:00 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AB95220659 for ; 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Signed-off-by: Joakim Zhang --- drivers/clk/imx/clk-imx8qxp-lpcg.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/imx/clk-imx8qxp-lpcg.c b/drivers/clk/imx/clk-imx8qxp-lpcg.c index 795909ecfba6..07aba029c3ba 100644 --- a/drivers/clk/imx/clk-imx8qxp-lpcg.c +++ b/drivers/clk/imx/clk-imx8qxp-lpcg.c @@ -72,6 +72,9 @@ static const struct imx8qxp_lpcg_data imx8qxp_lpcg_adma[] = { { IMX_ADMA_LPCG_I2C2_CLK, "i2c2_lpcg_clk", "i2c2_clk", 0, ADMA_LPI2C_2_LPCG, 0, 0, }, { IMX_ADMA_LPCG_I2C3_IPG_CLK, "i2c3_lpcg_ipg_clk", "dma_ipg_clk_root", 0, ADMA_LPI2C_3_LPCG, 16, 0, }, { IMX_ADMA_LPCG_I2C3_CLK, "i2c3_lpcg_clk", "i2c3_clk", 0, ADMA_LPI2C_3_LPCG, 0, 0, }, + { IMX_ADMA_LPCG_CAN0_IPG_PE_CLK, "can0_lpcg_pe_clk", "can0_clk", 0, ADMA_FLEXCAN_0_LPCG, 0, 0, }, + { IMX_ADMA_LPCG_CAN0_IPG_CLK, "can0_lpcg_ipg_clk", "dma_ipg_clk_root", 0, ADMA_FLEXCAN_0_LPCG, 16, 0, }, + { IMX_ADMA_LPCG_CAN0_IPG_CHI_CLK, "can0_lpcg_chi_clk", "dma_ipg_clk_root", 0, ADMA_FLEXCAN_0_LPCG, 20, 0, }, { IMX_ADMA_LPCG_DSP_CORE_CLK, "dsp_lpcg_core_clk", "dma_ipg_clk_root", 0, ADMA_HIFI_LPCG, 28, 0, }, { IMX_ADMA_LPCG_DSP_IPG_CLK, "dsp_lpcg_ipg_clk", "dma_ipg_clk_root", 0, ADMA_HIFI_LPCG, 20, 0, }, From patchwork Mon Feb 17 03:19:21 2020 Content-Type: text/plain; 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Mon, 17 Feb 2020 03:26:48 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 3E1FB1A1F30; Mon, 17 Feb 2020 04:26:45 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 37F211A1F3D; Mon, 17 Feb 2020 04:26:35 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 87FD0402E5; Mon, 17 Feb 2020 11:26:23 +0800 (SGT) From: Joakim Zhang To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, s.hauer@pengutronix.de Subject: [PATCH 7/7] arch: arm64: dts: imx8qxp: add device node for CAN in ADMA SS Date: Mon, 17 Feb 2020 11:19:21 +0800 Message-Id: <1581909561-12058-8-git-send-email-qiangqing.zhang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1581909561-12058-1-git-send-email-qiangqing.zhang@nxp.com> References: <1581909561-12058-1-git-send-email-qiangqing.zhang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200216_192646_863276_815BC217 X-CRM114-Status: GOOD ( 10.37 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [92.121.34.13 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aisheng.dong@nxp.com, devicetree@vger.kernel.org, peng.fan@nxp.com, fugang.duan@nxp.com, Anson.Huang@nxp.com, festevam@gmail.com, linux-kernel@vger.kernel.org, Joakim Zhang , linux-imx@nxp.com, kernel@pengutronix.de, leonard.crestez@nxp.com, daniel.baluta@nxp.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add device node for CAN in ADMA SS. Signed-off-by: Joakim Zhang --- arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 47 +++++++++++++++ arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 59 +++++++++++++++++++ 2 files changed, 106 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts index f88402ee650c..72a45dd7129e 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts @@ -28,6 +28,25 @@ gpio = <&lsio_gpio4 19 GPIO_ACTIVE_HIGH>; enable-active-high; }; + + reg_can_en: regulator-can-en { + compatible = "regulator-fixed"; + regulator-name = "can-en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pca6416 3 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_can_stby: regulator-can-stby { + compatible = "regulator-fixed"; + regulator-name = "can-stby"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pca6416 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <®_can_en>; + }; }; &cm40_i2c { @@ -80,6 +99,20 @@ }; }; +&adma_flexcan0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan0>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + +&adma_flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + &adma_i2c1 { #address-cells = <1>; #size-cells = <0>; @@ -207,6 +240,20 @@ >; }; + pinctrl_flexcan0: flexcan0grp { + fsl,pins = < + IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x00000021 + IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x00000021 + >; + }; + + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x00000021 + IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x00000021 + >; + }; + pinctrl_ioexp_rst: ioexp_rst_grp { fsl,pins = < IMX8QXP_SPI2_SDO_LSIO_GPIO1_IO01 0x06000021 diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index cd10519eced7..f549e33d1c82 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -34,6 +34,9 @@ serial1 = &adma_lpuart1; serial2 = &adma_lpuart2; serial3 = &adma_lpuart3; + can0 = &adma_flexcan0; + can1 = &adma_flexcan1; + can2 = &adma_flexcan2; }; cpus { @@ -384,6 +387,62 @@ power-domains = <&pd IMX_SC_R_I2C_3>; status = "disabled"; }; + + adma_flexcan0: can@5a8d0000 { + compatible = "fsl,imx8qxp-flexcan", "fsl,imx8qm-flexcan"; + reg = <0x5a8d0000 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_CAN0_IPG_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_CAN0_IPG_PE_CLK>; + clock-names = "ipg", "per"; + assigned-clocks = <&clk IMX_ADMA_CAN0_CLK>; + assigned-clock-rates = <40000000>; + power-domains = <&pd IMX_SC_R_CAN_0>; + /* SLSlice[4] */ + fsl,clk-source = <0>; + status = "disabled"; + }; + + adma_flexcan1: can@5a8e0000 { + compatible = "fsl,imx8qxp-flexcan", "fsl,imx8qm-flexcan"; + reg = <0x5a8e0000 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + /* CAN0 clock and PD is shared among all CAN instances + * as CAN1 shares CAN0's clock and to enable CAN0's + * clock it has to be powered on. + */ + clocks = <&adma_lpcg IMX_ADMA_LPCG_CAN0_IPG_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_CAN0_IPG_PE_CLK>; + clock-names = "ipg", "per"; + assigned-clocks = <&clk IMX_ADMA_CAN0_CLK>; + assigned-clock-rates = <40000000>; + power-domains = <&pd IMX_SC_R_CAN_1>; + /* SLSlice[4] */ + fsl,clk-source = <0>; + status = "disabled"; + }; + + adma_flexcan2: can@5a8f0000 { + compatible = "fsl,imx8qxp-flexcan", "fsl,imx8qm-flexcan"; + reg = <0x5a8f0000 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + /* CAN0 clock and PD is shared among all CAN instances + * as CAN2 shares CAN0's clock and to enable CAN0's + * clock it has to be powered on. + */ + clocks = <&adma_lpcg IMX_ADMA_LPCG_CAN0_IPG_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_CAN0_IPG_PE_CLK>; + clock-names = "ipg", "per"; + assigned-clocks = <&clk IMX_ADMA_CAN0_CLK>; + assigned-clock-rates = <40000000>; + power-domains = <&pd IMX_SC_R_CAN_2>; + /* SLSlice[4] */ + fsl,clk-source = <0>; + status = "disabled"; + }; }; conn_subsys: bus@5b000000 {