From patchwork Mon Feb 17 10:18:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 11387933 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 18F78138D for ; Tue, 18 Feb 2020 07:55:59 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EB9BE21D56 for ; Tue, 18 Feb 2020 07:55:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="kb9klnMc" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EB9BE21D56 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A3B106E169; Tue, 18 Feb 2020 07:55:40 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0161E6E834; Mon, 17 Feb 2020 10:16:01 +0000 (UTC) Received: by mail-wr1-x443.google.com with SMTP id z7so18924467wrl.13; Mon, 17 Feb 2020 02:16:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=a7JmOps2LFt/mZeLHn8kmkYKO/RC9xsbiYfzZQVFgxI=; b=kb9klnMc0KHYfg0Ioy7vJ9O0/k17qib9xOM+aoKoReJSnJt5ZFfFhf0DurVRmnIGUG aR6c1S9vaUa9BFP/jluWY+CHA8Vw7/74ueOB68HRnnhPTKlT7HRA1kdC2Wu2IXX3hN1W STTcI0SqOcuOgVvCl3NHaf/XH9C4Qc8RQzC0vkZPdnpfgKjzgLgefzdOs+S9WJqMZ7Wq MsLhy9iOnxKmfNJJ1GCCDZHRPg/u6eykmAwkygb41UNTT//CxY8ixBlwhfvnIfHVmuaz FL4vBXwjk+1Q/MtyNDUSmFpepQo2hhHIxzTQyjtpBaz8Fl09TAsPSt1G10UJqL68KGQg ueZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=a7JmOps2LFt/mZeLHn8kmkYKO/RC9xsbiYfzZQVFgxI=; b=QhVpLHe+dvq6x17gJIkqu794xTeTL7joStMdum/NaXZgrtIR0bGHTKIGBPHGRxPoNz eQnig+BO8Ons+oIAkF8B53BJezOMEVn124/49b4/GRdmVfKPq3qEkewUv9qQ1uiNXQVZ NsyAWKaExEUk5emHfX4Q1Xi2zBLQcX4fNBsfuFGwOwEclBt3DFXjz9ZxFV8cFAOq+iFS Bj/OlgUDQwqN+swYlk2ydM3/2em9pwbJ117BXUCxg2+NXGYvZzjvhzlYopTQ1PXpnhRE kyYSaoeSRV4Dma47iiG6FI+YyISapyuy1Bl5pJmvkV6uTYdtUC3hggxWv5TnOa4Du+pz GcFw== X-Gm-Message-State: APjAAAXD8UbRaMO6eFaEbNKE4fk3XCvhWpODNcwgp740YpQbYQRq6/kX Hkfc638P7LzDHb+iHQI7eox8XCX1ixZPVQ== X-Google-Smtp-Source: APXvYqzc/kBBnLAiOMkjcUfYcXI+DTeGYyArEVQd0b5Yt279POmb1JXuvJnLh6jL7mzmm9MyHyyxvg== X-Received: by 2002:adf:dc86:: with SMTP id r6mr21570530wrj.68.1581934560213; Mon, 17 Feb 2020 02:16:00 -0800 (PST) Received: from brihaspati.fritz.box (p200300C58F261400BC111EAD619EC67C.dip0.t-ipconnect.de. [2003:c5:8f26:1400:bc11:1ead:619e:c67c]) by smtp.gmail.com with ESMTPSA id a16sm278487wrt.30.2020.02.17.02.15.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Feb 2020 02:15:59 -0800 (PST) From: Nirmoy Das X-Google-Original-From: Nirmoy Das To: dri-devel@lists.freedesktop.org Subject: [PATCH 1/7] drm/amdgpu: move ttm bo->offset to amdgpu_bo Date: Mon, 17 Feb 2020 11:18:35 +0100 Message-Id: <20200217101841.7437-2-nirmoy.das@amd.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200217101841.7437-1-nirmoy.das@amd.com> References: <20200217101841.7437-1-nirmoy.das@amd.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 18 Feb 2020 07:55:25 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thellstrom@vmware.com, airlied@linux.ie, kenny.ho@amd.com, brian.welty@intel.com, amd-gfx@lists.freedesktop.org, nirmoy.das@amd.com, linux-graphics-maintainer@vmware.com, bskeggs@redhat.com, alexander.deucher@amd.com, Huang Rui , sean@poorly.run, christian.koenig@amd.com, kraxel@redhat.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" GPU address should belong to driver not in memory management. This patch moves ttm bo.offset and gpu_offset calculation to amdgpu driver. Signed-off-by: Nirmoy Das Acked-by: Huang Rui --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 22 ++++++++++++++-- drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 29 ++++++++++++++++------ drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 1 + 4 files changed, 44 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index e3f16b49e970..04e78f783638 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -917,7 +917,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain, bo->pin_count++; if (max_offset != 0) { - u64 domain_start = bo->tbo.bdev->man[mem_type].gpu_offset; + u64 domain_start = amdgpu_ttm_domain_start(adev, mem_type); WARN_ON_ONCE(max_offset < (amdgpu_bo_gpu_offset(bo) - domain_start)); } @@ -1445,7 +1445,25 @@ u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo) WARN_ON_ONCE(bo->tbo.mem.mem_type == TTM_PL_VRAM && !(bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)); - return amdgpu_gmc_sign_extend(bo->tbo.offset); + return amdgpu_bo_gpu_offset_no_check(bo); +} + +/** + * amdgpu_bo_gpu_offset_no_check - return GPU offset of bo + * @bo: amdgpu object for which we query the offset + * + * Returns: + * current GPU offset of the object without raising warnings. + */ +u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo) +{ + struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); + uint64_t offset; + + offset = (bo->tbo.mem.start << PAGE_SHIFT) + + amdgpu_ttm_domain_start(adev, bo->tbo.mem.mem_type); + + return amdgpu_gmc_sign_extend(offset); } /** diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h index 36dec51d1ef1..1d86b4c7a1f2 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h @@ -279,6 +279,7 @@ void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence, bool shared); int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr); u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo); +u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo); int amdgpu_bo_validate(struct amdgpu_bo *bo); int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow, struct dma_fence **fence); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 3ab46d4647e4..e329a108e760 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -97,7 +97,6 @@ static int amdgpu_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, case TTM_PL_TT: /* GTT memory */ man->func = &amdgpu_gtt_mgr_func; - man->gpu_offset = adev->gmc.gart_start; man->available_caching = TTM_PL_MASK_CACHING; man->default_caching = TTM_PL_FLAG_CACHED; man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; @@ -105,7 +104,6 @@ static int amdgpu_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, case TTM_PL_VRAM: /* "On-card" video ram */ man->func = &amdgpu_vram_mgr_func; - man->gpu_offset = adev->gmc.vram_start; man->flags = TTM_MEMTYPE_FLAG_FIXED | TTM_MEMTYPE_FLAG_MAPPABLE; man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC; @@ -116,7 +114,6 @@ static int amdgpu_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, case AMDGPU_PL_OA: /* On-chip GDS memory*/ man->func = &ttm_bo_manager_func; - man->gpu_offset = 0; man->flags = TTM_MEMTYPE_FLAG_FIXED | TTM_MEMTYPE_FLAG_CMA; man->available_caching = TTM_PL_FLAG_UNCACHED; man->default_caching = TTM_PL_FLAG_UNCACHED; @@ -264,7 +261,7 @@ static uint64_t amdgpu_mm_node_addr(struct ttm_buffer_object *bo, if (mm_node->start != AMDGPU_BO_INVALID_OFFSET) { addr = mm_node->start << PAGE_SHIFT; - addr += bo->bdev->man[mem->mem_type].gpu_offset; + addr += amdgpu_ttm_domain_start(amdgpu_ttm_adev(bo->bdev), mem->mem_type); } return addr; } @@ -751,6 +748,27 @@ static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo, (offset >> PAGE_SHIFT); } +/** + * amdgpu_ttm_domain_start - Returns GPU start address + * @adev: amdgpu device object + * @type: type of the memory + * + * Returns: + * GPU start address of a memory domain + */ + +uint64_t amdgpu_ttm_domain_start(struct amdgpu_device *adev, uint32_t type) +{ + switch(type) { + case TTM_PL_TT: + return adev->gmc.gart_start; + case TTM_PL_VRAM: + return adev->gmc.vram_start; + } + + return 0; +} + /* * TTM backend functions. */ @@ -1162,9 +1180,6 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo) bo->mem = tmp; } - bo->offset = (bo->mem.start << PAGE_SHIFT) + - bo->bdev->man[bo->mem.mem_type].gpu_offset; - return 0; } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h index 0dddedc06ae3..2c90a95c4b27 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -102,6 +102,7 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo, int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma); int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo); int amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo); +uint64_t amdgpu_ttm_domain_start(struct amdgpu_device *adev, uint32_t type); #if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR) int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, struct page **pages); From patchwork Mon Feb 17 10:18:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 11387949 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C191F13A4 for ; Tue, 18 Feb 2020 07:56:14 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9F99C21D56 for ; Tue, 18 Feb 2020 07:56:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="KTqLGbQV" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9F99C21D56 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 90A3F6E172; Tue, 18 Feb 2020 07:56:03 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x444.google.com (mail-wr1-x444.google.com [IPv6:2a00:1450:4864:20::444]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4BE5B6E904; Mon, 17 Feb 2020 10:16:03 +0000 (UTC) Received: by mail-wr1-x444.google.com with SMTP id r11so18911837wrq.10; Mon, 17 Feb 2020 02:16:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bWJVvbyji5lv93ku6dxciulHZbwF+rGmjiubbT57gkM=; b=KTqLGbQV5ypb/tAqXb5eaxLaNZ1Uu6fx/w1xYMydjW0RQTD5mb6inZ+GwbIQzupanu miX9HFisCwAWVOc+CFefHJQYMCrLRYCfYGTJ8RSZOqnijf6gRWXc5YZZNN38doJ2F82G TJhcUKW4+NOyKPUhWabH6Z1PDpzXooc7uk/KwqARR35qSc0gB3XcvSiUAt3KtLSO7R3r qrtt+BuO2a9rwow2JHkVX+ZQqFNcDDTq7S0BJ+Gpte+KuoI6w9EDO4kDKIZp4Twm9fF8 usJYF8j9r+tYfdl3rZAOIRAuDaviUsdzkVAGToHyL9Y/ynQ/KTZ2P0ul6k8mJB5i9Mh9 whNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bWJVvbyji5lv93ku6dxciulHZbwF+rGmjiubbT57gkM=; b=eLQEY22zZbq3D1vOx1FA/GgBVSQOVAX89wERivDSRUas290ifsbTA4JCLZZzaifn/y U/cblhIIDU7oFyAI7Wmay3fBTBYGAdEw3fQhmwLb0pNXRsnBQIDgWqyMEwt8FbcL5kXf pSmFOzHH3Rqc4dSBf3yamRcy+EJDoHghBgEn4BUHYL/GPfBq4hDVc5Gt9cMHTTZJKicf wFzY94epJAB7wgwRqiGfpj3ZWjm0PwYEq1q81T1vVe7jtkA3zausbEviyBcoKabo6nqF ORUWeVVjnmXfHwRl7l8Bh6D+AZ+k1NtbaY94rH9+Xv2djQSEpvNDx2Mo/aTZA2tMW+B5 c7tw== X-Gm-Message-State: APjAAAUC/yYW0w/trsZWmlJRkotDSpGujSuniUoA2hVWUjtn8+Xgfhil j9Y6JwGdKYHuJOtPEmxZ5OuxIXHqIin4Hg== X-Google-Smtp-Source: APXvYqwD4spEte5a+f8rIFQdVYJaPaG7MRLgGsVLIBM3PNh8GRdExLhbDIqYlcW/rCDitiw7y+BDsA== X-Received: by 2002:adf:df8e:: with SMTP id z14mr20315317wrl.190.1581934561462; Mon, 17 Feb 2020 02:16:01 -0800 (PST) Received: from brihaspati.fritz.box (p200300C58F261400BC111EAD619EC67C.dip0.t-ipconnect.de. [2003:c5:8f26:1400:bc11:1ead:619e:c67c]) by smtp.gmail.com with ESMTPSA id a16sm278487wrt.30.2020.02.17.02.16.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Feb 2020 02:16:01 -0800 (PST) From: Nirmoy Das X-Google-Original-From: Nirmoy Das To: dri-devel@lists.freedesktop.org Subject: [PATCH 2/7] drm/radeon: don't use ttm bo->offset Date: Mon, 17 Feb 2020 11:18:36 +0100 Message-Id: <20200217101841.7437-3-nirmoy.das@amd.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200217101841.7437-1-nirmoy.das@amd.com> References: <20200217101841.7437-1-nirmoy.das@amd.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 18 Feb 2020 07:55:25 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thellstrom@vmware.com, airlied@linux.ie, kenny.ho@amd.com, brian.welty@intel.com, amd-gfx@lists.freedesktop.org, nirmoy.das@amd.com, linux-graphics-maintainer@vmware.com, bskeggs@redhat.com, alexander.deucher@amd.com, sean@poorly.run, christian.koenig@amd.com, kraxel@redhat.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Calculate GPU offset in radeon_bo_gpu_offset without depending on bo->offset Signed-off-by: Nirmoy Das Reviewed-and-tested-by: Christian König --- drivers/gpu/drm/radeon/radeon.h | 1 + drivers/gpu/drm/radeon/radeon_object.h | 16 +++++++++++++++- drivers/gpu/drm/radeon/radeon_ttm.c | 4 +--- 3 files changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 30e32adc1fc6..b7c3fb2bfb54 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -2828,6 +2828,7 @@ extern void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size extern void radeon_program_register_sequence(struct radeon_device *rdev, const u32 *registers, const u32 array_size); +struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev); /* * vm diff --git a/drivers/gpu/drm/radeon/radeon_object.h b/drivers/gpu/drm/radeon/radeon_object.h index d23f2ed4126e..4d37571c7ff5 100644 --- a/drivers/gpu/drm/radeon/radeon_object.h +++ b/drivers/gpu/drm/radeon/radeon_object.h @@ -90,7 +90,21 @@ static inline void radeon_bo_unreserve(struct radeon_bo *bo) */ static inline u64 radeon_bo_gpu_offset(struct radeon_bo *bo) { - return bo->tbo.offset; + struct radeon_device *rdev; + u64 start = 0; + + rdev = radeon_get_rdev(bo->tbo.bdev); + + switch(bo->tbo.mem.mem_type) { + case TTM_PL_TT: + start = rdev->mc.gtt_start; + break; + case TTM_PL_VRAM: + start = rdev->mc.vram_start; + break; + } + + return (bo->tbo.mem.start << PAGE_SHIFT) + start; } static inline unsigned long radeon_bo_size(struct radeon_bo *bo) diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index badf1b6d1549..1c8303468e8f 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -56,7 +56,7 @@ static int radeon_ttm_debugfs_init(struct radeon_device *rdev); static void radeon_ttm_debugfs_fini(struct radeon_device *rdev); -static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev) +struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev) { struct radeon_mman *mman; struct radeon_device *rdev; @@ -82,7 +82,6 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, break; case TTM_PL_TT: man->func = &ttm_bo_manager_func; - man->gpu_offset = rdev->mc.gtt_start; man->available_caching = TTM_PL_MASK_CACHING; man->default_caching = TTM_PL_FLAG_CACHED; man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; @@ -104,7 +103,6 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, case TTM_PL_VRAM: /* "On-card" video ram */ man->func = &ttm_bo_manager_func; - man->gpu_offset = rdev->mc.vram_start; man->flags = TTM_MEMTYPE_FLAG_FIXED | TTM_MEMTYPE_FLAG_MAPPABLE; man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC; From patchwork Mon Feb 17 10:18:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 11387939 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 883BC138D for ; Tue, 18 Feb 2020 07:56:05 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 66C8F21D56 for ; Tue, 18 Feb 2020 07:56:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="GFOLO9SL" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 66C8F21D56 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5808B6E160; Tue, 18 Feb 2020 07:55:59 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x442.google.com (mail-wr1-x442.google.com [IPv6:2a00:1450:4864:20::442]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7F2406E906; Mon, 17 Feb 2020 10:16:04 +0000 (UTC) Received: by mail-wr1-x442.google.com with SMTP id z3so19004040wru.3; Mon, 17 Feb 2020 02:16:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RmacnuyzAA19XBpDKfCDUiqSo+PKMyCxvJ35QrGZpKw=; b=GFOLO9SL+A3h5x/3pKA62syV55N3PwrrW3WJu0F9sMcAa+g2+uKfd47NAQ2wp4jCza SKeold1fObuv5UAiViNbT+J3QpjkESUQ9JIjJkAulko6kyvLds+cUucbpWFEfnessesG MBoFDprp6oNi+Bwuk95PRLT2uEmid0OwQwVJQEvMArkIEPYc7E1i+YGB5LujSEbRpu7S xF7bpU63eu1WZ7kXlkofYrPEo9MpfmFLvx41LJm+zaXzShW+dgG+/RH47QKHl/55G2NW 14FpB/rboEzZ9+2MMDXxQqbwH9f/dq9OAPIbltzM6sB1whLQjZfXLert7eoeLEKjy2mJ 5/Uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RmacnuyzAA19XBpDKfCDUiqSo+PKMyCxvJ35QrGZpKw=; b=BPN9mutSdTOBOXDJ7F5kLOSjiMV2bwFQ02uKhFBV6nw9Rb3aFJVntPe1+KvsqZCbYk XjKRX4cP2IDVbaC6JadnU2Z5E1QOAXZRKM+sa8mWeNKPSw1fsd7Gl+I7dy13wAL7HRvT yAXPwZLdTlwPioVzqcRbnqbwWKvoMYoPqAcq1EcYWm4+kHJYBDRhNMo31Yy4Seajq4iE gKpBBmEFshh5p4gQgyg+ADit6DOcepQ4jDMz0bW51sx6gU8dll4p9UVgmdD4yjawHnWs UiiczRV/hsa3+gHzwxAnXdyB7Zh+DzpMDz94c5UDcezj46lNkV6ZPvkV3EjFNyFFRDsY k8Iw== X-Gm-Message-State: APjAAAUq31gK+u67ea3Vijjc9ZutwBRMs1NlsTOwjMlp1wKPdGa6ttw3 z/qMUwapyHMW2PasDB6pehc/FwV03NbA8w== X-Google-Smtp-Source: APXvYqx48SKwCa5RNMwF8b6EXfEqI2bAW536baBSRdkca35JTgpOtVm7cmym+sVF7Mr/OfaUI+SrKg== X-Received: by 2002:a5d:61cb:: with SMTP id q11mr22417601wrv.71.1581934562762; Mon, 17 Feb 2020 02:16:02 -0800 (PST) Received: from brihaspati.fritz.box (p200300C58F261400BC111EAD619EC67C.dip0.t-ipconnect.de. [2003:c5:8f26:1400:bc11:1ead:619e:c67c]) by smtp.gmail.com with ESMTPSA id a16sm278487wrt.30.2020.02.17.02.16.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Feb 2020 02:16:02 -0800 (PST) From: Nirmoy Das X-Google-Original-From: Nirmoy Das To: dri-devel@lists.freedesktop.org Subject: [PATCH 3/7] drm/vmwgfx: don't use ttm bo->offset Date: Mon, 17 Feb 2020 11:18:37 +0100 Message-Id: <20200217101841.7437-4-nirmoy.das@amd.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200217101841.7437-1-nirmoy.das@amd.com> References: <20200217101841.7437-1-nirmoy.das@amd.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 18 Feb 2020 07:55:25 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thellstrom@vmware.com, airlied@linux.ie, kenny.ho@amd.com, brian.welty@intel.com, amd-gfx@lists.freedesktop.org, nirmoy.das@amd.com, linux-graphics-maintainer@vmware.com, bskeggs@redhat.com, alexander.deucher@amd.com, sean@poorly.run, christian.koenig@amd.com, kraxel@redhat.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Calculate GPU offset within vmwgfx driver itself without depending on bo->offset Signed-off-by: Nirmoy Das --- drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 4 ++-- drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c | 2 -- 4 files changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c index 8b71bf6b58ef..a714582bb61c 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c @@ -258,7 +258,7 @@ int vmw_bo_pin_in_start_of_vram(struct vmw_private *dev_priv, ret = ttm_bo_validate(bo, &placement, &ctx); /* For some reason we didn't end up at the start of vram */ - WARN_ON(ret == 0 && bo->offset != 0); + WARN_ON(ret == 0 && (bo->mem.start << PAGE_SHIFT) != 0); if (!ret) vmw_bo_pin_reserved(buf, true); @@ -317,7 +317,7 @@ void vmw_bo_get_guest_ptr(const struct ttm_buffer_object *bo, { if (bo->mem.mem_type == TTM_PL_VRAM) { ptr->gmrId = SVGA_GMR_FRAMEBUFFER; - ptr->offset = bo->offset; + ptr->offset = bo->mem.start << PAGE_SHIFT; } else { ptr->gmrId = bo->mem.start; ptr->offset = 0; diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c index 73489a45decb..72c2cf4053df 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c @@ -3313,7 +3313,7 @@ static void vmw_apply_relocations(struct vmw_sw_context *sw_context) bo = &reloc->vbo->base; switch (bo->mem.mem_type) { case TTM_PL_VRAM: - reloc->location->offset += bo->offset; + reloc->location->offset += bo->mem.start << PAGE_SHIFT; reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER; break; case VMW_PL_GMR: diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c index e5252ef3812f..1cdc445b24c3 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c @@ -612,7 +612,7 @@ static int vmw_fifo_emit_dummy_legacy_query(struct vmw_private *dev_priv, if (bo->mem.mem_type == TTM_PL_VRAM) { cmd->body.guestResult.gmrId = SVGA_GMR_FRAMEBUFFER; - cmd->body.guestResult.offset = bo->offset; + cmd->body.guestResult.offset = bo->mem.start << PAGE_SHIFT; } else { cmd->body.guestResult.gmrId = bo->mem.start; cmd->body.guestResult.offset = 0; diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c index 3f3b2c7a208a..e7134aebeb81 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c @@ -750,7 +750,6 @@ static int vmw_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, case TTM_PL_VRAM: /* "On-card" video ram */ man->func = &ttm_bo_manager_func; - man->gpu_offset = 0; man->flags = TTM_MEMTYPE_FLAG_FIXED | TTM_MEMTYPE_FLAG_MAPPABLE; man->available_caching = TTM_PL_FLAG_CACHED; man->default_caching = TTM_PL_FLAG_CACHED; @@ -763,7 +762,6 @@ static int vmw_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, * slots as well as the bo size. */ man->func = &vmw_gmrid_manager_func; - man->gpu_offset = 0; man->flags = TTM_MEMTYPE_FLAG_CMA | TTM_MEMTYPE_FLAG_MAPPABLE; man->available_caching = TTM_PL_FLAG_CACHED; man->default_caching = TTM_PL_FLAG_CACHED; From patchwork Mon Feb 17 10:18:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 11387923 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 81F1B138D for ; Tue, 18 Feb 2020 07:55:49 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6066721D56 for ; Tue, 18 Feb 2020 07:55:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="S5+blWmN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6066721D56 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 947E56E159; Tue, 18 Feb 2020 07:55:37 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x442.google.com (mail-wr1-x442.google.com [IPv6:2a00:1450:4864:20::442]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6A6786E908; Mon, 17 Feb 2020 10:16:06 +0000 (UTC) Received: by mail-wr1-x442.google.com with SMTP id c9so18977095wrw.8; Mon, 17 Feb 2020 02:16:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Qa1cBorCZUIIyPZmAgBuTbt12ya7IczBUEUlQfypOY0=; b=S5+blWmNtqqutcRuO/PVefPTkjW5LCHbRD6xsZG4LU3y8Q2Jelr1pKUs8T6uN8UvxF oypJ0sn/JOvrYL3g3Kg99N8aJk4OhWqKmrOkAsZLvM5Kyfw2sVLsu34+7GjPhD18jhqv qZHZ3ru5hAHl6OFc9+VN/wjqvLnOjf78oNJGouxVdd9T1VzBOYa29NWi2yOr1s3Zy44j iiYMkXItJcXDS3BClySmW/qvduXyIM89XYxrdpZg55iIFqLFZE9k5vTmdBQAACNck+pj MwdLkhCWan3xN0WVGh5jbO4qVoXol6lhlG+mgNhYdqgJt7GeTvH0BfuAs7hazYHCPE37 OruQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Qa1cBorCZUIIyPZmAgBuTbt12ya7IczBUEUlQfypOY0=; b=ow41WSUFr7qqScpldp1cHIYAYTAa9QIUs5tnP7JySOpR8b6vxK+ZvobO8Uh23dX2jI eSqG/ACFWci+IIWK+W6BHbC0C1vL/JTMH6RYiqFXjwpp23s/TvT3Rt3TnXhPcyZaeOQw FmLgZ5b8wS8YsaVqU1RjY67GAjQbt6PYCdTxjtQPGI1nzYm4kCbHOYFdHrItaNaKNaau ff25kbSH2A9Rx/aKdXspAltES/pv3oRvIbZ2Cp+8ODKktgem5AifHz3xtsLOMpCwJSUs IYpsqWYNoIu7veddn4JSR19/RyW4fAUCpVfSudzajYe/bUcNUf67tALHeO3jb9jNmRWz C0qg== X-Gm-Message-State: APjAAAV1tg52k43fYRrfstos9j0tc1lFinadhEpYxb0VbHsgXFW9d2iR M19XKl0vFvPf4ilF2Yrux4fsK75eepMOmw== X-Google-Smtp-Source: APXvYqyeuIHyPY+/MFa93SqWuA/rHsyJxvyUqgcbD4Ht4RXCdOPzGipWdZS8ZItPQFSJ6q4I8SGsrA== X-Received: by 2002:adf:dc8d:: with SMTP id r13mr22091615wrj.357.1581934564528; Mon, 17 Feb 2020 02:16:04 -0800 (PST) Received: from brihaspati.fritz.box (p200300C58F261400BC111EAD619EC67C.dip0.t-ipconnect.de. [2003:c5:8f26:1400:bc11:1ead:619e:c67c]) by smtp.gmail.com with ESMTPSA id a16sm278487wrt.30.2020.02.17.02.16.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Feb 2020 02:16:03 -0800 (PST) From: Nirmoy Das X-Google-Original-From: Nirmoy Das To: dri-devel@lists.freedesktop.org Subject: [PATCH 4/7] drm/nouveau: don't use ttm bo->offset Date: Mon, 17 Feb 2020 11:18:38 +0100 Message-Id: <20200217101841.7437-5-nirmoy.das@amd.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200217101841.7437-1-nirmoy.das@amd.com> References: <20200217101841.7437-1-nirmoy.das@amd.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 18 Feb 2020 07:55:25 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thellstrom@vmware.com, airlied@linux.ie, kenny.ho@amd.com, brian.welty@intel.com, amd-gfx@lists.freedesktop.org, nirmoy.das@amd.com, linux-graphics-maintainer@vmware.com, bskeggs@redhat.com, alexander.deucher@amd.com, sean@poorly.run, christian.koenig@amd.com, kraxel@redhat.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Store ttm bo->offset in struct nouveau_bo instead. Signed-off-by: Nirmoy Das --- drivers/gpu/drm/nouveau/dispnv04/crtc.c | 6 +++--- drivers/gpu/drm/nouveau/dispnv04/disp.c | 2 +- drivers/gpu/drm/nouveau/dispnv04/overlay.c | 6 +++--- drivers/gpu/drm/nouveau/dispnv50/base507c.c | 2 +- drivers/gpu/drm/nouveau/dispnv50/core507d.c | 2 +- drivers/gpu/drm/nouveau/dispnv50/ovly507e.c | 2 +- drivers/gpu/drm/nouveau/dispnv50/wndw.c | 2 +- drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c | 2 +- drivers/gpu/drm/nouveau/nouveau_abi16.c | 8 ++++---- drivers/gpu/drm/nouveau/nouveau_bo.c | 1 + drivers/gpu/drm/nouveau/nouveau_bo.h | 3 +++ drivers/gpu/drm/nouveau/nouveau_chan.c | 2 +- drivers/gpu/drm/nouveau/nouveau_dmem.c | 2 +- drivers/gpu/drm/nouveau/nouveau_fbcon.c | 2 +- drivers/gpu/drm/nouveau/nouveau_gem.c | 10 +++++----- 15 files changed, 28 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/nouveau/dispnv04/crtc.c b/drivers/gpu/drm/nouveau/dispnv04/crtc.c index 1f08de4241e0..d06a93f2b38a 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/crtc.c +++ b/drivers/gpu/drm/nouveau/dispnv04/crtc.c @@ -845,7 +845,7 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc, fb = nouveau_framebuffer(crtc->primary->fb); } - nv_crtc->fb.offset = fb->nvbo->bo.offset; + nv_crtc->fb.offset = fb->nvbo->offset; if (nv_crtc->lut.depth != drm_fb->format->depth) { nv_crtc->lut.depth = drm_fb->format->depth; @@ -1013,7 +1013,7 @@ nv04_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, nv04_cursor_upload(dev, cursor, nv_crtc->cursor.nvbo); nouveau_bo_unmap(cursor); - nv_crtc->cursor.offset = nv_crtc->cursor.nvbo->bo.offset; + nv_crtc->cursor.offset = nv_crtc->cursor.nvbo->offset; nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.offset); nv_crtc->cursor.show(nv_crtc, true); out: @@ -1191,7 +1191,7 @@ nv04_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, /* Initialize a page flip struct */ *s = (struct nv04_page_flip_state) { { }, event, crtc, fb->format->cpp[0] * 8, fb->pitches[0], - new_bo->bo.offset }; + new_bo->offset }; /* Keep vblanks on during flip, for the target crtc of this flip */ drm_crtc_vblank_get(crtc); diff --git a/drivers/gpu/drm/nouveau/dispnv04/disp.c b/drivers/gpu/drm/nouveau/dispnv04/disp.c index 44ee82d0c9b6..89a4ddfcc55f 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/disp.c +++ b/drivers/gpu/drm/nouveau/dispnv04/disp.c @@ -151,7 +151,7 @@ nv04_display_init(struct drm_device *dev, bool resume, bool runtime) continue; if (nv_crtc->cursor.set_offset) - nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->bo.offset); + nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->offset); nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x, nv_crtc->cursor_saved_y); } diff --git a/drivers/gpu/drm/nouveau/dispnv04/overlay.c b/drivers/gpu/drm/nouveau/dispnv04/overlay.c index a3a0a73ae8ab..9529bd9053e7 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/overlay.c +++ b/drivers/gpu/drm/nouveau/dispnv04/overlay.c @@ -150,7 +150,7 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, nvif_mask(dev, NV_PCRTC_ENGINE_CTRL + soff2, NV_CRTC_FSEL_OVERLAY, 0); nvif_wr32(dev, NV_PVIDEO_BASE(flip), 0); - nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nv_fb->nvbo->bo.offset); + nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nv_fb->nvbo->offset); nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w); nvif_wr32(dev, NV_PVIDEO_POINT_IN(flip), src_y << 16 | src_x); nvif_wr32(dev, NV_PVIDEO_DS_DX(flip), (src_w << 20) / crtc_w); @@ -172,7 +172,7 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, if (format & NV_PVIDEO_FORMAT_PLANAR) { nvif_wr32(dev, NV_PVIDEO_UVPLANE_BASE(flip), 0); nvif_wr32(dev, NV_PVIDEO_UVPLANE_OFFSET_BUFF(flip), - nv_fb->nvbo->bo.offset + fb->offsets[1]); + nv_fb->nvbo->offset + fb->offsets[1]); } nvif_wr32(dev, NV_PVIDEO_FORMAT(flip), format | fb->pitches[0]); nvif_wr32(dev, NV_PVIDEO_STOP, 0); @@ -396,7 +396,7 @@ nv04_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, for (i = 0; i < 2; i++) { nvif_wr32(dev, NV_PVIDEO_BUFF0_START_ADDRESS + 4 * i, - nv_fb->nvbo->bo.offset); + nv_fb->nvbo->offset); nvif_wr32(dev, NV_PVIDEO_BUFF0_PITCH_LENGTH + 4 * i, fb->pitches[0]); nvif_wr32(dev, NV_PVIDEO_BUFF0_OFFSET + 4 * i, 0); diff --git a/drivers/gpu/drm/nouveau/dispnv50/base507c.c b/drivers/gpu/drm/nouveau/dispnv50/base507c.c index 00a85f1e1a4a..67829f04b2c7 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/base507c.c +++ b/drivers/gpu/drm/nouveau/dispnv50/base507c.c @@ -274,7 +274,7 @@ base507c_new_(const struct nv50_wndw_func *func, const u32 *format, ret = nv50_dmac_create(&drm->client.device, &disp->disp->object, &oclass, head, &args, sizeof(args), - disp->sync->bo.offset, &wndw->wndw); + disp->sync->offset, &wndw->wndw); if (ret) { NV_ERROR(drm, "base%04x allocation failed: %d\n", oclass, ret); return ret; diff --git a/drivers/gpu/drm/nouveau/dispnv50/core507d.c b/drivers/gpu/drm/nouveau/dispnv50/core507d.c index e7fcfa6e6467..793dcb2ea196 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/core507d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/core507d.c @@ -99,7 +99,7 @@ core507d_new_(const struct nv50_core_func *func, struct nouveau_drm *drm, ret = nv50_dmac_create(&drm->client.device, &disp->disp->object, &oclass, 0, &args, sizeof(args), - disp->sync->bo.offset, &core->chan); + disp->sync->offset, &core->chan); if (ret) { NV_ERROR(drm, "core%04x allocation failed: %d\n", oclass, ret); return ret; diff --git a/drivers/gpu/drm/nouveau/dispnv50/ovly507e.c b/drivers/gpu/drm/nouveau/dispnv50/ovly507e.c index 8ccd96113bad..4cce1078140a 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/ovly507e.c +++ b/drivers/gpu/drm/nouveau/dispnv50/ovly507e.c @@ -186,7 +186,7 @@ ovly507e_new_(const struct nv50_wndw_func *func, const u32 *format, ret = nv50_dmac_create(&drm->client.device, &disp->disp->object, &oclass, 0, &args, sizeof(args), - disp->sync->bo.offset, &wndw->wndw); + disp->sync->offset, &wndw->wndw); if (ret) { NV_ERROR(drm, "ovly%04x allocation failed: %d\n", oclass, ret); return ret; diff --git a/drivers/gpu/drm/nouveau/dispnv50/wndw.c b/drivers/gpu/drm/nouveau/dispnv50/wndw.c index 890315291b01..e90ffa4a5230 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/wndw.c +++ b/drivers/gpu/drm/nouveau/dispnv50/wndw.c @@ -509,7 +509,7 @@ nv50_wndw_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state) } asyw->state.fence = dma_resv_get_excl_rcu(fb->nvbo->bo.base.resv); - asyw->image.offset[0] = fb->nvbo->bo.offset; + asyw->image.offset[0] = fb->nvbo->offset; if (wndw->func->prepare) { asyh = nv50_head_atom_get(asyw->state.state, asyw->state.crtc); diff --git a/drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c b/drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c index b92dc3461bbd..bb84e4d54a33 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c +++ b/drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c @@ -298,7 +298,7 @@ wndwc37e_new_(const struct nv50_wndw_func *func, struct nouveau_drm *drm, ret = nv50_dmac_create(&drm->client.device, &disp->disp->object, &oclass, 0, &args, sizeof(args), - disp->sync->bo.offset, &wndw->wndw); + disp->sync->offset, &wndw->wndw); if (ret) { NV_ERROR(drm, "qndw%04x allocation failed: %d\n", oclass, ret); return ret; diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/nouveau/nouveau_abi16.c index e2bae1424502..c32a8ca67f82 100644 --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c @@ -558,13 +558,13 @@ nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS) if (drm->agp.bridge) { args.target = NV_DMA_V0_TARGET_AGP; args.access = NV_DMA_V0_ACCESS_RDWR; - args.start += drm->agp.base + chan->ntfy->bo.offset; - args.limit += drm->agp.base + chan->ntfy->bo.offset; + args.start += drm->agp.base + chan->ntfy->offset; + args.limit += drm->agp.base + chan->ntfy->offset; } else { args.target = NV_DMA_V0_TARGET_VM; args.access = NV_DMA_V0_ACCESS_RDWR; - args.start += chan->ntfy->bo.offset; - args.limit += chan->ntfy->bo.offset; + args.start += chan->ntfy->offset; + args.limit += chan->ntfy->offset; } client->route = NVDRM_OBJECT_ABI16; diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index 2b4b21b02e40..ebf31035e1e3 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -1311,6 +1311,7 @@ nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, bool evict, list_for_each_entry(vma, &nvbo->vma_list, head) { nouveau_vma_map(vma, mem); } + nvbo->offset = (new_reg->start << PAGE_SHIFT); } else { list_for_each_entry(vma, &nvbo->vma_list, head) { WARN_ON(ttm_bo_wait(bo, false, false)); diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.h b/drivers/gpu/drm/nouveau/nouveau_bo.h index 38f9d8350963..e944b4aa5547 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.h +++ b/drivers/gpu/drm/nouveau/nouveau_bo.h @@ -24,6 +24,9 @@ struct nouveau_bo { int pbbo_index; bool validate_mapped; + /* GPU address space is independent of CPU word size */ + uint64_t offset; + struct list_head vma_list; unsigned contig:1; diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c index d9381a053169..3d71dfcb2fde 100644 --- a/drivers/gpu/drm/nouveau/nouveau_chan.c +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c @@ -162,7 +162,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, * pushbuf lives in, this is because the GEM code requires that * we be able to call out to other (indirect) push buffers */ - chan->push.addr = chan->push.buffer->bo.offset; + chan->push.addr = chan->push.buffer->offset; if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) { ret = nouveau_vma_new(chan->push.buffer, chan->vmm, diff --git a/drivers/gpu/drm/nouveau/nouveau_dmem.c b/drivers/gpu/drm/nouveau/nouveau_dmem.c index 0ad5d87b5a8e..475ed53b99f1 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dmem.c +++ b/drivers/gpu/drm/nouveau/nouveau_dmem.c @@ -89,7 +89,7 @@ static unsigned long nouveau_dmem_page_addr(struct page *page) struct nouveau_dmem_chunk *chunk = page->zone_device_data; unsigned long idx = page_to_pfn(page) - chunk->pfn_first; - return (idx << PAGE_SHIFT) + chunk->bo->bo.offset; + return (idx << PAGE_SHIFT) + chunk->bo->offset; } static void nouveau_dmem_page_free(struct page *page) diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c index 0c5cdda3c336..508b118c0953 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c +++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c @@ -393,7 +393,7 @@ nouveau_fbcon_create(struct drm_fb_helper *helper, /* To allow resizeing without swapping buffers */ NV_INFO(drm, "allocated %dx%d fb: 0x%llx, bo %p\n", - fb->base.width, fb->base.height, fb->nvbo->bo.offset, nvbo); + fb->base.width, fb->base.height, fb->nvbo->offset, nvbo); vga_switcheroo_client_fb_set(dev->pdev, info); return 0; diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c index f5ece1f94973..cadff37eade8 100644 --- a/drivers/gpu/drm/nouveau/nouveau_gem.c +++ b/drivers/gpu/drm/nouveau/nouveau_gem.c @@ -232,7 +232,7 @@ nouveau_gem_info(struct drm_file *file_priv, struct drm_gem_object *gem, rep->domain = NOUVEAU_GEM_DOMAIN_GART; else rep->domain = NOUVEAU_GEM_DOMAIN_VRAM; - rep->offset = nvbo->bo.offset; + rep->offset = nvbo->offset; if (vmm->vmm.object.oclass >= NVIF_CLASS_VMM_NV50) { vma = nouveau_vma_find(nvbo, vmm); if (!vma) @@ -516,7 +516,7 @@ validate_list(struct nouveau_channel *chan, struct nouveau_cli *cli, } if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) { - if (nvbo->bo.offset == b->presumed.offset && + if (nvbo->offset == b->presumed.offset && ((nvbo->bo.mem.mem_type == TTM_PL_VRAM && b->presumed.domain & NOUVEAU_GEM_DOMAIN_VRAM) || (nvbo->bo.mem.mem_type == TTM_PL_TT && @@ -527,7 +527,7 @@ validate_list(struct nouveau_channel *chan, struct nouveau_cli *cli, b->presumed.domain = NOUVEAU_GEM_DOMAIN_GART; else b->presumed.domain = NOUVEAU_GEM_DOMAIN_VRAM; - b->presumed.offset = nvbo->bo.offset; + b->presumed.offset = nvbo->offset; b->presumed.valid = 0; relocs++; } @@ -805,7 +805,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data, struct nouveau_bo *nvbo = (void *)(unsigned long) bo[push[i].bo_index].user_priv; - OUT_RING(chan, (nvbo->bo.offset + push[i].offset) | 2); + OUT_RING(chan, (nvbo->offset + push[i].offset) | 2); OUT_RING(chan, 0); } } else { @@ -840,7 +840,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data, } OUT_RING(chan, 0x20000000 | - (nvbo->bo.offset + push[i].offset)); + (nvbo->offset + push[i].offset)); OUT_RING(chan, 0); for (j = 0; j < NOUVEAU_DMA_SKIPS; j++) OUT_RING(chan, 0); From patchwork Mon Feb 17 10:18:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 11387941 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 606C213A4 for ; Tue, 18 Feb 2020 07:56:08 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3F56921D56 for ; Tue, 18 Feb 2020 07:56:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="RZL1Pb4M" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3F56921D56 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 842766E165; Tue, 18 Feb 2020 07:55:59 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8213B6E90B; Mon, 17 Feb 2020 10:16:07 +0000 (UTC) Received: by mail-wr1-x443.google.com with SMTP id y17so18938604wrh.5; Mon, 17 Feb 2020 02:16:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HnLxeOLGupkDJKKR65u4bZIaT5KCNOAxjAw6kZ3MPNo=; b=RZL1Pb4Mto2hMZ2qZu9Ahv1u1n4SAD8J8vgB+7L+dWBxk9Pwdic7aGqbYXyORgF+t0 04bitASNsN1/MnDG2V05YvRglp/shdsOFwX+5C5OY+0AQhC3UX3xNSYVYEo6JEM67Q3D 1COriVMB18ZhHUsjnbXdBqahWfSM1/aRHj6Tx8c58xpupOkLFHF6RcrVHjczZ9GZWMvH C7cOFjBhYqyC2zD14vDmNkTVmCl0ZC0oWb3pAB/mVUZzpPvVmq7szqMCsZrAvZHHi8SM Q62UiqOJEsanuH+z1+BPAb6yD1bFpK6VtMcQWZsuEUDWUueo1c8w2sDNZ8BaymUancg3 7ixw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HnLxeOLGupkDJKKR65u4bZIaT5KCNOAxjAw6kZ3MPNo=; b=M8n2v/emOmfjUs9Aejo+cusL52pxYv1PiIH36oBnkUD/JxXD2e2CpjZHO/ecFPzVzX lx/w43tRF31TSOaLGqte3J0pvyoQtwyIR5emxkc/z7GId5GUUsOJu7zmLTqDojjZmjta rA5U/Lhzxzo1EE4xxprxpjdWr4VVoo5dVfz2axNGqyZhWxkHdp2L3JKEbxiyN6QiMKN4 2eXK7L76UBdtNlKBozbEhYaiLtF7TSBge8Y6v4GgoMeyXUwzSqP/LL25qXcQ7vFuVCMX X4GDZsxdZTyYb/WtaoYUmdQe2cpVz324UHeC0ufp1krPvO/XcqUVb92A5hE/bNN6erIx qcTw== X-Gm-Message-State: APjAAAU9+rMIZSFtM1/rmUDiU3boWHGxPbx8VQ/X6sbt5DmFsMD679O0 Ic7zXpt4hAulEb1iBtkf+vAgW+78LDa86A== X-Google-Smtp-Source: APXvYqwftzEieeUL51SR2I+5cD15PjEtFk0+pRkz1Iz6npq6o9LveRie8nTjStEGisSbhA/Ijx3OJg== X-Received: by 2002:a05:6000:367:: with SMTP id f7mr20963644wrf.174.1581934565740; Mon, 17 Feb 2020 02:16:05 -0800 (PST) Received: from brihaspati.fritz.box (p200300C58F261400BC111EAD619EC67C.dip0.t-ipconnect.de. [2003:c5:8f26:1400:bc11:1ead:619e:c67c]) by smtp.gmail.com with ESMTPSA id a16sm278487wrt.30.2020.02.17.02.16.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Feb 2020 02:16:05 -0800 (PST) From: Nirmoy Das X-Google-Original-From: Nirmoy Das To: dri-devel@lists.freedesktop.org Subject: [PATCH 5/7] drm/qxl: don't use ttm bo->offset Date: Mon, 17 Feb 2020 11:18:39 +0100 Message-Id: <20200217101841.7437-6-nirmoy.das@amd.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200217101841.7437-1-nirmoy.das@amd.com> References: <20200217101841.7437-1-nirmoy.das@amd.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 18 Feb 2020 07:55:25 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thellstrom@vmware.com, airlied@linux.ie, kenny.ho@amd.com, brian.welty@intel.com, amd-gfx@lists.freedesktop.org, nirmoy.das@amd.com, linux-graphics-maintainer@vmware.com, bskeggs@redhat.com, alexander.deucher@amd.com, sean@poorly.run, christian.koenig@amd.com, kraxel@redhat.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patch also removes slot->gpu_offset which is not required as VRAM and PRIV slot are in separate PCI bar Signed-off-by: Nirmoy Das --- drivers/gpu/drm/qxl/qxl_drv.h | 5 ++--- drivers/gpu/drm/qxl/qxl_kms.c | 5 ++--- drivers/gpu/drm/qxl/qxl_object.h | 5 ----- drivers/gpu/drm/qxl/qxl_ttm.c | 9 --------- 4 files changed, 4 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/qxl/qxl_drv.h b/drivers/gpu/drm/qxl/qxl_drv.h index 27e45a2d6b52..58e7098a17ff 100644 --- a/drivers/gpu/drm/qxl/qxl_drv.h +++ b/drivers/gpu/drm/qxl/qxl_drv.h @@ -311,10 +311,9 @@ qxl_bo_physical_address(struct qxl_device *qdev, struct qxl_bo *bo, (bo->tbo.mem.mem_type == TTM_PL_VRAM) ? &qdev->main_slot : &qdev->surfaces_slot; - WARN_ON_ONCE((bo->tbo.offset & slot->gpu_offset) != slot->gpu_offset); + /* TODO - need to hold one of the locks to read bo->tbo.mem.start */ - /* TODO - need to hold one of the locks to read tbo.offset */ - return slot->high_bits | (bo->tbo.offset - slot->gpu_offset + offset); + return slot->high_bits | ((bo->tbo.mem.start << PAGE_SHIFT) + offset); } /* qxl_display.c */ diff --git a/drivers/gpu/drm/qxl/qxl_kms.c b/drivers/gpu/drm/qxl/qxl_kms.c index 70b20ee4741a..7a5bf544f34d 100644 --- a/drivers/gpu/drm/qxl/qxl_kms.c +++ b/drivers/gpu/drm/qxl/qxl_kms.c @@ -86,11 +86,10 @@ static void setup_slot(struct qxl_device *qdev, high_bits <<= (64 - (qdev->rom->slot_gen_bits + qdev->rom->slot_id_bits)); slot->high_bits = high_bits; - DRM_INFO("slot %d (%s): base 0x%08lx, size 0x%08lx, gpu_offset 0x%lx\n", + DRM_INFO("slot %d (%s): base 0x%08lx, size 0x%08lx\n", slot->index, slot->name, (unsigned long)slot->start_phys_addr, - (unsigned long)slot->size, - (unsigned long)slot->gpu_offset); + (unsigned long)slot->size); } void qxl_reinit_memslots(struct qxl_device *qdev) diff --git a/drivers/gpu/drm/qxl/qxl_object.h b/drivers/gpu/drm/qxl/qxl_object.h index 8ae54ba7857c..21fa81048f4f 100644 --- a/drivers/gpu/drm/qxl/qxl_object.h +++ b/drivers/gpu/drm/qxl/qxl_object.h @@ -48,11 +48,6 @@ static inline void qxl_bo_unreserve(struct qxl_bo *bo) ttm_bo_unreserve(&bo->tbo); } -static inline u64 qxl_bo_gpu_offset(struct qxl_bo *bo) -{ - return bo->tbo.offset; -} - static inline unsigned long qxl_bo_size(struct qxl_bo *bo) { return bo->tbo.num_pages << PAGE_SHIFT; diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c b/drivers/gpu/drm/qxl/qxl_ttm.c index 62a5e424971b..635d000e7934 100644 --- a/drivers/gpu/drm/qxl/qxl_ttm.c +++ b/drivers/gpu/drm/qxl/qxl_ttm.c @@ -51,11 +51,6 @@ static struct qxl_device *qxl_get_qdev(struct ttm_bo_device *bdev) static int qxl_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, struct ttm_mem_type_manager *man) { - struct qxl_device *qdev = qxl_get_qdev(bdev); - unsigned int gpu_offset_shift = - 64 - (qdev->rom->slot_gen_bits + qdev->rom->slot_id_bits + 8); - struct qxl_memslot *slot; - switch (type) { case TTM_PL_SYSTEM: /* System memory */ @@ -66,11 +61,7 @@ static int qxl_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, case TTM_PL_VRAM: case TTM_PL_PRIV: /* "On-card" video ram */ - slot = (type == TTM_PL_VRAM) ? - &qdev->main_slot : &qdev->surfaces_slot; - slot->gpu_offset = (uint64_t)type << gpu_offset_shift; man->func = &ttm_bo_manager_func; - man->gpu_offset = slot->gpu_offset; man->flags = TTM_MEMTYPE_FLAG_FIXED | TTM_MEMTYPE_FLAG_MAPPABLE; man->available_caching = TTM_PL_MASK_CACHING; From patchwork Mon Feb 17 10:18:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 11387929 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ED887138D for ; Tue, 18 Feb 2020 07:55:53 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CC17921D56 for ; Tue, 18 Feb 2020 07:55:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="TbwZP9Hx" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CC17921D56 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DF9BB6E15A; Tue, 18 Feb 2020 07:55:37 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) by gabe.freedesktop.org (Postfix) with ESMTPS id B92B06E90E; Mon, 17 Feb 2020 10:16:08 +0000 (UTC) Received: by mail-wm1-x344.google.com with SMTP id a6so17788435wme.2; Mon, 17 Feb 2020 02:16:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=R6kTYyV4yeootxcCO0Pc4b5JT430LY5TerttUMYIqdU=; b=TbwZP9HxK71gVHf3IOh0a/1JQLrpVCcLEpYTRNNUuN/kajFy5BKeCijudxJD/Th52V aiMN36m3DHtathw2KIU5bKawyDU3MqcydDKeMGWNs2zzMWDo6M9Z9M1QdYO7idb4UBu3 9dQrbgXqJ29i5UmyiPdFwEyp8GgF3al77UjHPNnb53uoSoUjXGJNzgcwbP1ZnarOfG0g OHkkaqLMn7VPl1K3Eh59ps4Rkb6XNeN0NZNQVdf8BkB2MCMNMT1/SYBHaR3+gplxdMc5 f1eqw5J3IIbzNZHNfJdnFtXd5b+niL3BpycIZD7Gu7TWKtE5PdarTU++B3R5CVcoWetQ qBTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=R6kTYyV4yeootxcCO0Pc4b5JT430LY5TerttUMYIqdU=; b=pPwXNDe3nzEVVDSqCPt4oTMFt8cYOtG0C0NtyFpfhPB0FaNNZw2+fsHUdvtPlEU+cN W7k0LnCg6t9UgGoLXhQ9P/LTW3LAFUb8qDJBQI51kZjWl7n5ztupa91YMkyrI1KnTzHy xEZsOPEw8avrtQagZ9Q7WjmDyb05rh9Puyiqo7egPM71X5NJi83JfgUNcRcWomXuZR75 8SXxK/wC/kmSLmJzTlsSKbWhAp1IexGVtk8NqNXf+zAgcoHVvY8S8CnJScSOYVHNIKcp atw4VkZggtMi6pxbNuWF0ppaf3sEvNf6y/G7HGidvr9Fs/HG4jbIrZvpcyTQK3Ea5N9I WoUg== X-Gm-Message-State: APjAAAWsjLmVjO9kq2nVvv+XPrcYg4j0WiRDoKACKmzbRxbjN4R8tcXZ MFcuWJx1xSVtjtbdpyAJW7ambZELWfZQmg== X-Google-Smtp-Source: APXvYqyTbxyLPSzZ7hpJC3vu1S48YFo1V4ueNy2uWRuPYiKTaExIGsmfPW2v7UU6WGDE7Ufo1TF9ZQ== X-Received: by 2002:a7b:c7cb:: with SMTP id z11mr21050154wmk.29.1581934567017; Mon, 17 Feb 2020 02:16:07 -0800 (PST) Received: from brihaspati.fritz.box (p200300C58F261400BC111EAD619EC67C.dip0.t-ipconnect.de. [2003:c5:8f26:1400:bc11:1ead:619e:c67c]) by smtp.gmail.com with ESMTPSA id a16sm278487wrt.30.2020.02.17.02.16.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Feb 2020 02:16:06 -0800 (PST) From: Nirmoy Das X-Google-Original-From: Nirmoy Das To: dri-devel@lists.freedesktop.org Subject: [PATCH 6/7] drm/bochs: don't use ttm bo->offset Date: Mon, 17 Feb 2020 11:18:40 +0100 Message-Id: <20200217101841.7437-7-nirmoy.das@amd.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200217101841.7437-1-nirmoy.das@amd.com> References: <20200217101841.7437-1-nirmoy.das@amd.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 18 Feb 2020 07:55:25 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thellstrom@vmware.com, airlied@linux.ie, kenny.ho@amd.com, brian.welty@intel.com, amd-gfx@lists.freedesktop.org, nirmoy.das@amd.com, linux-graphics-maintainer@vmware.com, bskeggs@redhat.com, alexander.deucher@amd.com, sean@poorly.run, christian.koenig@amd.com, kraxel@redhat.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Calculate GPU offset within bochs driver itself without depending on bo->offset Signed-off-by: Nirmoy Das --- drivers/gpu/drm/bochs/bochs_kms.c | 3 ++- drivers/gpu/drm/drm_gem_vram_helper.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bochs/bochs_kms.c b/drivers/gpu/drm/bochs/bochs_kms.c index 8066d7d370d5..852ec7910d84 100644 --- a/drivers/gpu/drm/bochs/bochs_kms.c +++ b/drivers/gpu/drm/bochs/bochs_kms.c @@ -38,7 +38,8 @@ static void bochs_plane_update(struct bochs_device *bochs, state->crtc_x, state->crtc_y, state->fb->pitches[0], - state->fb->offsets[0] + gbo->bo.offset); + state->fb->offsets[0] + + (gbo->bo.mem.start << PAGE_SHIFT)); bochs_hw_setformat(bochs, state->fb->format); } diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c b/drivers/gpu/drm/drm_gem_vram_helper.c index 92a11bb42365..e7ef4cd8116d 100644 --- a/drivers/gpu/drm/drm_gem_vram_helper.c +++ b/drivers/gpu/drm/drm_gem_vram_helper.c @@ -214,7 +214,7 @@ s64 drm_gem_vram_offset(struct drm_gem_vram_object *gbo) { if (WARN_ON_ONCE(!gbo->pin_count)) return (s64)-ENODEV; - return gbo->bo.offset; + return gbo->bo.mem.start << PAGE_SHIFT; } EXPORT_SYMBOL(drm_gem_vram_offset); From patchwork Mon Feb 17 10:18:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 11387913 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4EA6E924 for ; Tue, 18 Feb 2020 07:55:34 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2CF4F22527 for ; Tue, 18 Feb 2020 07:55:34 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="WGKq+4fg" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2CF4F22527 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B18F56E14E; Tue, 18 Feb 2020 07:55:25 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by gabe.freedesktop.org (Postfix) with ESMTPS id CB5D36E916; Mon, 17 Feb 2020 10:16:10 +0000 (UTC) Received: by mail-wr1-x443.google.com with SMTP id k11so18938154wrd.9; Mon, 17 Feb 2020 02:16:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1BQ3RLCCPj8Vx5ymm6Uw4hsRHsW/TZRnV/QBxLYgzPE=; b=WGKq+4fgVhtkETJVlVTABzl+QqNb8Jqw3m4onad5SHBssBiUMLn9bDl14TzSFtmAQI OZR0RVFsDB7xIsl7QZOOnhnEj9NchsUC8dtXy+L38Q1CJ7cqzTJvKoJCsvsegJumEXJT jwVy/cp3ibFuBis2ggJZbrzgiSOs22T2AbZHJ7/T9qe6J9zB39/u2XCQdV7inQUvim+Z +YtdT+B9/PaQ5DvEygmaSXfiJOeIZKl72TrAef9TwSqPwnmUT/6Eq+It5joHUagF6ce3 QEr6kkpK+r4Ra3vEw3DmokrDnil0A4NlmEgwiISb1vknhMBxbfnUKiN7n6K0CB2WJF6r 2zYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1BQ3RLCCPj8Vx5ymm6Uw4hsRHsW/TZRnV/QBxLYgzPE=; b=FHmRYADGlsxPkkOJAAr9CaDCt70I6AViU/FkhhrQ5QXELVN3GozfyBawhsEkxohyAY t1hPmtMok6XCKvGAE3Xoz11wXQGM1/LCON7sOag6SC8lPWsH+f87Oz7hAonUE8D0X+4o P4DFNcsU1lrpa3v+uJy69G/ncmPqlqZJHjmfnUTr8RAJ8G7TZNAygQ1Ybi9LvcekIPZI XST1IFh7yNZGO3HCEqwg29t3e06YA7L/pGlli6Ca7XypxcKMMhHxWn3O20ktWsLzQkkt Sr+1f0VRyopJPsuvfimhKnqB+/nRMUHbMekW3uorPDZbXnK1NUDmycPeAAI6d11iadi+ KCYQ== X-Gm-Message-State: APjAAAU2SVWNmREbEwS8TY/pH6RdbApciUsBP57XlwqBjdS9/asWWk5w +j74WojeaXrFgJBlmb/gM6UODXHocSMtZg== X-Google-Smtp-Source: APXvYqx9rjuZR5lXX9kcxCTxETYvWNx9nB+4sQ+RnTnzCBMa2uaN7jl+//VNkVFtNdh1YfB+VuhE4g== X-Received: by 2002:adf:e9d2:: with SMTP id l18mr21320314wrn.344.1581934569118; Mon, 17 Feb 2020 02:16:09 -0800 (PST) Received: from brihaspati.fritz.box (p200300C58F261400BC111EAD619EC67C.dip0.t-ipconnect.de. [2003:c5:8f26:1400:bc11:1ead:619e:c67c]) by smtp.gmail.com with ESMTPSA id a16sm278487wrt.30.2020.02.17.02.16.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Feb 2020 02:16:08 -0800 (PST) From: Nirmoy Das X-Google-Original-From: Nirmoy Das To: dri-devel@lists.freedesktop.org Subject: [PATCH 7/7] drm/ttm: do not keep GPU dependent addresses Date: Mon, 17 Feb 2020 11:18:41 +0100 Message-Id: <20200217101841.7437-8-nirmoy.das@amd.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200217101841.7437-1-nirmoy.das@amd.com> References: <20200217101841.7437-1-nirmoy.das@amd.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 18 Feb 2020 07:55:25 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thellstrom@vmware.com, airlied@linux.ie, kenny.ho@amd.com, brian.welty@intel.com, amd-gfx@lists.freedesktop.org, nirmoy.das@amd.com, linux-graphics-maintainer@vmware.com, bskeggs@redhat.com, alexander.deucher@amd.com, sean@poorly.run, christian.koenig@amd.com, kraxel@redhat.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" GPU address handling is device specific and should be handle by its device driver. Signed-off-by: Nirmoy Das --- drivers/gpu/drm/ttm/ttm_bo.c | 7 ------- include/drm/ttm/ttm_bo_api.h | 2 -- include/drm/ttm/ttm_bo_driver.h | 1 - 3 files changed, 10 deletions(-) diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c index 151edfd8de77..d5885cd609a3 100644 --- a/drivers/gpu/drm/ttm/ttm_bo.c +++ b/drivers/gpu/drm/ttm/ttm_bo.c @@ -85,7 +85,6 @@ static void ttm_mem_type_debug(struct ttm_bo_device *bdev, struct drm_printer *p drm_printf(p, " has_type: %d\n", man->has_type); drm_printf(p, " use_type: %d\n", man->use_type); drm_printf(p, " flags: 0x%08X\n", man->flags); - drm_printf(p, " gpu_offset: 0x%08llX\n", man->gpu_offset); drm_printf(p, " size: %llu\n", man->size); drm_printf(p, " available_caching: 0x%08X\n", man->available_caching); drm_printf(p, " default_caching: 0x%08X\n", man->default_caching); @@ -345,12 +344,6 @@ static int ttm_bo_handle_move_mem(struct ttm_buffer_object *bo, moved: bo->evicted = false; - if (bo->mem.mm_node) - bo->offset = (bo->mem.start << PAGE_SHIFT) + - bdev->man[bo->mem.mem_type].gpu_offset; - else - bo->offset = 0; - ctx->bytes_moved += bo->num_pages << PAGE_SHIFT; return 0; diff --git a/include/drm/ttm/ttm_bo_api.h b/include/drm/ttm/ttm_bo_api.h index b9bc1b00142e..d6f39ee5bf5d 100644 --- a/include/drm/ttm/ttm_bo_api.h +++ b/include/drm/ttm/ttm_bo_api.h @@ -213,8 +213,6 @@ struct ttm_buffer_object { * either of these locks held. */ - uint64_t offset; /* GPU address space is independent of CPU word size */ - struct sg_table *sg; }; diff --git a/include/drm/ttm/ttm_bo_driver.h b/include/drm/ttm/ttm_bo_driver.h index c9e0fd09f4b2..c8ce6c181abe 100644 --- a/include/drm/ttm/ttm_bo_driver.h +++ b/include/drm/ttm/ttm_bo_driver.h @@ -177,7 +177,6 @@ struct ttm_mem_type_manager { bool has_type; bool use_type; uint32_t flags; - uint64_t gpu_offset; /* GPU address space is independent of CPU word size */ uint64_t size; uint32_t available_caching; uint32_t default_caching;