From patchwork Fri Feb 21 11:42:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Lee, Shawn C" X-Patchwork-Id: 11395483 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CC1F91580 for ; Fri, 21 Feb 2020 03:46:01 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B0C4E20679 for ; Fri, 21 Feb 2020 03:46:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B0C4E20679 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A88AD6E14C; Fri, 21 Feb 2020 03:45:59 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id BB2FD6E14C for ; Fri, 21 Feb 2020 03:45:58 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Feb 2020 19:45:58 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,466,1574150400"; d="scan'208";a="269848209" Received: from shawnle1-build-machine.itwn.intel.com ([10.5.253.9]) by fmsmga002.fm.intel.com with ESMTP; 20 Feb 2020 19:45:56 -0800 From: Lee Shawn C To: intel-gfx@lists.freedesktop.org Date: Fri, 21 Feb 2020 19:42:31 +0800 Message-Id: <20200221114231.14612-1-shawn.c.lee@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200205173316.21739-1-shawn.c.lee@intel.com> References: <20200205173316.21739-1-shawn.c.lee@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2] drm/i915/lspcon: Make sure link rate did not exceed downstream and lspcon limitation X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Cooper Chiou , Sam McNally Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" While mode setting, driver would calculate mode rate based on resolution and bpp. And choose the best bpp that did not exceed DP bandwidtd. But LSPCON had more restriction due to it convert DP to HDMI. Driver should respect HDMI's bandwidth limitation if LSPCON was active. This change would ignore the bpp when its required output bandwidth already over HDMI 2.0 or 1.4 spec. v2: convert info->max_tmds_clock to byte clock for comparison. Cc: Imre Deak Cc: Ville Syrjälä Cc: Maarten Lankhorst Cc: Jani Nikula Cc: Cooper Chiou Cc: Sam McNally Signed-off-by: Lee Shawn C --- drivers/gpu/drm/i915/display/intel_dp.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/display/intel_lspcon.c | 10 ++++++++++ drivers/gpu/drm/i915/display/intel_lspcon.h | 1 + 3 files changed, 29 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 6ea0cb8e85e1..3a352847aff4 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1993,6 +1993,9 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp, const struct link_config_limits *limits) { struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; + struct intel_connector *connector = intel_dp->attached_connector; + const struct drm_display_info *info = &connector->base.display_info; + struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp); int bpp, clock, lane_count; int mode_rate, link_clock, link_avail; @@ -2002,6 +2005,21 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp, mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock, output_bpp); + /* + * Bypass this mode if require bandwidth over downstream + * limitation or HDMI spec when LSPCON active. + */ + if (lspcon->active) { + int max_clock_rate = lspcon_max_rate(lspcon); + + if (info->max_tmds_clock) + max_clock_rate = min(max_clock_rate, + DIV_ROUND_UP(info->max_tmds_clock * 24, 8)); + + if (mode_rate > max_clock_rate) + continue; + } + for (clock = limits->min_clock; clock <= limits->max_clock; clock++) { for (lane_count = limits->min_lane_count; lane_count <= limits->max_lane_count; diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c index d807c5648c87..3b0438356a88 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.c +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c @@ -518,6 +518,16 @@ void lspcon_set_infoframes(struct intel_encoder *encoder, buf, ret); } +int lspcon_max_rate(struct intel_lspcon *lspcon) +{ + enum drm_lspcon_mode current_mode = lspcon_get_current_mode(lspcon); + + if (current_mode == DRM_LSPCON_MODE_LS) + return DIV_ROUND_UP(340000 * 24, 8); + + return DIV_ROUND_UP(600000 * 24, 8); +} + u32 lspcon_infoframes_enabled(struct intel_encoder *encoder, const struct intel_crtc_state *pipe_config) { diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h index 37cfddf8a9c5..b584c02ab33b 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.h +++ b/drivers/gpu/drm/i915/display/intel_lspcon.h @@ -18,6 +18,7 @@ struct intel_lspcon; bool lspcon_init(struct intel_digital_port *intel_dig_port); void lspcon_resume(struct intel_lspcon *lspcon); void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon); +int lspcon_max_rate(struct intel_lspcon *lspcon); void lspcon_write_infoframe(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, unsigned int type,