From patchwork Fri Sep 28 21:49:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 10620345 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E8498913 for ; Fri, 28 Sep 2018 21:49:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D991A2BDEE for ; Fri, 28 Sep 2018 21:49:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CDAC92BE21; Fri, 28 Sep 2018 21:49:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7746C2BDEE for ; Fri, 28 Sep 2018 21:49:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726522AbeI2EPW (ORCPT ); Sat, 29 Sep 2018 00:15:22 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:36658 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725945AbeI2EPW (ORCPT ); Sat, 29 Sep 2018 00:15:22 -0400 Received: by mail-pf1-f193.google.com with SMTP id b7-v6so5163404pfo.3; Fri, 28 Sep 2018 14:49:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=r6n8Snxmx6UNLna4Rq9oHkp8SANzBfEF7kjJ2RrPGmo=; b=GooNWy5rcszGO0PadsSsWvH66eyIm79C/cITp5BAXVBJlzuVuGENx6iKrvIAQpmRU5 7K873Sd03jVV7ZR6J2nacG/39ijfW51xRfVxJOMSKiGkv8ghd5LANDYrGaCFhsWWTxpN bx/MLK76GbHXuYOc6Yo8PVxF/MxUa2WFP3S8LLoeEhC5z2YmFx0MIGQCzcaCdftGvGQZ VPXUb0YOWb0m6zyLy9vQzbfPiw1D1jWke/to5mIrRoYzzyJpcSeDbspYR6acplxVbYDN /fkt6vWxnkafdtr+hb3xD1T/rHWrcAJCvdYoQiEK1hCBi8ztDRyFuPVX3oxSPgFewlEC OWuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=r6n8Snxmx6UNLna4Rq9oHkp8SANzBfEF7kjJ2RrPGmo=; b=J5o7CGGUouDaOgAzarZ16JcKT4d8vTqqwEQDomoKHKs9vVNcYVVwmiOI+eUlYEz4uc mG8qpqbhpMbQecvzQDDqXKtyaWoPHhNCkpB9+TJosSF1CE4Edo8j4CsFj8uBavODAokO xi8XapZWyl/BuLF19tXG00a30H84QfG75QEHOFngkVAeyDQb5p0+Drirjdy12MdWUbof HvgKXQdhnw1fZZgJk06gR8XTPA/gzt3IOHdYvplrpIWHlQAJkkrkKWuTsQecA0bEfZLg VgwyE0kNsFxa8zRsA/Hd9dlYUsJwbdSup05iEnkll9druvU9a7Aq6hNnjPYNWyHodnUJ DDDA== X-Gm-Message-State: ABuFfogWCXRrNqf5V2tzv99nE1zj9XjodTm5JCezz+XZcn2jChfD+kFG OoIqtU+Q5q5cz1Jy4RX0yO8= X-Google-Smtp-Source: ACcGV63PenWzk3rZwV13X0p/AEbnny6UTHA9tMoPxLyFJtnro4LIIlPYB8ZtfbP+/+EBfvpeN/cXqg== X-Received: by 2002:a63:9f0a:: with SMTP id g10-v6mr459650pge.232.1538171381248; Fri, 28 Sep 2018 14:49:41 -0700 (PDT) Received: from Asurada-Nvidia.nvidia.com (thunderhill.nvidia.com. [216.228.112.22]) by smtp.gmail.com with ESMTPSA id r1-v6sm136842pgo.81.2018.09.28.14.49.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 28 Sep 2018 14:49:40 -0700 (PDT) From: Nicolin Chen To: jdelvare@suse.com, linux@roeck-us.net Cc: afd@ti.com, linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] hwmon: ina3221: Add INA3221_CONFIG to volatile_table Date: Fri, 28 Sep 2018 14:49:20 -0700 Message-Id: <20180928214921.11528-2-nicoleotsuka@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180928214921.11528-1-nicoleotsuka@gmail.com> References: <20180928214921.11528-1-nicoleotsuka@gmail.com> Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The MSB (15th bit) of INA3221_CONFIG is a self-clear reset bit. So this register should be added to the volatile_table of the regmap_config. Otherwise, we will see this bit is sticky in the regcache which might accidentally reset the chip when an actual write happens to the register. This might not be a severe bug for the current code line since there's no second place touching the INA3221_CONFIG except the reset routine in the probe(). Signed-off-by: Nicolin Chen --- drivers/hwmon/ina3221.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/ina3221.c b/drivers/hwmon/ina3221.c index e6b49500c52a..cfe65ff01051 100644 --- a/drivers/hwmon/ina3221.c +++ b/drivers/hwmon/ina3221.c @@ -353,7 +353,7 @@ static struct attribute *ina3221_attrs[] = { ATTRIBUTE_GROUPS(ina3221); static const struct regmap_range ina3221_yes_ranges[] = { - regmap_reg_range(INA3221_SHUNT1, INA3221_BUS3), + regmap_reg_range(INA3221_CONFIG, INA3221_BUS3), regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE), }; From patchwork Fri Sep 28 21:49:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 10620347 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E544F15A6 for ; Fri, 28 Sep 2018 21:49:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D531A2BDFA for ; Fri, 28 Sep 2018 21:49:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C93172BE3C; Fri, 28 Sep 2018 21:49:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6D4D62BDFA for ; Fri, 28 Sep 2018 21:49:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726476AbeI2EPX (ORCPT ); Sat, 29 Sep 2018 00:15:23 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:44062 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725945AbeI2EPX (ORCPT ); Sat, 29 Sep 2018 00:15:23 -0400 Received: by mail-pf1-f195.google.com with SMTP id k21-v6so5134500pff.11; Fri, 28 Sep 2018 14:49:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=npQ3xWQWGGJNGPKbAJA6+96Rj377BwfjmaODrJXnkRw=; b=DvOUnICTFGnpyXAE4pcg5fSfEPIH5BgTqeFAy735fAU3oknltScFGGfieUD+cOVPLb en6k5mP8QKLz6z6cxDsLJhlkDurmmZu6ySdz1waJWY91fh7tr1pgsIiyAMHz3Y/xBWJ0 hDmKleWYuOF0YeDmtQ54TFEsEHNS3akW1Et4H2Pra1nCVddys286bZHd9lBQXuK/0toJ NdvKo+4jQaOCV8sSmW7x0d3pPzHytREkRy+7VtcZTB4wOHbuKCQh4OyGBfs2q+hRo/+D WSk37CA14VwXswv9F7H6gTGRhpbs/30+ZxF9s60iX/qv4W5hgO/t/LC5wWS8M4i6m31R +ZXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=npQ3xWQWGGJNGPKbAJA6+96Rj377BwfjmaODrJXnkRw=; b=ONF9vBpY7gilRY5Rgo/LPxiTNLL6Ln6ZnZNJ07StPOsO5gBqQ12ShWsf+8Rg2FJMFv W44uNkgVrIG6SIuzrLaHwhOGeXYIE1XraTEca5NLUN7dqvDB78SvLik44nSzjAWvO7Ki HoQs/AesajHlIxHfs62GmN7qyxsyqWwxuOiovHDR2pUSIfQJtrmQrzoW0wCFIGgL5zzy Oyw/rsiyvZ+rDP3V506V74moL7ouT9bbW05Rcjrg/KWE7PUxAoVLLHHEuXcZjCDxg9w1 6t3pYBMDli9pyFJlJ0hnOR/aJtVFqHVg/Yz7PoAyNETlIxiAk6r4017b4uXC6PspmC2H jrkQ== X-Gm-Message-State: ABuFfohV8+/80gu6sZ3o2P9KfFuQ0a+n9ey/erSqm9udRlgGNUNsgbJi 4eTGRrNg1Tb66ot8nDkjjaU= X-Google-Smtp-Source: ACcGV63BHsG1aW5MB1SaSkbZvzbYXLK2HlzHV2B3tjJSbCuyogre9kB75HaJgPhICJZKg8becSU49w== X-Received: by 2002:a63:5558:: with SMTP id f24-v6mr453664pgm.37.1538171382266; Fri, 28 Sep 2018 14:49:42 -0700 (PDT) Received: from Asurada-Nvidia.nvidia.com (thunderhill.nvidia.com. [216.228.112.22]) by smtp.gmail.com with ESMTPSA id r1-v6sm136842pgo.81.2018.09.28.14.49.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 28 Sep 2018 14:49:41 -0700 (PDT) From: Nicolin Chen To: jdelvare@suse.com, linux@roeck-us.net Cc: afd@ti.com, linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] hwmon: ina3221: Add suspend and resume functions Date: Fri, 28 Sep 2018 14:49:21 -0700 Message-Id: <20180928214921.11528-3-nicoleotsuka@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180928214921.11528-1-nicoleotsuka@gmail.com> References: <20180928214921.11528-1-nicoleotsuka@gmail.com> Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Depending on the hardware design, an INA3221 chip might lose its power during system suspend/resume. So this patch adds a pair of suspend and resume functions to cache the register values including config register value and limit settings. Signed-off-by: Nicolin Chen --- drivers/hwmon/ina3221.c | 54 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/drivers/hwmon/ina3221.c b/drivers/hwmon/ina3221.c index cfe65ff01051..26f66f728b27 100644 --- a/drivers/hwmon/ina3221.c +++ b/drivers/hwmon/ina3221.c @@ -91,11 +91,13 @@ static const unsigned int register_channel[] = { * @regmap: Register map of the device * @fields: Register fields of the device * @shunt_resistors: Array of resistor values per channel + * @reg_config: Register value of INA3221_CONFIG */ struct ina3221_data { struct regmap *regmap; struct regmap_field *fields[F_MAX_FIELDS]; int shunt_resistors[INA3221_NUM_CHANNELS]; + u32 reg_config; }; static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg, @@ -415,8 +417,59 @@ static int ina3221_probe(struct i2c_client *client, return PTR_ERR(hwmon_dev); } + dev_set_drvdata(dev, ina); + + return 0; +} + +#ifdef CONFIG_PM +static int ina3221_suspend(struct device *dev) +{ + struct ina3221_data *ina = dev_get_drvdata(dev); + int ret; + + /* Save config register value and enable cache-only */ + ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config); + if (ret) + return ret; + + regcache_cache_only(ina->regmap, true); + regcache_mark_dirty(ina->regmap); + + return 0; +} + +static int ina3221_resume(struct device *dev) +{ + struct ina3221_data *ina = dev_get_drvdata(dev); + int ret; + + regcache_cache_only(ina->regmap, false); + + /* Software reset the chip */ + ret = regmap_field_write(ina->fields[F_RST], true); + if (ret) { + dev_err(dev, "Unable to reset device\n"); + return ret; + } + + /* Restore cached register values to hardware */ + ret = regcache_sync(ina->regmap); + if (ret) + return ret; + + /* Restore config register value to hardware */ + ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config); + if (ret) + return ret; + return 0; } +#endif + +static const struct dev_pm_ops ina3221_pm = { + SET_SYSTEM_SLEEP_PM_OPS(ina3221_suspend, ina3221_resume) +}; static const struct of_device_id ina3221_of_match_table[] = { { .compatible = "ti,ina3221", }, @@ -435,6 +488,7 @@ static struct i2c_driver ina3221_i2c_driver = { .driver = { .name = INA3221_DRIVER_NAME, .of_match_table = ina3221_of_match_table, + .pm = &ina3221_pm, }, .id_table = ina3221_ids, };