From patchwork Tue Feb 25 11:48:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403335 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5D93714BC for ; Tue, 25 Feb 2020 11:56:04 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 34DFD2176D for ; Tue, 25 Feb 2020 11:56:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="iJ/QdHqp" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 34DFD2176D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:53534 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Yol-0000iN-Cr for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 06:56:03 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:49019) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Yk7-0000C2-BU for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:51:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6Yk2-0005H6-Hg for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:51:15 -0500 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]:54490) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6Yk2-0005E7-86 for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:51:10 -0500 Received: by mail-wm1-x332.google.com with SMTP id z12so2661477wmi.4 for ; Tue, 25 Feb 2020 03:51:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=P4E/uPANWEGduczzyeMY1IJA5ZlMSCF4bQjKlNViLv0=; b=iJ/QdHqpOE5sSgNc21wj0B8DHwvHGlWGhoVvvawviJV51Kp48+Ddx4KVAPkHZhcGsh xZSFdfYHcBobfYcZVdoZbOo91BatSOhJFNHYBz84yH7gciAgffc6co/G3ZtzvHhKHOIA qZXACBZhLQJhVWeCdsWDKiNSdjm53vkZZt/oJ5lM6WR8hKMZE8L6rLR0TX+XpAg9uLZP r4k/RrM9UHww+4ffxppDYwZg9mtkLR31Aqk2XRYDZX1o7MbW3m/hVVcucg8KM4yfCz1J 3w43wt7ejwb/gx2bYgtALqKKxCr7G9zT0J30v2Uk2zD4VgOlOpUCAA3fhu8X/m6smCaf 0yLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=P4E/uPANWEGduczzyeMY1IJA5ZlMSCF4bQjKlNViLv0=; b=jZ8kbi1UhjOUX0Z7L6f+s4u9R3MHK5adis2tz16T/yu9KrfhXIkZvaVrdHd6UHspwo Cf9vrv29NTAy3OBy+WVZHcsHHOffp4HE4xzj9yLgYUShe+KGozyqhFqYR2NUZRjbrVs7 FhOGzJSIBQLGEUzLEvMgPeQRyuf1C8FoGrIXjjWFmrcpoBnfP55n9VI+6TwSUS4MsS2a 4YilJkuiFQJgP9OfmxIyjcQyUS1QECDDpMGQz9qD1jVCN+F/tO0zao3e6btB1hw2IdUq eSCSfOF6qeFkkQRcJBxTeW71tRTnqtw8E42p+QCLALOAHX+N6LNb0/g+BPyKqx9gb/k7 y8Ew== X-Gm-Message-State: APjAAAWaCySzhm5Zn2pHXXgmbiN/ik1ZTSkkd8U/qgbLRlVL5uehvE2K dqFO9MUc9aMVYUXknK1nFZeNi/vr X-Google-Smtp-Source: APXvYqzDV4W+MhCis0wHuIJkFSuh1bUX8pj7ouAilAgIJCWv9hV+pGRS+tce35lHOJ/7jZv1tmJubQ== X-Received: by 2002:a1c:e488:: with SMTP id b130mr4769428wmh.108.1582631468638; Tue, 25 Feb 2020 03:51:08 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.51.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:51:08 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 002/136] machine: introduce memory-backend property Date: Tue, 25 Feb 2020 12:48:52 +0100 Message-Id: <1582631466-13880-2-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::332 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov Property will contain link to memory backend that will be used for backing initial RAM. Follow up commit will alias -mem-path and -mem-prealloc CLI options into memory backend options to make memory handling consistent (using only hostmem backend family for guest RAM allocation). Signed-off-by: Igor Mammedov Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-3-imammedo@redhat.com> --- hw/core/machine.c | 24 ++++++++++++++++++++++++ include/hw/boards.h | 2 ++ 2 files changed, 26 insertions(+) diff --git a/hw/core/machine.c b/hw/core/machine.c index 84812a1..1a6e485 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -508,6 +508,22 @@ static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque) } } +static char *machine_get_memdev(Object *obj, Error **errp) +{ + MachineState *ms = MACHINE(obj); + + return g_strdup(ms->ram_memdev_id); +} + +static void machine_set_memdev(Object *obj, const char *value, Error **errp) +{ + MachineState *ms = MACHINE(obj); + + g_free(ms->ram_memdev_id); + ms->ram_memdev_id = g_strdup(value); +} + + static void machine_init_notify(Notifier *notifier, void *data) { MachineState *machine = MACHINE(qdev_get_machine()); @@ -889,6 +905,14 @@ static void machine_initfn(Object *obj) "Table (HMAT)", NULL); } + object_property_add_str(obj, "memory-backend", + machine_get_memdev, machine_set_memdev, + &error_abort); + object_property_set_description(obj, "memory-backend", + "Set RAM backend" + "Valid value is ID of hostmem based backend", + &error_abort); + /* Register notifier when init is done for sysbus sanity checks */ ms->sysbus_notifier.notify = machine_init_notify; qemu_add_machine_init_done_notifier(&ms->sysbus_notifier); diff --git a/include/hw/boards.h b/include/hw/boards.h index fb1b43d..7b4b6b7 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -4,6 +4,7 @@ #define HW_BOARDS_H #include "exec/memory.h" +#include "sysemu/hostmem.h" #include "sysemu/blockdev.h" #include "sysemu/accel.h" #include "qapi/qapi-types-machine.h" @@ -285,6 +286,7 @@ struct MachineState { bool enforce_config_section; bool enable_graphics; char *memory_encryption; + char *ram_memdev_id; DeviceMemoryState *device_memory; ram_addr_t ram_size; From patchwork Tue Feb 25 11:48:53 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 03:51:09 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 003/136] machine: alias -mem-path and -mem-prealloc into memory-foo backend Date: Tue, 25 Feb 2020 12:48:53 +0100 Message-Id: <1582631466-13880-3-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov Allow machine to opt in for hostmem backend based initial RAM even if user uses old -mem-path/prealloc options by providing MachineClass::default_ram_id Follow up patches will incrementally convert machines to new API, by dropping memory_region_allocate_system_memory() and setting default_ram_id that board used to use before conversion to keep migration stream the same. Signed-off-by: Igor Mammedov Message-Id: <20200219160953.13771-4-imammedo@redhat.com> --- backends/hostmem-file.c | 7 ------- backends/hostmem-ram.c | 2 -- include/hw/boards.h | 8 ++++++++ include/sysemu/hostmem.h | 16 ++++++++++++++++ vl.c | 25 +++++++++++++++++++++++++ 5 files changed, 49 insertions(+), 9 deletions(-) diff --git a/backends/hostmem-file.c b/backends/hostmem-file.c index be64020..cb319a9 100644 --- a/backends/hostmem-file.c +++ b/backends/hostmem-file.c @@ -18,13 +18,6 @@ #include "sysemu/sysemu.h" #include "qom/object_interfaces.h" -/* hostmem-file.c */ -/** - * @TYPE_MEMORY_BACKEND_FILE: - * name of backend that uses mmap on a file descriptor - */ -#define TYPE_MEMORY_BACKEND_FILE "memory-backend-file" - #define MEMORY_BACKEND_FILE(obj) \ OBJECT_CHECK(HostMemoryBackendFile, (obj), TYPE_MEMORY_BACKEND_FILE) diff --git a/backends/hostmem-ram.c b/backends/hostmem-ram.c index 6aab8d3..5cc53e7 100644 --- a/backends/hostmem-ram.c +++ b/backends/hostmem-ram.c @@ -16,8 +16,6 @@ #include "qemu/module.h" #include "qom/object_interfaces.h" -#define TYPE_MEMORY_BACKEND_RAM "memory-backend-ram" - static void ram_backend_memory_alloc(HostMemoryBackend *backend, Error **errp) { diff --git a/include/hw/boards.h b/include/hw/boards.h index 7b4b6b7..8e536ca 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -170,6 +170,13 @@ typedef struct { * false is returned, an error must be set to show the reason of * the rejection. If the hook is not provided, all hotplug will be * allowed. + * @default_ram_id: + * Specifies inital RAM MemoryRegion name to be used for default backend + * creation if user explicitly hasn't specified backend with "memory-backend" + * property. + * It also will be used as a way to optin into "-m" option support. + * If it's not set by board, '-m' will be ignored and generic code will + * not create default RAM MemoryRegion. */ struct MachineClass { /*< private >*/ @@ -226,6 +233,7 @@ struct MachineClass { bool nvdimm_supported; bool numa_mem_supported; bool auto_enable_numa; + const char *default_ram_id; HotplugHandler *(*get_hotplug_handler)(MachineState *machine, DeviceState *dev); diff --git a/include/sysemu/hostmem.h b/include/sysemu/hostmem.h index 4dbdadd..5db0d66 100644 --- a/include/sysemu/hostmem.h +++ b/include/sysemu/hostmem.h @@ -27,6 +27,22 @@ #define MEMORY_BACKEND_CLASS(klass) \ OBJECT_CLASS_CHECK(HostMemoryBackendClass, (klass), TYPE_MEMORY_BACKEND) +/* hostmem-ram.c */ +/** + * @TYPE_MEMORY_BACKEND_RAM: + * name of backend that uses mmap on the anonymous RAM + */ + +#define TYPE_MEMORY_BACKEND_RAM "memory-backend-ram" + +/* hostmem-file.c */ +/** + * @TYPE_MEMORY_BACKEND_FILE: + * name of backend that uses mmap on a file descriptor + */ +#define TYPE_MEMORY_BACKEND_FILE "memory-backend-file" + +typedef struct HostMemoryBackend HostMemoryBackend; typedef struct HostMemoryBackendClass HostMemoryBackendClass; /** diff --git a/vl.c b/vl.c index 794f2e5..4dc4803 100644 --- a/vl.c +++ b/vl.c @@ -75,6 +75,7 @@ int main(int argc, char **argv) #include "ui/input.h" #include "sysemu/sysemu.h" #include "sysemu/numa.h" +#include "sysemu/hostmem.h" #include "exec/gdbstub.h" #include "qemu/timer.h" #include "chardev/char.h" @@ -2805,6 +2806,26 @@ static void configure_accelerators(const char *progname) } } +static void create_default_memdev(MachineState *ms, const char *path, + bool prealloc) +{ + Object *obj; + MachineClass *mc = MACHINE_GET_CLASS(ms); + + obj = object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKEND_RAM); + if (path) { + object_property_set_str(obj, path, "mem-path", &error_fatal); + } + object_property_set_bool(obj, prealloc, "prealloc", &error_fatal); + object_property_set_int(obj, ms->ram_size, "size", &error_fatal); + object_property_add_child(object_get_objects_root(), mc->default_ram_id, + obj, &error_fatal); + user_creatable_complete(USER_CREATABLE(obj), &error_fatal); + object_unref(obj); + object_property_set_str(OBJECT(ms), mc->default_ram_id, "memory-backend", + &error_fatal); +} + int main(int argc, char **argv, char **envp) { int i; @@ -4268,6 +4289,10 @@ int main(int argc, char **argv, char **envp) } parse_numa_opts(current_machine); + if (machine_class->default_ram_id && current_machine->ram_size && + !current_machine->ram_memdev_id) { + create_default_memdev(current_machine, mem_path, mem_prealloc); + } /* do monitor/qmp handling at preconfig state if requested */ main_loop(); From patchwork Tue Feb 25 11:48:54 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 03:51:09 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 004/136] machine: introduce convenience MachineState::ram Date: Tue, 25 Feb 2020 12:48:54 +0100 Message-Id: <1582631466-13880-4-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov the new field will be used by boards to get access to main RAM memory region and will help to save boiler plate in boards which often introduce a field or variable just for this purpose. Memory region will be equivalent to what currently used memory_region_allocate_system_memory() is returning apart from that it will come from hostmem backend. Followup patches will incrementally switch boards to using RAM from MachineState::ram. Patch takes care of non-NUMA case and follow up patch will initialize MachineState::ram for NUMA case. Signed-off-by: Igor Mammedov Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-5-imammedo@redhat.com> --- hw/core/machine.c | 24 ++++++++++++++++++++++++ hw/core/numa.c | 14 +------------- include/hw/boards.h | 12 +++++++++++- 3 files changed, 36 insertions(+), 14 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 1a6e485..c8d361b 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -26,6 +26,7 @@ #include "sysemu/qtest.h" #include "hw/pci/pci.h" #include "hw/mem/nvdimm.h" +#include "migration/vmstate.h" GlobalProperty hw_compat_4_2[] = { { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, @@ -1059,10 +1060,33 @@ static void machine_numa_finish_cpu_init(MachineState *machine) g_string_free(s, true); } +MemoryRegion *machine_consume_memdev(MachineState *machine, + HostMemoryBackend *backend) +{ + MemoryRegion *ret = host_memory_backend_get_memory(backend); + + if (memory_region_is_mapped(ret)) { + char *path = object_get_canonical_path_component(OBJECT(backend)); + error_report("memory backend %s can't be used multiple times.", path); + g_free(path); + exit(EXIT_FAILURE); + } + host_memory_backend_set_mapped(backend, true); + vmstate_register_ram_global(ret); + return ret; +} + void machine_run_board_init(MachineState *machine) { MachineClass *machine_class = MACHINE_GET_CLASS(machine); + if (machine->ram_memdev_id) { + Object *o; + o = object_resolve_path_type(machine->ram_memdev_id, + TYPE_MEMORY_BACKEND, NULL); + machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o)); + } + if (machine->numa_state) { numa_complete_configuration(machine); if (machine->numa_state->num_nodes) { diff --git a/hw/core/numa.c b/hw/core/numa.c index 840e685..8264336 100644 --- a/hw/core/numa.c +++ b/hw/core/numa.c @@ -817,20 +817,8 @@ void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner, if (!backend) { continue; } - MemoryRegion *seg = host_memory_backend_get_memory(backend); - - if (memory_region_is_mapped(seg)) { - char *path = object_get_canonical_path_component(OBJECT(backend)); - error_report("memory backend %s is used multiple times. Each " - "-numa option must use a different memdev value.", - path); - g_free(path); - exit(1); - } - - host_memory_backend_set_mapped(backend, true); + MemoryRegion *seg = machine_consume_memdev(ms, backend); memory_region_add_subregion(mr, addr, seg); - vmstate_register_ram_global(seg); addr += size; } } diff --git a/include/hw/boards.h b/include/hw/boards.h index 8e536ca..ae2b60f 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -73,7 +73,12 @@ void machine_set_cpu_numa_node(MachineState *machine, Error **errp); void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type); - +/* + * Checks that backend isn't used, preps it for exclusive usage and + * returns migratable MemoryRegion provided by backend. + */ +MemoryRegion *machine_consume_memdev(MachineState *machine, + HostMemoryBackend *backend); /** * CPUArchId: @@ -295,6 +300,11 @@ struct MachineState { bool enable_graphics; char *memory_encryption; char *ram_memdev_id; + /* + * convenience alias to ram_memdev_id backend memory region + * or to numa container memory region + */ + MemoryRegion *ram; DeviceMemoryState *device_memory; ram_addr_t ram_size; From patchwork Tue Feb 25 11:48:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403343 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 53C4B930 for ; Tue, 25 Feb 2020 11:57:52 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2B20A2176D for ; Tue, 25 Feb 2020 11:57:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="pejccUuq" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2B20A2176D Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:51:11 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.51.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:51:10 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 005/136] initialize MachineState::ram in NUMA case Date: Tue, 25 Feb 2020 12:48:55 +0100 Message-Id: <1582631466-13880-5-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::430 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov In case of NUMA there are 2 cases to consider: 1. '-numa node,memdev', the only one that will be available for 5.0 and newer machine types. In this case reuse current behavior, with only difference memdevs are put into MachineState::ram container + a temporary glue to keep memory_region_allocate_system_memory() working until all boards converted. 2. fake NUMA ("-numa node mem" and default RAM splitting) the later has been deprecated and will be removed but the former is going to stay available for compat reasons for 5.0 and older machine types it takes allocate_system_memory_nonnuma() path, like non-NUMA case and falls under conversion to memdev. So extend non-NUMA MachineState::ram initialization introduced in previous patch to take care of fake NUMA case. Signed-off-by: Igor Mammedov Message-Id: <20200219160953.13771-6-imammedo@redhat.com> --- hw/core/numa.c | 43 ++++++++++++++++++++++++++++++------------- include/sysemu/numa.h | 1 + vl.c | 2 +- 3 files changed, 32 insertions(+), 14 deletions(-) diff --git a/hw/core/numa.c b/hw/core/numa.c index 8264336..e6baf2c 100644 --- a/hw/core/numa.c +++ b/hw/core/numa.c @@ -52,6 +52,11 @@ QemuOptsList qemu_numa_opts = { }; static int have_memdevs; +bool numa_uses_legacy_mem(void) +{ + return !have_memdevs; +} + static int have_mem; static int max_numa_nodeid; /* Highest specified NUMA node ID, plus one. * For all nodes, nodeid < max_numa_nodeid @@ -652,6 +657,23 @@ void numa_default_auto_assign_ram(MachineClass *mc, NodeInfo *nodes, nodes[i].node_mem = size - usedmem; } +static void numa_init_memdev_container(MachineState *ms, MemoryRegion *ram) +{ + int i; + uint64_t addr = 0; + + for (i = 0; i < ms->numa_state->num_nodes; i++) { + uint64_t size = ms->numa_state->nodes[i].node_mem; + HostMemoryBackend *backend = ms->numa_state->nodes[i].node_memdev; + if (!backend) { + continue; + } + MemoryRegion *seg = machine_consume_memdev(ms, backend); + memory_region_add_subregion(ram, addr, seg); + addr += size; + } +} + void numa_complete_configuration(MachineState *ms) { int i; @@ -734,6 +756,12 @@ void numa_complete_configuration(MachineState *ms) exit(1); } + if (!numa_uses_legacy_mem() && mc->default_ram_id) { + ms->ram = g_new(MemoryRegion, 1); + memory_region_init(ms->ram, OBJECT(ms), mc->default_ram_id, + ram_size); + numa_init_memdev_container(ms, ms->ram); + } /* QEMU needs at least all unique node pair distances to build * the whole NUMA distance table. QEMU treats the distance table * as symmetric by default, i.e. distance A->B == distance B->A. @@ -800,27 +828,16 @@ void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner, const char *name, uint64_t ram_size) { - uint64_t addr = 0; - int i; MachineState *ms = MACHINE(qdev_get_machine()); if (ms->numa_state == NULL || - ms->numa_state->num_nodes == 0 || !have_memdevs) { + ms->numa_state->num_nodes == 0 || numa_uses_legacy_mem()) { allocate_system_memory_nonnuma(mr, owner, name, ram_size); return; } memory_region_init(mr, owner, name, ram_size); - for (i = 0; i < ms->numa_state->num_nodes; i++) { - uint64_t size = ms->numa_state->nodes[i].node_mem; - HostMemoryBackend *backend = ms->numa_state->nodes[i].node_memdev; - if (!backend) { - continue; - } - MemoryRegion *seg = machine_consume_memdev(ms, backend); - memory_region_add_subregion(mr, addr, seg); - addr += size; - } + numa_init_memdev_container(ms, mr); } static void numa_stat_memory_devices(NumaNodeMem node_mem[]) diff --git a/include/sysemu/numa.h b/include/sysemu/numa.h index ba693cc..ad58ee8 100644 --- a/include/sysemu/numa.h +++ b/include/sysemu/numa.h @@ -112,5 +112,6 @@ void numa_default_auto_assign_ram(MachineClass *mc, NodeInfo *nodes, int nb_nodes, ram_addr_t size); void numa_cpu_pre_plug(const struct CPUArchId *slot, DeviceState *dev, Error **errp); +bool numa_uses_legacy_mem(void); #endif diff --git a/vl.c b/vl.c index 4dc4803..2103804 100644 --- a/vl.c +++ b/vl.c @@ -4290,7 +4290,7 @@ int main(int argc, char **argv, char **envp) parse_numa_opts(current_machine); if (machine_class->default_ram_id && current_machine->ram_size && - !current_machine->ram_memdev_id) { + numa_uses_legacy_mem() && !current_machine->ram_memdev_id) { create_default_memdev(current_machine, mem_path, mem_prealloc); } /* do monitor/qmp handling at preconfig state if requested */ From patchwork Tue Feb 25 11:48:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403321 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 966B11580 for ; Tue, 25 Feb 2020 11:52:43 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6D9BF21556 for ; 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Tue, 25 Feb 2020 03:51:11 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 006/136] vl.c: move -m parsing after memory backends has been processed Date: Tue, 25 Feb 2020 12:48:56 +0100 Message-Id: <1582631466-13880-6-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42b X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov It will be possible for main RAM to come from memory-backend and we should check that size specified in -m matches the size of the backend and [MachineState::]ram_size also matches backend's size. However -m parsing (set_memory_options()) happens before backends are intialized (object_create_delayed()) which complicates it. Consolidate set_memory_options() and assigning parsed results to current_machine after backends are initialized, so it would be possible access the initialized backend instance to compare sizes. This patch only consolidates scattered places touching ram_size within vl.c. And follow up patch will integrate backend handling to set_memory_options(). Signed-off-by: Igor Mammedov Message-Id: <20200219160953.13771-7-imammedo@redhat.com> --- vl.c | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/vl.c b/vl.c index 2103804..72ffc06 100644 --- a/vl.c +++ b/vl.c @@ -2655,6 +2655,14 @@ static void set_memory_options(uint64_t *ram_slots, ram_addr_t *maxram_size, exit(EXIT_FAILURE); } + if (!xen_enabled()) { + /* On 32-bit hosts, QEMU is limited by virtual address space */ + if (ram_size > (2047 << 20) && HOST_LONG_BITS == 32) { + error_report("at most 2047 MB RAM can be simulated"); + exit(1); + } + } + loc_pop(&loc); } @@ -3819,8 +3827,6 @@ int main(int argc, char **argv, char **envp) machine_class = select_machine(); object_set_machine_compat_props(machine_class->compat_props); - set_memory_options(&ram_slots, &maxram_size, machine_class); - os_daemonize(); rcu_disable_atfork(); @@ -4122,9 +4128,6 @@ int main(int argc, char **argv, char **envp) machine_opts = qemu_get_machine_opts(); qemu_opt_foreach(machine_opts, machine_set_property, current_machine, &error_fatal); - current_machine->ram_size = ram_size; - current_machine->maxram_size = maxram_size; - current_machine->ram_slots = ram_slots; /* * Note: uses machine properties such as kernel-irqchip, must run @@ -4235,14 +4238,6 @@ int main(int argc, char **argv, char **envp) tpm_init(); - if (!xen_enabled()) { - /* On 32-bit hosts, QEMU is limited by virtual address space */ - if (ram_size > (2047 << 20) && HOST_LONG_BITS == 32) { - error_report("at most 2047 MB RAM can be simulated"); - exit(1); - } - } - blk_mig_init(); ram_mig_init(); dirty_bitmap_mig_init(); @@ -4287,6 +4282,12 @@ int main(int argc, char **argv, char **envp) if (cpu_option) { current_machine->cpu_type = parse_cpu_option(cpu_option); } + + set_memory_options(&ram_slots, &maxram_size, machine_class); + current_machine->ram_size = ram_size; + current_machine->maxram_size = maxram_size; + current_machine->ram_slots = ram_slots; + parse_numa_opts(current_machine); if (machine_class->default_ram_id && current_machine->ram_size && From patchwork Tue Feb 25 11:48:57 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 03:51:12 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 007/136] vl.c: ensure that ram_size matches size of machine.memory-backend Date: Tue, 25 Feb 2020 12:48:57 +0100 Message-Id: <1582631466-13880-7-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov Extend set_memory_options() to check that size specified by -m matches the size of backend pointed by memory-backend. And in case of -m was omitted adjust ram_size to match that of explicitly provided backend. Signed-off-by: Igor Mammedov Message-Id: <20200219160953.13771-8-imammedo@redhat.com> --- vl.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/vl.c b/vl.c index 72ffc06..a7edcba 100644 --- a/vl.c +++ b/vl.c @@ -2655,6 +2655,21 @@ static void set_memory_options(uint64_t *ram_slots, ram_addr_t *maxram_size, exit(EXIT_FAILURE); } + if (current_machine->ram_memdev_id) { + Object *backend; + ram_addr_t backend_size; + + backend = object_resolve_path_type(current_machine->ram_memdev_id, + TYPE_MEMORY_BACKEND, NULL); + backend_size = object_property_get_uint(backend, "size", &error_abort); + if (mem_str && backend_size != ram_size) { + error_report("Size specified by -m option must match size of " + "explicitly specified 'memory-backend' property"); + exit(EXIT_FAILURE); + } + ram_size = backend_size; + } + if (!xen_enabled()) { /* On 32-bit hosts, QEMU is limited by virtual address space */ if (ram_size > (2047 << 20) && HOST_LONG_BITS == 32) { From patchwork Tue Feb 25 11:48:58 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 03:51:13 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 008/136] alpha/dp264: use memdev for RAM Date: Tue, 25 Feb 2020 12:48:58 +0100 Message-Id: <1582631466-13880-8-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::329 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson Message-Id: <20200219160953.13771-9-imammedo@redhat.com> --- hw/alpha/alpha_sys.h | 2 +- hw/alpha/dp264.c | 3 ++- hw/alpha/typhoon.c | 8 ++------ 3 files changed, 5 insertions(+), 8 deletions(-) diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h index 95033d7..bc0a286 100644 --- a/hw/alpha/alpha_sys.h +++ b/hw/alpha/alpha_sys.h @@ -11,7 +11,7 @@ #include "hw/intc/i8259.h" -PCIBus *typhoon_init(ram_addr_t, ISABus **, qemu_irq *, AlphaCPU *[4], +PCIBus *typhoon_init(MemoryRegion *, ISABus **, qemu_irq *, AlphaCPU *[4], pci_map_irq_fn); /* alpha_pci.c. */ diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index a8f9a89..8d71a30 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -75,7 +75,7 @@ static void clipper_init(MachineState *machine) cpus[0]->env.trap_arg2 = smp_cpus; /* Init the chipset. */ - pci_bus = typhoon_init(ram_size, &isa_bus, &rtc_irq, cpus, + pci_bus = typhoon_init(machine->ram, &isa_bus, &rtc_irq, cpus, clipper_pci_map_irq); /* Since we have an SRM-compatible PALcode, use the SRM epoch. */ @@ -183,6 +183,7 @@ static void clipper_machine_init(MachineClass *mc) mc->max_cpus = 4; mc->is_default = 1; mc->default_cpu_type = ALPHA_CPU_TYPE_NAME("ev67"); + mc->default_ram_id = "ram"; } DEFINE_MACHINE("clipper", clipper_machine_init) diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 179e1f7..1795e2f 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -58,7 +58,6 @@ typedef struct TyphoonState { TyphoonCchip cchip; TyphoonPchip pchip; MemoryRegion dchip_region; - MemoryRegion ram_region; } TyphoonState; /* Called when one of DRIR or DIM changes. */ @@ -817,8 +816,7 @@ static void typhoon_alarm_timer(void *opaque) cpu_interrupt(CPU(s->cchip.cpu[cpu]), CPU_INTERRUPT_TIMER); } -PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, - qemu_irq *p_rtc_irq, +PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bus, qemu_irq *p_rtc_irq, AlphaCPU *cpus[4], pci_map_irq_fn sys_map_irq) { MemoryRegion *addr_space = get_system_memory(); @@ -851,9 +849,7 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, /* Main memory region, 0x00.0000.0000. Real hardware supports 32GB, but the address space hole reserved at this point is 8TB. */ - memory_region_allocate_system_memory(&s->ram_region, OBJECT(s), "ram", - ram_size); - memory_region_add_subregion(addr_space, 0, &s->ram_region); + memory_region_add_subregion(addr_space, 0, ram); /* TIGbus, 0x801.0000.0000, 1GB. */ /* ??? The TIGbus is used for delivering interrupts, and access to From patchwork Tue Feb 25 11:48:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403359 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A4A1D14E3 for ; Tue, 25 Feb 2020 11:59:47 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 29D992176D for ; Tue, 25 Feb 2020 11:59:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="raWeujoe" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 29D992176D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:53602 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6YsM-0007QI-6D for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 06:59:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:49120) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6YkF-0000Ev-Jy for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:51:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6YkB-0005j6-Cn for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:51:23 -0500 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]:54494) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6YkB-0005Tu-0m for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:51:19 -0500 Received: by mail-wm1-x335.google.com with SMTP id z12so2661911wmi.4 for ; Tue, 25 Feb 2020 03:51:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YY43ANmrO7kgR48GobRQagfarNd+y5OAvVPvc2CleoI=; b=raWeujoeC2E9nXzMK47n9juzqUHGhIMz+gG1UgCnONTzLVX9YNNl9v/SxNVqTvxbe9 G+Va6TmssZtWRv8WerudJ76P7v/7FfNLkcNgv4o1IqNkDPv/rG0iQhypZSeV+22aoVen qcuUHJxZXX2WaEFUaW5zt20PGIX95EQjHnYVgDbafSJO3m0MLPBc+X0IvOU+JhMthvAZ NVW9hUmLegkAUBjuGOcyvhv0M4S0iDQ8bIZTOMryl/IvVuzYwwlYNw8qKYg6utUhNdGU jIlFzLIIQAMg7jjMi/ifXTnwPcGSBnlarDztJOneAL6U5PaIeFsJljB27O/mgDAFr4bc dx0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=YY43ANmrO7kgR48GobRQagfarNd+y5OAvVPvc2CleoI=; b=QHIv8lytkC2j56XtNPXEvT/Bb2sU1Fk9VR+r5KOWcHuOS/xBmbT2DPxi/grTBWUb0L UiZ7cX2f3ZJ6tymAJb9Pr/zHxnFGa9vvBYwtA7k274IJyX0d5fnss6IKUywp6bnaCHIo tzThJD3T4ut/grFLtIHNSgYfvAvx72STcyIaKajTtPWPYBiyYr0ioqbrqHHnqFl5WlPV wJd6sxRGLjY74+jyNH69sJipGUqrHSPBrwIE65N/3ZxiuQManp01ppxmpM7w+e0Hgwv3 /Ox6PKQmpgSp/D3SudyRWqlFdaSFzCsYTdQajtJHxOkS4DKu/CqSqwFnzxuQgxZavAPV 2lfg== X-Gm-Message-State: APjAAAWhA9gKacjHL/2Xe1r1CQHq22OgfPzGnfnCKOLmQ8jMeSGTOYv5 wy9Ezy7UzbiO94KNEraCeSoR/h15 X-Google-Smtp-Source: APXvYqwqoXcUvw5ATI9/YJPeKONQtqSAuuUJoth8z9oDE4nb+EmIwe+iYFq1DctMcwfIv34LjLQIEw== X-Received: by 2002:a1c:3b09:: with SMTP id i9mr4859112wma.31.1582631474950; Tue, 25 Feb 2020 03:51:14 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.51.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:51:14 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 009/136] arm/aspeed: actually check RAM size Date: Tue, 25 Feb 2020 12:48:59 +0100 Message-Id: <1582631466-13880-9-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::335 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov It's supposed that SOC will check if "-m" provided RAM size is valid by setting "ram-size" property and then board would read back valid (possibly corrected value) to map RAM MemoryReging with valid size. It isn't doing so, since check is called only indirectly from aspeed_sdmc_reset()->asc->compute_conf() or much later when guest writes to configuration register. So depending on "-m" value QEMU end-ups with a warning and an invalid MemoryRegion size allocated and mapped. (examples: -M ast2500-evb -m 1M 0000000080000000-000000017ffffffe (prio 0, i/o): aspeed-ram-container 0000000080000000-00000000800fffff (prio 0, ram): ram 0000000080100000-00000000bfffffff (prio 0, i/o): max_ram -M ast2500-evb -m 3G 0000000080000000-000000017ffffffe (prio 0, i/o): aspeed-ram-container 0000000080000000-000000013fffffff (prio 0, ram): ram [DETECTED OVERFLOW!] 0000000140000000-00000000bfffffff (prio 0, i/o): max_ram ) On top of that sdmc falls back and reports to guest "default" size, it thinks machine should have. This patch makes ram-size check actually work and changes behavior from a warning later on during machine reset to error_fatal at the moment SOC.ram-size is set so user will have to fix RAM size on CLI to start machine. It also gets out of the way mutable ram-size logic, so we could consolidate RAM allocation logic around pre-allocated hostmem backend (supplied by user or auto created by generic machine code depending on supplied -m/mem-path/mem-prealloc options. Signed-off-by: Igor Mammedov Reviewed-by: Cédric Le Goater Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-10-imammedo@redhat.com> --- hw/arm/aspeed.c | 13 +++---- hw/misc/aspeed_sdmc.c | 83 +++++++++++++++++++++++++++++++++---------- include/hw/misc/aspeed_sdmc.h | 1 + 3 files changed, 70 insertions(+), 27 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index a17843f..805bebd 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -204,8 +204,12 @@ static void aspeed_machine_init(MachineState *machine) sc = ASPEED_SOC_GET_CLASS(&bmc->soc); + /* + * This will error out if isize is not supported by memory controller. + */ object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size", - &error_abort); + &error_fatal); + object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap1, "hw-strap1", &error_abort); object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap2, "hw-strap2", @@ -228,13 +232,6 @@ static void aspeed_machine_init(MachineState *machine) object_property_set_bool(OBJECT(&bmc->soc), true, "realized", &error_abort); - /* - * Allocate RAM after the memory controller has checked the size - * was valid. If not, a default value is used. - */ - ram_size = object_property_get_uint(OBJECT(&bmc->soc), "ram-size", - &error_abort); - memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size); memory_region_add_subregion(&bmc->ram_container, 0, &bmc->ram); memory_region_add_subregion(get_system_memory(), diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c index 9c18479..7b466bf 100644 --- a/hw/misc/aspeed_sdmc.c +++ b/hw/misc/aspeed_sdmc.c @@ -17,6 +17,9 @@ #include "migration/vmstate.h" #include "qapi/error.h" #include "trace.h" +#include "qemu/units.h" +#include "qemu/cutils.h" +#include "qapi/visitor.h" /* Protection Key Register */ #define R_PROT (0x00 / 4) @@ -160,14 +163,9 @@ static int ast2400_rambits(AspeedSDMCState *s) case 512: return ASPEED_SDMC_DRAM_512MB; default: + g_assert_not_reached(); break; } - - /* use a common default */ - warn_report("Invalid RAM size 0x%" PRIx64 ". Using default 256M", - s->ram_size); - s->ram_size = 256 << 20; - return ASPEED_SDMC_DRAM_256MB; } static int ast2500_rambits(AspeedSDMCState *s) @@ -182,14 +180,9 @@ static int ast2500_rambits(AspeedSDMCState *s) case 1024: return ASPEED_SDMC_AST2500_1024MB; default: + g_assert_not_reached(); break; } - - /* use a common default */ - warn_report("Invalid RAM size 0x%" PRIx64 ". Using default 512M", - s->ram_size); - s->ram_size = 512 << 20; - return ASPEED_SDMC_AST2500_512MB; } static int ast2600_rambits(AspeedSDMCState *s) @@ -204,14 +197,9 @@ static int ast2600_rambits(AspeedSDMCState *s) case 2048: return ASPEED_SDMC_AST2600_2048MB; default: + g_assert_not_reached(); break; } - - /* use a common default */ - warn_report("Invalid RAM size 0x%" PRIx64 ". Using default 1024M", - s->ram_size); - s->ram_size = 1024 << 20; - return ASPEED_SDMC_AST2600_1024MB; } static void aspeed_sdmc_reset(DeviceState *dev) @@ -225,6 +213,51 @@ static void aspeed_sdmc_reset(DeviceState *dev) s->regs[R_CONF] = asc->compute_conf(s, 0); } +static void aspeed_sdmc_get_ram_size(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + AspeedSDMCState *s = ASPEED_SDMC(obj); + int64_t value = s->ram_size; + + visit_type_int(v, name, &value, errp); +} + +static void aspeed_sdmc_set_ram_size(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + int i; + char *sz; + int64_t value; + Error *local_err = NULL; + AspeedSDMCState *s = ASPEED_SDMC(obj); + AspeedSDMCClass *asc = ASPEED_SDMC_GET_CLASS(s); + + visit_type_int(v, name, &value, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + for (i = 0; asc->valid_ram_sizes[i]; i++) { + if (value == asc->valid_ram_sizes[i]) { + s->ram_size = value; + return; + } + } + + sz = size_to_str(value); + error_setg(&local_err, "Invalid RAM size %s", sz); + g_free(sz); + error_propagate(errp, local_err); +} + +static void aspeed_sdmc_initfn(Object *obj) +{ + object_property_add(obj, "ram-size", "int", + aspeed_sdmc_get_ram_size, aspeed_sdmc_set_ram_size, + NULL, NULL, NULL); +} + static void aspeed_sdmc_realize(DeviceState *dev, Error **errp) { SysBusDevice *sbd = SYS_BUS_DEVICE(dev); @@ -249,7 +282,6 @@ static const VMStateDescription vmstate_aspeed_sdmc = { }; static Property aspeed_sdmc_properties[] = { - DEFINE_PROP_UINT64("ram-size", AspeedSDMCState, ram_size, 0), DEFINE_PROP_UINT64("max-ram-size", AspeedSDMCState, max_ram_size, 0), DEFINE_PROP_END_OF_LIST(), }; @@ -268,6 +300,7 @@ static const TypeInfo aspeed_sdmc_info = { .name = TYPE_ASPEED_SDMC, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(AspeedSDMCState), + .instance_init = aspeed_sdmc_initfn, .class_init = aspeed_sdmc_class_init, .class_size = sizeof(AspeedSDMCClass), .abstract = true, @@ -298,6 +331,9 @@ static void aspeed_2400_sdmc_write(AspeedSDMCState *s, uint32_t reg, s->regs[reg] = data; } +static const uint64_t +aspeed_2400_ram_sizes[] = { 64 * MiB, 128 * MiB, 256 * MiB, 512 * MiB, 0}; + static void aspeed_2400_sdmc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -307,6 +343,7 @@ static void aspeed_2400_sdmc_class_init(ObjectClass *klass, void *data) asc->max_ram_size = 512 << 20; asc->compute_conf = aspeed_2400_sdmc_compute_conf; asc->write = aspeed_2400_sdmc_write; + asc->valid_ram_sizes = aspeed_2400_ram_sizes; } static const TypeInfo aspeed_2400_sdmc_info = { @@ -351,6 +388,9 @@ static void aspeed_2500_sdmc_write(AspeedSDMCState *s, uint32_t reg, s->regs[reg] = data; } +static const uint64_t +aspeed_2500_ram_sizes[] = { 128 * MiB, 256 * MiB, 512 * MiB, 1024 * MiB, 0}; + static void aspeed_2500_sdmc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -360,6 +400,7 @@ static void aspeed_2500_sdmc_class_init(ObjectClass *klass, void *data) asc->max_ram_size = 1024 << 20; asc->compute_conf = aspeed_2500_sdmc_compute_conf; asc->write = aspeed_2500_sdmc_write; + asc->valid_ram_sizes = aspeed_2500_ram_sizes; } static const TypeInfo aspeed_2500_sdmc_info = { @@ -404,6 +445,9 @@ static void aspeed_2600_sdmc_write(AspeedSDMCState *s, uint32_t reg, s->regs[reg] = data; } +static const uint64_t +aspeed_2600_ram_sizes[] = { 256 * MiB, 512 * MiB, 1024 * MiB, 2048 * MiB, 0}; + static void aspeed_2600_sdmc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -413,6 +457,7 @@ static void aspeed_2600_sdmc_class_init(ObjectClass *klass, void *data) asc->max_ram_size = 2048 << 20; asc->compute_conf = aspeed_2600_sdmc_compute_conf; asc->write = aspeed_2600_sdmc_write; + asc->valid_ram_sizes = aspeed_2600_ram_sizes; } static const TypeInfo aspeed_2600_sdmc_info = { diff --git a/include/hw/misc/aspeed_sdmc.h b/include/hw/misc/aspeed_sdmc.h index 5dbde59..cea1e67 100644 --- a/include/hw/misc/aspeed_sdmc.h +++ b/include/hw/misc/aspeed_sdmc.h @@ -40,6 +40,7 @@ typedef struct AspeedSDMCClass { SysBusDeviceClass parent_class; uint64_t max_ram_size; + const uint64_t *valid_ram_sizes; uint32_t (*compute_conf)(AspeedSDMCState *s, uint32_t data); void (*write)(AspeedSDMCState *s, uint32_t reg, uint32_t data); } AspeedSDMCClass; From patchwork Tue Feb 25 11:49:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403341 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A372F17E0 for ; Tue, 25 Feb 2020 11:57:51 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 79F272176D for ; Tue, 25 Feb 2020 11:57:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="mgxUUrTm" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 79F272176D Authentication-Results: mail.kernel.org; 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X-Received-From: 2a00:1450:4864:20::436 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Acked-by: Joel Stanley Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-11-imammedo@redhat.com> --- hw/arm/aspeed.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 805bebd..a6a2102 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -35,7 +35,6 @@ static struct arm_boot_info aspeed_board_binfo = { struct AspeedBoardState { AspeedSoCState soc; MemoryRegion ram_container; - MemoryRegion ram; MemoryRegion max_ram; }; @@ -197,6 +196,7 @@ static void aspeed_machine_init(MachineState *machine) memory_region_init(&bmc->ram_container, NULL, "aspeed-ram-container", UINT32_MAX); + memory_region_add_subregion(&bmc->ram_container, 0, machine->ram); object_initialize_child(OBJECT(machine), "soc", &bmc->soc, (sizeof(bmc->soc)), amc->soc_name, &error_abort, @@ -232,8 +232,6 @@ static void aspeed_machine_init(MachineState *machine) object_property_set_bool(OBJECT(&bmc->soc), true, "realized", &error_abort); - memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size); - memory_region_add_subregion(&bmc->ram_container, 0, &bmc->ram); memory_region_add_subregion(get_system_memory(), sc->memmap[ASPEED_SDRAM], &bmc->ram_container); @@ -436,6 +434,7 @@ static void aspeed_machine_class_init(ObjectClass *oc, void *data) mc->no_floppy = 1; mc->no_cdrom = 1; mc->no_parallel = 1; + mc->default_ram_id = "ram"; aspeed_machine_class_props_init(oc); } From patchwork Tue Feb 25 11:49:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403319 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 34FCF138D for ; Tue, 25 Feb 2020 11:52:42 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0C77421556 for ; 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Tue, 25 Feb 2020 03:51:16 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 011/136] arm/collie: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:01 +0100 Message-Id: <1582631466-13880-11-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::434 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: - while at it add check for user supplied RAM size and error out if it mismatches board expected value. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-12-imammedo@redhat.com> --- hw/arm/collie.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/hw/arm/collie.c b/hw/arm/collie.c index 970a440..4992084 100644 --- a/hw/arm/collie.c +++ b/hw/arm/collie.c @@ -10,6 +10,7 @@ */ #include "qemu/osdep.h" #include "qemu/units.h" +#include "qemu/cutils.h" #include "hw/sysbus.h" #include "hw/boards.h" #include "strongarm.h" @@ -27,13 +28,18 @@ static void collie_init(MachineState *machine) { StrongARMState *s; DriveInfo *dinfo; - MemoryRegion *sdram = g_new(MemoryRegion, 1); + MachineClass *mc = MACHINE_GET_CLASS(machine); + + if (machine->ram_size != mc->default_ram_size) { + char *sz = size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); + } s = sa1110_init(machine->cpu_type); - memory_region_allocate_system_memory(sdram, NULL, "strongarm.sdram", - collie_binfo.ram_size); - memory_region_add_subregion(get_system_memory(), SA_SDCS0, sdram); + memory_region_add_subregion(get_system_memory(), SA_SDCS0, machine->ram); dinfo = drive_get(IF_PFLASH, 0, 0); pflash_cfi01_register(SA_CS0, "collie.fl1", 0x02000000, @@ -57,6 +63,8 @@ static void collie_machine_init(MachineClass *mc) mc->init = collie_init; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("sa1110"); + mc->default_ram_size = 0x20000000; + mc->default_ram_id = "strongarm.sdram"; } DEFINE_MACHINE("collie", collie_machine_init) From patchwork Tue Feb 25 11:49:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403361 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EBFC217E0 for ; Tue, 25 Feb 2020 11:59:47 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C1AA72176D for ; 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Tue, 25 Feb 2020 03:51:17 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 012/136] arm/cubieboard: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:02 +0100 Message-Id: <1582631466-13880-12-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::434 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: While at it, get rid of no longer needed CubieBoardState wrapper. Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-13-imammedo@redhat.com> --- hw/arm/cubieboard.c | 25 ++++++++----------------- 1 file changed, 8 insertions(+), 17 deletions(-) diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c index 6dc2f1d..089f9a3 100644 --- a/hw/arm/cubieboard.c +++ b/hw/arm/cubieboard.c @@ -28,52 +28,42 @@ static struct arm_boot_info cubieboard_binfo = { .board_id = 0x1008, }; -typedef struct CubieBoardState { - AwA10State *a10; - MemoryRegion sdram; -} CubieBoardState; - static void cubieboard_init(MachineState *machine) { - CubieBoardState *s = g_new(CubieBoardState, 1); + AwA10State *a10 = AW_A10(object_new(TYPE_AW_A10)); Error *err = NULL; - s->a10 = AW_A10(object_new(TYPE_AW_A10)); - - object_property_set_int(OBJECT(&s->a10->emac), 1, "phy-addr", &err); + object_property_set_int(OBJECT(&a10->emac), 1, "phy-addr", &err); if (err != NULL) { error_reportf_err(err, "Couldn't set phy address: "); exit(1); } - object_property_set_int(OBJECT(&s->a10->timer), 32768, "clk0-freq", &err); + object_property_set_int(OBJECT(&a10->timer), 32768, "clk0-freq", &err); if (err != NULL) { error_reportf_err(err, "Couldn't set clk0 frequency: "); exit(1); } - object_property_set_int(OBJECT(&s->a10->timer), 24000000, "clk1-freq", - &err); + object_property_set_int(OBJECT(&a10->timer), 24000000, "clk1-freq", &err); if (err != NULL) { error_reportf_err(err, "Couldn't set clk1 frequency: "); exit(1); } - object_property_set_bool(OBJECT(s->a10), true, "realized", &err); + object_property_set_bool(OBJECT(a10), true, "realized", &err); if (err != NULL) { error_reportf_err(err, "Couldn't realize Allwinner A10: "); exit(1); } - memory_region_allocate_system_memory(&s->sdram, NULL, "cubieboard.ram", - machine->ram_size); memory_region_add_subregion(get_system_memory(), AW_A10_SDRAM_BASE, - &s->sdram); + machine->ram); /* TODO create and connect IDE devices for ide_drive_get() */ cubieboard_binfo.ram_size = machine->ram_size; - arm_load_kernel(&s->a10->cpu, machine, &cubieboard_binfo); + arm_load_kernel(&a10->cpu, machine, &cubieboard_binfo); } static void cubieboard_machine_init(MachineClass *mc) @@ -84,6 +74,7 @@ static void cubieboard_machine_init(MachineClass *mc) mc->block_default_type = IF_IDE; mc->units_per_default_bus = 1; mc->ignore_memory_transaction_failures = true; + mc->default_ram_id = "cubieboard.ram"; } DEFINE_MACHINE("cubieboard", cubieboard_machine_init) From patchwork Tue Feb 25 11:49:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403367 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3A3DD1580 for ; Tue, 25 Feb 2020 12:02:01 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0682D2176D for ; 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Tue, 25 Feb 2020 03:51:18 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 013/136] arm/digic_boards: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:03 +0100 Message-Id: <1582631466-13880-13-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: remove no longer needed DigicBoardState PS2: while at it add check for user supplied RAM size and error out if it mismatches board expected value. Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-14-imammedo@redhat.com> --- hw/arm/digic_boards.c | 40 +++++++++++++++++++++------------------- 1 file changed, 21 insertions(+), 19 deletions(-) diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c index ef3fc2b..518a63e 100644 --- a/hw/arm/digic_boards.c +++ b/hw/arm/digic_boards.c @@ -35,39 +35,40 @@ #include "hw/loader.h" #include "sysemu/sysemu.h" #include "sysemu/qtest.h" +#include "qemu/units.h" +#include "qemu/cutils.h" #define DIGIC4_ROM0_BASE 0xf0000000 #define DIGIC4_ROM1_BASE 0xf8000000 #define DIGIC4_ROM_MAX_SIZE 0x08000000 -typedef struct DigicBoardState { - DigicState *digic; - MemoryRegion ram; -} DigicBoardState; - typedef struct DigicBoard { - hwaddr ram_size; - void (*add_rom0)(DigicBoardState *, hwaddr, const char *); + void (*add_rom0)(DigicState *, hwaddr, const char *); const char *rom0_def_filename; - void (*add_rom1)(DigicBoardState *, hwaddr, const char *); + void (*add_rom1)(DigicState *, hwaddr, const char *); const char *rom1_def_filename; } DigicBoard; -static void digic4_board_init(DigicBoard *board) +static void digic4_board_init(MachineState *machine, DigicBoard *board) { Error *err = NULL; + DigicState *s = DIGIC(object_new(TYPE_DIGIC)); + MachineClass *mc = MACHINE_GET_CLASS(machine); + + if (machine->ram_size != mc->default_ram_size) { + char *sz = size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); + } - DigicBoardState *s = g_new(DigicBoardState, 1); - - s->digic = DIGIC(object_new(TYPE_DIGIC)); - object_property_set_bool(OBJECT(s->digic), true, "realized", &err); + object_property_set_bool(OBJECT(s), true, "realized", &err); if (err != NULL) { error_reportf_err(err, "Couldn't realize DIGIC SoC: "); exit(1); } - memory_region_allocate_system_memory(&s->ram, NULL, "ram", board->ram_size); - memory_region_add_subregion(get_system_memory(), 0, &s->ram); + memory_region_add_subregion(get_system_memory(), 0, machine->ram); if (board->add_rom0) { board->add_rom0(s, DIGIC4_ROM0_BASE, board->rom0_def_filename); @@ -78,7 +79,7 @@ static void digic4_board_init(DigicBoard *board) } } -static void digic_load_rom(DigicBoardState *s, hwaddr addr, +static void digic_load_rom(DigicState *s, hwaddr addr, hwaddr max_size, const char *def_filename) { target_long rom_size; @@ -118,7 +119,7 @@ static void digic_load_rom(DigicBoardState *s, hwaddr addr, * Samsung K8P3215UQB * 64M Bit (4Mx16) Page Mode / Multi-Bank NOR Flash Memory */ -static void digic4_add_k8p3215uqb_rom(DigicBoardState *s, hwaddr addr, +static void digic4_add_k8p3215uqb_rom(DigicState *s, hwaddr addr, const char *def_filename) { #define FLASH_K8P3215UQB_SIZE (4 * 1024 * 1024) @@ -135,14 +136,13 @@ static void digic4_add_k8p3215uqb_rom(DigicBoardState *s, hwaddr addr, } static DigicBoard digic4_board_canon_a1100 = { - .ram_size = 64 * 1024 * 1024, .add_rom1 = digic4_add_k8p3215uqb_rom, .rom1_def_filename = "canon-a1100-rom1.bin", }; static void canon_a1100_init(MachineState *machine) { - digic4_board_init(&digic4_board_canon_a1100); + digic4_board_init(machine, &digic4_board_canon_a1100); } static void canon_a1100_machine_init(MachineClass *mc) @@ -150,6 +150,8 @@ static void canon_a1100_machine_init(MachineClass *mc) mc->desc = "Canon PowerShot A1100 IS"; mc->init = &canon_a1100_init; mc->ignore_memory_transaction_failures = true; + mc->default_ram_size = 64 * MiB; + mc->default_ram_id = "ram"; } DEFINE_MACHINE("canon-a1100", canon_a1100_machine_init) From patchwork Tue Feb 25 11:49:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403339 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EF0491580 for ; Tue, 25 Feb 2020 11:56:08 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C59EC2176D for ; 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Tue, 25 Feb 2020 03:51:19 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 014/136] arm/highbank: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:04 +0100 Message-Id: <1582631466-13880-14-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-15-imammedo@redhat.com> --- hw/arm/highbank.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index 518d935..ac9de94 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -236,7 +236,6 @@ enum cxmachines { */ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) { - ram_addr_t ram_size = machine->ram_size; DeviceState *dev = NULL; SysBusDevice *busdev; qemu_irq pic[128]; @@ -247,7 +246,6 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) qemu_irq cpu_virq[4]; qemu_irq cpu_vfiq[4]; MemoryRegion *sysram; - MemoryRegion *dram; MemoryRegion *sysmem; char *sysboot_filename; @@ -290,10 +288,8 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) } sysmem = get_system_memory(); - dram = g_new(MemoryRegion, 1); - memory_region_allocate_system_memory(dram, NULL, "highbank.dram", ram_size); /* SDRAM at address zero. */ - memory_region_add_subregion(sysmem, 0, dram); + memory_region_add_subregion(sysmem, 0, machine->ram); sysram = g_new(MemoryRegion, 1); memory_region_init_ram(sysram, NULL, "highbank.sysram", 0x8000, @@ -387,7 +383,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) /* TODO create and connect IDE devices for ide_drive_get() */ - highbank_binfo.ram_size = ram_size; + highbank_binfo.ram_size = machine->ram_size; /* highbank requires a dtb in order to boot, and the dtb will override * the board ID. The following value is ignored, so set it to -1 to be * clear that the value is meaningless. @@ -430,6 +426,7 @@ static void highbank_class_init(ObjectClass *oc, void *data) mc->units_per_default_bus = 1; mc->max_cpus = 4; mc->ignore_memory_transaction_failures = true; + mc->default_ram_id = "highbank.dram"; } static const TypeInfo highbank_type = { @@ -448,6 +445,7 @@ static void midway_class_init(ObjectClass *oc, void *data) mc->units_per_default_bus = 1; mc->max_cpus = 4; mc->ignore_memory_transaction_failures = true; + mc->default_ram_id = "highbank.dram"; } static const TypeInfo midway_type = { From patchwork Tue Feb 25 11:49:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403375 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0583B1395 for ; Tue, 25 Feb 2020 12:04:30 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C57ED222C2 for ; Tue, 25 Feb 2020 12:04:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="sTDhAuio" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C57ED222C2 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:53698 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Ywu-0005z6-QC for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 07:04:28 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:49178) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6YkL-0000N9-4V for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:51:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6YkG-000623-8S for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:51:28 -0500 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]:40400) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6YkF-00060t-Vh for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:51:24 -0500 Received: by mail-wr1-x42c.google.com with SMTP id t3so14350418wru.7 for ; Tue, 25 Feb 2020 03:51:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xPvp/civ3UQYVCHGQRfWgUWR6R23Sx/HnqApowuv7qA=; b=sTDhAuioHWES41MBR7Bm1WBKgZUEUZNOGMraQMlr0hM2rsNgDy7mkzGTXgHnhcmYb9 bbsAqoRyPfFXCSU8OmGYODALx+3fffgCrfm5KUTSKltXOSrupwYqz5fdweXUjU0okZwU fXbCEKUxQJBUFGiCOD/JHZI25DFYgTonyPqd9K/l7RAytZS78uTyBuEE5P0BdRHQBuuK 0Adwbvk2odkXbljFHQ28scfuB6bXTCrwn0NEprTq0ytHtDIBMU/aLNR1O7YxCj8N9my4 OKAtzyllLXvv7qsFNblQ7J/GVA5M010ICvWcmGgeFbtm5nhEoRP84qY6EOL2uRdcH4Cl k5dw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=xPvp/civ3UQYVCHGQRfWgUWR6R23Sx/HnqApowuv7qA=; b=ISxfQtpCZQ5V8YnZF83DX8MtaSH2f2GFFWxnY0o3zz/B7Dhsj+m2pNF/JkaeAO0oYF 0gxYDbxWFLtWP7nNQ3cS3nYOMOHTPd8N6vwkNJE3TKT4ZU8f5TfQR8erusYOgEH6reDN tBviZk/B3RsAYx+zZo62AapXd/2HbrGnOvE8dyyUo/BBii19/8uHLx5jDQfnPdOV8ocI UWdpYmK/HeIHuPY23Y9LB7U8Z5GO+HzR2HGJHTl4/snIzAa+RQldKn2Uj0Yx8sAYz/8Q DLC05agDh4WxTPNV0hq9I2QXr9gO64qK/FHmn2zz4dCabEidkHTZlpgy1XiHhg3/Z4yq wl2A== X-Gm-Message-State: APjAAAXoY7goRW85kuY6YpHX9wRe0/VHYVnkKx7epatg1mcC9vpTqo9I mCmUWYBRMoDMTXB/HBhk/tIGGocA X-Google-Smtp-Source: APXvYqzvocLEAJSsYQoYn1FhGpNdH+itC7vrRxE3cZYApH/3+JhfKjFTmUx5cSKyKA8+smgr2Fhgtw== X-Received: by 2002:a5d:678f:: with SMTP id v15mr74282741wru.27.1582631480614; Tue, 25 Feb 2020 03:51:20 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.51.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:51:19 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 015/136] arm/imx25_pdk: drop RAM size fixup Date: Tue, 25 Feb 2020 12:49:05 +0100 Message-Id: <1582631466-13880-15-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov If user provided non-sense RAM size, board will complain and continue running with max RAM size supported. Also RAM is going to be allocated by generic code, so it won't be possible for board to fix things up for user. Make it error message and exit to force user fix CLI, instead of accepting non-sense CLI values. Signed-off-by: Igor Mammedov Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-16-imammedo@redhat.com> --- hw/arm/imx25_pdk.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c index c76fc2b..c7c51d6 100644 --- a/hw/arm/imx25_pdk.c +++ b/hw/arm/imx25_pdk.c @@ -32,6 +32,7 @@ #include "exec/address-spaces.h" #include "sysemu/qtest.h" #include "hw/i2c/i2c.h" +#include "qemu/cutils.h" /* Memory map for PDK Emulation Baseboard: * 0x00000000-0x7fffffff See i.MX25 SOC fr support @@ -66,6 +67,7 @@ static struct arm_boot_info imx25_pdk_binfo; static void imx25_pdk_init(MachineState *machine) { + MachineClass *mc = MACHINE_GET_CLASS(machine); IMX25PDK *s = g_new0(IMX25PDK, 1); unsigned int ram_size; unsigned int alias_offset; @@ -78,10 +80,10 @@ static void imx25_pdk_init(MachineState *machine) /* We need to initialize our memory */ if (machine->ram_size > (FSL_IMX25_SDRAM0_SIZE + FSL_IMX25_SDRAM1_SIZE)) { - warn_report("RAM size " RAM_ADDR_FMT " above max supported, " - "reduced to %x", machine->ram_size, - FSL_IMX25_SDRAM0_SIZE + FSL_IMX25_SDRAM1_SIZE); - machine->ram_size = FSL_IMX25_SDRAM0_SIZE + FSL_IMX25_SDRAM1_SIZE; + char *sz = size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); } memory_region_allocate_system_memory(&s->ram, NULL, "imx25.ram", From patchwork Tue Feb 25 11:49:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403383 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5AA591580 for ; Tue, 25 Feb 2020 12:06:09 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 31E6721556 for ; Tue, 25 Feb 2020 12:06:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="bLa7DAif" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 31E6721556 Authentication-Results: mail.kernel.org; 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X-Received-From: 2a00:1450:4864:20::330 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-17-imammedo@redhat.com> --- hw/arm/imx25_pdk.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c index c7c51d6..26713d9 100644 --- a/hw/arm/imx25_pdk.c +++ b/hw/arm/imx25_pdk.c @@ -59,7 +59,6 @@ typedef struct IMX25PDK { FslIMX25State soc; - MemoryRegion ram; MemoryRegion ram_alias; } IMX25PDK; @@ -86,10 +85,8 @@ static void imx25_pdk_init(MachineState *machine) exit(EXIT_FAILURE); } - memory_region_allocate_system_memory(&s->ram, NULL, "imx25.ram", - machine->ram_size); memory_region_add_subregion(get_system_memory(), FSL_IMX25_SDRAM0_ADDR, - &s->ram); + machine->ram); /* initialize the alias memory if any */ for (i = 0, ram_size = machine->ram_size, alias_offset = 0; @@ -109,7 +106,8 @@ static void imx25_pdk_init(MachineState *machine) if (size < ram[i].size) { memory_region_init_alias(&s->ram_alias, NULL, "ram.alias", - &s->ram, alias_offset, ram[i].size - size); + machine->ram, + alias_offset, ram[i].size - size); memory_region_add_subregion(get_system_memory(), ram[i].addr + size, &s->ram_alias); } @@ -137,6 +135,7 @@ static void imx25_pdk_machine_init(MachineClass *mc) mc->desc = "ARM i.MX25 PDK board (ARM926)"; mc->init = imx25_pdk_init; mc->ignore_memory_transaction_failures = true; + mc->default_ram_id = "imx25.ram"; } DEFINE_MACHINE("imx25-pdk", imx25_pdk_machine_init) From patchwork Tue Feb 25 11:49:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403349 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A3F1A14E3 for ; Tue, 25 Feb 2020 11:57:58 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 79FDF222C2 for ; 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Tue, 25 Feb 2020 03:51:22 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 017/136] arm/integratorcp: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:07 +0100 Message-Id: <1582631466-13880-17-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42b X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-18-imammedo@redhat.com> --- hw/arm/integratorcp.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index 0cd94d9..cc845b8 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -585,7 +585,6 @@ static void integratorcp_init(MachineState *machine) Object *cpuobj; ARMCPU *cpu; MemoryRegion *address_space_mem = get_system_memory(); - MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *ram_alias = g_new(MemoryRegion, 1); qemu_irq pic[32]; DeviceState *dev, *sic, *icp; @@ -605,14 +604,13 @@ static void integratorcp_init(MachineState *machine) cpu = ARM_CPU(cpuobj); - memory_region_allocate_system_memory(ram, NULL, "integrator.ram", - ram_size); /* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */ /* ??? RAM should repeat to fill physical memory space. */ /* SDRAM at address zero*/ - memory_region_add_subregion(address_space_mem, 0, ram); + memory_region_add_subregion(address_space_mem, 0, machine->ram); /* And again at address 0x80000000 */ - memory_region_init_alias(ram_alias, NULL, "ram.alias", ram, 0, ram_size); + memory_region_init_alias(ram_alias, NULL, "ram.alias", machine->ram, + 0, ram_size); memory_region_add_subregion(address_space_mem, 0x80000000, ram_alias); dev = qdev_create(NULL, TYPE_INTEGRATOR_CM); @@ -660,6 +658,7 @@ static void integratorcp_machine_init(MachineClass *mc) mc->init = integratorcp_init; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm926"); + mc->default_ram_id = "integrator.ram"; } DEFINE_MACHINE("integratorcp", integratorcp_machine_init) From patchwork Tue Feb 25 11:49:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403365 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4EA8F14E3 for ; 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Tue, 25 Feb 2020 03:51:22 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 018/136] arm/kzm: drop RAM size fixup Date: Tue, 25 Feb 2020 12:49:08 +0100 Message-Id: <1582631466-13880-18-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov If the user provided too large a RAM size, the code used to complain and trim it to the max size. Now that RAM is allocated by generic code, that's no longer possible, so generate an error and exit instead. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Chubb Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-19-imammedo@redhat.com> --- hw/arm/kzm.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c index 1d5ef28..94cbac1 100644 --- a/hw/arm/kzm.c +++ b/hw/arm/kzm.c @@ -25,6 +25,7 @@ #include "hw/char/serial.h" #include "sysemu/qtest.h" #include "sysemu/sysemu.h" +#include "qemu/cutils.h" /* Memory map for Kzm Emulation Baseboard: * 0x00000000-0x7fffffff See i.MX31 SOC for support @@ -78,10 +79,10 @@ static void kzm_init(MachineState *machine) /* Check the amount of memory is compatible with the SOC */ if (machine->ram_size > (FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE)) { - warn_report("RAM size " RAM_ADDR_FMT " above max supported, " - "reduced to %x", machine->ram_size, - FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE); - machine->ram_size = FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE; 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Tue, 25 Feb 2020 03:51:24 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.51.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:51:24 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 019/136] arm/kzm: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:09 +0100 Message-Id: <1582631466-13880-19-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Chubb Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-20-imammedo@redhat.com> --- hw/arm/kzm.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c index 94cbac1..34f6bcb 100644 --- a/hw/arm/kzm.c +++ b/hw/arm/kzm.c @@ -52,7 +52,6 @@ typedef struct IMX31KZM { FslIMX31State soc; - MemoryRegion ram; MemoryRegion ram_alias; } IMX31KZM; @@ -85,10 +84,8 @@ static void kzm_init(MachineState *machine) exit(EXIT_FAILURE); } - memory_region_allocate_system_memory(&s->ram, NULL, "kzm.ram", - machine->ram_size); memory_region_add_subregion(get_system_memory(), FSL_IMX31_SDRAM0_ADDR, - &s->ram); + machine->ram); /* initialize the alias memory if any */ for (i = 0, ram_size = machine->ram_size, alias_offset = 0; @@ -108,7 +105,8 @@ static void kzm_init(MachineState *machine) if (size < ram[i].size) { memory_region_init_alias(&s->ram_alias, NULL, "ram.alias", - &s->ram, alias_offset, ram[i].size - size); + machine->ram, + alias_offset, ram[i].size - size); memory_region_add_subregion(get_system_memory(), ram[i].addr + size, &s->ram_alias); } @@ -140,6 +138,7 @@ static void kzm_machine_init(MachineClass *mc) mc->desc = "ARM KZM Emulation Baseboard (ARM1136)"; mc->init = kzm_init; mc->ignore_memory_transaction_failures = true; + mc->default_ram_id = "kzm.ram"; } DEFINE_MACHINE("kzm", kzm_machine_init) From patchwork Tue Feb 25 11:49:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403337 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 89EA117E0 for ; Tue, 25 Feb 2020 11:56:04 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 60A062176D for ; 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Tue, 25 Feb 2020 03:51:25 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 020/136] arm/mcimx6ul-evk: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:10 +0100 Message-Id: <1582631466-13880-20-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: remove no longer needed MCIMX6ULEVK Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-21-imammedo@redhat.com> --- hw/arm/mcimx6ul-evk.c | 25 +++++++++---------------- 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c index e90b393..23a71ed 100644 --- a/hw/arm/mcimx6ul-evk.c +++ b/hw/arm/mcimx6ul-evk.c @@ -19,15 +19,10 @@ #include "qemu/error-report.h" #include "sysemu/qtest.h" -typedef struct { - FslIMX6ULState soc; - MemoryRegion ram; -} MCIMX6ULEVK; - static void mcimx6ul_evk_init(MachineState *machine) { static struct arm_boot_info boot_info; - MCIMX6ULEVK *s = g_new0(MCIMX6ULEVK, 1); + FslIMX6ULState *s; int i; if (machine->ram_size > FSL_IMX6UL_MMDC_SIZE) { @@ -43,15 +38,12 @@ static void mcimx6ul_evk_init(MachineState *machine) .nb_cpus = machine->smp.cpus, }; - object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), - TYPE_FSL_IMX6UL, &error_fatal, NULL); - - object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); + s = FSL_IMX6UL(object_new(TYPE_FSL_IMX6UL)); + object_property_add_child(OBJECT(machine), "soc", OBJECT(s), &error_fatal); + object_property_set_bool(OBJECT(s), true, "realized", &error_fatal); - memory_region_allocate_system_memory(&s->ram, NULL, "mcimx6ul-evk.ram", - machine->ram_size); - memory_region_add_subregion(get_system_memory(), - FSL_IMX6UL_MMDC_ADDR, &s->ram); + memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_MMDC_ADDR, + machine->ram); for (i = 0; i < FSL_IMX6UL_NUM_USDHCS; i++) { BusState *bus; @@ -61,7 +53,7 @@ static void mcimx6ul_evk_init(MachineState *machine) di = drive_get_next(IF_SD); blk = di ? blk_by_legacy_dinfo(di) : NULL; - bus = qdev_get_child_bus(DEVICE(&s->soc.usdhc[i]), "sd-bus"); + bus = qdev_get_child_bus(DEVICE(&s->usdhc[i]), "sd-bus"); carddev = qdev_create(bus, TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); object_property_set_bool(OBJECT(carddev), true, @@ -69,7 +61,7 @@ static void mcimx6ul_evk_init(MachineState *machine) } if (!qtest_enabled()) { - arm_load_kernel(&s->soc.cpu, machine, &boot_info); + arm_load_kernel(&s->cpu, machine, &boot_info); } } @@ -78,5 +70,6 @@ static void mcimx6ul_evk_machine_init(MachineClass *mc) mc->desc = "Freescale i.MX6UL Evaluation Kit (Cortex A7)"; mc->init = mcimx6ul_evk_init; mc->max_cpus = FSL_IMX6UL_NUM_CPUS; + mc->default_ram_id = "mcimx6ul-evk.ram"; } DEFINE_MACHINE("mcimx6ul-evk", mcimx6ul_evk_machine_init) From patchwork Tue Feb 25 11:49:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403409 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 30ED51395 for ; Tue, 25 Feb 2020 12:09:21 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 07DCE2084E for ; Tue, 25 Feb 2020 12:09:21 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:51:26 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.51.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:51:25 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 021/136] arm/mcimx7d-sabre: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:11 +0100 Message-Id: <1582631466-13880-21-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: remove no longer needed MCIMX7Sabre Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-22-imammedo@redhat.com> --- hw/arm/mcimx7d-sabre.c | 25 +++++++++---------------- 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c index 0d1f62d..de1e264 100644 --- a/hw/arm/mcimx7d-sabre.c +++ b/hw/arm/mcimx7d-sabre.c @@ -21,15 +21,10 @@ #include "qemu/error-report.h" #include "sysemu/qtest.h" -typedef struct { - FslIMX7State soc; - MemoryRegion ram; -} MCIMX7Sabre; - static void mcimx7d_sabre_init(MachineState *machine) { static struct arm_boot_info boot_info; - MCIMX7Sabre *s = g_new0(MCIMX7Sabre, 1); + FslIMX7State *s; int i; if (machine->ram_size > FSL_IMX7_MMDC_SIZE) { @@ -45,15 +40,12 @@ static void mcimx7d_sabre_init(MachineState *machine) .nb_cpus = machine->smp.cpus, }; - object_initialize_child(OBJECT(machine), "soc", - &s->soc, sizeof(s->soc), - TYPE_FSL_IMX7, &error_fatal, NULL); - object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); + s = FSL_IMX7(object_new(TYPE_FSL_IMX7)); + object_property_add_child(OBJECT(machine), "soc", OBJECT(s), &error_fatal); + object_property_set_bool(OBJECT(s), true, "realized", &error_fatal); - memory_region_allocate_system_memory(&s->ram, NULL, "mcimx7d-sabre.ram", - machine->ram_size); - memory_region_add_subregion(get_system_memory(), - FSL_IMX7_MMDC_ADDR, &s->ram); + memory_region_add_subregion(get_system_memory(), FSL_IMX7_MMDC_ADDR, + machine->ram); for (i = 0; i < FSL_IMX7_NUM_USDHCS; i++) { BusState *bus; @@ -63,7 +55,7 @@ static void mcimx7d_sabre_init(MachineState *machine) di = drive_get_next(IF_SD); blk = di ? blk_by_legacy_dinfo(di) : NULL; - bus = qdev_get_child_bus(DEVICE(&s->soc.usdhc[i]), "sd-bus"); + bus = qdev_get_child_bus(DEVICE(&s->usdhc[i]), "sd-bus"); carddev = qdev_create(bus, TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); object_property_set_bool(OBJECT(carddev), true, @@ -71,7 +63,7 @@ static void mcimx7d_sabre_init(MachineState *machine) } if (!qtest_enabled()) { - arm_load_kernel(&s->soc.cpu[0], machine, &boot_info); + arm_load_kernel(&s->cpu[0], machine, &boot_info); } } @@ -80,5 +72,6 @@ static void mcimx7d_sabre_machine_init(MachineClass *mc) mc->desc = "Freescale i.MX7 DUAL SABRE (Cortex A7)"; mc->init = mcimx7d_sabre_init; mc->max_cpus = FSL_IMX7_NUM_CPUS; + mc->default_ram_id = "mcimx7d-sabre.ram"; } DEFINE_MACHINE("mcimx7d-sabre", mcimx7d_sabre_machine_init) From patchwork Tue Feb 25 11:49:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403373 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1C39F1395 for ; Tue, 25 Feb 2020 12:02:19 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E81912176D for ; Tue, 25 Feb 2020 12:02:18 +0000 (UTC) Authentication-Results: mail.kernel.org; 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X-Received-From: 2a00:1450:4864:20::330 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: while at it add check for user supplied RAM size and error out if it mismatches board expected value. Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-23-imammedo@redhat.com> --- hw/arm/mps2-tz.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index f8b620b..a8dea7d 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -39,6 +39,7 @@ #include "qemu/osdep.h" #include "qemu/units.h" +#include "qemu/cutils.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "hw/arm/boot.h" @@ -79,7 +80,6 @@ typedef struct { MachineState parent; ARMSSE iotkit; - MemoryRegion psram; MemoryRegion ssram[3]; MemoryRegion ssram1_m; MPS2SCC scc; @@ -388,6 +388,13 @@ static void mps2tz_common_init(MachineState *machine) exit(1); } + if (machine->ram_size != mc->default_ram_size) { + char *sz = size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); + } + sysbus_init_child_obj(OBJECT(machine), "iotkit", &mms->iotkit, sizeof(mms->iotkit), mmc->armsse_type); iotkitdev = DEVICE(&mms->iotkit); @@ -458,9 +465,7 @@ static void mps2tz_common_init(MachineState *machine) * tradeoffs. For QEMU they're all just RAM, though. We arbitrarily * call the 16MB our "system memory", as it's the largest lump. */ - memory_region_allocate_system_memory(&mms->psram, - NULL, "mps.ram", 16 * MiB); - memory_region_add_subregion(system_memory, 0x80000000, &mms->psram); + memory_region_add_subregion(system_memory, 0x80000000, machine->ram); /* The overflow IRQs for all UARTs are ORed together. * Tx, Rx and "combined" IRQs are sent to the NVIC separately. @@ -642,6 +647,8 @@ static void mps2tz_class_init(ObjectClass *oc, void *data) mc->init = mps2tz_common_init; iic->check = mps2_tz_idau_check; + mc->default_ram_size = 16 * MiB; + mc->default_ram_id = "mps.ram"; } static void mps2tz_an505_class_init(ObjectClass *oc, void *data) From patchwork Tue Feb 25 11:49:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403385 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 97C4717E0 for ; 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Tue, 25 Feb 2020 03:51:27 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 023/136] arm/mps2: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:13 +0100 Message-Id: <1582631466-13880-23-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::335 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: while at it add check for user supplied RAM size and error out if it mismatches board expected value. Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-24-imammedo@redhat.com> --- hw/arm/mps2.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index d002b12..f246213 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -24,6 +24,7 @@ #include "qemu/osdep.h" #include "qemu/units.h" +#include "qemu/cutils.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "hw/arm/boot.h" @@ -55,7 +56,6 @@ typedef struct { MachineState parent; ARMv7MState armv7m; - MemoryRegion psram; MemoryRegion ssram1; MemoryRegion ssram1_m; MemoryRegion ssram23; @@ -118,6 +118,13 @@ static void mps2_common_init(MachineState *machine) exit(1); } + if (machine->ram_size != mc->default_ram_size) { + char *sz = size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); + } + /* The FPGA images have an odd combination of different RAMs, * because in hardware they are different implementations and * connected to different buses, giving varying performance/size @@ -146,9 +153,7 @@ static void mps2_common_init(MachineState *machine) * This is of no use for QEMU so we don't implement it (as if * zbt_boot_ctrl is always zero). */ - memory_region_allocate_system_memory(&mms->psram, - NULL, "mps.ram", 16 * MiB); - memory_region_add_subregion(system_memory, 0x21000000, &mms->psram); + memory_region_add_subregion(system_memory, 0x21000000, machine->ram); switch (mmc->fpga_type) { case FPGA_AN385: @@ -338,6 +343,8 @@ static void mps2_class_init(ObjectClass *oc, void *data) mc->init = mps2_common_init; mc->max_cpus = 1; + mc->default_ram_size = 16 * MiB; + mc->default_ram_id = "mps.ram"; } static void mps2_an385_class_init(ObjectClass *oc, void *data) From patchwork Tue Feb 25 11:49:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403329 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4E6E11580 for ; Tue, 25 Feb 2020 11:54:25 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 25A0F21556 for ; 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Tue, 25 Feb 2020 03:51:28 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 024/136] arm/musicpal: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:14 +0100 Message-Id: <1582631466-13880-24-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::331 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: while at it add check for user supplied RAM size and error out if it mismatches board expected value. Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-25-imammedo@redhat.com> --- hw/arm/musicpal.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index dc551bb..db8b03cb 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -32,6 +32,7 @@ #include "sysemu/runstate.h" #include "exec/address-spaces.h" #include "ui/pixel_ops.h" +#include "qemu/cutils.h" #define MP_MISC_BASE 0x80002000 #define MP_MISC_SIZE 0x00001000 @@ -1589,16 +1590,21 @@ static void musicpal_init(MachineState *machine) int i; unsigned long flash_size; DriveInfo *dinfo; + MachineClass *mc = MACHINE_GET_CLASS(machine); MemoryRegion *address_space_mem = get_system_memory(); - MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *sram = g_new(MemoryRegion, 1); + /* For now we use a fixed - the original - RAM size */ + if (machine->ram_size != mc->default_ram_size) { + char *sz = size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); + } + cpu = ARM_CPU(cpu_create(machine->cpu_type)); - /* For now we use a fixed - the original - RAM size */ - memory_region_allocate_system_memory(ram, NULL, "musicpal.ram", - MP_RAM_DEFAULT_SIZE); - memory_region_add_subregion(address_space_mem, 0, ram); + memory_region_add_subregion(address_space_mem, 0, machine->ram); memory_region_init_ram(sram, NULL, "musicpal.sram", MP_SRAM_SIZE, &error_fatal); @@ -1714,6 +1720,8 @@ static void musicpal_machine_init(MachineClass *mc) mc->init = musicpal_init; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm926"); + mc->default_ram_size = MP_RAM_DEFAULT_SIZE; + mc->default_ram_id = "musicpal.ram"; } DEFINE_MACHINE("musicpal", musicpal_machine_init) From patchwork Tue Feb 25 11:49:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403345 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 87A0117E0 for ; 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Tue, 25 Feb 2020 03:51:29 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 025/136] arm/nseries: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:15 +0100 Message-Id: <1582631466-13880-25-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::332 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: while at it add check for user supplied RAM size and error out if it mismatches board expected value. Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-26-imammedo@redhat.com> --- hw/arm/nseries.c | 32 +++++++++++++++++++------------- 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c index 3fd196f..eae800b 100644 --- a/hw/arm/nseries.c +++ b/hw/arm/nseries.c @@ -47,7 +47,6 @@ /* Nokia N8x0 support */ struct n800_s { - MemoryRegion sdram; struct omap_mpu_state_s *mpu; struct rfbi_chip_s blizzard; @@ -1311,13 +1310,19 @@ static void n8x0_init(MachineState *machine, struct arm_boot_info *binfo, int model) { struct n800_s *s = (struct n800_s *) g_malloc0(sizeof(*s)); - uint64_t sdram_size = binfo->ram_size; + MachineClass *mc = MACHINE_GET_CLASS(machine); - memory_region_allocate_system_memory(&s->sdram, NULL, "omap2.dram", - sdram_size); - memory_region_add_subregion(get_system_memory(), OMAP2_Q2_BASE, &s->sdram); + if (machine->ram_size != mc->default_ram_size) { + char *sz = size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); + } + + memory_region_add_subregion(get_system_memory(), OMAP2_Q2_BASE, + machine->ram); - s->mpu = omap2420_mpu_init(&s->sdram, machine->cpu_type); + s->mpu = omap2420_mpu_init(machine->ram, machine->cpu_type); /* Setup peripherals * @@ -1383,9 +1388,8 @@ static void n8x0_init(MachineState *machine, * * The code above is for loading the `zImage' file from Nokia * images. */ - load_image_targphys(option_rom[0].name, - OMAP2_Q2_BASE + 0x400000, - sdram_size - 0x400000); + load_image_targphys(option_rom[0].name, OMAP2_Q2_BASE + 0x400000, + machine->ram_size - 0x400000); n800_setup_nolo_tags(nolo_tags); cpu_physical_memory_write(OMAP2_SRAM_BASE, nolo_tags, 0x10000); @@ -1395,16 +1399,12 @@ static void n8x0_init(MachineState *machine, static struct arm_boot_info n800_binfo = { .loader_start = OMAP2_Q2_BASE, - /* Actually two chips of 0x4000000 bytes each */ - .ram_size = 0x08000000, .board_id = 0x4f7, .atag_board = n800_atag_setup, }; static struct arm_boot_info n810_binfo = { .loader_start = OMAP2_Q2_BASE, - /* Actually two chips of 0x4000000 bytes each */ - .ram_size = 0x08000000, /* 0x60c and 0x6bf (WiMAX Edition) have been assigned but are not * used by some older versions of the bootloader and 5555 is used * instead (including versions that shipped with many devices). */ @@ -1431,6 +1431,9 @@ static void n800_class_init(ObjectClass *oc, void *data) mc->default_boot_order = ""; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm1136-r2"); + /* Actually two chips of 0x4000000 bytes each */ + mc->default_ram_size = 0x08000000; + mc->default_ram_id = "omap2.dram"; } static const TypeInfo n800_type = { @@ -1448,6 +1451,9 @@ static void n810_class_init(ObjectClass *oc, void *data) mc->default_boot_order = ""; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm1136-r2"); + /* Actually two chips of 0x4000000 bytes each */ + mc->default_ram_size = 0x08000000; + mc->default_ram_id = "omap2.dram"; } static const TypeInfo n810_type = { From patchwork Tue Feb 25 11:49:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403391 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 918021395 for ; Tue, 25 Feb 2020 12:08:25 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 64E472084E for ; Tue, 25 Feb 2020 12:08:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="IpYaWrq2" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 64E472084E Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:51:31 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.51.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:51:30 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 026/136] arm/omap_sx1: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:16 +0100 Message-Id: <1582631466-13880-26-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::329 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: while at it add check for user supplied RAM size and error out if it mismatches board expected value. Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-27-imammedo@redhat.com> --- hw/arm/omap_sx1.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c index be24571..2bebab4 100644 --- a/hw/arm/omap_sx1.c +++ b/hw/arm/omap_sx1.c @@ -35,6 +35,7 @@ #include "sysemu/qtest.h" #include "exec/address-spaces.h" #include "cpu.h" +#include "qemu/cutils.h" /*****************************************************************************/ /* Siemens SX1 Cellphone V1 */ @@ -102,8 +103,8 @@ static struct arm_boot_info sx1_binfo = { static void sx1_init(MachineState *machine, const int version) { struct omap_mpu_state_s *mpu; + MachineClass *mc = MACHINE_GET_CLASS(machine); MemoryRegion *address_space = get_system_memory(); - MemoryRegion *dram = g_new(MemoryRegion, 1); MemoryRegion *flash = g_new(MemoryRegion, 1); MemoryRegion *cs = g_new(MemoryRegion, 4); static uint32_t cs0val = 0x00213090; @@ -115,15 +116,20 @@ static void sx1_init(MachineState *machine, const int version) uint32_t flash_size = flash0_size; int be; + if (machine->ram_size != mc->default_ram_size) { + char *sz = size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); + } + if (version == 2) { flash_size = flash2_size; } - memory_region_allocate_system_memory(dram, NULL, "omap1.dram", - sx1_binfo.ram_size); - memory_region_add_subregion(address_space, OMAP_EMIFF_BASE, dram); + memory_region_add_subregion(address_space, OMAP_EMIFF_BASE, machine->ram); - mpu = omap310_mpu_init(dram, machine->cpu_type); + mpu = omap310_mpu_init(machine->ram, machine->cpu_type); /* External Flash (EMIFS) */ memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size, @@ -223,6 +229,8 @@ static void sx1_machine_v2_class_init(ObjectClass *oc, void *data) mc->init = sx1_init_v2; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("ti925t"); + mc->default_ram_size = sdram_size; + mc->default_ram_id = "omap1.dram"; } static const TypeInfo sx1_machine_v2_type = { @@ -239,6 +247,8 @@ static void sx1_machine_v1_class_init(ObjectClass *oc, void *data) mc->init = sx1_init_v1; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("ti925t"); + mc->default_ram_size = sdram_size; + mc->default_ram_id = "omap1.dram"; } static const TypeInfo sx1_machine_v1_type = { From patchwork Tue Feb 25 11:49:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403369 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3812D1395 for ; Tue, 25 Feb 2020 12:02:04 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0E5912176D for ; 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Tue, 25 Feb 2020 03:51:31 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 027/136] arm/palm: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:17 +0100 Message-Id: <1582631466-13880-27-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::333 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: while at it add check for user supplied RAM size and error out if it mismatches board expected value. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-28-imammedo@redhat.com> --- hw/arm/palm.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/hw/arm/palm.c b/hw/arm/palm.c index 72eca8c..99554bd 100644 --- a/hw/arm/palm.c +++ b/hw/arm/palm.c @@ -31,6 +31,7 @@ #include "hw/loader.h" #include "exec/address-spaces.h" #include "cpu.h" +#include "qemu/cutils.h" static uint64_t static_read(void *opaque, hwaddr offset, unsigned size) { @@ -195,15 +196,21 @@ static void palmte_init(MachineState *machine) static uint32_t cs2val = 0x0000e1a0; static uint32_t cs3val = 0xe1a0e1a0; int rom_size, rom_loaded = 0; - MemoryRegion *dram = g_new(MemoryRegion, 1); + MachineClass *mc = MACHINE_GET_CLASS(machine); MemoryRegion *flash = g_new(MemoryRegion, 1); MemoryRegion *cs = g_new(MemoryRegion, 4); - memory_region_allocate_system_memory(dram, NULL, "omap1.dram", - palmte_binfo.ram_size); - memory_region_add_subregion(address_space_mem, OMAP_EMIFF_BASE, dram); + if (machine->ram_size != mc->default_ram_size) { + char *sz = size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); + } + + memory_region_add_subregion(address_space_mem, OMAP_EMIFF_BASE, + machine->ram); - mpu = omap310_mpu_init(dram, machine->cpu_type); + mpu = omap310_mpu_init(machine->ram, machine->cpu_type); /* External Flash (EMIFS) */ memory_region_init_ram(flash, NULL, "palmte.flash", flash_size, @@ -265,6 +272,8 @@ static void palmte_machine_init(MachineClass *mc) mc->init = palmte_init; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("ti925t"); + mc->default_ram_size = 0x02000000; + mc->default_ram_id = "omap1.dram"; } DEFINE_MACHINE("cheetah", palmte_machine_init) From patchwork Tue Feb 25 11:49:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403381 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1EE3417E0 for ; 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Tue, 25 Feb 2020 03:51:32 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 028/136] arm/sabrelite: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:18 +0100 Message-Id: <1582631466-13880-28-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::333 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: remove no longer needed IMX6Sabrelite Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-29-imammedo@redhat.com> --- hw/arm/sabrelite.c | 23 ++++++++--------------- 1 file changed, 8 insertions(+), 15 deletions(-) diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c index 96cc455..e31694b 100644 --- a/hw/arm/sabrelite.c +++ b/hw/arm/sabrelite.c @@ -19,11 +19,6 @@ #include "qemu/error-report.h" #include "sysemu/qtest.h" -typedef struct IMX6Sabrelite { - FslIMX6State soc; - MemoryRegion ram; -} IMX6Sabrelite; - static struct arm_boot_info sabrelite_binfo = { /* DDR memory start */ .loader_start = FSL_IMX6_MMDC_ADDR, @@ -45,7 +40,7 @@ static void sabrelite_reset_secondary(ARMCPU *cpu, static void sabrelite_init(MachineState *machine) { - IMX6Sabrelite *s = g_new0(IMX6Sabrelite, 1); + FslIMX6State *s; Error *err = NULL; /* Check the amount of memory is compatible with the SOC */ @@ -55,19 +50,16 @@ static void sabrelite_init(MachineState *machine) exit(1); } - object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), - TYPE_FSL_IMX6, &error_abort, NULL); - - object_property_set_bool(OBJECT(&s->soc), true, "realized", &err); + s = FSL_IMX6(object_new(TYPE_FSL_IMX6)); + object_property_add_child(OBJECT(machine), "soc", OBJECT(s), &error_fatal); + object_property_set_bool(OBJECT(s), true, "realized", &err); if (err != NULL) { error_report("%s", error_get_pretty(err)); exit(1); } - memory_region_allocate_system_memory(&s->ram, NULL, "sabrelite.ram", - machine->ram_size); memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR, - &s->ram); + machine->ram); { /* @@ -78,7 +70,7 @@ static void sabrelite_init(MachineState *machine) /* Add the sst25vf016b NOR FLASH memory to first SPI */ Object *spi_dev; - spi_dev = object_resolve_path_component(OBJECT(&s->soc), "spi1"); + spi_dev = object_resolve_path_component(OBJECT(s), "spi1"); if (spi_dev) { SSIBus *spi_bus; @@ -109,7 +101,7 @@ static void sabrelite_init(MachineState *machine) sabrelite_binfo.secondary_cpu_reset_hook = sabrelite_reset_secondary; if (!qtest_enabled()) { - arm_load_kernel(&s->soc.cpu[0], machine, &sabrelite_binfo); + arm_load_kernel(&s->cpu[0], machine, &sabrelite_binfo); } } @@ -119,6 +111,7 @@ static void sabrelite_machine_init(MachineClass *mc) mc->init = sabrelite_init; mc->max_cpus = FSL_IMX6_NUM_CPUS; mc->ignore_memory_transaction_failures = true; + mc->default_ram_id = "sabrelite.ram"; } DEFINE_MACHINE("sabrelite", sabrelite_machine_init) From patchwork Tue Feb 25 11:49:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403389 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2991F1395 for ; Tue, 25 Feb 2020 12:06:23 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 00FDE21556 for ; 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Tue, 25 Feb 2020 03:51:33 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 029/136] arm/raspi: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:19 +0100 Message-Id: <1582631466-13880-29-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::335 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-30-imammedo@redhat.com> --- hw/arm/raspi.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index 90ad9b8..acd2bb7 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -39,7 +39,6 @@ typedef struct RaspiMachineState { MachineState parent_obj; /*< public >*/ BCM283XState soc; - MemoryRegion ram; } RaspiMachineState; typedef struct RaspiMachineClass { @@ -277,16 +276,14 @@ static void raspi_machine_init(MachineState *machine) exit(1); } - /* Allocate and map RAM */ - memory_region_allocate_system_memory(&s->ram, OBJECT(machine), "ram", - machine->ram_size); /* FIXME: Remove when we have custom CPU address space support */ - memory_region_add_subregion_overlap(get_system_memory(), 0, &s->ram, 0); + memory_region_add_subregion_overlap(get_system_memory(), 0, + machine->ram, 0); /* Setup the SOC */ object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), board_soc_type(board_rev), &error_abort, NULL); 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Tue, 25 Feb 2020 03:51:34 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 030/136] arm/sbsa-ref: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:20 +0100 Message-Id: <1582631466-13880-30-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-31-imammedo@redhat.com> --- hw/arm/sbsa-ref.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 9b5bcb5..1cba9fc 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -593,7 +593,6 @@ static void sbsa_ref_init(MachineState *machine) MachineClass *mc = MACHINE_GET_CLASS(machine); MemoryRegion *sysmem = get_system_memory(); MemoryRegion *secure_sysmem = g_new(MemoryRegion, 1); - MemoryRegion *ram = g_new(MemoryRegion, 1); bool firmware_loaded; const CPUArchIdList *possible_cpus; int n, sbsa_max_cpus; @@ -685,9 +684,8 @@ static void sbsa_ref_init(MachineState *machine) object_unref(cpuobj); } - memory_region_allocate_system_memory(ram, NULL, "sbsa-ref.ram", - machine->ram_size); - memory_region_add_subregion(sysmem, sbsa_ref_memmap[SBSA_MEM].base, ram); + memory_region_add_subregion(sysmem, sbsa_ref_memmap[SBSA_MEM].base, + machine->ram); create_fdt(sms); @@ -785,6 +783,7 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data) mc->block_default_type = IF_IDE; mc->no_cdrom = 1; mc->default_ram_size = 1 * GiB; + mc->default_ram_id = "sbsa-ref.ram"; mc->default_cpus = 4; mc->possible_cpu_arch_ids = sbsa_ref_possible_cpu_arch_ids; mc->cpu_index_to_instance_props = sbsa_ref_cpu_index_to_props; From patchwork Tue Feb 25 11:49:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403425 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 990271580 for ; Tue, 25 Feb 2020 12:10:14 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6F0B22084E for ; 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Tue, 25 Feb 2020 03:51:35 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 031/136] arm/versatilepb: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:21 +0100 Message-Id: <1582631466-13880-31-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-32-imammedo@redhat.com> --- hw/arm/versatilepb.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index e86af01..f3c4a50 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -184,7 +184,6 @@ static void versatile_init(MachineState *machine, int board_id) Object *cpuobj; ARMCPU *cpu; MemoryRegion *sysmem = get_system_memory(); - MemoryRegion *ram = g_new(MemoryRegion, 1); qemu_irq pic[32]; qemu_irq sic[32]; DeviceState *dev, *sysctl; @@ -220,11 +219,9 @@ static void versatile_init(MachineState *machine, int board_id) cpu = ARM_CPU(cpuobj); - memory_region_allocate_system_memory(ram, NULL, "versatile.ram", - machine->ram_size); /* ??? RAM should repeat to fill physical memory space. */ /* SDRAM at address zero. */ - memory_region_add_subregion(sysmem, 0, ram); + memory_region_add_subregion(sysmem, 0, machine->ram); sysctl = qdev_create(NULL, "realview_sysctl"); qdev_prop_set_uint32(sysctl, "sys_id", 0x41007004); @@ -398,6 +395,7 @@ static void versatilepb_class_init(ObjectClass *oc, void *data) mc->block_default_type = IF_SCSI; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm926"); + mc->default_ram_id = "versatile.ram"; } static const TypeInfo versatilepb_type = { @@ -415,6 +413,7 @@ static void versatileab_class_init(ObjectClass *oc, void *data) mc->block_default_type = IF_SCSI; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm926"); + mc->default_ram_id = "versatile.ram"; } static const TypeInfo versatileab_type = { From patchwork Tue Feb 25 11:49:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403435 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D0B8A1580 for ; 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Tue, 25 Feb 2020 03:51:35 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 032/136] arm/vexpress: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:22 +0100 Message-Id: <1582631466-13880-32-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-33-imammedo@redhat.com> --- hw/arm/vexpress.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index 4673a88..ed683ee 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -273,7 +273,6 @@ static void a9_daughterboard_init(const VexpressMachineState *vms, { MachineState *machine = MACHINE(vms); MemoryRegion *sysmem = get_system_memory(); - MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *lowram = g_new(MemoryRegion, 1); ram_addr_t low_ram_size; @@ -283,8 +282,6 @@ static void a9_daughterboard_init(const VexpressMachineState *vms, exit(1); } - memory_region_allocate_system_memory(ram, NULL, "vexpress.highmem", - ram_size); low_ram_size = ram_size; if (low_ram_size > 0x4000000) { low_ram_size = 0x4000000; @@ -293,9 +290,10 @@ static void a9_daughterboard_init(const VexpressMachineState *vms, * address space should in theory be remappable to various * things including ROM or RAM; we always map the RAM there. */ - memory_region_init_alias(lowram, NULL, "vexpress.lowmem", ram, 0, low_ram_size); + memory_region_init_alias(lowram, NULL, "vexpress.lowmem", machine->ram, + 0, low_ram_size); memory_region_add_subregion(sysmem, 0x0, lowram); - memory_region_add_subregion(sysmem, 0x60000000, ram); + memory_region_add_subregion(sysmem, 0x60000000, machine->ram); /* 0x1e000000 A9MPCore (SCU) private memory region */ init_cpus(machine, cpu_type, TYPE_A9MPCORE_PRIV, 0x1e000000, pic, @@ -360,7 +358,6 @@ static void a15_daughterboard_init(const VexpressMachineState *vms, { MachineState *machine = MACHINE(vms); MemoryRegion *sysmem = get_system_memory(); - MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *sram = g_new(MemoryRegion, 1); { @@ -375,10 +372,8 @@ static void a15_daughterboard_init(const VexpressMachineState *vms, } } - memory_region_allocate_system_memory(ram, NULL, "vexpress.highmem", - ram_size); /* RAM is from 0x80000000 upwards; there is no low-memory alias for it. */ - memory_region_add_subregion(sysmem, 0x80000000, ram); + memory_region_add_subregion(sysmem, 0x80000000, machine->ram); /* 0x2c000000 A15MPCore private memory region (GIC) */ init_cpus(machine, cpu_type, TYPE_A15MPCORE_PRIV, @@ -795,6 +790,7 @@ static void vexpress_class_init(ObjectClass *oc, void *data) mc->init = vexpress_common_init; mc->max_cpus = 4; mc->ignore_memory_transaction_failures = true; + mc->default_ram_id = "vexpress.highmem"; } static void vexpress_a9_class_init(ObjectClass *oc, void *data) From patchwork Tue Feb 25 11:49:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403371 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7E16C1395 for ; Tue, 25 Feb 2020 12:02:17 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 54D682176D for ; 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Tue, 25 Feb 2020 03:51:37 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 033/136] arm/virt: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:23 +0100 Message-Id: <1582631466-13880-33-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and then map memory region provided by MachineState::ram_memdev Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Reviewed-by: Andrew Jones Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-34-imammedo@redhat.com> --- hw/arm/virt.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index f788fe2..e591a12 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1512,7 +1512,6 @@ static void machvirt_init(MachineState *machine) MemoryRegion *sysmem = get_system_memory(); MemoryRegion *secure_sysmem = NULL; int n, virt_max_cpus; - MemoryRegion *ram = g_new(MemoryRegion, 1); bool firmware_loaded; bool aarch64 = true; bool has_ged = !vmc->no_ged; @@ -1706,9 +1705,8 @@ static void machvirt_init(MachineState *machine) } } - memory_region_allocate_system_memory(ram, NULL, "mach-virt.ram", - machine->ram_size); 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Tue, 25 Feb 2020 03:51:38 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 034/136] arm/xilinx_zynq: drop RAM size fixup Date: Tue, 25 Feb 2020 12:49:24 +0100 Message-Id: <1582631466-13880-34-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov If user provided non-sense RAM size, board will complain and continue running with max RAM size supported. Also RAM is going to be allocated by generic code, so it won't be possible for board to fix things up for user. Make it error message and exit to force user fix CLI, instead of accepting non-sense CLI values. Signed-off-by: Igor Mammedov Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-35-imammedo@redhat.com> --- hw/arm/xilinx_zynq.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 3a0fa5b..f548c44 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -158,7 +158,6 @@ static inline void zynq_init_spi_flashes(uint32_t base_addr, qemu_irq irq, static void zynq_init(MachineState *machine) { - ram_addr_t ram_size = machine->ram_size; ARMCPU *cpu; MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *ext_ram = g_new(MemoryRegion, 1); @@ -168,6 +167,12 @@ static void zynq_init(MachineState *machine) qemu_irq pic[64]; int n; + /* max 2GB ram */ + if (machine->ram_size > 2 * GiB) { + error_report("RAM size more than 2 GiB is not supported"); + exit(EXIT_FAILURE); + } + cpu = ARM_CPU(object_new(machine->cpu_type)); /* By default A9 CPUs have EL3 enabled. This board does not @@ -184,14 +189,9 @@ static void zynq_init(MachineState *machine) &error_fatal); object_property_set_bool(OBJECT(cpu), true, "realized", &error_fatal); - /* max 2GB ram */ - if (ram_size > 0x80000000) { - ram_size = 0x80000000; - } - /* DDR remapped to address zero. */ memory_region_allocate_system_memory(ext_ram, NULL, "zynq.ext_ram", - ram_size); + machine->ram_size); memory_region_add_subregion(address_space_mem, 0, ext_ram); /* 256K of on-chip memory */ @@ -300,7 +300,7 @@ static void zynq_init(MachineState *machine) sysbus_connect_irq(busdev, 0, pic[40 - IRQ_OFFSET]); sysbus_mmio_map(busdev, 0, 0xF8007000); - zynq_binfo.ram_size = ram_size; + zynq_binfo.ram_size = machine->ram_size; zynq_binfo.nb_cpus = 1; zynq_binfo.board_id = 0xd32; zynq_binfo.loader_start = 0; From patchwork Tue Feb 25 11:49:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403431 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BE8EA1580 for ; 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Tue, 25 Feb 2020 03:51:38 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 035/136] arm/xilinx_zynq: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:25 +0100 Message-Id: <1582631466-13880-35-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::329 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-36-imammedo@redhat.com> --- hw/arm/xilinx_zynq.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index f548c44..3d439a4 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -160,7 +160,6 @@ static void zynq_init(MachineState *machine) { ARMCPU *cpu; MemoryRegion *address_space_mem = get_system_memory(); - MemoryRegion *ext_ram = g_new(MemoryRegion, 1); MemoryRegion *ocm_ram = g_new(MemoryRegion, 1); DeviceState *dev; SysBusDevice *busdev; @@ -190,9 +189,7 @@ static void zynq_init(MachineState *machine) object_property_set_bool(OBJECT(cpu), true, "realized", &error_fatal); /* DDR remapped to address zero. */ - memory_region_allocate_system_memory(ext_ram, NULL, "zynq.ext_ram", - machine->ram_size); - memory_region_add_subregion(address_space_mem, 0, ext_ram); + memory_region_add_subregion(address_space_mem, 0, machine->ram); /* 256K of on-chip memory */ memory_region_init_ram(ocm_ram, NULL, "zynq.ocm_ram", 256 * KiB, @@ -318,6 +315,7 @@ static void zynq_machine_init(MachineClass *mc) mc->no_sdcard = 1; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9"); + mc->default_ram_id = "zynq.ext_ram"; } DEFINE_MACHINE("xilinx-zynq-a9", zynq_machine_init) From patchwork Tue Feb 25 11:49:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403441 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0F7671580 for ; Tue, 25 Feb 2020 12:13:18 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DA1D62084E for ; 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Tue, 25 Feb 2020 03:51:39 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 036/136] arm/xlnx-versal-virt: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:26 +0100 Message-Id: <1582631466-13880-36-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::334 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-37-imammedo@redhat.com> --- hw/arm/xlnx-versal-virt.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 462493c..c137ff4 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -30,7 +30,6 @@ typedef struct VersalVirt { MachineState parent_obj; Versal soc; - MemoryRegion mr_ddr; void *fdt; int fdt_size; @@ -414,12 +413,9 @@ static void versal_virt_init(MachineState *machine) psci_conduit = QEMU_PSCI_CONDUIT_SMC; } - memory_region_allocate_system_memory(&s->mr_ddr, NULL, "ddr", - machine->ram_size); - sysbus_init_child_obj(OBJECT(machine), "xlnx-ve", &s->soc, sizeof(s->soc), TYPE_XLNX_VERSAL); - object_property_set_link(OBJECT(&s->soc), OBJECT(&s->mr_ddr), + object_property_set_link(OBJECT(&s->soc), OBJECT(machine->ram), "ddr", &error_abort); object_property_set_int(OBJECT(&s->soc), psci_conduit, "psci-conduit", &error_abort); @@ -473,6 +469,7 @@ static void versal_virt_machine_class_init(ObjectClass *oc, void *data) mc->max_cpus = XLNX_VERSAL_NR_ACPUS; mc->default_cpus = XLNX_VERSAL_NR_ACPUS; mc->no_cdrom = true; + mc->default_ram_id = "ddr"; } static const TypeInfo versal_virt_machine_init_typeinfo = { From patchwork Tue Feb 25 11:49:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403449 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7688517E0 for ; Tue, 25 Feb 2020 12:14:53 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0D487218AC for ; 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Tue, 25 Feb 2020 03:51:40 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 037/136] arm/xlnx-zcu102: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:27 +0100 Message-Id: <1582631466-13880-37-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-38-imammedo@redhat.com> --- hw/arm/xlnx-zcu102.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 53cfe7c..bd645ad 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -28,7 +28,6 @@ typedef struct XlnxZCU102 { MachineState parent_obj; XlnxZynqMPState soc; - MemoryRegion ddr_ram; bool secure; bool virt; @@ -87,13 +86,10 @@ static void xlnx_zcu102_init(MachineState *machine) ram_size); } - memory_region_allocate_system_memory(&s->ddr_ram, NULL, "ddr-ram", - ram_size); - object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP, &error_abort, NULL); - object_property_set_link(OBJECT(&s->soc), OBJECT(&s->ddr_ram), + object_property_set_link(OBJECT(&s->soc), OBJECT(machine->ram), "ddr-ram", &error_abort); object_property_set_bool(OBJECT(&s->soc), s->secure, "secure", &error_fatal); @@ -211,6 +207,7 @@ static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data) mc->ignore_memory_transaction_failures = true; mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS; mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS; + mc->default_ram_id = "ddr-ram"; } static const TypeInfo xlnx_zcu102_machine_init_typeinfo = { From patchwork Tue Feb 25 11:49:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403457 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 597521580 for ; Tue, 25 Feb 2020 12:17:12 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2F6822176D for ; Tue, 25 Feb 2020 12:17:12 +0000 (UTC) Authentication-Results: mail.kernel.org; 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X-Received-From: 2a00:1450:4864:20::332 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: David Hildenbrand Acked-by: Cornelia Huck Tested-by: Halil Pasic Acked-by: Halil Pasic Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-39-imammedo@redhat.com> --- hw/s390x/s390-virtio-ccw.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index e759eb5..a89cf4c 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -154,14 +154,12 @@ static void virtio_ccw_register_hcalls(void) virtio_ccw_hcall_early_printk); } -static void s390_memory_init(ram_addr_t mem_size) +static void s390_memory_init(MemoryRegion *ram) { MemoryRegion *sysmem = get_system_memory(); - MemoryRegion *ram = g_new(MemoryRegion, 1); Error *local_err = NULL; /* allocate RAM for core */ - memory_region_allocate_system_memory(ram, NULL, "s390.ram", mem_size); memory_region_add_subregion(sysmem, 0, ram); /* @@ -245,7 +243,7 @@ static void ccw_init(MachineState *machine) s390_sclp_init(); /* init memory + setup max page size. Required for the CPU model */ - s390_memory_init(machine->ram_size); + s390_memory_init(machine->ram); /* init CPUs (incl. CPU model) early so s390_has_feature() works */ s390_init_cpus(machine); @@ -471,6 +469,7 @@ static void ccw_machine_class_init(ObjectClass *oc, void *data) hc->plug = s390_machine_device_plug; hc->unplug_request = s390_machine_device_unplug_request; nc->nmi_monitor_handler = s390_nmi; + mc->default_ram_id = "s390.ram"; } static inline bool machine_get_aes_key_wrap(Object *obj, Error **errp) From patchwork Tue Feb 25 11:49:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403447 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 75ADF13A4 for ; Tue, 25 Feb 2020 12:14:32 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4CBE52084E for ; Tue, 25 Feb 2020 12:14:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="hbtYxlCn" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4CBE52084E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:53864 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Z6d-00077U-Dc for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 07:14:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:49489) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Ykf-0000pF-6F for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:51:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6Ykb-00079Y-CS for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:51:49 -0500 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]:32872) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6Ykb-00071y-2v for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:51:45 -0500 Received: by mail-wm1-x335.google.com with SMTP id m10so2052467wmc.0 for ; Tue, 25 Feb 2020 03:51:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JmXcr0W52fcISG0AOHtfcuEq+w+rjA6FgdcBQj6UTa4=; b=hbtYxlCn2YcTbLb+w+Ktom9yXnN9t7kFLoQj2zryuohemD8Z2Ileo9Wmg9Rt7kDKNH 4fo22fmnQ8rl99DuCEE6cbflcFmaizhGYSfKKSrDZgayaKrZIpkmCohcVYZzm5auzD8z McSk/SK7aLlRqRZWbrproN/m4VKw5b6afMVNG95Sl/U93t09xti1DiHMpr+o1JjfkoRk +7d5F2NSj2YZNyRQ+VEgYPMjsk2CkZJMbT+V4VbN8Nk2q7kV7fA0ZLKvYCnmdTdxwYwF VNjEdYy0SLBHVz/8Mb0h+AchXYahw/YFByjNSpAinKaP+5y13eaIQEKpj5//+Nb1fqPG aowg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=JmXcr0W52fcISG0AOHtfcuEq+w+rjA6FgdcBQj6UTa4=; b=Nre2PEzTrjyCXCrCbyNliMbzrGauvlsn+g3QVX1larsdyjty1I8KTlBPBVKS15Ips+ /stW+vFdGHl4Ci3sE8140ULM63KhKQ3FrKZwLL8issEFooidwv4lqbtAIAGcUsME9frc 7nKXKFnwKgpJBSlt7ux2otKym/gpapBk0/p8Ec/97W9Khx4kz7yRzWAhdsNGajLc8FkN oZqzVcXk/dtBH+MMCkYj2Gew5ZZAQXc8M7KmTq/k1r/SRuFCuFQdz7TdXb/32PPqPq/t UKlv7yvqsy/7u8N7EWxnqEpBxElizDtIFmm1Pp6x4hPjoOItaFsJzbKlZf0a8TAX6TFv ix5w== X-Gm-Message-State: APjAAAUsvU2wRtO21ZZH0clBwpFkowuYa9P8aAo7l9fJNqbiLH6TQ3dz l9oKI33LCXTg/enFIoqiGdk97p7V X-Google-Smtp-Source: APXvYqwHfsG9TK82hodsLn7h8fd8QCQD+uH8nh2a1eqHwPiiLDTWf703uNsebZkRiKTUvGcFTzlPhQ== X-Received: by 2002:a7b:c119:: with SMTP id w25mr5070173wmi.116.1582631502941; Tue, 25 Feb 2020 03:51:42 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.51.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:51:42 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 039/136] null-machine: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:29 +0100 Message-Id: <1582631466-13880-39-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::335 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-40-imammedo@redhat.com> --- hw/core/null-machine.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c index 1aa0a9a..cb47d9d 100644 --- a/hw/core/null-machine.c +++ b/hw/core/null-machine.c @@ -32,11 +32,8 @@ static void machine_none_init(MachineState *mch) } /* RAM at address zero */ - if (mch->ram_size) { - MemoryRegion *ram = g_new(MemoryRegion, 1); - - memory_region_allocate_system_memory(ram, NULL, "ram", mch->ram_size); - memory_region_add_subregion(get_system_memory(), 0, ram); + if (mch->ram) { + memory_region_add_subregion(get_system_memory(), 0, mch->ram); } if (mch->kernel_filename) { @@ -52,6 +49,7 @@ static void machine_none_machine_init(MachineClass *mc) mc->init = machine_none_init; mc->max_cpus = 1; mc->default_ram_size = 0; + mc->default_ram_id = "ram"; } DEFINE_MACHINE("none", machine_none_machine_init) From patchwork Tue Feb 25 11:49:30 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 03:51:43 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 040/136] cris/axis_dev88: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:30 +0100 Message-Id: <1582631466-13880-40-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::329 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-41-imammedo@redhat.com> --- hw/cris/axis_dev88.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c index be77604..cf6790f 100644 --- a/hw/cris/axis_dev88.c +++ b/hw/cris/axis_dev88.c @@ -249,7 +249,6 @@ static struct cris_load_info li; static void axisdev88_init(MachineState *machine) { - ram_addr_t ram_size = machine->ram_size; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; CRISCPU *cpu; @@ -261,16 +260,12 @@ void axisdev88_init(MachineState *machine) struct etraxfs_dma_client *dma_eth; int i; MemoryRegion *address_space_mem = get_system_memory(); - MemoryRegion *phys_ram = g_new(MemoryRegion, 1); MemoryRegion *phys_intmem = g_new(MemoryRegion, 1); /* init CPUs */ cpu = CRIS_CPU(cpu_create(machine->cpu_type)); - /* allocate RAM */ - memory_region_allocate_system_memory(phys_ram, NULL, "axisdev88.ram", - ram_size); - memory_region_add_subregion(address_space_mem, 0x40000000, phys_ram); + memory_region_add_subregion(address_space_mem, 0x40000000, machine->ram); /* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the internal memory. */ @@ -351,6 +346,7 @@ static void axisdev88_machine_init(MachineClass *mc) mc->init = axisdev88_init; mc->is_default = 1; mc->default_cpu_type = CRIS_CPU_TYPE_NAME("crisv32"); + mc->default_ram_id = "axisdev88.ram"; } DEFINE_MACHINE("axis-dev88", axisdev88_machine_init) From patchwork Tue Feb 25 11:49:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403465 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 028DE1580 for ; Tue, 25 Feb 2020 12:19:43 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CD3202176D for ; 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Tue, 25 Feb 2020 03:51:44 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 041/136] hppa: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:31 +0100 Message-Id: <1582631466-13880-41-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-42-imammedo@redhat.com> --- hw/hppa/machine.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index d8755ec..67181e7 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -71,14 +71,11 @@ static void machine_hppa_init(MachineState *machine) uint64_t kernel_entry = 0, kernel_low, kernel_high; MemoryRegion *addr_space = get_system_memory(); MemoryRegion *rom_region; - MemoryRegion *ram_region; MemoryRegion *cpu_region; long i; unsigned int smp_cpus = machine->smp.cpus; SysBusDevice *s; - ram_size = machine->ram_size; - /* Create CPUs. */ for (i = 0; i < smp_cpus; i++) { char *name = g_strdup_printf("cpu%ld-io-eir", i); @@ -97,10 +94,8 @@ static void machine_hppa_init(MachineState *machine) error_report("RAM size is currently restricted to 3GB"); exit(EXIT_FAILURE); } - ram_region = g_new(MemoryRegion, 1); - memory_region_allocate_system_memory(ram_region, OBJECT(machine), - "ram", ram_size); - memory_region_add_subregion_overlap(addr_space, 0, ram_region, -1); + memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1); + /* Init Lasi chip */ lasi_init(addr_space); @@ -298,6 +293,7 @@ static void machine_hppa_machine_init(MachineClass *mc) mc->is_default = 1; mc->default_ram_size = 512 * MiB; mc->default_boot_order = "cd"; + mc->default_ram_id = "ram"; } DEFINE_MACHINE("hppa", machine_hppa_machine_init) From patchwork Tue Feb 25 11:49:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403403 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F2F371580 for ; Tue, 25 Feb 2020 12:08:42 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C99B52084E for ; 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Tue, 25 Feb 2020 03:51:45 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 042/136] x86/microvm: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:32 +0100 Message-Id: <1582631466-13880-42-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-43-imammedo@redhat.com> --- hw/i386/microvm.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c index d234851..38d8e51 100644 --- a/hw/i386/microvm.c +++ b/hw/i386/microvm.c @@ -167,7 +167,7 @@ static void microvm_memory_init(MicrovmMachineState *mms) { MachineState *machine = MACHINE(mms); X86MachineState *x86ms = X86_MACHINE(mms); - MemoryRegion *ram, *ram_below_4g, *ram_above_4g; + MemoryRegion *ram_below_4g, *ram_above_4g; MemoryRegion *system_memory = get_system_memory(); FWCfgState *fw_cfg; ram_addr_t lowmem; @@ -214,12 +214,8 @@ static void microvm_memory_init(MicrovmMachineState *mms) x86ms->below_4g_mem_size = machine->ram_size; } - ram = g_malloc(sizeof(*ram)); - memory_region_allocate_system_memory(ram, NULL, "microvm.ram", - machine->ram_size); - ram_below_4g = g_malloc(sizeof(*ram_below_4g)); - memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", ram, + memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram, 0, x86ms->below_4g_mem_size); memory_region_add_subregion(system_memory, 0, ram_below_4g); @@ -227,7 +223,8 @@ static void microvm_memory_init(MicrovmMachineState *mms) if (x86ms->above_4g_mem_size > 0) { ram_above_4g = g_malloc(sizeof(*ram_above_4g)); - memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", ram, + memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", + machine->ram, x86ms->below_4g_mem_size, x86ms->above_4g_mem_size); memory_region_add_subregion(system_memory, 0x100000000ULL, @@ -502,6 +499,7 @@ static void microvm_class_init(ObjectClass *oc, void *data) mc->auto_enable_numa_with_memhp = false; mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; mc->nvdimm_supported = false; + mc->default_ram_id = "microvm.ram"; /* Avoid relying too much on kernel components */ mc->default_kernel_irqchip_split = true; From patchwork Tue Feb 25 11:49:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403473 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B90A514E3 for ; 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Tue, 25 Feb 2020 03:51:45 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 043/136] x86/pc: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:33 +0100 Message-Id: <1582631466-13880-43-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-44-imammedo@redhat.com> --- hw/i386/pc.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 2ddce42..6ab4acb 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -937,7 +937,7 @@ void pc_memory_init(PCMachineState *pcms, MemoryRegion **ram_memory) { int linux_boot, i; - MemoryRegion *ram, *option_rom_mr; + MemoryRegion *option_rom_mr; MemoryRegion *ram_below_4g, *ram_above_4g; FWCfgState *fw_cfg; MachineState *machine = MACHINE(pcms); @@ -950,22 +950,20 @@ void pc_memory_init(PCMachineState *pcms, linux_boot = (machine->kernel_filename != NULL); - /* Allocate RAM. We allocate it as a single memory region and use - * aliases to address portions of it, mostly for backwards compatibility - * with older qemus that used qemu_ram_alloc(). + /* + * Split single memory region and use aliases to address portions of it, + * done for backwards compatibility with older qemus. */ - ram = g_malloc(sizeof(*ram)); - memory_region_allocate_system_memory(ram, NULL, "pc.ram", - machine->ram_size); - *ram_memory = ram; + *ram_memory = machine->ram; ram_below_4g = g_malloc(sizeof(*ram_below_4g)); - memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", ram, + memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram, 0, x86ms->below_4g_mem_size); memory_region_add_subregion(system_memory, 0, ram_below_4g); e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM); if (x86ms->above_4g_mem_size > 0) { ram_above_4g = g_malloc(sizeof(*ram_above_4g)); - memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", ram, + memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", + machine->ram, x86ms->below_4g_mem_size, x86ms->above_4g_mem_size); memory_region_add_subregion(system_memory, 0x100000000ULL, @@ -1952,6 +1950,7 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; mc->nvdimm_supported = true; mc->numa_mem_supported = true; + mc->default_ram_id = "pc.ram"; object_class_property_add(oc, PC_MACHINE_DEVMEM_REGION_SIZE, "int", pc_machine_get_device_memory_region_size, NULL, From patchwork Tue Feb 25 11:49:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403393 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D8C331395 for ; Tue, 25 Feb 2020 12:08:29 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AF9652084E for ; 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Tue, 25 Feb 2020 03:51:46 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 044/136] lm32/lm32_boards: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:34 +0100 Message-Id: <1582631466-13880-44-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: while at it add check for user supplied RAM size and error out if it mismatches board expected value. Signed-off-by: Igor Mammedov Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-45-imammedo@redhat.com> --- hw/lm32/lm32_boards.c | 39 ++++++++++++++++++++++++++------------- 1 file changed, 26 insertions(+), 13 deletions(-) diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c index d1894ad..4e0a98c 100644 --- a/hw/lm32/lm32_boards.c +++ b/hw/lm32/lm32_boards.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "qemu/units.h" +#include "qemu/cutils.h" #include "qemu/error-report.h" #include "cpu.h" #include "hw/sysbus.h" @@ -75,22 +76,28 @@ static void main_cpu_reset(void *opaque) static void lm32_evr_init(MachineState *machine) { + MachineClass *mc = MACHINE_GET_CLASS(machine); const char *kernel_filename = machine->kernel_filename; LM32CPU *cpu; CPULM32State *env; DriveInfo *dinfo; MemoryRegion *address_space_mem = get_system_memory(); - MemoryRegion *phys_ram = g_new(MemoryRegion, 1); qemu_irq irq[32]; ResetInfo *reset_info; int i; + if (machine->ram_size != mc->default_ram_size) { + char *sz = size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); + } + /* memory map */ hwaddr flash_base = 0x04000000; size_t flash_sector_size = 256 * KiB; size_t flash_size = 32 * MiB; hwaddr ram_base = 0x08000000; - size_t ram_size = 64 * MiB; hwaddr timer0_base = 0x80002000; hwaddr uart0_base = 0x80006000; hwaddr timer1_base = 0x8000a000; @@ -107,9 +114,7 @@ static void lm32_evr_init(MachineState *machine) reset_info->flash_base = flash_base; - memory_region_allocate_system_memory(phys_ram, NULL, "lm32_evr.sdram", - ram_size); - memory_region_add_subregion(address_space_mem, ram_base, phys_ram); + memory_region_add_subregion(address_space_mem, ram_base, machine->ram); dinfo = drive_get(IF_PFLASH, 0, 0); /* Spansion S29NS128P */ @@ -144,7 +149,7 @@ static void lm32_evr_init(MachineState *machine) if (kernel_size < 0) { kernel_size = load_image_targphys(kernel_filename, ram_base, - ram_size); + machine->ram_size); reset_info->bootstrap_pc = ram_base; } @@ -159,6 +164,7 @@ static void lm32_evr_init(MachineState *machine) static void lm32_uclinux_init(MachineState *machine) { + MachineClass *mc = MACHINE_GET_CLASS(machine); const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; @@ -166,18 +172,23 @@ static void lm32_uclinux_init(MachineState *machine) CPULM32State *env; DriveInfo *dinfo; MemoryRegion *address_space_mem = get_system_memory(); - MemoryRegion *phys_ram = g_new(MemoryRegion, 1); qemu_irq irq[32]; HWSetup *hw; ResetInfo *reset_info; int i; + if (machine->ram_size != mc->default_ram_size) { + char *sz = size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); + } + /* memory map */ hwaddr flash_base = 0x04000000; size_t flash_sector_size = 256 * KiB; size_t flash_size = 32 * MiB; hwaddr ram_base = 0x08000000; - size_t ram_size = 64 * MiB; hwaddr uart0_base = 0x80000000; hwaddr timer0_base = 0x80002000; hwaddr timer1_base = 0x80010000; @@ -200,9 +211,7 @@ static void lm32_uclinux_init(MachineState *machine) reset_info->flash_base = flash_base; - memory_region_allocate_system_memory(phys_ram, NULL, - "lm32_uclinux.sdram", ram_size); - memory_region_add_subregion(address_space_mem, ram_base, phys_ram); + memory_region_add_subregion(address_space_mem, ram_base, machine->ram); dinfo = drive_get(IF_PFLASH, 0, 0); /* Spansion S29NS128P */ @@ -238,7 +247,7 @@ static void lm32_uclinux_init(MachineState *machine) if (kernel_size < 0) { kernel_size = load_image_targphys(kernel_filename, ram_base, - ram_size); + machine->ram_size); reset_info->bootstrap_pc = ram_base; } @@ -252,7 +261,7 @@ static void lm32_uclinux_init(MachineState *machine) hw = hwsetup_init(); hwsetup_add_cpu(hw, "LM32", 75000000); hwsetup_add_flash(hw, "flash", flash_base, flash_size); - hwsetup_add_ddr_sdram(hw, "ddr_sdram", ram_base, ram_size); + hwsetup_add_ddr_sdram(hw, "ddr_sdram", ram_base, machine->ram_size); hwsetup_add_timer(hw, "timer0", timer0_base, timer0_irq); hwsetup_add_timer(hw, "timer1_dev_only", timer1_base, timer1_irq); hwsetup_add_timer(hw, "timer2_dev_only", timer2_base, timer2_irq); @@ -288,6 +297,8 @@ static void lm32_evr_class_init(ObjectClass *oc, void *data) mc->init = lm32_evr_init; mc->is_default = 1; mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full"); + mc->default_ram_size = 64 * MiB; + mc->default_ram_id = "lm32_evr.sdram"; } static const TypeInfo lm32_evr_type = { @@ -304,6 +315,8 @@ static void lm32_uclinux_class_init(ObjectClass *oc, void *data) mc->init = lm32_uclinux_init; mc->is_default = 0; mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full"); + mc->default_ram_size = 64 * MiB; + mc->default_ram_id = "lm32_uclinux.sdram"; } static const TypeInfo lm32_uclinux_type = { From patchwork Tue Feb 25 11:49:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403439 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2EDF013A4 for ; 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Tue, 25 Feb 2020 03:51:47 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 045/136] lm32/milkymist: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:35 +0100 Message-Id: <1582631466-13880-45-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: while at it add check for user supplied RAM size and error out if it mismatches board expected value. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-46-imammedo@redhat.com> --- hw/lm32/milkymist.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c index 6d46134..5c72266 100644 --- a/hw/lm32/milkymist.c +++ b/hw/lm32/milkymist.c @@ -36,6 +36,7 @@ #include "hw/display/milkymist_tmu2.h" #include "lm32.h" #include "exec/address-spaces.h" +#include "qemu/cutils.h" #define BIOS_FILENAME "mmone-bios.bin" #define BIOS_OFFSET 0x00860000 @@ -82,6 +83,7 @@ static void main_cpu_reset(void *opaque) static void milkymist_init(MachineState *machine) { + MachineClass *mc = MACHINE_GET_CLASS(machine); const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; @@ -90,22 +92,27 @@ milkymist_init(MachineState *machine) int kernel_size; DriveInfo *dinfo; MemoryRegion *address_space_mem = get_system_memory(); - MemoryRegion *phys_sdram = g_new(MemoryRegion, 1); qemu_irq irq[32]; int i; char *bios_filename; ResetInfo *reset_info; + if (machine->ram_size != mc->default_ram_size) { + char *sz = size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); + } + /* memory map */ hwaddr flash_base = 0x00000000; size_t flash_sector_size = 128 * KiB; size_t flash_size = 32 * MiB; hwaddr sdram_base = 0x40000000; - size_t sdram_size = 128 * MiB; hwaddr initrd_base = sdram_base + 0x1002000; hwaddr cmdline_base = sdram_base + 0x1000000; - size_t initrd_max = sdram_size - 0x1002000; + size_t initrd_max = machine->ram_size - 0x1002000; reset_info = g_malloc0(sizeof(ResetInfo)); @@ -116,9 +123,7 @@ milkymist_init(MachineState *machine) cpu_lm32_set_phys_msb_ignore(env, 1); - memory_region_allocate_system_memory(phys_sdram, NULL, "milkymist.sdram", - sdram_size); - memory_region_add_subregion(address_space_mem, sdram_base, phys_sdram); + memory_region_add_subregion(address_space_mem, sdram_base, machine->ram); dinfo = drive_get(IF_PFLASH, 0, 0); /* Numonyx JS28F256J3F105 */ @@ -183,7 +188,7 @@ milkymist_init(MachineState *machine) if (kernel_size < 0) { kernel_size = load_image_targphys(kernel_filename, sdram_base, - sdram_size); + machine->ram_size); reset_info->bootstrap_pc = sdram_base; } @@ -216,6 +221,8 @@ static void milkymist_machine_init(MachineClass *mc) mc->init = milkymist_init; mc->is_default = 0; mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full"); + mc->default_ram_size = 128 * MiB; + mc->default_ram_id = "milkymist.sdram"; } DEFINE_MACHINE("milkymist", milkymist_machine_init) From patchwork Tue Feb 25 11:49:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403429 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 934381395 for ; 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Tue, 25 Feb 2020 03:51:48 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 046/136] m68k/an5206: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:36 +0100 Message-Id: <1582631466-13880-46-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::431 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Acked-by: Thomas Huth Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-47-imammedo@redhat.com> --- hw/m68k/an5206.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c index bed43a9..846f4e4 100644 --- a/hw/m68k/an5206.c +++ b/hw/m68k/an5206.c @@ -33,7 +33,6 @@ static void an5206_init(MachineState *machine) uint64_t elf_entry; hwaddr entry; MemoryRegion *address_space_mem = get_system_memory(); - MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *sram = g_new(MemoryRegion, 1); cpu = M68K_CPU(cpu_create(machine->cpu_type)); @@ -46,8 +45,7 @@ static void an5206_init(MachineState *machine) env->rambar0 = AN5206_RAMBAR_ADDR | 1; /* DRAM at address zero */ - memory_region_allocate_system_memory(ram, NULL, "an5206.ram", ram_size); - memory_region_add_subregion(address_space_mem, 0, ram); + memory_region_add_subregion(address_space_mem, 0, machine->ram); /* Internal SRAM. */ memory_region_init_ram(sram, NULL, "an5206.sram", 512, &error_fatal); @@ -89,6 +87,7 @@ static void an5206_machine_init(MachineClass *mc) mc->desc = "Arnewsh 5206"; mc->init = an5206_init; mc->default_cpu_type = M68K_CPU_TYPE_NAME("m5206"); + mc->default_ram_id = "an5206.ram"; } DEFINE_MACHINE("an5206", an5206_machine_init) From patchwork Tue Feb 25 11:49:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403481 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3832D14E3 for ; Tue, 25 Feb 2020 12:22:59 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0D85020CC7 for ; Tue, 25 Feb 2020 12:22:59 +0000 (UTC) Authentication-Results: mail.kernel.org; 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X-Received-From: 2a00:1450:4864:20::42b X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov Switch to using generic main RAM allocation. To do this set MachineClass::default_ram_id to m68k_mac.ram and use MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Acked-by: Laurent Vivier Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-48-imammedo@redhat.com> --- hw/m68k/q800.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 1e32363..a4c4bc1 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -160,7 +160,6 @@ static void q800_init(MachineState *machine) ram_addr_t initrd_base; int32_t initrd_size; MemoryRegion *rom; - MemoryRegion *ram; MemoryRegion *io; const int io_slice_nb = (IO_SIZE / IO_SLICE) - 1; int i; @@ -194,9 +193,7 @@ static void q800_init(MachineState *machine) qemu_register_reset(main_cpu_reset, cpu); /* RAM */ - ram = g_malloc(sizeof(*ram)); - memory_region_init_ram(ram, NULL, "m68k_mac.ram", ram_size, &error_abort); - memory_region_add_subregion(get_system_memory(), 0, ram); + memory_region_add_subregion(get_system_memory(), 0, machine->ram); /* * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated @@ -443,6 +440,7 @@ static void q800_machine_class_init(ObjectClass *oc, void *data) mc->max_cpus = 1; mc->is_default = 0; mc->block_default_type = IF_SCSI; + mc->default_ram_id = "m68k_mac.ram"; } static const TypeInfo q800_machine_typeinfo = { From patchwork Tue Feb 25 11:49:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403487 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 773051580 for ; Tue, 25 Feb 2020 12:25:04 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4DECB20CC7 for ; Tue, 25 Feb 2020 12:25:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="q8SbGL/n" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4DECB20CC7 Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:51:51 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.51.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:51:50 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 048/136] m68k/mcf5208: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:38 +0100 Message-Id: <1582631466-13880-48-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::435 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Acked-by: Thomas Huth Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-49-imammedo@redhat.com> --- hw/m68k/mcf5208.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c index a999c21..31622c7 100644 --- a/hw/m68k/mcf5208.c +++ b/hw/m68k/mcf5208.c @@ -234,7 +234,6 @@ static void mcf5208evb_init(MachineState *machine) qemu_irq *pic; MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *rom = g_new(MemoryRegion, 1); - MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *sram = g_new(MemoryRegion, 1); cpu = M68K_CPU(cpu_create(machine->cpu_type)); @@ -249,8 +248,7 @@ static void mcf5208evb_init(MachineState *machine) memory_region_add_subregion(address_space_mem, 0x00000000, rom); /* DRAM at 0x40000000 */ - memory_region_allocate_system_memory(ram, NULL, "mcf5208.ram", ram_size); - memory_region_add_subregion(address_space_mem, 0x40000000, ram); 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Tue, 25 Feb 2020 03:51:51 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 049/136] m68k/next-cube: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:39 +0100 Message-Id: <1582631466-13880-49-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::335 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Acked-by: Thomas Huth Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-50-imammedo@redhat.com> --- hw/m68k/next-cube.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index e534334..cd93d9e 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -860,7 +860,6 @@ static void next_cube_init(MachineState *machine) { M68kCPU *cpu; CPUM68KState *env; - MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *rom = g_new(MemoryRegion, 1); MemoryRegion *mmiomem = g_new(MemoryRegion, 1); MemoryRegion *scrmem = g_new(MemoryRegion, 1); @@ -893,8 +892,7 @@ static void next_cube_init(MachineState *machine) memcpy(ns->rtc.ram, rtc_ram2, 32); /* 64MB RAM starting at 0x04000000 */ - memory_region_allocate_system_memory(ram, NULL, "next.ram", ram_size); - memory_region_add_subregion(sysmem, 0x04000000, ram); + memory_region_add_subregion(sysmem, 0x04000000, machine->ram); /* Framebuffer */ dev = qdev_create(NULL, TYPE_NEXTFB); @@ -967,6 +965,7 @@ static void next_machine_class_init(ObjectClass *oc, void *data) mc->desc = "NeXT Cube"; mc->init = next_cube_init; mc->default_ram_size = RAM_SIZE; + mc->default_ram_id = "next.ram"; mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040"); } From patchwork Tue Feb 25 11:49:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403453 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 06EBD14E3 for ; Tue, 25 Feb 2020 12:16:31 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D16BB2176D for ; Tue, 25 Feb 2020 12:16:30 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:51:52 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.51.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:51:52 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 050/136] mips/boston: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:40 +0100 Message-Id: <1582631466-13880-50-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-51-imammedo@redhat.com> --- hw/mips/boston.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 0df3a77..98ecd25 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -427,7 +427,7 @@ static void boston_mach_init(MachineState *machine) DeviceState *dev; BostonState *s; Error *err = NULL; - MemoryRegion *flash, *ddr, *ddr_low_alias, *lcd, *platreg; + MemoryRegion *flash, *ddr_low_alias, *lcd, *platreg; MemoryRegion *sys_mem = get_system_memory(); XilinxPCIEHost *pcie2; PCIDevice *ahci; @@ -473,14 +473,12 @@ static void boston_mach_init(MachineState *machine) memory_region_init_rom(flash, NULL, "boston.flash", 128 * MiB, &err); memory_region_add_subregion_overlap(sys_mem, 0x18000000, flash, 0); - ddr = g_new(MemoryRegion, 1); - memory_region_allocate_system_memory(ddr, NULL, "boston.ddr", - machine->ram_size); - memory_region_add_subregion_overlap(sys_mem, 0x80000000, ddr, 0); + memory_region_add_subregion_overlap(sys_mem, 0x80000000, machine->ram, 0); ddr_low_alias = g_new(MemoryRegion, 1); memory_region_init_alias(ddr_low_alias, NULL, "boston_low.ddr", - ddr, 0, MIN(machine->ram_size, (256 * MiB))); + machine->ram, 0, + MIN(machine->ram_size, (256 * MiB))); memory_region_add_subregion_overlap(sys_mem, 0, ddr_low_alias, 0); xilinx_pcie_init(sys_mem, 0, @@ -552,6 +550,7 @@ static void boston_mach_class_init(MachineClass *mc) mc->init = boston_mach_init; mc->block_default_type = IF_IDE; mc->default_ram_size = 1 * GiB; + mc->default_ram_id = "boston.ddr"; mc->max_cpus = 16; mc->default_cpu_type = MIPS_CPU_TYPE_NAME("I6400"); } From patchwork Tue Feb 25 11:49:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403463 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7483014E3 for ; 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Tue, 25 Feb 2020 03:51:53 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 051/136] mips/mips_fulong2e: drop RAM size fixup Date: Tue, 25 Feb 2020 12:49:41 +0100 Message-Id: <1582631466-13880-51-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov If user provided non-sense RAM size, board will complain and continue running with max RAM size supported. Also RAM is going to be allocated by generic code, so it won't be possible for board to fix things up for user. Make it error message and exit to force user fix CLI, instead of accepting non-sense CLI values. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-52-imammedo@redhat.com> --- hw/mips/mips_fulong2e.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index 2e043cb..cf00211 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -296,7 +296,6 @@ static void mips_fulong2e_init(MachineState *machine) MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *bios = g_new(MemoryRegion, 1); - ram_addr_t ram_size = machine->ram_size; long bios_size; uint8_t *spd_data; Error *err = NULL; @@ -315,10 +314,14 @@ static void mips_fulong2e_init(MachineState *machine) qemu_register_reset(main_cpu_reset, cpu); /* TODO: support more than 256M RAM as highmem */ - ram_size = 256 * MiB; + if (machine->ram_size != 256 * MiB) { + error_report("Invalid RAM size, should be 256MB"); + exit(EXIT_FAILURE); + } /* allocate RAM */ - memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size); + memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", + machine->ram_size); memory_region_init_ram(bios, NULL, "fulong2e.bios", BIOS_SIZE, &error_fatal); memory_region_set_readonly(bios, true); @@ -332,7 +335,7 @@ static void mips_fulong2e_init(MachineState *machine) */ if (kernel_filename) { - loaderparams.ram_size = ram_size; + loaderparams.ram_size = machine->ram_size; loaderparams.kernel_filename = kernel_filename; loaderparams.kernel_cmdline = kernel_cmdline; loaderparams.initrd_filename = initrd_filename; @@ -378,7 +381,7 @@ static void mips_fulong2e_init(MachineState *machine) } /* Populate SPD eeprom data */ - spd_data = spd_data_generate(DDR, ram_size, &err); + spd_data = spd_data_generate(DDR, machine->ram_size, &err); if (err) { warn_report_err(err); } From patchwork Tue Feb 25 11:49:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403501 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F0B14138D for ; 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Tue, 25 Feb 2020 03:51:54 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 052/136] mips/mips_fulong2e: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:42 +0100 Message-Id: <1582631466-13880-52-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::329 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-53-imammedo@redhat.com> --- hw/mips/mips_fulong2e.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index cf00211..c373ab0 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -294,7 +294,6 @@ static void mips_fulong2e_init(MachineState *machine) const char *initrd_filename = machine->initrd_filename; char *filename; MemoryRegion *address_space_mem = get_system_memory(); - MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *bios = g_new(MemoryRegion, 1); long bios_size; uint8_t *spd_data; @@ -320,13 +319,11 @@ static void mips_fulong2e_init(MachineState *machine) } /* allocate RAM */ - memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", - machine->ram_size); memory_region_init_ram(bios, NULL, "fulong2e.bios", BIOS_SIZE, &error_fatal); memory_region_set_readonly(bios, true); - memory_region_add_subregion(address_space_mem, 0, ram); + memory_region_add_subregion(address_space_mem, 0, machine->ram); memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); /* @@ -402,6 +399,7 @@ static void mips_fulong2e_machine_init(MachineClass *mc) mc->block_default_type = IF_IDE; mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E"); mc->default_ram_size = 256 * MiB; + mc->default_ram_id = "fulong2e.ram"; } DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init) From patchwork Tue Feb 25 11:49:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403443 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BD4931580 for ; Tue, 25 Feb 2020 12:14:24 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9433D2084E for ; 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Tue, 25 Feb 2020 03:51:54 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 053/136] mips/mips_jazz: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:43 +0100 Message-Id: <1582631466-13880-53-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-54-imammedo@redhat.com> --- hw/mips/mips_jazz.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c index 66fd4d8..85d49cf 100644 --- a/hw/mips/mips_jazz.c +++ b/hw/mips/mips_jazz.c @@ -159,7 +159,6 @@ static void mips_jazz_init(MachineState *machine, ISABus *isa_bus; ISADevice *pit; DriveInfo *fds[MAX_FD]; - MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *bios = g_new(MemoryRegion, 1); MemoryRegion *bios2 = g_new(MemoryRegion, 1); SysBusESPState *sysbus_esp; @@ -191,9 +190,7 @@ static void mips_jazz_init(MachineState *machine, cc->do_transaction_failed = mips_jazz_do_transaction_failed; /* allocate RAM */ - memory_region_allocate_system_memory(ram, NULL, "mips_jazz.ram", - machine->ram_size); - memory_region_add_subregion(address_space, 0, ram); + memory_region_add_subregion(address_space, 0, machine->ram); memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE, &error_fatal); @@ -393,6 +390,7 @@ static void mips_magnum_class_init(ObjectClass *oc, void *data) mc->init = mips_magnum_init; mc->block_default_type = IF_SCSI; mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000"); + mc->default_ram_id = "mips_jazz.ram"; } static const TypeInfo mips_magnum_type = { @@ -409,6 +407,7 @@ static void mips_pica61_class_init(ObjectClass *oc, void *data) mc->init = mips_pica61_init; mc->block_default_type = IF_SCSI; mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000"); + mc->default_ram_id = "mips_jazz.ram"; } static const TypeInfo mips_pica61_type = { From patchwork Tue Feb 25 11:49:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403495 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C6977138D for ; Tue, 25 Feb 2020 12:26:49 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9CCBE218AC for ; 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Tue, 25 Feb 2020 03:51:55 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 054/136] mips/mips_jazz: add max ram size check Date: Tue, 25 Feb 2020 12:49:44 +0100 Message-Id: <1582631466-13880-54-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::432 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov error out in case user asked for more RAM than board supports. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daude Message-Id: <20200219160953.13771-55-imammedo@redhat.com> --- hw/mips/mips_jazz.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c index 85d49cf..32fbd10 100644 --- a/hw/mips/mips_jazz.c +++ b/hw/mips/mips_jazz.c @@ -164,6 +164,11 @@ static void mips_jazz_init(MachineState *machine, SysBusESPState *sysbus_esp; ESPState *esp; + if (machine->ram_size > 256 * MiB) { + error_report("RAM size more than 256Mb is not supported"); + exit(EXIT_FAILURE); + } + /* init CPUs */ cpu = MIPS_CPU(cpu_create(machine->cpu_type)); env = &cpu->env; From patchwork Tue Feb 25 11:49:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403445 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4DAFA1580 for ; Tue, 25 Feb 2020 12:14:28 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2464B2084E for ; Tue, 25 Feb 2020 12:14:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OPUFux5c" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2464B2084E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:53862 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Z6Z-0006wr-AI for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 07:14:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:49615) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Ykx-00011l-9B for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6Ykv-000874-FG for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:07 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]:37953) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6Yks-00082P-17 for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:03 -0500 Received: by mail-wr1-x42a.google.com with SMTP id e8so14378466wrm.5 for ; Tue, 25 Feb 2020 03:51:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DXcrkMulYBuIN9veoeEc1n9tUNB7/w0gJTwitHoD+/c=; b=OPUFux5cMxoYslarEUR8NsrhIl7VbXm3F1lA9vlBkvraHiPqha7lsDenxv5FsKYw2j jrxe1Wnpj5zB/Q+RnGCk1bQz6Q1BH0EihyGE000wSsLgL/+zKqgxKFu9xn1e1zoaXUyq JQ00UjQgId9HCnw6VC+jAdg9u4qxBbf8apS03tqmt30h2dbHwJ4MEWZcVS4VcJlnopqO okd8Ja5z5zYSLVgK5s66cvxFdz2FhFgRHIexdg3thWBwV0TbL7jQstxPkACROP1y7Foh 8PgRQ5JUS1swv52eRTrckBh1lw1rQCp7UfBr+vXYZfKWrbjQmNK32z3bFQ81x4i/g8Ox bNbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=DXcrkMulYBuIN9veoeEc1n9tUNB7/w0gJTwitHoD+/c=; b=XFO8uL0l/xfWiR8ig5G0KZ2rr5kEwhH66g+d6jGcCsEJFcLXfdeZbLPTzVnju75Mfx IdeJ9cSdWyDUV4+Gbnhpd42uv9rhgtEdW88/lvfa405diGrcRuPuA32U+nU4GJgEkNXo tnS1r+c97J2sNZ+nPtnKNXPztz66jE+buuGAY2/Jd6K8+CLtgjapJhks9Q22xZcZiWhL 01khCXiDTLZUq8xixUHLb959wAWtPRj9kvUPtgGzwQoC8yRn3u8DaSIciTwvH18Vntp6 cStCteXnrgkWL/bIDH9OmlmPeBJsfMId2uxyIwx5kenFuZedI4QZw+U7voKH+jFdbKPu pUIQ== X-Gm-Message-State: APjAAAUdijIQfv3OcVicxdawfhAmv5RvGIraGJH3nnvVm3KTYXrRkxXN 2tYTAlqsbaagEPhU+FjuG4AVGMHA X-Google-Smtp-Source: APXvYqxv8yWqD8R4BDhBYXHwVXhT/wKyuicBEM8sVMkButlgVSmeF1tb0iVlKuNR9PmY1z1jxAYCyw== X-Received: by 2002:adf:bbcf:: with SMTP id z15mr73757441wrg.266.1582631517175; Tue, 25 Feb 2020 03:51:57 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.51.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:51:56 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 055/136] mips/mips_malta: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:45 +0100 Message-Id: <1582631466-13880-55-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-56-imammedo@redhat.com> --- hw/mips/mips_malta.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 34b76bb..6e7ba92 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1224,7 +1224,6 @@ void mips_malta_init(MachineState *machine) char *filename; PFlashCFI01 *fl; MemoryRegion *system_memory = get_system_memory(); - MemoryRegion *ram_high = g_new(MemoryRegion, 1); MemoryRegion *ram_low_preio = g_new(MemoryRegion, 1); MemoryRegion *ram_low_postio; MemoryRegion *bios, *bios_copy = g_new(MemoryRegion, 1); @@ -1262,13 +1261,11 @@ void mips_malta_init(MachineState *machine) } /* register RAM at high address where it is undisturbed by IO */ - memory_region_allocate_system_memory(ram_high, NULL, "mips_malta.ram", - ram_size); - memory_region_add_subregion(system_memory, 0x80000000, ram_high); + memory_region_add_subregion(system_memory, 0x80000000, machine->ram); /* alias for pre IO hole access */ memory_region_init_alias(ram_low_preio, NULL, "mips_malta_low_preio.ram", - ram_high, 0, MIN(ram_size, 256 * MiB)); + machine->ram, 0, MIN(ram_size, 256 * MiB)); memory_region_add_subregion(system_memory, 0, ram_low_preio); /* alias for post IO hole access, if there is enough RAM */ @@ -1276,7 +1273,7 @@ void mips_malta_init(MachineState *machine) ram_low_postio = g_new(MemoryRegion, 1); memory_region_init_alias(ram_low_postio, NULL, "mips_malta_low_postio.ram", - ram_high, 512 * MiB, + machine->ram, 512 * MiB, ram_size - 512 * MiB); memory_region_add_subregion(system_memory, 512 * MiB, ram_low_postio); @@ -1448,6 +1445,7 @@ static void mips_malta_machine_init(MachineClass *mc) #else mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf"); #endif + mc->default_ram_id = "mips_malta.ram"; } DEFINE_MACHINE("malta", mips_malta_machine_init) From patchwork Tue Feb 25 11:49:46 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 03:51:57 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 056/136] mips/mips_mipssim: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:46 +0100 Message-Id: <1582631466-13880-56-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-57-imammedo@redhat.com> --- hw/mips/mips_mipssim.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index b934ca9..b2555dd 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -143,14 +143,12 @@ static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd) static void mips_mipssim_init(MachineState *machine) { - ram_addr_t ram_size = machine->ram_size; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; char *filename; MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *isa = g_new(MemoryRegion, 1); - MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *bios = g_new(MemoryRegion, 1); MIPSCPU *cpu; CPUMIPSState *env; @@ -167,13 +165,11 @@ mips_mipssim_init(MachineState *machine) qemu_register_reset(main_cpu_reset, reset_info); /* Allocate RAM. */ - memory_region_allocate_system_memory(ram, NULL, "mips_mipssim.ram", - ram_size); memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE, &error_fatal); memory_region_set_readonly(bios, true); - memory_region_add_subregion(address_space_mem, 0, ram); + memory_region_add_subregion(address_space_mem, 0, machine->ram); /* Map the BIOS / boot exception handler. */ memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); @@ -200,7 +196,7 @@ mips_mipssim_init(MachineState *machine) } if (kernel_filename) { - loaderparams.ram_size = ram_size; + loaderparams.ram_size = machine->ram_size; loaderparams.kernel_filename = kernel_filename; loaderparams.kernel_cmdline = kernel_cmdline; loaderparams.initrd_filename = initrd_filename; @@ -245,6 +241,7 @@ static void mips_mipssim_machine_init(MachineClass *mc) #else mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf"); #endif + mc->default_ram_id = "mips_mipssim.ram"; } DEFINE_MACHINE("mipssim", mips_mipssim_machine_init) From patchwork Tue Feb 25 11:49:47 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 03:51:58 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 057/136] mips/mips_r4k: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:47 +0100 Message-Id: <1582631466-13880-57-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::432 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-58-imammedo@redhat.com> --- hw/mips/mips_r4k.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c index b2aec43..258cd91 100644 --- a/hw/mips/mips_r4k.c +++ b/hw/mips/mips_r4k.c @@ -171,13 +171,11 @@ static const int sector_len = 32 * KiB; static void mips_r4k_init(MachineState *machine) { - ram_addr_t ram_size = machine->ram_size; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; char *filename; MemoryRegion *address_space_mem = get_system_memory(); - MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *bios; MemoryRegion *iomem = g_new(MemoryRegion, 1); MemoryRegion *isa_io = g_new(MemoryRegion, 1); @@ -203,14 +201,12 @@ void mips_r4k_init(MachineState *machine) qemu_register_reset(main_cpu_reset, reset_info); /* allocate RAM */ - if (ram_size > 256 * MiB) { + if (machine->ram_size > 256 * MiB) { error_report("Too much memory for this machine: %" PRId64 "MB," " maximum 256MB", ram_size / MiB); exit(1); } - memory_region_allocate_system_memory(ram, NULL, "mips_r4k.ram", ram_size); - - memory_region_add_subregion(address_space_mem, 0, ram); + memory_region_add_subregion(address_space_mem, 0, machine->ram); memory_region_init_io(iomem, NULL, &mips_qemu_ops, NULL, "mips-qemu", 0x10000); @@ -261,7 +257,7 @@ void mips_r4k_init(MachineState *machine) g_free(filename); if (kernel_filename) { - loaderparams.ram_size = ram_size; + loaderparams.ram_size = machine->ram_size; loaderparams.kernel_filename = kernel_filename; loaderparams.kernel_cmdline = kernel_cmdline; loaderparams.initrd_filename = initrd_filename; @@ -316,7 +312,7 @@ static void mips_machine_init(MachineClass *mc) #else mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf"); #endif - + mc->default_ram_id = "mips_r4k.ram"; } DEFINE_MACHINE("mips", mips_machine_init) From patchwork Tue Feb 25 11:49:48 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 03:51:59 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 058/136] ppc/e500: drop RAM size fixup Date: Tue, 25 Feb 2020 12:49:48 +0100 Message-Id: <1582631466-13880-58-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42b X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov If user provided non-sense RAM size, board will complain and continue running with max RAM size supported. Also RAM is going to be allocated by generic code, so it won't be possible for board to fix things up for user. Make it error message and exit to force user fix CLI, instead of accepting non-sense CLI values. While at it, replace usage of global ram_size with machine->ram_size Signed-off-by: Igor Mammedov Acked-by: David Gibson Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-59-imammedo@redhat.com> --- hw/ppc/e500.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 886442e..960024b 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -906,12 +906,14 @@ void ppce500_init(MachineState *machine) env = firstenv; - /* Fixup Memory size on a alignment boundary */ - ram_size &= ~(RAM_SIZES_ALIGN - 1); - machine->ram_size = ram_size; + if (!QEMU_IS_ALIGNED(machine->ram_size, RAM_SIZES_ALIGN)) { + error_report("RAM size must be multiple of %" PRIu64, RAM_SIZES_ALIGN); + exit(EXIT_FAILURE); + } /* Register Memory */ - memory_region_allocate_system_memory(ram, NULL, "mpc8544ds.ram", ram_size); + memory_region_allocate_system_memory(ram, NULL, "mpc8544ds.ram", + machine->ram_size); memory_region_add_subregion(address_space_mem, 0, ram); dev = qdev_create(NULL, "e500-ccsr"); @@ -1083,7 +1085,7 @@ void ppce500_init(MachineState *machine) kernel_base = cur_base; kernel_size = load_image_targphys(machine->kernel_filename, cur_base, - ram_size - cur_base); + machine->ram_size - cur_base); if (kernel_size < 0) { error_report("could not load kernel '%s'", machine->kernel_filename); @@ -1097,7 +1099,7 @@ void ppce500_init(MachineState *machine) if (machine->initrd_filename) { initrd_base = (cur_base + INITRD_LOAD_PAD) & ~INITRD_PAD_MASK; initrd_size = load_image_targphys(machine->initrd_filename, initrd_base, - ram_size - initrd_base); + machine->ram_size - initrd_base); if (initrd_size < 0) { error_report("could not load initial ram disk '%s'", @@ -1115,7 +1117,7 @@ void ppce500_init(MachineState *machine) * ensures enough space between kernel and initrd. */ dt_base = (loadaddr + payload_size + DTC_LOAD_PAD) & ~DTC_PAD_MASK; - if (dt_base + DTB_MAX_SIZE > ram_size) { + if (dt_base + DTB_MAX_SIZE > machine->ram_size) { error_report("not enough memory for device tree"); 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Tue, 25 Feb 2020 03:52:00 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.51.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:51:59 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 059/136] ppc/e500: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:49 +0100 Message-Id: <1582631466-13880-59-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Acked-by: David Gibson Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-60-imammedo@redhat.com> --- hw/ppc/e500.c | 5 +---- hw/ppc/e500plat.c | 1 + hw/ppc/mpc8544ds.c | 1 + 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 960024b..d5dfe9f 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -831,7 +831,6 @@ static void ppce500_power_off(void *opaque, int line, int on) void ppce500_init(MachineState *machine) { MemoryRegion *address_space_mem = get_system_memory(); - MemoryRegion *ram = g_new(MemoryRegion, 1); PPCE500MachineState *pms = PPCE500_MACHINE(machine); const PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(machine); PCIBus *pci_bus; @@ -912,9 +911,7 @@ void ppce500_init(MachineState *machine) } /* Register Memory */ - memory_region_allocate_system_memory(ram, NULL, "mpc8544ds.ram", - machine->ram_size); - memory_region_add_subregion(address_space_mem, 0, ram); + memory_region_add_subregion(address_space_mem, 0, machine->ram); dev = qdev_create(NULL, "e500-ccsr"); object_property_add_child(qdev_get_machine(), "e500-ccsr", diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c index 7078386..bddd5e7 100644 --- a/hw/ppc/e500plat.c +++ b/hw/ppc/e500plat.c @@ -97,6 +97,7 @@ static void e500plat_machine_class_init(ObjectClass *oc, void *data) mc->init = e500plat_init; mc->max_cpus = 32; mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30"); + mc->default_ram_id = "mpc8544ds.ram"; machine_class_allow_dynamic_sysbus_dev(mc, TYPE_ETSEC_COMMON); } diff --git a/hw/ppc/mpc8544ds.c b/hw/ppc/mpc8544ds.c index c2c5e11..8117750 100644 --- a/hw/ppc/mpc8544ds.c +++ b/hw/ppc/mpc8544ds.c @@ -55,6 +55,7 @@ static void e500plat_machine_class_init(ObjectClass *oc, void *data) mc->init = mpc8544ds_init; mc->max_cpus = 15; mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30"); + mc->default_ram_id = "mpc8544ds.ram"; } #define TYPE_MPC8544DS_MACHINE MACHINE_TYPE_NAME("mpc8544ds") From patchwork Tue Feb 25 11:49:50 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 03:52:00 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 060/136] ppc/mac_newworld: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:50 +0100 Message-Id: <1582631466-13880-60-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::331 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Acked-by: David Gibson Acked-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-61-imammedo@redhat.com> --- hw/ppc/mac_newworld.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 464d012..b8189bf 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -118,7 +118,7 @@ static void ppc_core99_init(MachineState *machine) char *filename; IrqLines *openpic_irqs; int linux_boot, i, j, k; - MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1); + MemoryRegion *bios = g_new(MemoryRegion, 1); hwaddr kernel_base, initrd_base, cmdline_base = 0; long kernel_size, initrd_size; UNINHostState *uninorth_pci; @@ -152,8 +152,7 @@ static void ppc_core99_init(MachineState *machine) } /* allocate RAM */ - memory_region_allocate_system_memory(ram, NULL, "ppc_core99.ram", ram_size); - memory_region_add_subregion(get_system_memory(), 0, ram); + memory_region_add_subregion(get_system_memory(), 0, machine->ram); /* allocate and load BIOS */ memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE, @@ -586,6 +585,7 @@ static void core99_machine_class_init(ObjectClass *oc, void *data) #else mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9"); #endif + mc->default_ram_id = "ppc_core99.ram"; mc->ignore_boot_device_suffixes = true; fwc->get_dev_path = core99_fw_dev_path; } From patchwork Tue Feb 25 11:49:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403471 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3A4B114E3 for ; Tue, 25 Feb 2020 12:20:22 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 100F3218AC for ; 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Tue, 25 Feb 2020 03:52:01 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 061/136] ppc/mac_oldworld: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:51 +0100 Message-Id: <1582631466-13880-61-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Acked-by: David Gibson Acked-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-62-imammedo@redhat.com> --- hw/ppc/mac_oldworld.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 7318d7e..66e434b 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -91,7 +91,6 @@ static void ppc_heathrow_init(MachineState *machine) CPUPPCState *env = NULL; char *filename; int linux_boot, i; - MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *bios = g_new(MemoryRegion, 1); uint32_t kernel_base, initrd_base, cmdline_base = 0; int32_t kernel_size, initrd_size; @@ -127,9 +126,7 @@ static void ppc_heathrow_init(MachineState *machine) exit(1); } - memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram", - ram_size); - memory_region_add_subregion(sysmem, 0, ram); + memory_region_add_subregion(sysmem, 0, machine->ram); /* allocate and load BIOS */ memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE, @@ -446,6 +443,7 @@ static void heathrow_class_init(ObjectClass *oc, void *data) mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1"); mc->default_display = "std"; mc->ignore_boot_device_suffixes = true; + mc->default_ram_id = "ppc_heathrow.ram"; fwc->get_dev_path = heathrow_fw_dev_path; } From patchwork Tue Feb 25 11:49:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403475 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3D43614E3 for ; Tue, 25 Feb 2020 12:21:58 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 13B7520CC7 for ; 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Tue, 25 Feb 2020 03:52:02 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 062/136] ppc/pnv: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:52 +0100 Message-Id: <1582631466-13880-62-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32b X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Acked-by: David Gibson Reviewed-by: Cédric Le Goater Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-63-imammedo@redhat.com> --- hw/ppc/pnv.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 139c857..ea20a1d 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -690,7 +690,6 @@ static void pnv_init(MachineState *machine) { PnvMachineState *pnv = PNV_MACHINE(machine); MachineClass *mc = MACHINE_GET_CLASS(machine); - MemoryRegion *ram; char *fw_filename; long fw_size; int i; @@ -702,11 +701,7 @@ static void pnv_init(MachineState *machine) if (machine->ram_size < (1 * GiB)) { warn_report("skiboot may not work with < 1GB of RAM"); } - - ram = g_new(MemoryRegion, 1); - memory_region_allocate_system_memory(ram, NULL, "pnv.ram", - machine->ram_size); - memory_region_add_subregion(get_system_memory(), 0, ram); + memory_region_add_subregion(get_system_memory(), 0, machine->ram); /* * Create our simple PNOR device @@ -1976,6 +1971,7 @@ static void pnv_machine_class_init(ObjectClass *oc, void *data) * enough to fit the maximum initrd size at it's load address */ mc->default_ram_size = INITRD_LOAD_ADDR + INITRD_MAX_SIZE; + mc->default_ram_id = "pnv.ram"; ispc->print_info = pnv_pic_print_info; object_class_property_add_bool(oc, "hb-mode", From patchwork Tue Feb 25 11:49:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403517 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E2E2913A4 for ; Tue, 25 Feb 2020 12:30:41 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BA2CF20CC7 for ; Tue, 25 Feb 2020 12:30:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="jGvlDvA6" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BA2CF20CC7 Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:52:03 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:03 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 063/136] ppc/ppc405_boards: add RAM size checks Date: Tue, 25 Feb 2020 12:49:53 +0100 Message-Id: <1582631466-13880-63-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::434 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov If user provided non-sense RAM size, board will ignore it and continue running with fixed RAM size. Also RAM is going to be allocated by generic code, so it won't be possible for board to fix CLI. Make it error message and exit to force user fix CLI, instead of accepting non-sense CLI values. PS: move fixed RAM size into mc->default_ram_size, so that generic code will know how much to allocate. Signed-off-by: Igor Mammedov Acked-by: David Gibson Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-64-imammedo@redhat.com> --- hw/ppc/ppc405_boards.c | 39 ++++++++++++++++++++++++++------------- 1 file changed, 26 insertions(+), 13 deletions(-) diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index 1f721fe..057882a 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -40,6 +40,7 @@ #include "qemu/error-report.h" #include "hw/loader.h" #include "exec/address-spaces.h" +#include "qemu/cutils.h" #define BIOS_FILENAME "ppc405_rom.bin" #define BIOS_SIZE (2 * MiB) @@ -137,7 +138,7 @@ static void ref405ep_fpga_init(MemoryRegion *sysmem, uint32_t base) static void ref405ep_init(MachineState *machine) { - ram_addr_t ram_size = machine->ram_size; + MachineClass *mc = MACHINE_GET_CLASS(machine); const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; @@ -161,15 +162,21 @@ static void ref405ep_init(MachineState *machine) DriveInfo *dinfo; MemoryRegion *sysmem = get_system_memory(); + if (machine->ram_size != mc->default_ram_size) { + char *sz = size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); + } + /* XXX: fix this */ memory_region_allocate_system_memory(&ram_memories[0], NULL, "ef405ep.ram", - 0x08000000); + machine->ram_size); ram_bases[0] = 0; - ram_sizes[0] = 0x08000000; + ram_sizes[0] = machine->ram_size; memory_region_init(&ram_memories[1], NULL, "ef405ep.ram1", 0); ram_bases[1] = 0x00000000; ram_sizes[1] = 0x00000000; - ram_size = 128 * MiB; env = ppc405ep_init(sysmem, ram_memories, ram_bases, ram_sizes, 33333333, &pic, kernel_filename == NULL ? 0 : 1); /* allocate SRAM */ @@ -227,7 +234,7 @@ static void ref405ep_init(MachineState *machine) if (linux_boot) { memset(&bd, 0, sizeof(bd)); bd.bi_memstart = 0x00000000; - bd.bi_memsize = ram_size; + bd.bi_memsize = machine->ram_size; bd.bi_flashstart = -bios_size; bd.bi_flashsize = -bios_size; bd.bi_flashoffset = 0; @@ -255,7 +262,7 @@ static void ref405ep_init(MachineState *machine) kernel_base = KERNEL_LOAD_ADDR; /* now we can load the kernel */ kernel_size = load_image_targphys(kernel_filename, kernel_base, - ram_size - kernel_base); + machine->ram_size - kernel_base); if (kernel_size < 0) { error_report("could not load kernel '%s'", kernel_filename); exit(1); @@ -266,7 +273,7 @@ static void ref405ep_init(MachineState *machine) if (initrd_filename) { initrd_base = INITRD_LOAD_ADDR; initrd_size = load_image_targphys(initrd_filename, initrd_base, - ram_size - initrd_base); + machine->ram_size - initrd_base); if (initrd_size < 0) { error_report("could not load initial ram disk '%s'", initrd_filename); @@ -304,6 +311,7 @@ static void ref405ep_class_init(ObjectClass *oc, void *data) mc->desc = "ref405ep"; mc->init = ref405ep_init; + mc->default_ram_size = 0x08000000; } static const TypeInfo ref405ep_type = { @@ -408,7 +416,7 @@ static void taihu_cpld_init(MemoryRegion *sysmem, uint32_t base) static void taihu_405ep_init(MachineState *machine) { - ram_addr_t ram_size = machine->ram_size; + MachineClass *mc = MACHINE_GET_CLASS(machine); const char *kernel_filename = machine->kernel_filename; const char *initrd_filename = machine->initrd_filename; char *filename; @@ -425,10 +433,14 @@ static void taihu_405ep_init(MachineState *machine) int fl_idx; DriveInfo *dinfo; - /* RAM is soldered to the board so the size cannot be changed */ - ram_size = 0x08000000; + if (machine->ram_size != mc->default_ram_size) { + char *sz = size_to_str(mc->default_ram_size); + error_report("Invalid RAM size, should be %s", sz); + g_free(sz); + exit(EXIT_FAILURE); + } memory_region_allocate_system_memory(ram, NULL, "taihu_405ep.ram", - ram_size); + machine->ram_size); ram_bases[0] = 0; ram_sizes[0] = 0x04000000; @@ -500,7 +512,7 @@ static void taihu_405ep_init(MachineState *machine) kernel_base = KERNEL_LOAD_ADDR; /* now we can load the kernel */ kernel_size = load_image_targphys(kernel_filename, kernel_base, - ram_size - kernel_base); + machine->ram_size - kernel_base); if (kernel_size < 0) { error_report("could not load kernel '%s'", kernel_filename); exit(1); @@ -509,7 +521,7 @@ static void taihu_405ep_init(MachineState *machine) if (initrd_filename) { initrd_base = INITRD_LOAD_ADDR; initrd_size = load_image_targphys(initrd_filename, initrd_base, - ram_size - initrd_base); + machine->ram_size - initrd_base); if (initrd_size < 0) { error_report("could not load initial ram disk '%s'", initrd_filename); @@ -533,6 +545,7 @@ static void taihu_class_init(ObjectClass *oc, void *data) mc->desc = "taihu"; mc->init = taihu_405ep_init; + mc->default_ram_size = 0x08000000; } static const TypeInfo taihu_type = { From patchwork Tue Feb 25 11:49:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403529 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4E27917D5 for ; Tue, 25 Feb 2020 12:34:27 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 24685222C2 for ; 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Tue, 25 Feb 2020 03:52:04 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 064/136] ppc/ppc405_boards: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:54 +0100 Message-Id: <1582631466-13880-64-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::335 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. PS: in ref405ep alias RAM into ram_memories[] to avoid re-factoring its user ppc405ep_init(), which would be invasive and out of scope this patch. Signed-off-by: Igor Mammedov Acked-by: David Gibson Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-65-imammedo@redhat.com> --- hw/ppc/ppc405_boards.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index 057882a..de93c40 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -170,8 +170,8 @@ static void ref405ep_init(MachineState *machine) } /* XXX: fix this */ - memory_region_allocate_system_memory(&ram_memories[0], NULL, "ef405ep.ram", - machine->ram_size); + memory_region_init_alias(&ram_memories[0], NULL, "ef405ep.ram.alias", + machine->ram, 0, machine->ram_size); ram_bases[0] = 0; ram_sizes[0] = machine->ram_size; memory_region_init(&ram_memories[1], NULL, "ef405ep.ram1", 0); @@ -312,6 +312,7 @@ static void ref405ep_class_init(ObjectClass *oc, void *data) mc->desc = "ref405ep"; mc->init = ref405ep_init; mc->default_ram_size = 0x08000000; + mc->default_ram_id = "ef405ep.ram"; } static const TypeInfo ref405ep_type = { @@ -424,7 +425,6 @@ static void taihu_405ep_init(MachineState *machine) MemoryRegion *sysmem = get_system_memory(); MemoryRegion *bios; MemoryRegion *ram_memories = g_new(MemoryRegion, 2); - MemoryRegion *ram = g_malloc0(sizeof(*ram)); hwaddr ram_bases[2], ram_sizes[2]; long bios_size; target_ulong kernel_base, initrd_base; @@ -439,18 +439,16 @@ static void taihu_405ep_init(MachineState *machine) g_free(sz); exit(EXIT_FAILURE); } - memory_region_allocate_system_memory(ram, NULL, "taihu_405ep.ram", - machine->ram_size); ram_bases[0] = 0; ram_sizes[0] = 0x04000000; memory_region_init_alias(&ram_memories[0], NULL, - "taihu_405ep.ram-0", ram, ram_bases[0], + "taihu_405ep.ram-0", machine->ram, ram_bases[0], ram_sizes[0]); ram_bases[1] = 0x04000000; ram_sizes[1] = 0x04000000; memory_region_init_alias(&ram_memories[1], NULL, - "taihu_405ep.ram-1", ram, ram_bases[1], + "taihu_405ep.ram-1", machine->ram, ram_bases[1], ram_sizes[1]); ppc405ep_init(sysmem, ram_memories, ram_bases, ram_sizes, 33333333, &pic, kernel_filename == NULL ? 0 : 1); @@ -546,6 +544,7 @@ static void taihu_class_init(ObjectClass *oc, void *data) mc->desc = "taihu"; mc->init = taihu_405ep_init; mc->default_ram_size = 0x08000000; + mc->default_ram_id = "taihu_405ep.ram"; } static const TypeInfo taihu_type = { From patchwork Tue Feb 25 11:49:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403489 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 15B6614E3 for ; Tue, 25 Feb 2020 12:25:34 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E0CBA20CC7 for ; Tue, 25 Feb 2020 12:25:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Z+9OLVgh" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E0CBA20CC7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:54074 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6ZHJ-0002eF-1V for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 07:25:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:49797) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Yl4-0001Hw-4n for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6Ykz-0008G8-7d for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:13 -0500 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]:46195) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6Ykx-00087m-Bi for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:08 -0500 Received: by mail-wr1-x42f.google.com with SMTP id j7so1846097wrp.13 for ; Tue, 25 Feb 2020 03:52:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=Wy/hTC4M53RG4GlPKERaNnkC2pTRYgWJEWTsrSUSxck=; b=Z+9OLVghDkpvvdM0t9+uMSrKXuYjdRZk/DL3ds5LwqaDRUl4zCJLcUtmpGkIgFr4tm Aob9DnqkuLd3DrWwukuOn8+puhzc+Sww6rxvjAhP1qZPMwdi0IG4xPrFJs/GNdYlAK9Z kW12KM6irqLlC9C/Bl7mN5QcAvhsn/yh1l9MxfqaZrHYFJCoxD/DjleQx9KbmK382a7P TwIZMxoGkkK+boHDuSGoGeXwU9t8dwFxQM5gsBN+4xnr8DWVZCjgxYGfO6RD0d2N8mj5 lw1IR+4eXi7JXFi0isUPXw2by7a+Bqu7OpRuR3Opl8cjiFcI1DQs3NqR/UEI/SKZerlF Hv0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=Wy/hTC4M53RG4GlPKERaNnkC2pTRYgWJEWTsrSUSxck=; b=qDeSiRlrmawDxYlu7sOJigniQsgbhArzhzv1+pI20GI3emmiTNpgAxFs07+cXvhOLt F4RCZVRlhxeq6l8t0bNm/pGOkLEnAXBFvL+EvRzmFc/2VJFHFYRpR9XX/1ZvoAAqU47J Fb+1GuHpVPqdJdt993bAgQYzIIhx7C+NILzM9So3LetoBngo3UvCDYFDGz1GaFyKFO+4 fozyj/99vhsTdg3MU97vGlYlUgTdK4Y4ZVe0EZRRcsb+QXunKZX26zLgU+eQf07pqyt2 hbxpttXUgVPc5kG/ewhq0rwNdXClrC8wu9Dk2BvqSbJn2PAsaNCJ2f7KQUoSKsNyvrct lqyQ== X-Gm-Message-State: APjAAAXxjE0z4NMUy/szswlkgwBfm7cfSqDB9nOynhtmn/tKmAw6gb9L zA/N/GCBkSgscGSGIOBccvg9t25o X-Google-Smtp-Source: APXvYqyDJYBE4Xlo0dpWYSzhRGfa/ledJf5xwhUW3Z2+0ndgRsa6msEzoZSlAO5Nbz9ax7Sij0kpTg== X-Received: by 2002:a5d:4687:: with SMTP id u7mr70255021wrq.176.1582631525819; Tue, 25 Feb 2020 03:52:05 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:05 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 065/136] ppc/{ppc440_bamboo, sam460ex}: drop RAM size fixup Date: Tue, 25 Feb 2020 12:49:55 +0100 Message-Id: <1582631466-13880-65-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov If user provided non-sense RAM size, board will complain and continue running with max RAM size supported or sometimes crash like this: %QEMU -M bamboo -m 1 exec.c:1926: find_ram_offset: Assertion `size != 0' failed. Aborted (core dumped) Also RAM is going to be allocated by generic code, so it won't be possible for board to fix things up for user. Make it error message and exit to force user fix CLI, instead of accepting non-sense CLI values. That also fixes crash issue, since wrongly calculated size isn't used to allocate RAM Signed-off-by: Igor Mammedov Reviewed-by: BALATON Zoltan Acked-by: David Gibson Message-Id: <20200219160953.13771-66-imammedo@redhat.com> --- hw/ppc/ppc440_bamboo.c | 11 ++++----- hw/ppc/ppc4xx_devs.c | 60 ++++++++++++++++++++++++++----------------------- hw/ppc/sam460ex.c | 5 ++--- include/hw/ppc/ppc4xx.h | 9 ++++---- 4 files changed, 42 insertions(+), 43 deletions(-) diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c index da777ef..7e3bc0e 100644 --- a/hw/ppc/ppc440_bamboo.c +++ b/hw/ppc/ppc440_bamboo.c @@ -158,7 +158,6 @@ static void main_cpu_reset(void *opaque) static void bamboo_init(MachineState *machine) { - ram_addr_t ram_size = machine->ram_size; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; @@ -203,10 +202,8 @@ static void bamboo_init(MachineState *machine) /* SDRAM controller */ memset(ram_bases, 0, sizeof(ram_bases)); memset(ram_sizes, 0, sizeof(ram_sizes)); - ram_size = ppc4xx_sdram_adjust(ram_size, PPC440EP_SDRAM_NR_BANKS, - ram_memories, - ram_bases, ram_sizes, - ppc440ep_sdram_bank_sizes); + ppc4xx_sdram_banks(machine->ram_size, PPC440EP_SDRAM_NR_BANKS, ram_memories, + ram_bases, ram_sizes, ppc440ep_sdram_bank_sizes); /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */ ppc4xx_sdram_init(env, pic[14], PPC440EP_SDRAM_NR_BANKS, ram_memories, ram_bases, ram_sizes, 1); @@ -268,7 +265,7 @@ static void bamboo_init(MachineState *machine) /* Load initrd. */ if (initrd_filename) { initrd_size = load_image_targphys(initrd_filename, RAMDISK_ADDR, - ram_size - RAMDISK_ADDR); + machine->ram_size - RAMDISK_ADDR); if (initrd_size < 0) { error_report("could not load ram disk '%s' at %x", @@ -279,7 +276,7 @@ static void bamboo_init(MachineState *machine) /* If we're loading a kernel directly, we must load the device tree too. */ if (kernel_filename) { - if (bamboo_load_device_tree(FDT_ADDR, ram_size, RAMDISK_ADDR, + if (bamboo_load_device_tree(FDT_ADDR, machine->ram_size, RAMDISK_ADDR, initrd_size, kernel_cmdline) < 0) { error_report("couldn't load device tree"); exit(1); diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c index c2e5013..d89008a 100644 --- a/hw/ppc/ppc4xx_devs.c +++ b/hw/ppc/ppc4xx_devs.c @@ -668,21 +668,22 @@ void ppc4xx_sdram_init (CPUPPCState *env, qemu_irq irq, int nbanks, /* Fill in consecutive SDRAM banks with 'ram_size' bytes of memory. * - * sdram_bank_sizes[] must be 0-terminated. + * sdram_bank_sizes[] must be in descending order, that is sizes[i] > sizes[i+1] + * and must be 0-terminated. * * The 4xx SDRAM controller supports a small number of banks, and each bank * must be one of a small set of sizes. The number of banks and the supported * sizes varies by SoC. */ -ram_addr_t ppc4xx_sdram_adjust(ram_addr_t ram_size, int nr_banks, - MemoryRegion ram_memories[], - hwaddr ram_bases[], - hwaddr ram_sizes[], - const ram_addr_t sdram_bank_sizes[]) +void ppc4xx_sdram_banks(ram_addr_t ram_size, int nr_banks, + MemoryRegion ram_memories[], + hwaddr ram_bases[], hwaddr ram_sizes[], + const ram_addr_t sdram_bank_sizes[]) { MemoryRegion *ram = g_malloc0(sizeof(*ram)); ram_addr_t size_left = ram_size; ram_addr_t base = 0; ram_addr_t bank_size; + int last_bank = 0; int i; int j; @@ -690,7 +691,12 @@ ram_addr_t ppc4xx_sdram_adjust(ram_addr_t ram_size, int nr_banks, for (j = 0; sdram_bank_sizes[j] != 0; j++) { bank_size = sdram_bank_sizes[j]; if (bank_size <= size_left) { + ram_bases[i] = base; + ram_sizes[i] = bank_size; + base += bank_size; size_left -= bank_size; + last_bank = i; + break; } } if (!size_left) { @@ -699,34 +705,32 @@ ram_addr_t ppc4xx_sdram_adjust(ram_addr_t ram_size, int nr_banks, } } - ram_size -= size_left; if (size_left) { - error_report("Truncating memory to %" PRId64 " MiB to fit SDRAM" - " controller limits", ram_size / MiB); + ram_addr_t used_size = ram_size - size_left; + GString *s = g_string_new(NULL); + + for (i = 0; sdram_bank_sizes[i]; i++) { + g_string_append_printf(s, "%" PRIi64 "%s", + sdram_bank_sizes[i] / MiB, + sdram_bank_sizes[i + 1] ? " ," : ""); + } + error_report("Max %d banks of %s MB DIMM/bank supported", + nr_banks, s->str); + error_report("Possible valid RAM size: %" PRIi64, + used_size ? used_size / MiB : sdram_bank_sizes[i - 1] / MiB); + + g_string_free(s, true); + exit(EXIT_FAILURE); } memory_region_allocate_system_memory(ram, NULL, "ppc4xx.sdram", ram_size); - size_left = ram_size; - for (i = 0; i < nr_banks && size_left; i++) { - for (j = 0; sdram_bank_sizes[j] != 0; j++) { - bank_size = sdram_bank_sizes[j]; - - if (bank_size <= size_left) { - char name[32]; - snprintf(name, sizeof(name), "ppc4xx.sdram%d", i); - memory_region_init_alias(&ram_memories[i], NULL, name, ram, - base, bank_size); - ram_bases[i] = base; - ram_sizes[i] = bank_size; - base += bank_size; - size_left -= bank_size; - break; - } - } + for (i = 0; i <= last_bank; i++) { + char name[32]; + snprintf(name, sizeof(name), "ppc4xx.sdram%d", i); + memory_region_init_alias(&ram_memories[i], NULL, name, ram, + ram_bases[i], ram_sizes[i]); } - - return ram_size; } /*****************************************************************************/ diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index 89bc70e..17d40bd 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -324,9 +324,8 @@ static void sam460ex_init(MachineState *machine) /* SDRAM controller */ /* put all RAM on first bank because board has one slot * and firmware only checks that */ - machine->ram_size = ppc4xx_sdram_adjust(machine->ram_size, 1, - ram_memories, ram_bases, ram_sizes, - ppc460ex_sdram_bank_sizes); + ppc4xx_sdram_banks(machine->ram_size, 1, ram_memories, ram_bases, ram_sizes, + ppc460ex_sdram_bank_sizes); /* FIXME: does 460EX have ECC interrupts? */ ppc440_sdram_init(env, SDRAM_NR_BANKS, ram_memories, diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h index 7d82259..b8c8f32 100644 --- a/include/hw/ppc/ppc4xx.h +++ b/include/hw/ppc/ppc4xx.h @@ -42,11 +42,10 @@ enum { qemu_irq *ppcuic_init (CPUPPCState *env, qemu_irq *irqs, uint32_t dcr_base, int has_ssr, int has_vr); -ram_addr_t ppc4xx_sdram_adjust(ram_addr_t ram_size, int nr_banks, - MemoryRegion ram_memories[], - hwaddr ram_bases[], - hwaddr ram_sizes[], - const ram_addr_t sdram_bank_sizes[]); +void ppc4xx_sdram_banks(ram_addr_t ram_size, int nr_banks, + MemoryRegion ram_memories[], + hwaddr ram_bases[], hwaddr ram_sizes[], + const ram_addr_t sdram_bank_sizes[]); void ppc4xx_sdram_init (CPUPPCState *env, qemu_irq irq, int nbanks, MemoryRegion ram_memories[], From patchwork Tue Feb 25 11:49:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403497 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8B95914BC for ; Tue, 25 Feb 2020 12:27:19 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6204C20CC7 for ; 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Tue, 25 Feb 2020 03:52:06 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 066/136] ppc/{ppc440_bamboo, sam460ex}: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:56 +0100 Message-Id: <1582631466-13880-66-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::429 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: BALATON Zoltan Acked-by: David Gibson Message-Id: <20200219160953.13771-67-imammedo@redhat.com> --- hw/ppc/ppc440_bamboo.c | 3 ++- hw/ppc/ppc4xx_devs.c | 29 ++++++++++++----------------- hw/ppc/sam460ex.c | 3 ++- include/hw/ppc/ppc4xx.h | 2 +- 4 files changed, 17 insertions(+), 20 deletions(-) diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c index 7e3bc0e..4c5e9e4 100644 --- a/hw/ppc/ppc440_bamboo.c +++ b/hw/ppc/ppc440_bamboo.c @@ -202,7 +202,7 @@ static void bamboo_init(MachineState *machine) /* SDRAM controller */ memset(ram_bases, 0, sizeof(ram_bases)); memset(ram_sizes, 0, sizeof(ram_sizes)); - ppc4xx_sdram_banks(machine->ram_size, PPC440EP_SDRAM_NR_BANKS, ram_memories, + ppc4xx_sdram_banks(machine->ram, PPC440EP_SDRAM_NR_BANKS, ram_memories, ram_bases, ram_sizes, ppc440ep_sdram_bank_sizes); /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */ ppc4xx_sdram_init(env, pic[14], PPC440EP_SDRAM_NR_BANKS, ram_memories, @@ -289,6 +289,7 @@ static void bamboo_machine_init(MachineClass *mc) mc->desc = "bamboo"; mc->init = bamboo_init; mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("440epb"); + mc->default_ram_id = "ppc4xx.sdram"; } DEFINE_MACHINE("bamboo", bamboo_machine_init) diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c index d89008a..3376c43 100644 --- a/hw/ppc/ppc4xx_devs.c +++ b/hw/ppc/ppc4xx_devs.c @@ -666,24 +666,24 @@ void ppc4xx_sdram_init (CPUPPCState *env, qemu_irq irq, int nbanks, sdram_map_bcr(sdram); } -/* Fill in consecutive SDRAM banks with 'ram_size' bytes of memory. +/* + * Split RAM between SDRAM banks. * * sdram_bank_sizes[] must be in descending order, that is sizes[i] > sizes[i+1] * and must be 0-terminated. * * The 4xx SDRAM controller supports a small number of banks, and each bank * must be one of a small set of sizes. The number of banks and the supported - * sizes varies by SoC. */ -void ppc4xx_sdram_banks(ram_addr_t ram_size, int nr_banks, + * sizes varies by SoC. + */ +void ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks, MemoryRegion ram_memories[], hwaddr ram_bases[], hwaddr ram_sizes[], const ram_addr_t sdram_bank_sizes[]) { - MemoryRegion *ram = g_malloc0(sizeof(*ram)); - ram_addr_t size_left = ram_size; + ram_addr_t size_left = memory_region_size(ram); ram_addr_t base = 0; ram_addr_t bank_size; - int last_bank = 0; int i; int j; @@ -691,11 +691,15 @@ void ppc4xx_sdram_banks(ram_addr_t ram_size, int nr_banks, for (j = 0; sdram_bank_sizes[j] != 0; j++) { bank_size = sdram_bank_sizes[j]; if (bank_size <= size_left) { + char name[32]; + ram_bases[i] = base; ram_sizes[i] = bank_size; base += bank_size; size_left -= bank_size; - last_bank = i; + snprintf(name, sizeof(name), "ppc4xx.sdram%d", i); + memory_region_init_alias(&ram_memories[i], NULL, name, ram, + ram_bases[i], ram_sizes[i]); break; } } @@ -706,7 +710,7 @@ void ppc4xx_sdram_banks(ram_addr_t ram_size, int nr_banks, } if (size_left) { - ram_addr_t used_size = ram_size - size_left; + ram_addr_t used_size = memory_region_size(ram) - size_left; GString *s = g_string_new(NULL); for (i = 0; sdram_bank_sizes[i]; i++) { @@ -722,15 +726,6 @@ void ppc4xx_sdram_banks(ram_addr_t ram_size, int nr_banks, g_string_free(s, true); exit(EXIT_FAILURE); } - - memory_region_allocate_system_memory(ram, NULL, "ppc4xx.sdram", ram_size); - - for (i = 0; i <= last_bank; i++) { - char name[32]; - snprintf(name, sizeof(name), "ppc4xx.sdram%d", i); - memory_region_init_alias(&ram_memories[i], NULL, name, ram, - ram_bases[i], ram_sizes[i]); - } } /*****************************************************************************/ diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index 17d40bd..898453c 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -324,7 +324,7 @@ static void sam460ex_init(MachineState *machine) /* SDRAM controller */ /* put all RAM on first bank because board has one slot * and firmware only checks that */ - ppc4xx_sdram_banks(machine->ram_size, 1, ram_memories, ram_bases, ram_sizes, + ppc4xx_sdram_banks(machine->ram, 1, ram_memories, ram_bases, ram_sizes, ppc460ex_sdram_bank_sizes); /* FIXME: does 460EX have ECC interrupts? */ @@ -484,6 +484,7 @@ static void sam460ex_machine_init(MachineClass *mc) mc->init = sam460ex_init; mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("460exb"); mc->default_ram_size = 512 * MiB; + mc->default_ram_id = "ppc4xx.sdram"; } DEFINE_MACHINE("sam460ex", sam460ex_machine_init) diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h index b8c8f32..cc19c8d 100644 --- a/include/hw/ppc/ppc4xx.h +++ b/include/hw/ppc/ppc4xx.h @@ -42,7 +42,7 @@ enum { qemu_irq *ppcuic_init (CPUPPCState *env, qemu_irq *irqs, uint32_t dcr_base, int has_ssr, int has_vr); -void ppc4xx_sdram_banks(ram_addr_t ram_size, int nr_banks, +void ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks, MemoryRegion ram_memories[], hwaddr ram_bases[], hwaddr ram_sizes[], const ram_addr_t sdram_bank_sizes[]); From patchwork Tue Feb 25 11:49:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403523 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A4BE1138D for ; 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Tue, 25 Feb 2020 03:52:07 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 067/136] ppc/spapr: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:57 +0100 Message-Id: <1582631466-13880-67-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Acked-by: David Gibson Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-68-imammedo@redhat.com> --- hw/ppc/spapr.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index c9b2e0a..4d90f99 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2634,7 +2634,6 @@ static void spapr_machine_init(MachineState *machine) PCIHostState *phb; int i; MemoryRegion *sysmem = get_system_memory(); - MemoryRegion *ram = g_new(MemoryRegion, 1); hwaddr node0_size = spapr_node0_size(machine); long load_limit, fw_size; char *filename; @@ -2813,10 +2812,8 @@ static void spapr_machine_init(MachineState *machine) kvmppc_enable_h_page_init(); } - /* allocate RAM */ - memory_region_allocate_system_memory(ram, NULL, "ppc_spapr.ram", - machine->ram_size); - memory_region_add_subregion(sysmem, 0, ram); + /* map RAM */ + memory_region_add_subregion(sysmem, 0, machine->ram); /* always allocate the device memory information */ machine->device_memory = g_malloc0(sizeof(*machine->device_memory)); @@ -4400,6 +4397,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data) mc->no_parallel = 1; mc->default_boot_order = ""; mc->default_ram_size = 512 * MiB; + mc->default_ram_id = "ppc_spapr.ram"; mc->default_display = "std"; mc->kvm_type = spapr_kvm_type; machine_class_allow_dynamic_sysbus_dev(mc, TYPE_SPAPR_PCI_HOST_BRIDGE); From patchwork Tue Feb 25 11:49:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403509 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2BEAA138D for ; Tue, 25 Feb 2020 12:29:08 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F1A2E20CC7 for ; Tue, 25 Feb 2020 12:29:07 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:52:08 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:08 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 068/136] ppc/virtex_ml507: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:58 +0100 Message-Id: <1582631466-13880-68-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Acked-by: David Gibson Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-69-imammedo@redhat.com> --- hw/ppc/virtex_ml507.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index 91dd00e..b6f4507 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -193,7 +193,6 @@ static int xilinx_load_device_tree(hwaddr addr, static void virtex_init(MachineState *machine) { - ram_addr_t ram_size = machine->ram_size; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; hwaddr initrd_base = 0; @@ -204,7 +203,6 @@ static void virtex_init(MachineState *machine) CPUPPCState *env; hwaddr ram_base = 0; DriveInfo *dinfo; - MemoryRegion *phys_ram = g_new(MemoryRegion, 1); qemu_irq irq[32], *cpu_irq; int kernel_size; int i; @@ -221,8 +219,7 @@ static void virtex_init(MachineState *machine) qemu_register_reset(main_cpu_reset, cpu); - memory_region_allocate_system_memory(phys_ram, NULL, "ram", ram_size); - memory_region_add_subregion(address_space_mem, ram_base, phys_ram); + memory_region_add_subregion(address_space_mem, ram_base, machine->ram); dinfo = drive_get(IF_PFLASH, 0, 0); pflash_cfi01_register(PFLASH_BASEADDR, "virtex.flash", FLASH_SIZE, @@ -265,7 +262,7 @@ static void virtex_init(MachineState *machine) /* If we failed loading ELF's try a raw image. */ kernel_size = load_image_targphys(kernel_filename, boot_offset, - ram_size); + machine->ram_size); boot_info.bootstrap_pc = boot_offset; high = boot_info.bootstrap_pc + kernel_size + 8192; } @@ -276,7 +273,7 @@ static void virtex_init(MachineState *machine) if (machine->initrd_filename) { initrd_base = high = ROUND_UP(high, 4); initrd_size = load_image_targphys(machine->initrd_filename, - high, ram_size - high); + high, machine->ram_size - high); if (initrd_size < 0) { error_report("couldn't load ram disk '%s'", @@ -290,7 +287,7 @@ static void virtex_init(MachineState *machine) boot_info.fdt = high + (8192 * 2); boot_info.fdt &= ~8191; - xilinx_load_device_tree(boot_info.fdt, ram_size, + xilinx_load_device_tree(boot_info.fdt, machine->ram_size, initrd_base, initrd_size, kernel_cmdline); } @@ -302,6 +299,7 @@ static void virtex_machine_init(MachineClass *mc) mc->desc = "Xilinx Virtex ML507 reference design"; mc->init = virtex_init; mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("440-xilinx"); + mc->default_ram_id = "ram"; } DEFINE_MACHINE("virtex-ml507", virtex_machine_init) From patchwork Tue Feb 25 11:49:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403575 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3F0F6138D for ; Tue, 25 Feb 2020 12:39:33 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 15C0B21556 for ; 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Tue, 25 Feb 2020 03:52:09 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 069/136] sparc/leon3: use memdev for RAM Date: Tue, 25 Feb 2020 12:49:59 +0100 Message-Id: <1582631466-13880-69-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::333 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-70-imammedo@redhat.com> --- hw/sparc/leon3.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index f5a087d..5fa58aa 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -189,7 +189,6 @@ static void leon3_generic_hw_init(MachineState *machine) SPARCCPU *cpu; CPUSPARCState *env; MemoryRegion *address_space_mem = get_system_memory(); - MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *prom = g_new(MemoryRegion, 1); int ret; char *filename; @@ -251,8 +250,8 @@ static void leon3_generic_hw_init(MachineState *machine) exit(1); } - memory_region_allocate_system_memory(ram, NULL, "leon3.ram", ram_size); - memory_region_add_subregion(address_space_mem, LEON3_RAM_OFFSET, ram); + memory_region_add_subregion(address_space_mem, LEON3_RAM_OFFSET, + machine->ram); /* Allocate BIOS */ prom_size = 8 * MiB; @@ -358,6 +357,7 @@ static void leon3_generic_machine_init(MachineClass *mc) mc->desc = "Leon-3 generic"; mc->init = leon3_generic_hw_init; mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3"); + mc->default_ram_id = "leon3.ram"; } DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init) From patchwork Tue Feb 25 11:50:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403539 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E0B31138D for ; Tue, 25 Feb 2020 12:36:03 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B826B20CC7 for ; Tue, 25 Feb 2020 12:36:03 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:52:10 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:10 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 070/136] sparc/sun4m: use memdev for RAM Date: Tue, 25 Feb 2020 12:50:00 +0100 Message-Id: <1582631466-13880-70-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Patch moves ram size check into sun4m_hw_init() and drops ram_init() moving remainder to sun4m_hw_init() as well, as it was the only place that called it. Also it rewrites impl. of RamDevice a little bit, which could serve as an example of frontend device for RAM backend. (Caveats are: 1. it doesn't check for memdev backend being mapped since it's been usurped by generic machine to handle majority of machines which don't have RAM frontend device 2. it still lacks 'addr' property and still has hardcoded sysbus_mmio_map() in board init. If done right, board should set 'addr' property and bus/machine plug handler should map it during device realize time. ) Further improvements were left as exercise for the future, since frontends are out scope of RAM conversion to memdev. Signed-off-by: Igor Mammedov Message-Id: <20200219160953.13771-71-imammedo@redhat.com> --- hw/sparc/sun4m.c | 74 ++++++++++++++++++++++++++++---------------------------- 1 file changed, 37 insertions(+), 37 deletions(-) diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 25e96db..f5bf95f 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -777,63 +777,42 @@ static const TypeInfo prom_info = { typedef struct RamDevice { SysBusDevice parent_obj; - - MemoryRegion ram; - uint64_t size; + HostMemoryBackend *memdev; } RamDevice; /* System RAM */ static void ram_realize(DeviceState *dev, Error **errp) { RamDevice *d = SUN4M_RAM(dev); - SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + MemoryRegion *ram = host_memory_backend_get_memory(d->memdev); - memory_region_allocate_system_memory(&d->ram, OBJECT(d), "sun4m.ram", - d->size); - sysbus_init_mmio(sbd, &d->ram); + sysbus_init_mmio(SYS_BUS_DEVICE(dev), ram); } -static void ram_init(hwaddr addr, ram_addr_t RAM_size, - uint64_t max_mem) +static void ram_initfn(Object *obj) { - DeviceState *dev; - SysBusDevice *s; - RamDevice *d; - - /* allocate RAM */ - if ((uint64_t)RAM_size > max_mem) { - error_report("Too much memory for this machine: %" PRId64 "," - " maximum %" PRId64, - RAM_size / MiB, max_mem / MiB); - exit(1); - } - dev = qdev_create(NULL, "memory"); - s = SYS_BUS_DEVICE(dev); - - d = SUN4M_RAM(dev); - d->size = RAM_size; - qdev_init_nofail(dev); - - sysbus_mmio_map(s, 0, addr); + RamDevice *d = SUN4M_RAM(obj); + object_property_add_link(obj, "memdev", TYPE_MEMORY_BACKEND, + (Object **)&d->memdev, + object_property_allow_set_link, + OBJ_PROP_LINK_STRONG, &error_abort); + object_property_set_description(obj, "memdev", "Set RAM backend" + "Valid value is ID of a hostmem backend", + &error_abort); } -static Property ram_properties[] = { - DEFINE_PROP_UINT64("size", RamDevice, size, 0), - DEFINE_PROP_END_OF_LIST(), -}; - static void ram_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->realize = ram_realize; - device_class_set_props(dc, ram_properties); } static const TypeInfo ram_info = { .name = TYPE_SUN4M_MEMORY, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(RamDevice), + .instance_init = ram_initfn, .class_init = ram_class_init, }; @@ -879,6 +858,15 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, SysBusDevice *s; unsigned int smp_cpus = machine->smp.cpus; unsigned int max_cpus = machine->smp.max_cpus; + Object *ram_memdev = object_resolve_path_type(machine->ram_memdev_id, + TYPE_MEMORY_BACKEND, NULL); + + if (machine->ram_size > hwdef->max_mem) { + error_report("Too much memory for this machine: %" PRId64 "," + " maximum %" PRId64, + machine->ram_size / MiB, hwdef->max_mem / MiB); + exit(1); + } /* init CPUs */ for(i = 0; i < smp_cpus; i++) { @@ -888,9 +876,12 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, for (i = smp_cpus; i < MAX_CPUS; i++) cpu_irqs[i] = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, MAX_PILS); + /* Create and map RAM frontend */ + dev = qdev_create(NULL, "memory"); + object_property_set_link(OBJECT(dev), ram_memdev, "memdev", &error_fatal); + qdev_init_nofail(dev); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0); - /* set up devices */ - ram_init(0, machine->ram_size, hwdef->max_mem); /* models without ECC don't trap when missing ram is accessed */ if (!hwdef->ecc_base) { empty_slot_init(machine->ram_size, hwdef->max_mem - machine->ram_size); @@ -1078,7 +1069,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus); fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus); - fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); + fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size); fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id); fw_cfg_add_i16(fw_cfg, FW_CFG_SUN4M_DEPTH, graphic_depth); fw_cfg_add_i16(fw_cfg, FW_CFG_SUN4M_WIDTH, graphic_width); @@ -1415,6 +1406,7 @@ static void ss5_class_init(ObjectClass *oc, void *data) mc->default_boot_order = "c"; mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904"); mc->default_display = "tcx"; + mc->default_ram_id = "sun4m.ram"; } static const TypeInfo ss5_type = { @@ -1434,6 +1426,7 @@ static void ss10_class_init(ObjectClass *oc, void *data) mc->default_boot_order = "c"; mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II"); mc->default_display = "tcx"; + mc->default_ram_id = "sun4m.ram"; } static const TypeInfo ss10_type = { @@ -1453,6 +1446,7 @@ static void ss600mp_class_init(ObjectClass *oc, void *data) mc->default_boot_order = "c"; mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II"); mc->default_display = "tcx"; + mc->default_ram_id = "sun4m.ram"; } static const TypeInfo ss600mp_type = { @@ -1472,6 +1466,7 @@ static void ss20_class_init(ObjectClass *oc, void *data) mc->default_boot_order = "c"; mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-SuperSparc-II"); mc->default_display = "tcx"; + mc->default_ram_id = "sun4m.ram"; } static const TypeInfo ss20_type = { @@ -1490,6 +1485,7 @@ static void voyager_class_init(ObjectClass *oc, void *data) mc->default_boot_order = "c"; mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904"); mc->default_display = "tcx"; + mc->default_ram_id = "sun4m.ram"; } static const TypeInfo voyager_type = { @@ -1508,6 +1504,7 @@ static void ss_lx_class_init(ObjectClass *oc, void *data) mc->default_boot_order = "c"; mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I"); mc->default_display = "tcx"; + mc->default_ram_id = "sun4m.ram"; } static const TypeInfo ss_lx_type = { @@ -1526,6 +1523,7 @@ static void ss4_class_init(ObjectClass *oc, void *data) mc->default_boot_order = "c"; mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904"); mc->default_display = "tcx"; + mc->default_ram_id = "sun4m.ram"; } static const TypeInfo ss4_type = { @@ -1544,6 +1542,7 @@ static void scls_class_init(ObjectClass *oc, void *data) mc->default_boot_order = "c"; mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I"); mc->default_display = "tcx"; + mc->default_ram_id = "sun4m.ram"; } static const TypeInfo scls_type = { @@ -1562,6 +1561,7 @@ static void sbook_class_init(ObjectClass *oc, void *data) mc->default_boot_order = "c"; mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-MicroSparc-I"); mc->default_display = "tcx"; + mc->default_ram_id = "sun4m.ram"; } static const TypeInfo sbook_type = { From patchwork Tue Feb 25 11:50:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403515 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E306113A4 for ; Tue, 25 Feb 2020 12:30:35 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B995E218AC for ; Tue, 25 Feb 2020 12:30:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Ie2z4kr4" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B995E218AC Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:52:11 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:11 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 071/136] sparc/niagara: use memdev for RAM Date: Tue, 25 Feb 2020 12:50:01 +0100 Message-Id: <1582631466-13880-71-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-72-imammedo@redhat.com> --- hw/sparc64/niagara.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/sparc64/niagara.c b/hw/sparc64/niagara.c index 5eb2d09..ab5ef8c 100644 --- a/hw/sparc64/niagara.c +++ b/hw/sparc64/niagara.c @@ -40,7 +40,6 @@ typedef struct NiagaraBoardState { MemoryRegion hv_ram; - MemoryRegion partition_ram; MemoryRegion nvram; MemoryRegion md_rom; MemoryRegion hv_rom; @@ -111,11 +110,8 @@ static void niagara_init(MachineState *machine) NIAGARA_HV_RAM_SIZE, &error_fatal); memory_region_add_subregion(sysmem, NIAGARA_HV_RAM_BASE, &s->hv_ram); - memory_region_allocate_system_memory(&s->partition_ram, NULL, - "sun4v-partition.ram", - machine->ram_size); memory_region_add_subregion(sysmem, NIAGARA_PARTITION_RAM_BASE, - &s->partition_ram); + machine->ram); memory_region_init_ram(&s->nvram, NULL, "sun4v.nvram", NIAGARA_NVRAM_SIZE, &error_fatal); @@ -173,6 +169,7 @@ static void niagara_class_init(ObjectClass *oc, void *data) mc->max_cpus = 1; /* XXX for now */ mc->default_boot_order = "c"; mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Sun-UltraSparc-T1"); + mc->default_ram_id = "sun4v-partition.ram"; } static const TypeInfo niagara_type = { From patchwork Tue Feb 25 11:50:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403601 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A153B1395 for ; Tue, 25 Feb 2020 12:42:37 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 78F3320637 for ; Tue, 25 Feb 2020 12:42:37 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:52:12 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:12 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 072/136] remove no longer used memory_region_allocate_system_memory() Date: Tue, 25 Feb 2020 12:50:02 +0100 Message-Id: <1582631466-13880-72-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::430 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov all boards were switched to using memdev backend for main RAM, so we can drop no longer used memory_region_allocate_system_memory() Signed-off-by: Igor Mammedov Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Message-Id: <20200219160953.13771-73-imammedo@redhat.com> --- hw/core/numa.c | 34 ---------------------------------- include/hw/boards.h | 32 -------------------------------- 2 files changed, 66 deletions(-) diff --git a/hw/core/numa.c b/hw/core/numa.c index e6baf2c..316bc50 100644 --- a/hw/core/numa.c +++ b/hw/core/numa.c @@ -806,40 +806,6 @@ void numa_cpu_pre_plug(const CPUArchId *slot, DeviceState *dev, Error **errp) } } -static void allocate_system_memory_nonnuma(MemoryRegion *mr, Object *owner, - const char *name, - uint64_t ram_size) -{ - if (mem_path) { -#ifdef __linux__ - memory_region_init_ram_from_file(mr, owner, name, ram_size, 0, 0, - mem_path, &error_fatal); -#else - fprintf(stderr, "-mem-path not supported on this host\n"); - exit(1); -#endif - } else { - memory_region_init_ram_nomigrate(mr, owner, name, ram_size, &error_fatal); - } - vmstate_register_ram_global(mr); -} - -void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner, - const char *name, - uint64_t ram_size) -{ - MachineState *ms = MACHINE(qdev_get_machine()); - - if (ms->numa_state == NULL || - ms->numa_state->num_nodes == 0 || numa_uses_legacy_mem()) { - allocate_system_memory_nonnuma(mr, owner, name, ram_size); - return; - } - - memory_region_init(mr, owner, name, ram_size); - numa_init_memdev_container(ms, mr); -} - static void numa_stat_memory_devices(NumaNodeMem node_mem[]) { MemoryDeviceInfoList *info_list = qmp_memory_device_list(); diff --git a/include/hw/boards.h b/include/hw/boards.h index ae2b60f..142b86d 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -12,38 +12,6 @@ #include "qom/object.h" #include "hw/core/cpu.h" -/** - * memory_region_allocate_system_memory - Allocate a board's main memory - * @mr: the #MemoryRegion to be initialized - * @owner: the object that tracks the region's reference count - * @name: name of the memory region - * @ram_size: size of the region in bytes - * - * This function allocates the main memory for a board model, and - * initializes @mr appropriately. It also arranges for the memory - * to be migrated (by calling vmstate_register_ram_global()). - * - * Memory allocated via this function will be backed with the memory - * backend the user provided using "-mem-path" or "-numa node,memdev=..." - * if appropriate; this is typically used to cause host huge pages to be - * used. This function should therefore be called by a board exactly once, - * for the primary or largest RAM area it implements. - * - * For boards where the major RAM is split into two parts in the memory - * map, you can deal with this by calling memory_region_allocate_system_memory() - * once to get a MemoryRegion with enough RAM for both parts, and then - * creating alias MemoryRegions via memory_region_init_alias() which - * alias into different parts of the RAM MemoryRegion and can be mapped - * into the memory map in the appropriate places. - * - * Smaller pieces of memory (display RAM, static RAMs, etc) don't need - * to be backed via the -mem-path memory backend and can simply - * be created via memory_region_init_ram(). - */ -void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner, - const char *name, - uint64_t ram_size); - #define TYPE_MACHINE_SUFFIX "-machine" /* Machine class name that needs to be used for class-name-based machine From patchwork Tue Feb 25 11:50:03 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 03:52:12 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 073/136] exec: cleanup qemu_minrampagesize()/qemu_maxrampagesize() Date: Tue, 25 Feb 2020 12:50:03 +0100 Message-Id: <1582631466-13880-73-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov Since all RAM is backed by hostmem backends, drop global -mem-path invariant and simplify code. Signed-off-by: Igor Mammedov Reviewed-by: David Gibson Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-74-imammedo@redhat.com> --- exec.c | 49 ++++--------------------------------------------- 1 file changed, 4 insertions(+), 45 deletions(-) diff --git a/exec.c b/exec.c index 8e9cc3b..d85a868 100644 --- a/exec.c +++ b/exec.c @@ -1667,59 +1667,18 @@ static int find_max_backend_pagesize(Object *obj, void *opaque) long qemu_minrampagesize(void) { long hpsize = LONG_MAX; - long mainrampagesize; - Object *memdev_root; - MachineState *ms = MACHINE(qdev_get_machine()); - - mainrampagesize = qemu_mempath_getpagesize(mem_path); - - /* it's possible we have memory-backend objects with - * hugepage-backed RAM. these may get mapped into system - * address space via -numa parameters or memory hotplug - * hooks. we want to take these into account, but we - * also want to make sure these supported hugepage - * sizes are applicable across the entire range of memory - * we may boot from, so we take the min across all - * backends, and assume normal pages in cases where a - * backend isn't backed by hugepages. - */ - memdev_root = object_resolve_path("/objects", NULL); - if (memdev_root) { - object_child_foreach(memdev_root, find_min_backend_pagesize, &hpsize); - } - if (hpsize == LONG_MAX) { - /* No additional memory regions found ==> Report main RAM page size */ - return mainrampagesize; - } - - /* If NUMA is disabled or the NUMA nodes are not backed with a - * memory-backend, then there is at least one node using "normal" RAM, - * so if its page size is smaller we have got to report that size instead. - */ - if (hpsize > mainrampagesize && - (ms->numa_state == NULL || - ms->numa_state->num_nodes == 0 || - ms->numa_state->nodes[0].node_memdev == NULL)) { - static bool warned; - if (!warned) { - error_report("Huge page support disabled (n/a for main memory)."); - warned = true; - } - return mainrampagesize; - } + Object *memdev_root = object_resolve_path("/objects", NULL); + object_child_foreach(memdev_root, find_min_backend_pagesize, &hpsize); return hpsize; } long qemu_maxrampagesize(void) { - long pagesize = qemu_mempath_getpagesize(mem_path); + long pagesize = 0; Object *memdev_root = object_resolve_path("/objects", NULL); - if (memdev_root) { - object_child_foreach(memdev_root, find_max_backend_pagesize, - &pagesize); - } + object_child_foreach(memdev_root, find_max_backend_pagesize, &pagesize); return pagesize; } #else From patchwork Tue Feb 25 11:50:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403459 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5BD2A14E3 for ; Tue, 25 Feb 2020 12:18:22 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3200A2176D for ; Tue, 25 Feb 2020 12:18:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="WOUy6dlc" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3200A2176D Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:52:14 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:13 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 074/136] exec: drop bogus mem_path from qemu_ram_alloc_from_fd() Date: Tue, 25 Feb 2020 12:50:04 +0100 Message-Id: <1582631466-13880-74-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::429 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov Function will report error that will mention global mem_path, which was valid the only if legacy -mem-path was used and only in case of main RAM. However it doesn't work with hostmem backends (for example: " qemu: -object memory-backend-file,id=ram0,size=128M,mem-path=foo: backing store (null) size 0x200000 does not match 'size' option 0x8000000 ") and couldn't possibly work in general FD case the function is supposed to handle. Taking in account that main RAM was converted into memory-backend-foo object, there is no point in printing file name (from inappropriate place) as failing path is a part of backend's error message. Hence drop bogus mem_path usage from qemu_ram_alloc_from_fd(), it's a job of its user to add file name to error message if applicable. Signed-off-by: Igor Mammedov Reviewed-by: Marc-André Lureau Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-75-imammedo@redhat.com> --- exec.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/exec.c b/exec.c index d85a868..6ebff8b 100644 --- a/exec.c +++ b/exec.c @@ -2307,9 +2307,9 @@ RAMBlock *qemu_ram_alloc_from_fd(ram_addr_t size, MemoryRegion *mr, size = HOST_PAGE_ALIGN(size); file_size = get_file_size(fd); if (file_size > 0 && file_size < size) { - error_setg(errp, "backing store %s size 0x%" PRIx64 + error_setg(errp, "backing store size 0x%" PRIx64 " does not match 'size' option 0x" RAM_ADDR_FMT, - mem_path, file_size, size); + file_size, size); return NULL; } From patchwork Tue Feb 25 11:50:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403451 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0CD7114E3 for ; Tue, 25 Feb 2020 12:16:27 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D78FD21927 for ; Tue, 25 Feb 2020 12:16:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="oWcy3rxT" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D78FD21927 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:53908 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Z8U-0001pW-0g for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 07:16:26 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:49945) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6YlA-0001W1-Np for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6Yl6-0000Ut-QJ for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:20 -0500 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]:39816) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6Yl6-0000SN-Jk for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:16 -0500 Received: by mail-wr1-x42e.google.com with SMTP id y17so5563028wrn.6 for ; Tue, 25 Feb 2020 03:52:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=OyeHkVRk+pDFOc+EaKWT1incM6J5ShZ/3FLqVMsrNwk=; b=oWcy3rxTIKuEwInvJvYxNg5QJuqjUVCnXLFAui6zj5t9nDcULsaW7Gz4EF55TaO3jc CELoh9QlmlncY5fdB5OIz3Ye9Wtw6k2CIe8pj19yi0BK/yaxft6k8CXq1iFj7JB8BIYi cYmkjGLukMUQ1MD8YOGMbJVWiKlzmyhTCnD0rjgeLguWFNVM6lgwh0hYkcAXSd7rDp1u zvMlGrKhUvPJQ41ivfNW6CoJimZumlKBx/ZEIcE8q+r2rvW4R1NZpYT2FSKG5X1BrLm7 yjhAQAhbDJcROMQbs5/jGnHj/FCQNOdMimhR9+f9GEHXy6JudydtLBwlo4YBhLsoNgH9 rW9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=OyeHkVRk+pDFOc+EaKWT1incM6J5ShZ/3FLqVMsrNwk=; b=E5wJZpfzUXeOmBIgWFc5vNnnPBg5pUTMPDyfZ2YpOlLqckhvFVpQOAGWjKx1q7f2KG Min4GJVXdb9+RhgKxlJWWcp0Ij1cP1jdU1Dt0lo7N2WkIX7RNZ6hpE0Gl2TP0diWVGKB IgygM2b1EQ1Z7NbkL2AweQumoiRPi6XtHwwTrE7Jp5wFLVn7mM0ssHFAMycXYivwf8zO BPTacTLJ13G9BKtVXQGqmprP1Ep2A13RV9HuIk2iGWgwJY6I/n+gmRNG8T+t4lYh3zXl IJhhdf2MBOdgEwboSYIDHvucDcjCAUi+NAmSDS15/FeyOLKrBYiY+E7n1/lbPqTYUO4y Od9Q== X-Gm-Message-State: APjAAAXTzaAZK2YtfGQwNJjDv7kBgyFIj9AcLNvHllJAjP7FLQuNRNUJ 3MzQtJfWsXIBxZxhmHJTVoxi5062 X-Google-Smtp-Source: APXvYqzt7IoWRWXWz0m/Wyk85be+Ob+eADzFC7RLfjGzx790LTb1hpdaai7KO5rqqTclmjikOpDFyA== X-Received: by 2002:adf:f1c6:: with SMTP id z6mr69712879wro.279.1582631535488; Tue, 25 Feb 2020 03:52:15 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:14 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 075/136] make mem_path local variable Date: Tue, 25 Feb 2020 12:50:05 +0100 Message-Id: <1582631466-13880-75-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov It's no longer used anywhere beside main(), so make it local variable that is used for CLI compat purposes to keep -mem-path option working. Under hood QEMU will use it to create memory-backend-file,mem-path=... backend and use its MemoryRegion as main RAM. Signed-off-by: Igor Mammedov Reviewed-by: Richard Henderson Message-Id: <20200219160953.13771-76-imammedo@redhat.com> --- include/sysemu/sysemu.h | 1 - vl.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h index c0678c1..ae78b2a 100644 --- a/include/sysemu/sysemu.h +++ b/include/sysemu/sysemu.h @@ -50,7 +50,6 @@ extern uint8_t *boot_splash_filedata; extern bool enable_mlock; extern bool enable_cpu_pm; extern QEMUClockType rtc_clock; -extern const char *mem_path; extern int mem_prealloc; #define MAX_OPTION_ROMS 16 diff --git a/vl.c b/vl.c index a7edcba..15cc5bd 100644 --- a/vl.c +++ b/vl.c @@ -140,7 +140,6 @@ enum vga_retrace_method vga_retrace_method = VGA_RETRACE_DUMB; int display_opengl; const char* keyboard_layout = NULL; ram_addr_t ram_size; -const char *mem_path = NULL; int mem_prealloc = 0; /* force preallocation of physical target memory */ bool enable_mlock = false; bool enable_cpu_pm = false; @@ -2883,6 +2882,7 @@ int main(int argc, char **argv, char **envp) Error *err = NULL; bool list_data_dirs = false; char *dir, **dirs; + const char *mem_path = NULL; BlockdevOptionsQueue bdo_queue = QSIMPLEQ_HEAD_INITIALIZER(bdo_queue); QemuPluginList plugin_list = QTAILQ_HEAD_INITIALIZER(plugin_list); From patchwork Tue Feb 25 11:50:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403551 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D62B917D5 for ; Tue, 25 Feb 2020 12:38:06 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ABB7821927 for ; Tue, 25 Feb 2020 12:38:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="cRTq3oiW" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org ABB7821927 Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:52:16 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:15 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 076/136] hostmem: introduce "prealloc-threads" property Date: Tue, 25 Feb 2020 12:50:06 +0100 Message-Id: <1582631466-13880-76-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::336 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov the property will allow user to specify number of threads to use in pre-allocation stage. It also will allow to reduce implicit hostmem dependency on current_machine. On object creation it will default to 1, but via machine compat property it will be updated to MachineState::smp::cpus to keep current behavior for hostmem and main RAM (which is now also hostmem based). Signed-off-by: Igor Mammedov Message-Id: <20200219160953.13771-77-imammedo@redhat.com> --- backends/hostmem.c | 43 +++++++++++++++++++++++++++++++++++++++---- include/sysemu/hostmem.h | 2 ++ vl.c | 14 ++++++++++---- 3 files changed, 51 insertions(+), 8 deletions(-) diff --git a/backends/hostmem.c b/backends/hostmem.c index e773bdf..0988986 100644 --- a/backends/hostmem.c +++ b/backends/hostmem.c @@ -223,7 +223,6 @@ static void host_memory_backend_set_prealloc(Object *obj, bool value, { Error *local_err = NULL; HostMemoryBackend *backend = MEMORY_BACKEND(obj); - MachineState *ms = MACHINE(qdev_get_machine()); if (backend->force_prealloc) { if (value) { @@ -243,7 +242,7 @@ static void host_memory_backend_set_prealloc(Object *obj, bool value, void *ptr = memory_region_get_ram_ptr(&backend->mr); uint64_t sz = memory_region_size(&backend->mr); - os_mem_prealloc(fd, ptr, sz, ms->smp.cpus, &local_err); + os_mem_prealloc(fd, ptr, sz, backend->prealloc_threads, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -252,14 +251,45 @@ static void host_memory_backend_set_prealloc(Object *obj, bool value, } } +static void host_memory_backend_get_prealloc_threads(Object *obj, Visitor *v, + const char *name, void *opaque, Error **errp) +{ + HostMemoryBackend *backend = MEMORY_BACKEND(obj); + visit_type_uint32(v, name, &backend->prealloc_threads, errp); +} + +static void host_memory_backend_set_prealloc_threads(Object *obj, Visitor *v, + const char *name, void *opaque, Error **errp) +{ + HostMemoryBackend *backend = MEMORY_BACKEND(obj); + Error *local_err = NULL; + uint32_t value; + + visit_type_uint32(v, name, &value, &local_err); + if (local_err) { + goto out; + } + if (value <= 0) { + error_setg(&local_err, + "property '%s' of %s doesn't take value '%d'", + name, object_get_typename(obj), value); + goto out; + } + backend->prealloc_threads = value; +out: + error_propagate(errp, local_err); +} + static void host_memory_backend_init(Object *obj) { HostMemoryBackend *backend = MEMORY_BACKEND(obj); MachineState *machine = MACHINE(qdev_get_machine()); + /* TODO: convert access to globals to compat properties */ backend->merge = machine_mem_merge(machine); backend->dump = machine_dump_guest_core(machine); backend->prealloc = mem_prealloc; + backend->prealloc_threads = 1; } static void host_memory_backend_post_init(Object *obj) @@ -313,7 +343,6 @@ host_memory_backend_memory_complete(UserCreatable *uc, Error **errp) { HostMemoryBackend *backend = MEMORY_BACKEND(uc); HostMemoryBackendClass *bc = MEMORY_BACKEND_GET_CLASS(uc); - MachineState *ms = MACHINE(qdev_get_machine()); Error *local_err = NULL; void *ptr; uint64_t sz; @@ -378,7 +407,7 @@ host_memory_backend_memory_complete(UserCreatable *uc, Error **errp) */ if (backend->prealloc) { os_mem_prealloc(memory_region_get_fd(&backend->mr), ptr, sz, - ms->smp.cpus, &local_err); + backend->prealloc_threads, &local_err); if (local_err) { goto out; } @@ -456,6 +485,12 @@ host_memory_backend_class_init(ObjectClass *oc, void *data) host_memory_backend_set_prealloc, &error_abort); object_class_property_set_description(oc, "prealloc", "Preallocate memory", &error_abort); + object_class_property_add(oc, "prealloc-threads", "int", + host_memory_backend_get_prealloc_threads, + host_memory_backend_set_prealloc_threads, + NULL, NULL, &error_abort); + object_class_property_set_description(oc, "prealloc-threads", + "Number of CPU threads to use for prealloc", &error_abort); object_class_property_add(oc, "size", "int", host_memory_backend_get_size, host_memory_backend_set_size, diff --git a/include/sysemu/hostmem.h b/include/sysemu/hostmem.h index 5db0d66..bdf8666 100644 --- a/include/sysemu/hostmem.h +++ b/include/sysemu/hostmem.h @@ -61,6 +61,7 @@ struct HostMemoryBackendClass { * @parent: opaque parent object container * @size: amount of memory backend provides * @mr: MemoryRegion representing host memory belonging to backend + * @prealloc_threads: number of threads to be used for preallocatining RAM */ struct HostMemoryBackend { /* private */ @@ -70,6 +71,7 @@ struct HostMemoryBackend { uint64_t size; bool merge, dump, use_canonical_path; bool prealloc, force_prealloc, is_mapped, share; + uint32_t prealloc_threads; DECLARE_BITMAP(host_nodes, MAX_NODES + 1); HostMemPolicy policy; diff --git a/vl.c b/vl.c index 15cc5bd..afc682e 100644 --- a/vl.c +++ b/vl.c @@ -2828,8 +2828,7 @@ static void configure_accelerators(const char *progname) } } -static void create_default_memdev(MachineState *ms, const char *path, - bool prealloc) +static void create_default_memdev(MachineState *ms, const char *path) { Object *obj; MachineClass *mc = MACHINE_GET_CLASS(ms); @@ -2838,7 +2837,6 @@ static void create_default_memdev(MachineState *ms, const char *path, if (path) { object_property_set_str(obj, path, "mem-path", &error_fatal); } - object_property_set_bool(obj, prealloc, "prealloc", &error_fatal); object_property_set_int(obj, ms->ram_size, "size", &error_fatal); object_property_add_child(object_get_objects_root(), mc->default_ram_id, obj, &error_fatal); @@ -3980,6 +3978,14 @@ int main(int argc, char **argv, char **envp) exit(1); } + if (mem_prealloc) { + char *val; + + val = g_strdup_printf("%d", current_machine->smp.cpus); + object_register_sugar_prop("memory-backend", "prealloc-threads", val); + g_free(val); + } + /* * Get the default machine options from the machine if it is not already * specified either by the configuration file or by the command line. @@ -4307,7 +4313,7 @@ int main(int argc, char **argv, char **envp) if (machine_class->default_ram_id && current_machine->ram_size && numa_uses_legacy_mem() && !current_machine->ram_memdev_id) { - create_default_memdev(current_machine, mem_path, mem_prealloc); + create_default_memdev(current_machine, mem_path); } /* do monitor/qmp handling at preconfig state if requested */ main_loop(); From patchwork Tue Feb 25 11:50:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403583 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3C8D91395 for ; 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Tue, 25 Feb 2020 03:52:16 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 077/136] hostmem: fix strict bind policy Date: Tue, 25 Feb 2020 12:50:07 +0100 Message-Id: <1582631466-13880-77-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::333 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov When option -mem-prealloc is used with one or more memory-backend objects, created backends may not obey configured bind policy or creation may fail after kernel attempts to move pages according to bind policy. Reason is in file_ram_alloc(), which will pre-allocate any descriptor based RAM if global mem_prealloc != 0 and that happens way before bind policy is applied to memory range. One way to fix it would be to extend memory_region_foo() API and add more invariants that could broken later due implicit dependencies that's hard to track. Another approach is to drop adhoc main RAM allocation and consolidate it around memory-backend. That allows to have single place that allocates guest RAM (main and memdev) in the same way and then global mem_prealloc could be replaced by backend's property[s] that will affect created memory-backend objects but only in correct order this time. With main RAM now converted to hostmem backends, there is no point in keeping global mem_prealloc around, so alias -mem-prealloc to "memory-backend.prealloc=on" machine compat[*] property and make mem_prealloc a local variable to only stir registration of compat property. *) currently user accessible -global works only with DEVICE based objects and extra work is needed to make it work with hostmem backends. But that is convenience option and out of scope of this already huge refactoring. Hence machine compat properties were used. Signed-off-by: Igor Mammedov Message-Id: <20200219160953.13771-78-imammedo@redhat.com> --- backends/hostmem-file.c | 1 - backends/hostmem-memfd.c | 1 - backends/hostmem.c | 12 +----------- exec.c | 11 ----------- include/sysemu/hostmem.h | 2 +- include/sysemu/sysemu.h | 1 - vl.c | 3 ++- 7 files changed, 4 insertions(+), 27 deletions(-) diff --git a/backends/hostmem-file.c b/backends/hostmem-file.c index cb319a9..c8c355f 100644 --- a/backends/hostmem-file.c +++ b/backends/hostmem-file.c @@ -51,7 +51,6 @@ file_backend_memory_alloc(HostMemoryBackend *backend, Error **errp) return; } - backend->force_prealloc = mem_prealloc; name = host_memory_backend_get_name(backend); memory_region_init_ram_from_file(&backend->mr, OBJECT(backend), name, diff --git a/backends/hostmem-memfd.c b/backends/hostmem-memfd.c index 26070b4..74ba987 100644 --- a/backends/hostmem-memfd.c +++ b/backends/hostmem-memfd.c @@ -45,7 +45,6 @@ memfd_backend_memory_alloc(HostMemoryBackend *backend, Error **errp) return; } - backend->force_prealloc = mem_prealloc; fd = qemu_memfd_create(TYPE_MEMORY_BACKEND_MEMFD, backend->size, m->hugetlb, m->hugetlbsize, m->seal ? F_SEAL_GROW | F_SEAL_SHRINK | F_SEAL_SEAL : 0, diff --git a/backends/hostmem.c b/backends/hostmem.c index 0988986..a70867b 100644 --- a/backends/hostmem.c +++ b/backends/hostmem.c @@ -215,7 +215,7 @@ static bool host_memory_backend_get_prealloc(Object *obj, Error **errp) { HostMemoryBackend *backend = MEMORY_BACKEND(obj); - return backend->prealloc || backend->force_prealloc; + return backend->prealloc; } static void host_memory_backend_set_prealloc(Object *obj, bool value, @@ -224,14 +224,6 @@ static void host_memory_backend_set_prealloc(Object *obj, bool value, Error *local_err = NULL; HostMemoryBackend *backend = MEMORY_BACKEND(obj); - if (backend->force_prealloc) { - if (value) { - error_setg(errp, - "remove -mem-prealloc to use the prealloc property"); - return; - } - } - if (!host_memory_backend_mr_inited(backend)) { backend->prealloc = value; return; @@ -288,8 +280,6 @@ static void host_memory_backend_init(Object *obj) /* TODO: convert access to globals to compat properties */ backend->merge = machine_mem_merge(machine); backend->dump = machine_dump_guest_core(machine); - backend->prealloc = mem_prealloc; - backend->prealloc_threads = 1; } static void host_memory_backend_post_init(Object *obj) diff --git a/exec.c b/exec.c index 6ebff8b..8c0258a 100644 --- a/exec.c +++ b/exec.c @@ -1801,8 +1801,6 @@ static void *file_ram_alloc(RAMBlock *block, bool truncate, Error **errp) { - Error *err = NULL; - MachineState *ms = MACHINE(qdev_get_machine()); void *area; block->page_size = qemu_fd_getpagesize(fd); @@ -1858,15 +1856,6 @@ static void *file_ram_alloc(RAMBlock *block, return NULL; } - if (mem_prealloc) { - os_mem_prealloc(fd, area, memory, ms->smp.cpus, &err); - if (err) { - error_propagate(errp, err); - qemu_ram_munmap(fd, area, memory); - return NULL; - } - } - block->fd = fd; return area; } diff --git a/include/sysemu/hostmem.h b/include/sysemu/hostmem.h index bdf8666..8276e53 100644 --- a/include/sysemu/hostmem.h +++ b/include/sysemu/hostmem.h @@ -70,7 +70,7 @@ struct HostMemoryBackend { /* protected */ uint64_t size; bool merge, dump, use_canonical_path; - bool prealloc, force_prealloc, is_mapped, share; + bool prealloc, is_mapped, share; uint32_t prealloc_threads; DECLARE_BITMAP(host_nodes, MAX_NODES + 1); HostMemPolicy policy; diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h index ae78b2a..55bdd57 100644 --- a/include/sysemu/sysemu.h +++ b/include/sysemu/sysemu.h @@ -50,7 +50,6 @@ extern uint8_t *boot_splash_filedata; extern bool enable_mlock; extern bool enable_cpu_pm; extern QEMUClockType rtc_clock; -extern int mem_prealloc; #define MAX_OPTION_ROMS 16 typedef struct QEMUOptionRom { diff --git a/vl.c b/vl.c index afc682e..54857f7 100644 --- a/vl.c +++ b/vl.c @@ -140,7 +140,6 @@ enum vga_retrace_method vga_retrace_method = VGA_RETRACE_DUMB; int display_opengl; const char* keyboard_layout = NULL; ram_addr_t ram_size; -int mem_prealloc = 0; /* force preallocation of physical target memory */ bool enable_mlock = false; bool enable_cpu_pm = false; int nb_nics; @@ -2883,6 +2882,7 @@ int main(int argc, char **argv, char **envp) const char *mem_path = NULL; BlockdevOptionsQueue bdo_queue = QSIMPLEQ_HEAD_INITIALIZER(bdo_queue); QemuPluginList plugin_list = QTAILQ_HEAD_INITIALIZER(plugin_list); + int mem_prealloc = 0; /* force preallocation of physical target memory */ os_set_line_buffering(); @@ -3984,6 +3984,7 @@ int main(int argc, char **argv, char **envp) val = g_strdup_printf("%d", current_machine->smp.cpus); object_register_sugar_prop("memory-backend", "prealloc-threads", val); g_free(val); + object_register_sugar_prop("memory-backend", "prealloc", "on"); } /* From patchwork Tue Feb 25 11:50:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403609 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BEDFE1395 for ; Tue, 25 Feb 2020 12:44:29 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8637E20637 for ; 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Tue, 25 Feb 2020 03:52:17 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 078/136] tests/numa-test: make top level args dynamic and g_autofree(cli) cleanups Date: Tue, 25 Feb 2020 12:50:08 +0100 Message-Id: <1582631466-13880-78-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov Use GString to pass argument to make_cli() so that it would be easy to dynamically change test case arguments from main(). The follow up patch will use it to change RAM size options depending on target. While at it cleanup 'cli' freeing, using g_autofree annotation. Signed-off-by: Igor Mammedov Reviewed-by: Thomas Huth Message-Id: <20200219160953.13771-79-imammedo@redhat.com> --- tests/qtest/numa-test.c | 108 ++++++++++++++++++++++++------------------------ 1 file changed, 54 insertions(+), 54 deletions(-) diff --git a/tests/qtest/numa-test.c b/tests/qtest/numa-test.c index 17dd807..35999ea 100644 --- a/tests/qtest/numa-test.c +++ b/tests/qtest/numa-test.c @@ -14,16 +14,16 @@ #include "qapi/qmp/qdict.h" #include "qapi/qmp/qlist.h" -static char *make_cli(const char *generic_cli, const char *test_cli) +static char *make_cli(const GString *generic_cli, const char *test_cli) { - return g_strdup_printf("%s %s", generic_cli ? generic_cli : "", test_cli); + return g_strdup_printf("%s %s", generic_cli->str, test_cli); } static void test_mon_explicit(const void *data) { - char *s; - char *cli; QTestState *qts; + g_autofree char *s = NULL; + g_autofree char *cli = NULL; cli = make_cli(data, "-smp 8 " "-numa node,nodeid=0,cpus=0-3 " @@ -33,17 +33,15 @@ static void test_mon_explicit(const void *data) s = qtest_hmp(qts, "info numa"); g_assert(strstr(s, "node 0 cpus: 0 1 2 3")); g_assert(strstr(s, "node 1 cpus: 4 5 6 7")); - g_free(s); qtest_quit(qts); - g_free(cli); } static void test_mon_default(const void *data) { - char *s; - char *cli; QTestState *qts; + g_autofree char *s = NULL; + g_autofree char *cli = NULL; cli = make_cli(data, "-smp 8 -numa node -numa node"); qts = qtest_init(cli); @@ -51,17 +49,15 @@ static void test_mon_default(const void *data) s = qtest_hmp(qts, "info numa"); g_assert(strstr(s, "node 0 cpus: 0 2 4 6")); g_assert(strstr(s, "node 1 cpus: 1 3 5 7")); - g_free(s); qtest_quit(qts); - g_free(cli); } static void test_mon_partial(const void *data) { - char *s; - char *cli; QTestState *qts; + g_autofree char *s = NULL; + g_autofree char *cli = NULL; cli = make_cli(data, "-smp 8 " "-numa node,nodeid=0,cpus=0-1 " @@ -71,10 +67,8 @@ static void test_mon_partial(const void *data) s = qtest_hmp(qts, "info numa"); g_assert(strstr(s, "node 0 cpus: 0 1 2 3 6 7")); g_assert(strstr(s, "node 1 cpus: 4 5")); - g_free(s); qtest_quit(qts); - g_free(cli); } static QList *get_cpus(QTestState *qts, QDict **resp) @@ -87,11 +81,11 @@ static QList *get_cpus(QTestState *qts, QDict **resp) static void test_query_cpus(const void *data) { - char *cli; QDict *resp; QList *cpus; QObject *e; QTestState *qts; + g_autofree char *cli = NULL; cli = make_cli(data, "-smp 8 -numa node,cpus=0-3 -numa node,cpus=4-7"); qts = qtest_init(cli); @@ -120,16 +114,15 @@ static void test_query_cpus(const void *data) qobject_unref(resp); qtest_quit(qts); - g_free(cli); } static void pc_numa_cpu(const void *data) { - char *cli; QDict *resp; QList *cpus; QObject *e; QTestState *qts; + g_autofree char *cli = NULL; cli = make_cli(data, "-cpu pentium -smp 8,sockets=2,cores=2,threads=2 " "-numa node,nodeid=0 -numa node,nodeid=1 " @@ -174,16 +167,15 @@ static void pc_numa_cpu(const void *data) qobject_unref(resp); qtest_quit(qts); - g_free(cli); } static void spapr_numa_cpu(const void *data) { - char *cli; QDict *resp; QList *cpus; QObject *e; QTestState *qts; + g_autofree char *cli = NULL; cli = make_cli(data, "-smp 4,cores=4 " "-numa node,nodeid=0 -numa node,nodeid=1 " @@ -220,16 +212,15 @@ static void spapr_numa_cpu(const void *data) qobject_unref(resp); qtest_quit(qts); - g_free(cli); } static void aarch64_numa_cpu(const void *data) { - char *cli; QDict *resp; QList *cpus; QObject *e; QTestState *qts; + g_autofree char *cli = NULL; cli = make_cli(data, "-smp 2 " "-numa node,nodeid=0 -numa node,nodeid=1 " @@ -264,7 +255,6 @@ static void aarch64_numa_cpu(const void *data) qobject_unref(resp); qtest_quit(qts); - g_free(cli); } static void pc_dynamic_cpu_cfg(const void *data) @@ -273,9 +263,10 @@ static void pc_dynamic_cpu_cfg(const void *data) QDict *resp; QList *cpus; QTestState *qs; + g_autofree char *cli = NULL; - qs = qtest_initf("%s -nodefaults --preconfig -smp 2", - data ? (char *)data : ""); + cli = make_cli(data, "-nodefaults --preconfig -smp 2"); + qs = qtest_init(cli); /* create 2 numa nodes */ g_assert(!qmp_rsp_is_err(qtest_qmp(qs, "{ 'execute': 'set-numa-node'," @@ -329,16 +320,19 @@ static void pc_dynamic_cpu_cfg(const void *data) static void pc_hmat_build_cfg(const void *data) { - QTestState *qs = qtest_initf("%s -nodefaults --preconfig -machine hmat=on " - "-smp 2,sockets=2 " - "-m 128M,slots=2,maxmem=1G " - "-object memory-backend-ram,size=64M,id=m0 " - "-object memory-backend-ram,size=64M,id=m1 " - "-numa node,nodeid=0,memdev=m0 " - "-numa node,nodeid=1,memdev=m1,initiator=0 " - "-numa cpu,node-id=0,socket-id=0 " - "-numa cpu,node-id=0,socket-id=1", - data ? (char *)data : ""); + QTestState *qs; + g_autofree char *cli = NULL; + + cli = make_cli(data, "-nodefaults --preconfig -machine hmat=on " + "-smp 2,sockets=2 " + "-m 128M,slots=2,maxmem=1G " + "-object memory-backend-ram,size=64M,id=m0 " + "-object memory-backend-ram,size=64M,id=m1 " + "-numa node,nodeid=0,memdev=m0 " + "-numa node,nodeid=1,memdev=m1,initiator=0 " + "-numa cpu,node-id=0,socket-id=0 " + "-numa cpu,node-id=0,socket-id=1"); + qs = qtest_init(cli); /* Fail: Initiator should be less than the number of nodes */ g_assert_true(qmp_rsp_is_err(qtest_qmp(qs, "{ 'execute': 'set-numa-node'," @@ -455,13 +449,16 @@ static void pc_hmat_build_cfg(const void *data) static void pc_hmat_off_cfg(const void *data) { - QTestState *qs = qtest_initf("%s -nodefaults --preconfig " - "-smp 2,sockets=2 " - "-m 128M,slots=2,maxmem=1G " - "-object memory-backend-ram,size=64M,id=m0 " - "-object memory-backend-ram,size=64M,id=m1 " - "-numa node,nodeid=0,memdev=m0", - data ? (char *)data : ""); + QTestState *qs; + g_autofree char *cli = NULL; + + cli = make_cli(data, "-nodefaults --preconfig " + "-smp 2,sockets=2 " + "-m 128M,slots=2,maxmem=1G " + "-object memory-backend-ram,size=64M,id=m0 " + "-object memory-backend-ram,size=64M,id=m1 " + "-numa node,nodeid=0,memdev=m0"); + qs = qtest_init(cli); /* * Fail: Enable HMAT with -machine hmat=on @@ -491,16 +488,19 @@ static void pc_hmat_off_cfg(const void *data) static void pc_hmat_erange_cfg(const void *data) { - QTestState *qs = qtest_initf("%s -nodefaults --preconfig -machine hmat=on " - "-smp 2,sockets=2 " - "-m 128M,slots=2,maxmem=1G " - "-object memory-backend-ram,size=64M,id=m0 " - "-object memory-backend-ram,size=64M,id=m1 " - "-numa node,nodeid=0,memdev=m0 " - "-numa node,nodeid=1,memdev=m1,initiator=0 " - "-numa cpu,node-id=0,socket-id=0 " - "-numa cpu,node-id=0,socket-id=1", - data ? (char *)data : ""); + QTestState *qs; + g_autofree char *cli = NULL; + + cli = make_cli(data, "-nodefaults --preconfig -machine hmat=on " + "-smp 2,sockets=2 " + "-m 128M,slots=2,maxmem=1G " + "-object memory-backend-ram,size=64M,id=m0 " + "-object memory-backend-ram,size=64M,id=m1 " + "-numa node,nodeid=0,memdev=m0 " + "-numa node,nodeid=1,memdev=m1,initiator=0 " + "-numa cpu,node-id=0,socket-id=0 " + "-numa cpu,node-id=0,socket-id=1"); + qs = qtest_init(cli); /* Can't store the compressed latency */ g_assert_false(qmp_rsp_is_err(qtest_qmp(qs, "{ 'execute': 'set-numa-node'," @@ -539,11 +539,11 @@ static void pc_hmat_erange_cfg(const void *data) int main(int argc, char **argv) { - const char *args = NULL; + g_autoptr(GString) args = g_string_new(NULL); const char *arch = qtest_get_arch(); - if (strcmp(arch, "aarch64") == 0) { - args = "-machine virt"; + if (g_str_equal(arch, "aarch64")) { + g_string_append(args, " -machine virt"); } g_test_init(&argc, &argv, NULL); From patchwork Tue Feb 25 11:50:09 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 03:52:19 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 079/136] tests:numa-test: use explicit memdev to specify node RAM Date: Tue, 25 Feb 2020 12:50:09 +0100 Message-Id: <1582631466-13880-79-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Igor Mammedov Considering that legacy "mem" option is deprecated, use memdev in tests and add an additional test for legacy "mem" option on old machine type, to make sure it won't regress in the future. Signed-off-by: Igor Mammedov Acked-by: Thomas Huth Message-Id: <20200219160953.13771-80-imammedo@redhat.com> --- tests/qtest/numa-test.c | 30 ++++++++++++++++++------------ 1 file changed, 18 insertions(+), 12 deletions(-) diff --git a/tests/qtest/numa-test.c b/tests/qtest/numa-test.c index 35999ea..2f9b7f6 100644 --- a/tests/qtest/numa-test.c +++ b/tests/qtest/numa-test.c @@ -25,9 +25,8 @@ static void test_mon_explicit(const void *data) g_autofree char *s = NULL; g_autofree char *cli = NULL; - cli = make_cli(data, "-smp 8 " - "-numa node,nodeid=0,cpus=0-3 " - "-numa node,nodeid=1,cpus=4-7 "); + cli = make_cli(data, "-smp 8 -numa node,nodeid=0,memdev=ram,cpus=0-3 " + "-numa node,nodeid=1,cpus=4-7"); qts = qtest_init(cli); s = qtest_hmp(qts, "info numa"); @@ -37,13 +36,13 @@ static void test_mon_explicit(const void *data) qtest_quit(qts); } -static void test_mon_default(const void *data) +static void test_def_cpu_split(const void *data) { QTestState *qts; g_autofree char *s = NULL; g_autofree char *cli = NULL; - cli = make_cli(data, "-smp 8 -numa node -numa node"); + cli = make_cli(data, "-smp 8 -numa node,memdev=ram -numa node"); qts = qtest_init(cli); s = qtest_hmp(qts, "info numa"); @@ -60,7 +59,7 @@ static void test_mon_partial(const void *data) g_autofree char *cli = NULL; cli = make_cli(data, "-smp 8 " - "-numa node,nodeid=0,cpus=0-1 " + "-numa node,nodeid=0,memdev=ram,cpus=0-1 " "-numa node,nodeid=1,cpus=4-5 "); qts = qtest_init(cli); @@ -87,7 +86,8 @@ static void test_query_cpus(const void *data) QTestState *qts; g_autofree char *cli = NULL; - cli = make_cli(data, "-smp 8 -numa node,cpus=0-3 -numa node,cpus=4-7"); + cli = make_cli(data, "-smp 8 -numa node,memdev=ram,cpus=0-3 " + "-numa node,cpus=4-7"); qts = qtest_init(cli); cpus = get_cpus(qts, &resp); g_assert(cpus); @@ -125,7 +125,7 @@ static void pc_numa_cpu(const void *data) g_autofree char *cli = NULL; cli = make_cli(data, "-cpu pentium -smp 8,sockets=2,cores=2,threads=2 " - "-numa node,nodeid=0 -numa node,nodeid=1 " + "-numa node,nodeid=0,memdev=ram -numa node,nodeid=1 " "-numa cpu,node-id=1,socket-id=0 " "-numa cpu,node-id=0,socket-id=1,core-id=0 " "-numa cpu,node-id=0,socket-id=1,core-id=1,thread-id=0 " @@ -178,7 +178,7 @@ static void spapr_numa_cpu(const void *data) g_autofree char *cli = NULL; cli = make_cli(data, "-smp 4,cores=4 " - "-numa node,nodeid=0 -numa node,nodeid=1 " + "-numa node,nodeid=0,memdev=ram -numa node,nodeid=1 " "-numa cpu,node-id=0,core-id=0 " "-numa cpu,node-id=0,core-id=1 " "-numa cpu,node-id=0,core-id=2 " @@ -223,7 +223,7 @@ static void aarch64_numa_cpu(const void *data) g_autofree char *cli = NULL; cli = make_cli(data, "-smp 2 " - "-numa node,nodeid=0 -numa node,nodeid=1 " + "-numa node,nodeid=0,memdev=ram -numa node,nodeid=1 " "-numa cpu,node-id=1,thread-id=0 " "-numa cpu,node-id=0,thread-id=1"); qts = qtest_init(cli); @@ -270,7 +270,7 @@ static void pc_dynamic_cpu_cfg(const void *data) /* create 2 numa nodes */ g_assert(!qmp_rsp_is_err(qtest_qmp(qs, "{ 'execute': 'set-numa-node'," - " 'arguments': { 'type': 'node', 'nodeid': 0 } }"))); + " 'arguments': { 'type': 'node', 'nodeid': 0, 'memdev': 'ram' } }"))); g_assert(!qmp_rsp_is_err(qtest_qmp(qs, "{ 'execute': 'set-numa-node'," " 'arguments': { 'type': 'node', 'nodeid': 1 } }"))); @@ -542,13 +542,19 @@ int main(int argc, char **argv) g_autoptr(GString) args = g_string_new(NULL); const char *arch = qtest_get_arch(); + if (g_str_equal(arch, "ppc64")) { + g_string_append(args, " -object memory-backend-ram,id=ram,size=512M"); + } else { + g_string_append(args, " -object memory-backend-ram,id=ram,size=128M"); + } + if (g_str_equal(arch, "aarch64")) { g_string_append(args, " -machine virt"); } g_test_init(&argc, &argv, NULL); - qtest_add_data_func("/numa/mon/default", args, test_mon_default); + qtest_add_data_func("/numa/mon/cpus/default", args, test_def_cpu_split); qtest_add_data_func("/numa/mon/cpus/explicit", args, test_mon_explicit); qtest_add_data_func("/numa/mon/cpus/partial", args, test_mon_partial); qtest_add_data_func("/numa/qmp/cpus/query-cpus", args, test_query_cpus); From patchwork Tue Feb 25 11:50:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403521 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 335DF138D for ; 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Tue, 25 Feb 2020 03:52:20 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 080/136] scripts/git.orderfile: Display Cocci scripts before code modifications Date: Tue, 25 Feb 2020 12:50:10 +0100 Message-Id: <1582631466-13880-80-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. 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Signed-off-by: Philippe Mathieu-Daudé --- scripts/git.orderfile | 3 +++ 1 file changed, 3 insertions(+) diff --git a/scripts/git.orderfile b/scripts/git.orderfile index 1f747b5..7cf22e0 100644 --- a/scripts/git.orderfile +++ b/scripts/git.orderfile @@ -22,6 +22,9 @@ Makefile* qapi/*.json qga/*.json +# semantic patches +*.cocci + # headers *.h From patchwork Tue Feb 25 11:50:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403467 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3A9051580 for ; Tue, 25 Feb 2020 12:20:09 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0E9A22176D for ; Tue, 25 Feb 2020 12:20:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="IrItYgZF" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0E9A22176D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:53960 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6ZC4-0000Ut-4X for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 07:20:08 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50001) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6YlE-0001fN-H2 for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6YlD-00016H-4i for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:24 -0500 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]:53266) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6YlC-00010Z-Tl for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:23 -0500 Received: by mail-wm1-x332.google.com with SMTP id t79so1180105wmt.3 for ; Tue, 25 Feb 2020 03:52:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=49JMCqWwAbNa6QDPdUhg7wDSO/diL9vpysZNve+rYwA=; b=IrItYgZF9t4dKZprr3cLIVukr0+3qao0ih5TfuJMNpI3CP82ITferoEu6DTosZimHw 8gsHdueOYjnUsLiQBanrRmRaX4rLVBdky9nivVFoW+IxDF18/uMOEYeCv3BX/VxShsBy ph7cv5DYA7vqNZjHDGHdQRYqbUdQW+2d7mhdeQA0U5HywRQvxYTPAkgBZmDeAa+s6dFu LK4qZFeEZyzQeSC3dik8uphA6qUFrMZ2RsdM+C6SiWAedeYhXgVF7Qc8xrq4tKUDxMaA NUELNnel7/DRgLlhsphl1o3Ds0bpeS4G6mAsRRAzyFIIULboLhogQx7GRkIIr5WR0FH7 6bEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=49JMCqWwAbNa6QDPdUhg7wDSO/diL9vpysZNve+rYwA=; b=MgutbAwCIgudBJIp0QaZf43TdiDKgcJshUVfkPsJM0qlz7br/0LQZrNSAkB3j8kmHP 4iVllcWl8Ibr3VQ2C2ANyLuM0P1DlkxxTFThnk+invMsbLo2b8PcpkCYGZYjv39hfvfN 0Uxg4EgZddyVXXhIELppTg2UwX/bSRE8xuQQUg1XxHWd753XDQoG6GcePEDlTRTH+8Vb qTizN5hhQoeKcgXxnz1tt4MuGAWJxGzuhILZZ3CNwdgeZ26Gi8/kIhiSD01yos9P5N3w SSocEJVD9Ivuxjg3WEDRREMu7Cb2FeU9kqzvcFV6MxqEFWtsugu4T7jGIt4HwkvZ9LKm /McA== X-Gm-Message-State: APjAAAXDk+GlDYH5eKkOAU6xELqi2riSigUwJ+Qrq8rgjPSI6dbwQawJ 1GyrxfuqxeCMXgQh1McjhqxZT0Jl X-Google-Smtp-Source: APXvYqwTv0HWBL9qCQ+ZfqYroN+D8iZhSIwUl2We8cGUKXCVLl52J8tiyqfcCwp2wUJZNgEehg2yIQ== X-Received: by 2002:a7b:cd8e:: with SMTP id y14mr5010053wmj.150.1582631541619; Tue, 25 Feb 2020 03:52:21 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:21 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 081/136] hw: Remove unnecessary cast when calling dma_memory_read() Date: Tue, 25 Feb 2020 12:50:11 +0100 Message-Id: <1582631466-13880-81-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::332 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Since its introduction in commit d86a77f8abb, dma_memory_read() always accepted void pointer argument. Remove the unnecessary casts. This commit was produced with the included Coccinelle script scripts/coccinelle/exec_rw_const. Signed-off-by: Philippe Mathieu-Daudé --- v4: Drop parenthesis when removing cast (Eric Blake) --- hw/arm/smmu-common.c | 3 +-- hw/arm/smmuv3.c | 10 ++++------ hw/sd/sdhci.c | 15 +++++---------- scripts/coccinelle/exec_rw_const.cocci | 23 +++++++++++++++++++++++ 4 files changed, 33 insertions(+), 18 deletions(-) create mode 100644 scripts/coccinelle/exec_rw_const.cocci diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index 23eb117..0f2573f 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -74,8 +74,7 @@ static int get_pte(dma_addr_t baseaddr, uint32_t index, uint64_t *pte, dma_addr_t addr = baseaddr + index * sizeof(*pte); /* TODO: guarantee 64-bit single-copy atomicity */ - ret = dma_memory_read(&address_space_memory, addr, - (uint8_t *)pte, sizeof(*pte)); + ret = dma_memory_read(&address_space_memory, addr, pte, sizeof(*pte)); if (ret != MEMTX_OK) { info->type = SMMU_PTW_ERR_WALK_EABT; diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 8b5f157..57a79df 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -279,8 +279,7 @@ static int smmu_get_ste(SMMUv3State *s, dma_addr_t addr, STE *buf, trace_smmuv3_get_ste(addr); /* TODO: guarantee 64-bit single-copy atomicity */ - ret = dma_memory_read(&address_space_memory, addr, - (void *)buf, sizeof(*buf)); + ret = dma_memory_read(&address_space_memory, addr, buf, sizeof(*buf)); if (ret != MEMTX_OK) { qemu_log_mask(LOG_GUEST_ERROR, "Cannot fetch pte at address=0x%"PRIx64"\n", addr); @@ -301,8 +300,7 @@ static int smmu_get_cd(SMMUv3State *s, STE *ste, uint32_t ssid, trace_smmuv3_get_cd(addr); /* TODO: guarantee 64-bit single-copy atomicity */ - ret = dma_memory_read(&address_space_memory, addr, - (void *)buf, sizeof(*buf)); + ret = dma_memory_read(&address_space_memory, addr, buf, sizeof(*buf)); if (ret != MEMTX_OK) { qemu_log_mask(LOG_GUEST_ERROR, "Cannot fetch pte at address=0x%"PRIx64"\n", addr); @@ -406,8 +404,8 @@ static int smmu_find_ste(SMMUv3State *s, uint32_t sid, STE *ste, l2_ste_offset = sid & ((1 << s->sid_split) - 1); l1ptr = (dma_addr_t)(strtab_base + l1_ste_offset * sizeof(l1std)); /* TODO: guarantee 64-bit single-copy atomicity */ - ret = dma_memory_read(&address_space_memory, l1ptr, - (uint8_t *)&l1std, sizeof(l1std)); + ret = dma_memory_read(&address_space_memory, l1ptr, &l1std, + sizeof(l1std)); if (ret != MEMTX_OK) { qemu_log_mask(LOG_GUEST_ERROR, "Could not read L1PTR at 0X%"PRIx64"\n", l1ptr); diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 69dc3e6..de63ffb 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -701,8 +701,7 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr) hwaddr entry_addr = (hwaddr)s->admasysaddr; switch (SDHC_DMA_TYPE(s->hostctl1)) { case SDHC_CTRL_ADMA2_32: - dma_memory_read(s->dma_as, entry_addr, (uint8_t *)&adma2, - sizeof(adma2)); + dma_memory_read(s->dma_as, entry_addr, &adma2, sizeof(adma2)); adma2 = le64_to_cpu(adma2); /* The spec does not specify endianness of descriptor table. * We currently assume that it is LE. @@ -713,8 +712,7 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr) dscr->incr = 8; break; case SDHC_CTRL_ADMA1_32: - dma_memory_read(s->dma_as, entry_addr, (uint8_t *)&adma1, - sizeof(adma1)); + dma_memory_read(s->dma_as, entry_addr, &adma1, sizeof(adma1)); adma1 = le32_to_cpu(adma1); dscr->addr = (hwaddr)(adma1 & 0xFFFFF000); dscr->attr = (uint8_t)extract32(adma1, 0, 7); @@ -726,13 +724,10 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr) } break; case SDHC_CTRL_ADMA2_64: - dma_memory_read(s->dma_as, entry_addr, - (uint8_t *)(&dscr->attr), 1); - dma_memory_read(s->dma_as, entry_addr + 2, - (uint8_t *)(&dscr->length), 2); + dma_memory_read(s->dma_as, entry_addr, &dscr->attr, 1); + dma_memory_read(s->dma_as, entry_addr + 2, &dscr->length, 2); dscr->length = le16_to_cpu(dscr->length); - dma_memory_read(s->dma_as, entry_addr + 4, - (uint8_t *)(&dscr->addr), 8); + dma_memory_read(s->dma_as, entry_addr + 4, &dscr->addr, 8); dscr->addr = le64_to_cpu(dscr->addr); dscr->attr &= (uint8_t) ~0xC0; dscr->incr = 12; diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci new file mode 100644 index 0000000..7e42682 --- /dev/null +++ b/scripts/coccinelle/exec_rw_const.cocci @@ -0,0 +1,23 @@ +/* + Usage: + + spatch \ + --macro-file scripts/cocci-macro-file.h \ + --sp-file scripts/coccinelle/exec_rw_const.cocci \ + --keep-comments \ + --in-place \ + --dir . +*/ + +// Remove useless cast +@@ +expression E1, E2, E3, E4; +type T; +@@ +( +- dma_memory_read(E1, E2, (T *)(E3), E4) ++ dma_memory_read(E1, E2, E3, E4) +| +- dma_memory_write(E1, E2, (T *)(E3), E4) ++ dma_memory_write(E1, E2, E3, E4) +) From patchwork Tue Feb 25 11:50:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403613 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 505A81580 for ; Tue, 25 Feb 2020 12:46:17 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 272CB20726 for ; Tue, 25 Feb 2020 12:46:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="QHCdvcjq" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 272CB20726 Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:52:22 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:21 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 082/136] exec: Rename ram_ptr variable Date: Tue, 25 Feb 2020 12:50:12 +0100 Message-Id: <1582631466-13880-82-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé As we are going to use a different 'ptr' variable, rename the 'ram pointer' variable. Signed-off-by: Philippe Mathieu-Daudé --- exec.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/exec.c b/exec.c index 8e9cc3b..08a30f6 100644 --- a/exec.c +++ b/exec.c @@ -3151,7 +3151,7 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, hwaddr len, hwaddr addr1, hwaddr l, MemoryRegion *mr) { - uint8_t *ptr; + uint8_t *ram_ptr; uint64_t val; MemTxResult result = MEMTX_OK; bool release_lock = false; @@ -3167,8 +3167,8 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, size_memop(l), attrs); } else { /* RAM case */ - ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); - memcpy(ptr, buf, l); + ram_ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); + memcpy(ram_ptr, buf, l); invalidate_and_set_dirty(mr, addr1, l); } @@ -3215,7 +3215,7 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, hwaddr len, hwaddr addr1, hwaddr l, MemoryRegion *mr) { - uint8_t *ptr; + uint8_t *ram_ptr; uint64_t val; MemTxResult result = MEMTX_OK; bool release_lock = false; @@ -3230,8 +3230,8 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, stn_he_p(buf, l, val); } else { /* RAM case */ - ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); - memcpy(buf, ptr, l); + ram_ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); + memcpy(buf, ram_ptr, l); } if (release_lock) { @@ -3329,7 +3329,7 @@ static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, enum write_rom_type type) { hwaddr l; - uint8_t *ptr; + uint8_t *ram_ptr; hwaddr addr1; MemoryRegion *mr; @@ -3343,14 +3343,14 @@ static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, l = memory_access_size(mr, l, addr1); } else { /* ROM/RAM case */ - ptr = qemu_map_ram_ptr(mr->ram_block, addr1); + ram_ptr = qemu_map_ram_ptr(mr->ram_block, addr1); switch (type) { case WRITE_DATA: - memcpy(ptr, buf, l); + memcpy(ram_ptr, buf, l); invalidate_and_set_dirty(mr, addr1, l); break; case FLUSH_CACHE: - flush_icache_range((uintptr_t)ptr, (uintptr_t)ptr + l); + flush_icache_range((uintptr_t)ram_ptr, (uintptr_t)ram_ptr + l); break; } } From patchwork Tue Feb 25 11:50:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403619 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B98FA1580 for ; Tue, 25 Feb 2020 12:48:15 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9025120726 for ; Tue, 25 Feb 2020 12:48:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="cBUAHonE" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9025120726 Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:52:23 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:22 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 083/136] exec: Let flatview API take void pointer arguments Date: Tue, 25 Feb 2020 12:50:13 +0100 Message-Id: <1582631466-13880-83-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::334 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Only flatview_[read/write]_continue use a byte pointer to increment an offset. For the users, we are only dealing with a blob buffer. Use a void pointer argument. This will let us simplify the address_space API in the next commit. Signed-off-by: Philippe Mathieu-Daudé --- exec.c | 14 ++++++++------ include/exec/memory.h | 2 +- 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/exec.c b/exec.c index 08a30f6..17808e3 100644 --- a/exec.c +++ b/exec.c @@ -2780,9 +2780,9 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, } static MemTxResult flatview_read(FlatView *fv, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, hwaddr len); + MemTxAttrs attrs, void *buf, hwaddr len); static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len); + const void *buf, hwaddr len); static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len, bool is_write, MemTxAttrs attrs); @@ -3147,7 +3147,7 @@ static bool prepare_mmio_access(MemoryRegion *mr) /* Called within RCU critical section. */ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, + const void *ptr, hwaddr len, hwaddr addr1, hwaddr l, MemoryRegion *mr) { @@ -3155,6 +3155,7 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, uint64_t val; MemTxResult result = MEMTX_OK; bool release_lock = false; + const uint8_t *buf = ptr; for (;;) { if (!memory_access_is_direct(mr, true)) { @@ -3194,7 +3195,7 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, /* Called from RCU critical section. */ static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len) + const void *buf, hwaddr len) { hwaddr l; hwaddr addr1; @@ -3211,7 +3212,7 @@ static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, /* Called within RCU critical section. */ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, + MemTxAttrs attrs, void *ptr, hwaddr len, hwaddr addr1, hwaddr l, MemoryRegion *mr) { @@ -3219,6 +3220,7 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, uint64_t val; MemTxResult result = MEMTX_OK; bool release_lock = false; + uint8_t *buf = ptr; for (;;) { if (!memory_access_is_direct(mr, false)) { @@ -3256,7 +3258,7 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, /* Called from RCU critical section. */ static MemTxResult flatview_read(FlatView *fv, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, hwaddr len) + MemTxAttrs attrs, void *buf, hwaddr len) { hwaddr l; hwaddr addr1; diff --git a/include/exec/memory.h b/include/exec/memory.h index e85b7de..6f8084f 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -2336,7 +2336,7 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, uint8_t *buf, hwaddr len); MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, + MemTxAttrs attrs, void *buf, hwaddr len, hwaddr addr1, hwaddr l, MemoryRegion *mr); void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr); From patchwork Tue Feb 25 11:50:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403537 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4885313A4 for ; Tue, 25 Feb 2020 12:36:00 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2005820CC7 for ; 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Tue, 25 Feb 2020 03:52:24 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 084/136] exec: Let the address_space API use void pointer arguments Date: Tue, 25 Feb 2020 12:50:14 +0100 Message-Id: <1582631466-13880-84-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé As we are only dealing with a blob buffer, use a void pointer argument. This will let us simplify other APIs. Signed-off-by: Philippe Mathieu-Daudé --- exec.c | 11 ++++++----- include/exec/memory.h | 12 ++++++------ 2 files changed, 12 insertions(+), 11 deletions(-) diff --git a/exec.c b/exec.c index 17808e3..3d6ee06 100644 --- a/exec.c +++ b/exec.c @@ -3271,7 +3271,7 @@ static MemTxResult flatview_read(FlatView *fv, hwaddr addr, } MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, hwaddr len) + MemTxAttrs attrs, void *buf, hwaddr len) { MemTxResult result = MEMTX_OK; FlatView *fv; @@ -3287,7 +3287,7 @@ MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len) + const void *buf, hwaddr len) { MemTxResult result = MEMTX_OK; FlatView *fv; @@ -3302,7 +3302,7 @@ MemTxResult address_space_write(AddressSpace *as, hwaddr addr, } MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - uint8_t *buf, hwaddr len, bool is_write) + void *buf, hwaddr len, bool is_write) { if (is_write) { return address_space_write(as, addr, attrs, buf, len); @@ -3326,7 +3326,7 @@ enum write_rom_type { static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, + const void *ptr, hwaddr len, enum write_rom_type type) { @@ -3334,6 +3334,7 @@ static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, uint8_t *ram_ptr; hwaddr addr1; MemoryRegion *mr; + const uint8_t *buf = ptr; RCU_READ_LOCK_GUARD(); while (len > 0) { @@ -3366,7 +3367,7 @@ static inline MemTxResult address_space_write_rom_internal(AddressSpace *as, /* used for ROM loading : can write in RAM and ROM */ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len) + const void *buf, hwaddr len) { return address_space_write_rom_internal(as, addr, attrs, buf, len, WRITE_DATA); diff --git a/include/exec/memory.h b/include/exec/memory.h index 6f8084f..afee185 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -2052,7 +2052,7 @@ void address_space_remove_listeners(AddressSpace *as); * @is_write: indicates the transfer direction */ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, + MemTxAttrs attrs, void *buf, hwaddr len, bool is_write); /** @@ -2070,7 +2070,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, */ MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len); + const void *buf, hwaddr len); /** * address_space_write_rom: write to address space, including ROM. @@ -2096,7 +2096,7 @@ MemTxResult address_space_write(AddressSpace *as, hwaddr addr, */ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, - const uint8_t *buf, hwaddr len); + const void *buf, hwaddr len); /* address_space_ld*: load from an address space * address_space_st*: store to an address space @@ -2334,7 +2334,7 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, /* Internal functions, part of the implementation of address_space_read. */ MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, hwaddr len); + MemTxAttrs attrs, void *buf, hwaddr len); MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, MemTxAttrs attrs, void *buf, hwaddr len, hwaddr addr1, hwaddr l, @@ -2374,7 +2374,7 @@ static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write) */ static inline __attribute__((__always_inline__)) MemTxResult address_space_read(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, + MemTxAttrs attrs, void *buf, hwaddr len) { MemTxResult result = MEMTX_OK; @@ -2433,7 +2433,7 @@ address_space_read_cached(MemoryRegionCache *cache, hwaddr addr, */ static inline void address_space_write_cached(MemoryRegionCache *cache, hwaddr addr, - void *buf, hwaddr len) + const void *buf, hwaddr len) { assert(addr < cache->len && len <= cache->len - addr); if (likely(cache->ptr)) { From patchwork Tue Feb 25 11:50:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403547 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3EBD5138D for ; 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Tue, 25 Feb 2020 03:52:25 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 085/136] hw/net: Avoid casting non-const pointer, use address_space_write() Date: Tue, 25 Feb 2020 12:50:15 +0100 Message-Id: <1582631466-13880-85-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::332 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The NetReceive prototype gets a const buffer: typedef ssize_t (NetReceive)(NetClientState *, const uint8_t *, size_t); We already have the address_space_write() method to write a const buffer to an address space. Use it to avoid: hw/net/i82596.c: In function ‘i82596_receive’: hw/net/i82596.c:644:54: error: passing argument 4 of ‘address_space_rw’ discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] This commit was produced with the included Coccinelle script scripts/coccinelle/exec_rw_const. Signed-off-by: Philippe Mathieu-Daudé --- hw/net/dp8393x.c | 3 +-- hw/net/i82596.c | 4 ++-- scripts/coccinelle/exec_rw_const.cocci | 14 ++++++++++++++ 3 files changed, 17 insertions(+), 4 deletions(-) diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index a134d43..580ae44 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -787,8 +787,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, /* Put packet into RBA */ DPRINTF("Receive packet at %08x\n", dp8393x_crba(s)); address = dp8393x_crba(s); - address_space_rw(&s->as, address, - MEMTXATTRS_UNSPECIFIED, (uint8_t *)buf, rx_len, 1); + address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED, buf, rx_len); address += rx_len; address_space_rw(&s->as, address, MEMTXATTRS_UNSPECIFIED, (uint8_t *)&checksum, 4, 1); diff --git a/hw/net/i82596.c b/hw/net/i82596.c index 3a0e1ec..a292984 100644 --- a/hw/net/i82596.c +++ b/hw/net/i82596.c @@ -640,8 +640,8 @@ ssize_t i82596_receive(NetClientState *nc, const uint8_t *buf, size_t sz) } rba = get_uint32(rbd + 8); /* printf("rba is 0x%x\n", rba); */ - address_space_rw(&address_space_memory, rba, - MEMTXATTRS_UNSPECIFIED, (void *)buf, num, 1); + address_space_write(&address_space_memory, rba, + MEMTXATTRS_UNSPECIFIED, buf, num); rba += num; buf += num; len -= num; diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci index 7e42682..87897dd 100644 --- a/scripts/coccinelle/exec_rw_const.cocci +++ b/scripts/coccinelle/exec_rw_const.cocci @@ -9,6 +9,20 @@ --dir . */ +// Use address_space_write instead of casting to non-const +@@ +type T; +const T *V; +expression E1, E2, E3, E4; +@@ +( +- address_space_rw(E1, E2, E3, (T *)V, E4, 1) ++ address_space_write(E1, E2, E3, V, E4) +| +- address_space_rw(E1, E2, E3, (void *)V, E4, 1) ++ address_space_write(E1, E2, E3, V, E4) +) + // Remove useless cast @@ expression E1, E2, E3, E4; From patchwork Tue Feb 25 11:50:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403479 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D060314E3 for ; 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Tue, 25 Feb 2020 03:52:26 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 086/136] Remove unnecessary cast when using the address_space API Date: Tue, 25 Feb 2020 12:50:16 +0100 Message-Id: <1582631466-13880-86-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé This commit was produced with the included Coccinelle script scripts/coccinelle/exec_rw_const. Two lines in hw/net/dp8393x.c that Coccinelle produced that were over 80 characters were re-wrapped by hand. Suggested-by: Stefan Weil Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/boot.c | 6 ++---- hw/dma/rc4030.c | 4 ++-- hw/dma/xlnx-zdma.c | 2 +- hw/net/cadence_gem.c | 21 +++++++++------------ hw/net/dp8393x.c | 28 ++++++++++++++-------------- hw/s390x/css.c | 4 ++-- qtest.c | 12 ++++++------ scripts/coccinelle/exec_rw_const.cocci | 15 ++++++++++++++- target/i386/hvf/vmx.h | 2 +- target/i386/hvf/x86_mmu.c | 2 +- target/i386/whpx-all.c | 2 +- target/s390x/mmu_helper.c | 2 +- 12 files changed, 54 insertions(+), 46 deletions(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 0c213ca..fef4072 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -327,8 +327,7 @@ static void set_kernel_args(const struct arm_boot_info *info, AddressSpace *as) cmdline_size = strlen(info->kernel_cmdline); address_space_write(as, p + 8, MEMTXATTRS_UNSPECIFIED, - (const uint8_t *)info->kernel_cmdline, - cmdline_size + 1); + info->kernel_cmdline, cmdline_size + 1); cmdline_size = (cmdline_size >> 2) + 1; WRITE_WORD(p, cmdline_size + 2); WRITE_WORD(p, 0x54410009); @@ -420,8 +419,7 @@ static void set_kernel_args_old(const struct arm_boot_info *info, } s = info->kernel_cmdline; if (s) { - address_space_write(as, p, MEMTXATTRS_UNSPECIFIED, - (const uint8_t *)s, strlen(s) + 1); + address_space_write(as, p, MEMTXATTRS_UNSPECIFIED, s, strlen(s) + 1); } else { WRITE_WORD(p, 0); } diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index c4cf823..ca0becd 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -513,8 +513,8 @@ static IOMMUTLBEntry rc4030_dma_translate(IOMMUMemoryRegion *iommu, hwaddr addr, if (i < s->dma_tl_limit / sizeof(entry)) { entry_address = (s->dma_tl_base & 0x7fffffff) + i * sizeof(entry); if (address_space_read(ret.target_as, entry_address, - MEMTXATTRS_UNSPECIFIED, (unsigned char *)&entry, - sizeof(entry)) == MEMTX_OK) { + MEMTXATTRS_UNSPECIFIED, &entry, sizeof(entry)) + == MEMTX_OK) { ret.translated_addr = entry.frame & ~(DMA_PAGESIZE - 1); ret.perm = IOMMU_RW; } diff --git a/hw/dma/xlnx-zdma.c b/hw/dma/xlnx-zdma.c index 8fb83f5..683abbe 100644 --- a/hw/dma/xlnx-zdma.c +++ b/hw/dma/xlnx-zdma.c @@ -364,7 +364,7 @@ static uint64_t zdma_update_descr_addr(XlnxZDMA *s, bool type, } else { addr = zdma_get_regaddr64(s, basereg); addr += sizeof(s->dsc_dst); - address_space_rw(s->dma_as, addr, s->attr, (void *) &next, 8, false); + address_space_rw(s->dma_as, addr, s->attr, &next, 8, false); zdma_put_regaddr64(s, basereg, next); } return next; diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 871fcf2..ddabdb3 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -871,7 +871,7 @@ static void gem_get_rx_desc(CadenceGEMState *s, int q) /* read current descriptor */ address_space_read(&s->dma_as, desc_addr, MEMTXATTRS_UNSPECIFIED, - (uint8_t *)s->rx_desc[q], + s->rx_desc[q], sizeof(uint32_t) * gem_get_desc_len(s, true)); /* Descriptor owned by software ? */ @@ -1029,9 +1029,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size) /* Descriptor write-back. */ desc_addr = gem_get_rx_desc_addr(s, q); - address_space_write(&s->dma_as, desc_addr, - MEMTXATTRS_UNSPECIFIED, - (uint8_t *)s->rx_desc[q], + address_space_write(&s->dma_as, desc_addr, MEMTXATTRS_UNSPECIFIED, + s->rx_desc[q], sizeof(uint32_t) * gem_get_desc_len(s, true)); /* Next descriptor */ @@ -1137,7 +1136,7 @@ static void gem_transmit(CadenceGEMState *s) DB_PRINT("read descriptor 0x%" HWADDR_PRIx "\n", packet_desc_addr); address_space_read(&s->dma_as, packet_desc_addr, - MEMTXATTRS_UNSPECIFIED, (uint8_t *)desc, + MEMTXATTRS_UNSPECIFIED, desc, sizeof(uint32_t) * gem_get_desc_len(s, false)); /* Handle all descriptors owned by hardware */ while (tx_desc_get_used(desc) == 0) { @@ -1185,14 +1184,12 @@ static void gem_transmit(CadenceGEMState *s) * the processor. */ address_space_read(&s->dma_as, desc_addr, - MEMTXATTRS_UNSPECIFIED, - (uint8_t *)desc_first, + MEMTXATTRS_UNSPECIFIED, desc_first, sizeof(desc_first)); tx_desc_set_used(desc_first); address_space_write(&s->dma_as, desc_addr, - MEMTXATTRS_UNSPECIFIED, - (uint8_t *)desc_first, - sizeof(desc_first)); + MEMTXATTRS_UNSPECIFIED, desc_first, + sizeof(desc_first)); /* Advance the hardware current descriptor past this packet */ if (tx_desc_get_wrap(desc)) { s->tx_desc_addr[q] = s->regs[GEM_TXQBASE]; @@ -1246,8 +1243,8 @@ static void gem_transmit(CadenceGEMState *s) } DB_PRINT("read descriptor 0x%" HWADDR_PRIx "\n", packet_desc_addr); address_space_read(&s->dma_as, packet_desc_addr, - MEMTXATTRS_UNSPECIFIED, (uint8_t *)desc, - sizeof(uint32_t) * gem_get_desc_len(s, false)); + MEMTXATTRS_UNSPECIFIED, desc, + sizeof(uint32_t) * gem_get_desc_len(s, false)); } if (tx_desc_get_used(desc)) { diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index 580ae44..b461101 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -276,7 +276,7 @@ static void dp8393x_do_load_cam(dp8393xState *s) while (s->regs[SONIC_CDC] & 0x1f) { /* Fill current entry */ address_space_rw(&s->as, dp8393x_cdp(s), - MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, 0); s->cam[index][0] = dp8393x_get(s, width, 1) & 0xff; s->cam[index][1] = dp8393x_get(s, width, 1) >> 8; s->cam[index][2] = dp8393x_get(s, width, 2) & 0xff; @@ -294,7 +294,7 @@ static void dp8393x_do_load_cam(dp8393xState *s) /* Read CAM enable */ address_space_rw(&s->as, dp8393x_cdp(s), - MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, 0); s->regs[SONIC_CE] = dp8393x_get(s, width, 0); DPRINTF("load cam done. cam enable mask 0x%04x\n", s->regs[SONIC_CE]); @@ -312,7 +312,7 @@ static void dp8393x_do_read_rra(dp8393xState *s) width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1; size = sizeof(uint16_t) * 4 * width; address_space_rw(&s->as, dp8393x_rrp(s), - MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, 0); /* Update SONIC registers */ s->regs[SONIC_CRBA0] = dp8393x_get(s, width, 0); @@ -427,7 +427,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) s->regs[SONIC_TTDA] = s->regs[SONIC_CTDA]; DPRINTF("Transmit packet at %08x\n", dp8393x_ttda(s)); address_space_rw(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width, - MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, 0); tx_len = 0; /* Update registers */ @@ -461,7 +461,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) size = sizeof(uint16_t) * 3 * width; address_space_rw(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * (4 + 3 * i) * width, - MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, 0); s->regs[SONIC_TSA0] = dp8393x_get(s, width, 0); s->regs[SONIC_TSA1] = dp8393x_get(s, width, 1); s->regs[SONIC_TFS] = dp8393x_get(s, width, 2); @@ -495,17 +495,17 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) s->regs[SONIC_TCR] & 0x0fff); /* status */ size = sizeof(uint16_t) * width; address_space_rw(&s->as, - dp8393x_ttda(s), - MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 1); + dp8393x_ttda(s), + MEMTXATTRS_UNSPECIFIED, s->data, size, 1); if (!(s->regs[SONIC_CR] & SONIC_CR_HTX)) { /* Read footer of packet */ size = sizeof(uint16_t) * width; address_space_rw(&s->as, - dp8393x_ttda(s) + + dp8393x_ttda(s) + sizeof(uint16_t) * (4 + 3 * s->regs[SONIC_TFC]) * width, - MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, 0); s->regs[SONIC_CTDA] = dp8393x_get(s, width, 0) & ~0x1; if (dp8393x_get(s, width, 0) & 0x1) { /* EOL detected */ @@ -768,7 +768,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, size = sizeof(uint16_t) * 1 * width; address = dp8393x_crda(s) + sizeof(uint16_t) * 5 * width; address_space_rw(&s->as, address, MEMTXATTRS_UNSPECIFIED, - (uint8_t *)s->data, size, 0); + s->data, size, 0); if (dp8393x_get(s, width, 0) & 0x1) { /* Still EOL ; stop reception */ return -1; @@ -790,7 +790,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED, buf, rx_len); address += rx_len; address_space_rw(&s->as, address, - MEMTXATTRS_UNSPECIFIED, (uint8_t *)&checksum, 4, 1); + MEMTXATTRS_UNSPECIFIED, &checksum, 4, 1); rx_len += 4; s->regs[SONIC_CRBA1] = address >> 16; s->regs[SONIC_CRBA0] = address & 0xffff; @@ -819,12 +819,12 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, dp8393x_put(s, width, 4, s->regs[SONIC_RSC]); /* seq_no */ size = sizeof(uint16_t) * 5 * width; address_space_rw(&s->as, dp8393x_crda(s), - MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 1); + MEMTXATTRS_UNSPECIFIED, s->data, size, 1); /* Move to next descriptor */ size = sizeof(uint16_t) * width; address_space_rw(&s->as, dp8393x_crda(s) + sizeof(uint16_t) * 5 * width, - MEMTXATTRS_UNSPECIFIED, (uint8_t *)s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, 0); s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0); if (s->regs[SONIC_LLFA] & 0x1) { /* EOL detected */ @@ -838,7 +838,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, } s->data[0] = 0; address_space_rw(&s->as, offset, MEMTXATTRS_UNSPECIFIED, - (uint8_t *)s->data, sizeof(uint16_t), 1); + s->data, sizeof(uint16_t), 1); s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA]; s->regs[SONIC_ISR] |= SONIC_ISR_PKTRX; s->regs[SONIC_RSC] = (s->regs[SONIC_RSC] & 0xff00) | (((s->regs[SONIC_RSC] & 0x00ff) + 1) & 0x00ff); diff --git a/hw/s390x/css.c b/hw/s390x/css.c index 844caab..f27f8c4 100644 --- a/hw/s390x/css.c +++ b/hw/s390x/css.c @@ -875,7 +875,7 @@ static inline int ida_read_next_idaw(CcwDataStream *cds) return -EINVAL; /* channel program check */ } ret = address_space_rw(&address_space_memory, idaw_addr, - MEMTXATTRS_UNSPECIFIED, (void *) &idaw.fmt2, + MEMTXATTRS_UNSPECIFIED, &idaw.fmt2, sizeof(idaw.fmt2), false); cds->cda = be64_to_cpu(idaw.fmt2); } else { @@ -884,7 +884,7 @@ static inline int ida_read_next_idaw(CcwDataStream *cds) return -EINVAL; /* channel program check */ } ret = address_space_rw(&address_space_memory, idaw_addr, - MEMTXATTRS_UNSPECIFIED, (void *) &idaw.fmt1, + MEMTXATTRS_UNSPECIFIED, &idaw.fmt1, sizeof(idaw.fmt1), false); cds->cda = be64_to_cpu(idaw.fmt1); if (cds->cda & 0x80000000) { diff --git a/qtest.c b/qtest.c index 12432f9..65e33b8 100644 --- a/qtest.c +++ b/qtest.c @@ -435,17 +435,17 @@ static void qtest_process_command(CharBackend *chr, gchar **words) uint16_t data = value; tswap16s(&data); address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - (uint8_t *) &data, 2, true); + &data, 2, true); } else if (words[0][5] == 'l') { uint32_t data = value; tswap32s(&data); address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - (uint8_t *) &data, 4, true); + &data, 4, true); } else if (words[0][5] == 'q') { uint64_t data = value; tswap64s(&data); address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - (uint8_t *) &data, 8, true); + &data, 8, true); } qtest_send_prefix(chr); qtest_send(chr, "OK\n"); @@ -469,16 +469,16 @@ static void qtest_process_command(CharBackend *chr, gchar **words) } else if (words[0][4] == 'w') { uint16_t data; address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - (uint8_t *) &data, 2, false); + &data, 2, false); value = tswap16(data); } else if (words[0][4] == 'l') { uint32_t data; address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - (uint8_t *) &data, 4, false); + &data, 4, false); value = tswap32(data); } else if (words[0][4] == 'q') { address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - (uint8_t *) &value, 8, false); + &value, 8, false); tswap64s(&value); } qtest_send_prefix(chr); diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci index 87897dd..fe2cf91 100644 --- a/scripts/coccinelle/exec_rw_const.cocci +++ b/scripts/coccinelle/exec_rw_const.cocci @@ -25,10 +25,23 @@ expression E1, E2, E3, E4; // Remove useless cast @@ -expression E1, E2, E3, E4; +expression E1, E2, E3, E4, E5, E6; type T; @@ ( +- address_space_rw(E1, E2, E3, (T *)(E4), E5, E6) ++ address_space_rw(E1, E2, E3, E4, E5, E6) +| +- address_space_read(E1, E2, E3, (T *)(E4), E5) ++ address_space_read(E1, E2, E3, E4, E5) +| +- address_space_write(E1, E2, E3, (T *)(E4), E5) ++ address_space_write(E1, E2, E3, E4, E5) +| +- address_space_write_rom(E1, E2, E3, (T *)(E4), E5) ++ address_space_write_rom(E1, E2, E3, E4, E5) +| + - dma_memory_read(E1, E2, (T *)(E3), E4) + dma_memory_read(E1, E2, E3, E4) | diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h index eb8894c..a115ca1 100644 --- a/target/i386/hvf/vmx.h +++ b/target/i386/hvf/vmx.h @@ -128,7 +128,7 @@ static inline void macvm_set_cr0(hv_vcpuid_t vcpu, uint64_t cr0) address_space_rw(&address_space_memory, rvmcs(vcpu, VMCS_GUEST_CR3) & ~0x1f, MEMTXATTRS_UNSPECIFIED, - (uint8_t *)pdpte, 32, 0); + pdpte, 32, 0); /* Only set PDPTE when appropriate. */ for (i = 0; i < 4; i++) { wvmcs(vcpu, VMCS_GUEST_PDPTE0 + i * 2, pdpte[i]); diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/hvf/x86_mmu.c index d5a0efe..6a62064 100644 --- a/target/i386/hvf/x86_mmu.c +++ b/target/i386/hvf/x86_mmu.c @@ -89,7 +89,7 @@ static bool get_pt_entry(struct CPUState *cpu, struct gpt_translation *pt, index = gpt_entry(pt->gva, level, pae); address_space_rw(&address_space_memory, gpa + index * pte_size(pae), - MEMTXATTRS_UNSPECIFIED, (uint8_t *)&pte, pte_size(pae), 0); + MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae), 0); pt->pte[level - 1] = pte; diff --git a/target/i386/whpx-all.c b/target/i386/whpx-all.c index 3ed2aa1..0a1f244 100644 --- a/target/i386/whpx-all.c +++ b/target/i386/whpx-all.c @@ -540,7 +540,7 @@ static HRESULT CALLBACK whpx_emu_ioport_callback( { MemTxAttrs attrs = { 0 }; address_space_rw(&address_space_io, IoAccess->Port, attrs, - (uint8_t *)&IoAccess->Data, IoAccess->AccessSize, + &IoAccess->Data, IoAccess->AccessSize, IoAccess->Direction); return S_OK; } diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index c9f3f34..0be2f30 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -106,7 +106,7 @@ static inline bool read_table_entry(CPUS390XState *env, hwaddr gaddr, * We treat them as absolute addresses and don't wrap them. */ if (unlikely(address_space_read(cs->as, gaddr, MEMTXATTRS_UNSPECIFIED, - (uint8_t *)entry, sizeof(*entry)) != + entry, sizeof(*entry)) != MEMTX_OK)) { return false; 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X-Received-From: 2a00:1450:4864:20::42c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé As we are only dealing with a blob buffer, use a void pointer argument. This will let us simplify other APIs. Signed-off-by: Philippe Mathieu-Daudé --- exec.c | 8 +++++--- include/exec/cpu-all.h | 2 +- include/exec/cpu-common.h | 2 +- 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/exec.c b/exec.c index 3d6ee06..58664ac 100644 --- a/exec.c +++ b/exec.c @@ -3019,11 +3019,12 @@ MemoryRegion *get_system_io(void) /* physical memory access (slow version, mainly for debug) */ #if defined(CONFIG_USER_ONLY) int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, - uint8_t *buf, target_ulong len, int is_write) + void *ptr, target_ulong len, int is_write) { int flags; target_ulong l, page; void * p; + uint8_t *buf = ptr; while (len > 0) { page = addr & TARGET_PAGE_MASK; @@ -3311,7 +3312,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, } } -void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, +void cpu_physical_memory_rw(hwaddr addr, void *buf, hwaddr len, int is_write) { address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, @@ -3789,10 +3790,11 @@ address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr, /* virtual memory access for debug (includes writing to ROM) */ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, - uint8_t *buf, target_ulong len, int is_write) + void *ptr, target_ulong len, int is_write) { hwaddr phys_addr; target_ulong l, page; + uint8_t *buf = ptr; cpu_synchronize_state(cpu); while (len > 0) { diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index e96781a..49e96ca 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -388,7 +388,7 @@ void dump_opcount_info(void); #endif /* !CONFIG_USER_ONLY */ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, - uint8_t *buf, target_ulong len, int is_write); + void *ptr, target_ulong len, int is_write); int cpu_exec(CPUState *cpu); diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 81753bb..55e5740 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -69,7 +69,7 @@ void qemu_ram_unset_migratable(RAMBlock *rb); size_t qemu_ram_pagesize(RAMBlock *block); size_t qemu_ram_pagesize_largest(void); -void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, +void cpu_physical_memory_rw(hwaddr addr, void *buf, hwaddr len, int is_write); static inline void cpu_physical_memory_read(hwaddr addr, void *buf, hwaddr len) From patchwork Tue Feb 25 11:50:18 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 03:52:27 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 088/136] Remove unnecessary cast when using the cpu_[physical]_memory API Date: Tue, 25 Feb 2020 12:50:18 +0100 Message-Id: <1582631466-13880-88-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé This commit was produced with the included Coccinelle script scripts/coccinelle/exec_rw_const. Suggested-by: Stefan Weil Signed-off-by: Philippe Mathieu-Daudé --- hw/display/omap_lcdc.c | 10 +++++----- hw/dma/etraxfs_dma.c | 25 ++++++++++--------------- hw/scsi/vmw_pvscsi.c | 8 +++----- scripts/coccinelle/exec_rw_const.cocci | 10 ++++++++++ target/i386/hax-all.c | 6 +++--- 5 files changed, 31 insertions(+), 28 deletions(-) diff --git a/hw/display/omap_lcdc.c b/hw/display/omap_lcdc.c index 6ad13f2..fa4a381 100644 --- a/hw/display/omap_lcdc.c +++ b/hw/display/omap_lcdc.c @@ -91,9 +91,9 @@ static void omap_update_display(void *opaque) frame_offset = 0; if (omap_lcd->plm != 2) { - cpu_physical_memory_read(omap_lcd->dma->phys_framebuffer[ - omap_lcd->dma->current_frame], - (void *)omap_lcd->palette, 0x200); + cpu_physical_memory_read( + omap_lcd->dma->phys_framebuffer[omap_lcd->dma->current_frame], + omap_lcd->palette, 0x200); switch (omap_lcd->palette[0] >> 12 & 7) { case 3 ... 7: frame_offset += 0x200; @@ -244,8 +244,8 @@ static void omap_lcd_update(struct omap_lcd_panel_s *s) { if (s->plm != 2 && !s->palette_done) { cpu_physical_memory_read( - s->dma->phys_framebuffer[s->dma->current_frame], - (void *)s->palette, 0x200); + s->dma->phys_framebuffer[s->dma->current_frame], + s->palette, 0x200); s->palette_done = 1; omap_lcd_interrupts(s); } diff --git a/hw/dma/etraxfs_dma.c b/hw/dma/etraxfs_dma.c index 47e1c6d..c4334e8 100644 --- a/hw/dma/etraxfs_dma.c +++ b/hw/dma/etraxfs_dma.c @@ -225,9 +225,8 @@ static void channel_load_g(struct fs_dma_ctrl *ctrl, int c) hwaddr addr = channel_reg(ctrl, c, RW_GROUP); /* Load and decode. FIXME: handle endianness. */ - cpu_physical_memory_read (addr, - (void *) &ctrl->channels[c].current_g, - sizeof ctrl->channels[c].current_g); + cpu_physical_memory_read(addr, &ctrl->channels[c].current_g, + sizeof(ctrl->channels[c].current_g)); } static void dump_c(int ch, struct dma_descr_context *c) @@ -257,9 +256,8 @@ static void channel_load_c(struct fs_dma_ctrl *ctrl, int c) hwaddr addr = channel_reg(ctrl, c, RW_GROUP_DOWN); /* Load and decode. FIXME: handle endianness. */ - cpu_physical_memory_read (addr, - (void *) &ctrl->channels[c].current_c, - sizeof ctrl->channels[c].current_c); + cpu_physical_memory_read(addr, &ctrl->channels[c].current_c, + sizeof(ctrl->channels[c].current_c)); D(dump_c(c, &ctrl->channels[c].current_c)); /* I guess this should update the current pos. */ @@ -275,9 +273,8 @@ static void channel_load_d(struct fs_dma_ctrl *ctrl, int c) /* Load and decode. FIXME: handle endianness. */ D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, c, addr)); - cpu_physical_memory_read (addr, - (void *) &ctrl->channels[c].current_d, - sizeof ctrl->channels[c].current_d); + cpu_physical_memory_read(addr, &ctrl->channels[c].current_d, + sizeof(ctrl->channels[c].current_d)); D(dump_d(c, &ctrl->channels[c].current_d)); ctrl->channels[c].regs[RW_DATA] = addr; @@ -290,9 +287,8 @@ static void channel_store_c(struct fs_dma_ctrl *ctrl, int c) /* Encode and store. FIXME: handle endianness. */ D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, c, addr)); D(dump_d(c, &ctrl->channels[c].current_d)); - cpu_physical_memory_write (addr, - (void *) &ctrl->channels[c].current_c, - sizeof ctrl->channels[c].current_c); + cpu_physical_memory_write(addr, &ctrl->channels[c].current_c, + sizeof(ctrl->channels[c].current_c)); } static void channel_store_d(struct fs_dma_ctrl *ctrl, int c) @@ -301,9 +297,8 @@ static void channel_store_d(struct fs_dma_ctrl *ctrl, int c) /* Encode and store. FIXME: handle endianness. */ D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, c, addr)); - cpu_physical_memory_write (addr, - (void *) &ctrl->channels[c].current_d, - sizeof ctrl->channels[c].current_d); + cpu_physical_memory_write(addr, &ctrl->channels[c].current_d, + sizeof(ctrl->channels[c].current_d)); } static inline void channel_stop(struct fs_dma_ctrl *ctrl, int c) diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index e4ee2e6..c91352c 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -404,8 +404,7 @@ pvscsi_cmp_ring_put(PVSCSIState *s, struct PVSCSIRingCmpDesc *cmp_desc) cmp_descr_pa = pvscsi_ring_pop_cmp_descr(&s->rings); trace_pvscsi_cmp_ring_put(cmp_descr_pa); - cpu_physical_memory_write(cmp_descr_pa, (void *)cmp_desc, - sizeof(*cmp_desc)); + cpu_physical_memory_write(cmp_descr_pa, cmp_desc, sizeof(*cmp_desc)); } static void @@ -415,8 +414,7 @@ pvscsi_msg_ring_put(PVSCSIState *s, struct PVSCSIRingMsgDesc *msg_desc) msg_descr_pa = pvscsi_ring_pop_msg_descr(&s->rings); trace_pvscsi_msg_ring_put(msg_descr_pa); - cpu_physical_memory_write(msg_descr_pa, (void *)msg_desc, - sizeof(*msg_desc)); + cpu_physical_memory_write(msg_descr_pa, msg_desc, sizeof(*msg_desc)); } static void @@ -491,7 +489,7 @@ pvscsi_get_next_sg_elem(PVSCSISGState *sg) { struct PVSCSISGElement elem; - cpu_physical_memory_read(sg->elemAddr, (void *)&elem, sizeof(elem)); + cpu_physical_memory_read(sg->elemAddr, &elem, sizeof(elem)); if ((elem.flags & ~PVSCSI_KNOWN_FLAGS) != 0) { /* * There is PVSCSI_SGE_FLAG_CHAIN_ELEMENT flag described in diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci index fe2cf91..9c14165 100644 --- a/scripts/coccinelle/exec_rw_const.cocci +++ b/scripts/coccinelle/exec_rw_const.cocci @@ -42,6 +42,16 @@ type T; + address_space_write_rom(E1, E2, E3, E4, E5) | +- cpu_physical_memory_rw(E1, (T *)(E2), E3, E4) ++ cpu_physical_memory_rw(E1, E2, E3, E4) +| +- cpu_physical_memory_read(E1, (T *)(E2), E3) ++ cpu_physical_memory_read(E1, E2, E3) +| +- cpu_physical_memory_write(E1, (T *)(E2), E3) ++ cpu_physical_memory_write(E1, E2, E3) +| + - dma_memory_read(E1, E2, (T *)(E3), E4) + dma_memory_read(E1, E2, E3, E4) | diff --git a/target/i386/hax-all.c b/target/i386/hax-all.c index a8b6e5a..a9cc51e 100644 --- a/target/i386/hax-all.c +++ b/target/i386/hax-all.c @@ -367,7 +367,7 @@ static int hax_accel_init(MachineState *ms) static int hax_handle_fastmmio(CPUArchState *env, struct hax_fastmmio *hft) { if (hft->direction < 2) { - cpu_physical_memory_rw(hft->gpa, (uint8_t *) &hft->value, hft->size, + cpu_physical_memory_rw(hft->gpa, &hft->value, hft->size, hft->direction); } else { /* @@ -376,8 +376,8 @@ static int hax_handle_fastmmio(CPUArchState *env, struct hax_fastmmio *hft) * hft->direction == 2: gpa ==> gpa2 */ uint64_t value; - cpu_physical_memory_rw(hft->gpa, (uint8_t *) &value, hft->size, 0); - cpu_physical_memory_rw(hft->gpa2, (uint8_t *) &value, hft->size, 1); + cpu_physical_memory_rw(hft->gpa, &value, hft->size, 0); + cpu_physical_memory_rw(hft->gpa2, &value, hft->size, 1); } return 0; From patchwork Tue Feb 25 11:50:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403653 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F30A01580 for ; Tue, 25 Feb 2020 12:51:45 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C9E6521556 for ; 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Tue, 25 Feb 2020 03:52:28 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 089/136] hw/ide/internal: Remove unused DMARestartFunc typedef Date: Tue, 25 Feb 2020 12:50:19 +0100 Message-Id: <1582631466-13880-89-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::334 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The IDE DMA restart callback has been removed in commit fe09c7c9f0. Fixes: fe09c7c9f0 Signed-off-by: Philippe Mathieu-Daudé --- include/hw/ide/internal.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index 52ec197..ce766ac 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -326,7 +326,6 @@ typedef int DMAIntFunc(IDEDMA *, int); typedef int32_t DMAInt32Func(IDEDMA *, int32_t len); typedef void DMAu32Func(IDEDMA *, uint32_t); typedef void DMAStopFunc(IDEDMA *, bool); -typedef void DMARestartFunc(void *, int, RunState); struct unreported_events { bool eject_request; From patchwork Tue Feb 25 11:50:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403581 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4954F13A4 for ; Tue, 25 Feb 2020 12:40:52 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1F55420637 for ; Tue, 25 Feb 2020 12:40:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="R6N8wbu/" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1F55420637 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:54432 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6ZW7-00007Q-9h for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 07:40:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50091) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6YlM-0001yv-Lr for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6YlL-0001lk-DO for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:32 -0500 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:38121) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6YlL-0001gm-5o for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:31 -0500 Received: by mail-wr1-x444.google.com with SMTP id e8so14380308wrm.5 for ; Tue, 25 Feb 2020 03:52:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=u4g6uRiXFIEOKcE3rCDO5ED3c3g1EUSc75nl9BzOigw=; b=R6N8wbu/CNIwMB1ugk1KGCdfIfoc9zvwIzlX198pt6cCt+yLSpxyz6X7/DZtToDJEz TTB5DdAQpIB7aIf/ewEuuTgOo6Xu/vpNO3hGDZLPBYThqpH8uCNqaQW4H+pPIHOdDcSh 9W2D1DnU6HJA+qGmw7va/tIqUerGT/2wi5uIYeZNZ9s3oC3H0yYbL77J9sCsZlTKbazS FX3106TO+WQj+4uHm46OVZqCfr5fJROqgNpUpF+cBmJ5Rlbh7M/wr+XsWypUEDHRxtQW uthAUOaWuYJswdfbO/NQOV0FhkpbxAR2RHxHpj/C6FHGlf+OC7fiHfbVDb8a1K+8zo11 CEdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=u4g6uRiXFIEOKcE3rCDO5ED3c3g1EUSc75nl9BzOigw=; b=IqOVlOrPq5YMe6CMyelA/vXJnuxppLw8H3rTbBf8Y9kGjIA7cU8118FD4HIJ0blN0v LzwFxAVf1nA696kuQQeDjT0DoY/kquU43KajLkifQvItrD7BvzoVXtWCroDDrbTfX0L5 sTlxp2oYzBmb08WvknvuNMVv3/oMx80PqJT8p5Y7Cygf83ytoCHcxURbNS4KJ4o4wOd8 0FxVTuJklSq5FmuyTAc6sqixQwu4sLuFmCKigdda0EkHf6OkdK1VIlxDkEi/ZAPgFD+Q kOzOT7gV03ccPLqvQDpS1mDDm+Xr5iwFYfqsEAt4AGrzmkLueR9Qcu6MEZM7bCclp1Fu ik7g== X-Gm-Message-State: APjAAAWm7yEgp1o9f2PwcsQAPYH/9Xj2eE5WwAz59ggQQdyQ2zMAPT2h 7XXV/EM+TGLoOXR30hwfq0V8ZJyz X-Google-Smtp-Source: APXvYqzdPO3iVG22YphYVVbvytHnTeUdR/USNf6Tw+uVA42RN2OA7s1WZRf+9FLqeDkohKgGWg+ClA== X-Received: by 2002:a05:6000:1208:: with SMTP id e8mr76272370wrx.351.1582631549911; Tue, 25 Feb 2020 03:52:29 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:29 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 090/136] hw/ide: Let the DMAIntFunc prototype use a boolean 'is_write' argument Date: Tue, 25 Feb 2020 12:50:20 +0100 Message-Id: <1582631466-13880-90-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The 'is_write' argument is either 0 or 1. Convert it to a boolean type. Signed-off-by: Philippe Mathieu-Daudé --- hw/dma/rc4030.c | 6 +++--- hw/ide/ahci.c | 2 +- hw/ide/core.c | 2 +- hw/ide/macio.c | 2 +- hw/ide/pci.c | 2 +- include/hw/ide/internal.h | 2 +- 6 files changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index ca0becd..21e2c36 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -590,7 +590,7 @@ static const VMStateDescription vmstate_rc4030 = { }; static void rc4030_do_dma(void *opaque, int n, uint8_t *buf, - int len, int is_write) + int len, bool is_write) { rc4030State *s = opaque; hwaddr dma_addr; @@ -630,13 +630,13 @@ struct rc4030DMAState { void rc4030_dma_read(void *dma, uint8_t *buf, int len) { rc4030_dma s = dma; - rc4030_do_dma(s->opaque, s->n, buf, len, 0); + rc4030_do_dma(s->opaque, s->n, buf, len, false); } void rc4030_dma_write(void *dma, uint8_t *buf, int len) { rc4030_dma s = dma; - rc4030_do_dma(s->opaque, s->n, buf, len, 1); + rc4030_do_dma(s->opaque, s->n, buf, len, true); } static rc4030_dma *rc4030_allocate_dmas(void *opaque, int n) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 68264a2..13d91e1 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -1461,7 +1461,7 @@ static void ahci_commit_buf(IDEDMA *dma, uint32_t tx_bytes) ad->cur_cmd->status = cpu_to_le32(tx_bytes); } -static int ahci_dma_rw_buf(IDEDMA *dma, int is_write) +static int ahci_dma_rw_buf(IDEDMA *dma, bool is_write) { AHCIDevice *ad = DO_UPCAST(AHCIDevice, dma, dma); IDEState *s = &ad->port.ifs[0]; diff --git a/hw/ide/core.c b/hw/ide/core.c index 80000eb..689bb36 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -2570,7 +2570,7 @@ static void ide_init1(IDEBus *bus, int unit) ide_sector_write_timer_cb, s); } -static int ide_nop_int(IDEDMA *dma, int x) +static int ide_nop_int(IDEDMA *dma, bool is_write) { return 0; } diff --git a/hw/ide/macio.c b/hw/ide/macio.c index 7a8470e..a9f25e5 100644 --- a/hw/ide/macio.c +++ b/hw/ide/macio.c @@ -376,7 +376,7 @@ static void macio_ide_reset(DeviceState *dev) ide_bus_reset(&d->bus); } -static int ide_nop_int(IDEDMA *dma, int x) +static int ide_nop_int(IDEDMA *dma, bool is_write) { return 0; } diff --git a/hw/ide/pci.c b/hw/ide/pci.c index cce1da8..1a6a287 100644 --- a/hw/ide/pci.c +++ b/hw/ide/pci.c @@ -181,7 +181,7 @@ static int32_t bmdma_prepare_buf(IDEDMA *dma, int32_t limit) } /* return 0 if buffer completed */ -static int bmdma_rw_buf(IDEDMA *dma, int is_write) +static int bmdma_rw_buf(IDEDMA *dma, bool is_write) { BMDMAState *bm = DO_UPCAST(BMDMAState, dma, dma); IDEState *s = bmdma_active_if(bm); diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index ce766ac..1bc1fc7 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -322,7 +322,7 @@ typedef void EndTransferFunc(IDEState *); typedef void DMAStartFunc(IDEDMA *, IDEState *, BlockCompletionFunc *); typedef void DMAVoidFunc(IDEDMA *); -typedef int DMAIntFunc(IDEDMA *, int); +typedef int DMAIntFunc(IDEDMA *, bool); typedef int32_t DMAInt32Func(IDEDMA *, int32_t len); typedef void DMAu32Func(IDEDMA *, uint32_t); typedef void DMAStopFunc(IDEDMA *, bool); From patchwork Tue Feb 25 11:50:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403659 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 04DA61580 for ; Tue, 25 Feb 2020 12:53:49 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CFB2E2176D for ; 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Tue, 25 Feb 2020 03:52:30 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 091/136] hw/virtio: Let virtqueue_map_iovec() use a boolean 'is_write' argument Date: Tue, 25 Feb 2020 12:50:21 +0100 Message-Id: <1582631466-13880-91-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The 'is_write' argument is either 0 or 1. Convert it to a boolean type. Signed-off-by: Philippe Mathieu-Daudé --- hw/virtio/virtio.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 2c5410e..9d06dbe 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -1293,7 +1293,7 @@ static void virtqueue_undo_map_desc(unsigned int out_num, unsigned int in_num, static void virtqueue_map_iovec(VirtIODevice *vdev, struct iovec *sg, hwaddr *addr, unsigned int num_sg, - int is_write) + bool is_write) { unsigned int i; hwaddr len; @@ -1317,8 +1317,9 @@ static void virtqueue_map_iovec(VirtIODevice *vdev, struct iovec *sg, void virtqueue_map(VirtIODevice *vdev, VirtQueueElement *elem) { - virtqueue_map_iovec(vdev, elem->in_sg, elem->in_addr, elem->in_num, 1); - virtqueue_map_iovec(vdev, elem->out_sg, elem->out_addr, elem->out_num, 0); + virtqueue_map_iovec(vdev, elem->in_sg, elem->in_addr, elem->in_num, true); + virtqueue_map_iovec(vdev, elem->out_sg, elem->out_addr, elem->out_num, + false); } static void *virtqueue_alloc_element(size_t sz, unsigned out_num, unsigned in_num) From patchwork Tue Feb 25 11:50:22 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 03:52:31 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 092/136] hw/virtio: Let vhost_memory_map() use a boolean 'is_write' argument Date: Tue, 25 Feb 2020 12:50:22 +0100 Message-Id: <1582631466-13880-92-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The 'is_write' argument is either 0 or 1. Convert it to a boolean type. Signed-off-by: Philippe Mathieu-Daudé --- hw/virtio/vhost.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c index 9edfadc..0d226da 100644 --- a/hw/virtio/vhost.c +++ b/hw/virtio/vhost.c @@ -294,7 +294,7 @@ static int vhost_dev_has_iommu(struct vhost_dev *dev) } static void *vhost_memory_map(struct vhost_dev *dev, hwaddr addr, - hwaddr *plen, int is_write) + hwaddr *plen, bool is_write) { if (!vhost_dev_has_iommu(dev)) { return cpu_physical_memory_map(addr, plen, is_write); @@ -1012,21 +1012,21 @@ static int vhost_virtqueue_start(struct vhost_dev *dev, vq->desc_size = s = l = virtio_queue_get_desc_size(vdev, idx); vq->desc_phys = a; - vq->desc = vhost_memory_map(dev, a, &l, 0); + vq->desc = vhost_memory_map(dev, a, &l, false); if (!vq->desc || l != s) { r = -ENOMEM; goto fail_alloc_desc; } vq->avail_size = s = l = virtio_queue_get_avail_size(vdev, idx); vq->avail_phys = a = virtio_queue_get_avail_addr(vdev, idx); - vq->avail = vhost_memory_map(dev, a, &l, 0); + vq->avail = vhost_memory_map(dev, a, &l, false); if (!vq->avail || l != s) { r = -ENOMEM; goto fail_alloc_avail; } vq->used_size = s = l = virtio_queue_get_used_size(vdev, idx); vq->used_phys = a = virtio_queue_get_used_addr(vdev, idx); - vq->used = vhost_memory_map(dev, a, &l, 1); + vq->used = vhost_memory_map(dev, a, &l, true); if (!vq->used || l != s) { r = -ENOMEM; goto fail_alloc_used; From patchwork Tue Feb 25 11:50:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403491 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 44C3D14E3 for ; Tue, 25 Feb 2020 12:25:40 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1B3E6218AC for ; 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Tue, 25 Feb 2020 03:52:32 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 093/136] exec: Let address_space_unmap() use a boolean 'is_write' argument Date: Tue, 25 Feb 2020 12:50:23 +0100 Message-Id: <1582631466-13880-93-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The 'is_write' argument is either 0 or 1. Convert it to a boolean type. Signed-off-by: Philippe Mathieu-Daudé --- exec.c | 4 ++-- include/exec/memory.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/exec.c b/exec.c index 58664ac..239239d 100644 --- a/exec.c +++ b/exec.c @@ -3598,11 +3598,11 @@ void *address_space_map(AddressSpace *as, } /* Unmaps a memory region previously mapped by address_space_map(). - * Will also mark the memory as dirty if is_write == 1. access_len gives + * Will also mark the memory as dirty if is_write is true. access_len gives * the amount of memory that was actually read or written by the caller. */ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, - int is_write, hwaddr access_len) + bool is_write, hwaddr access_len) { if (buffer != bounce.buffer) { MemoryRegion *mr; diff --git a/include/exec/memory.h b/include/exec/memory.h index afee185..1614d9a 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -2329,7 +2329,7 @@ void *address_space_map(AddressSpace *as, hwaddr addr, * @is_write: indicates the transfer direction */ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, - int is_write, hwaddr access_len); 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Tue, 25 Feb 2020 03:52:33 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:32 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 094/136] Let address_space_rw() calls pass a boolean 'is_write' argument Date: Tue, 25 Feb 2020 12:50:24 +0100 Message-Id: <1582631466-13880-94-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Since its introduction in commit ac1970fbe8, address_space_rw() takes a boolean 'is_write' argument. Fix the codebase by using an explicit boolean type. This commit was produced with the included Coccinelle script scripts/coccinelle/exec_rw_const. Inspired-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- exec.c | 4 ++-- hw/net/dp8393x.c | 27 ++++++++++++++------------- hw/net/i82596.c | 11 ++++++----- hw/net/lasi_i82596.c | 4 ++-- scripts/coccinelle/exec_rw_const.cocci | 12 ++++++++++++ target/i386/hvf/vmx.h | 2 +- target/i386/hvf/x86_mmu.c | 8 ++++---- 7 files changed, 41 insertions(+), 27 deletions(-) diff --git a/exec.c b/exec.c index 239239d..90ac015 100644 --- a/exec.c +++ b/exec.c @@ -3815,8 +3815,8 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf, l); } else { - address_space_rw(cpu->cpu_ases[asidx].as, phys_addr, - attrs, buf, l, 0); + address_space_rw(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf, + l, false); } len -= l; buf += l; diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index b461101..b4363e3 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -276,7 +276,7 @@ static void dp8393x_do_load_cam(dp8393xState *s) while (s->regs[SONIC_CDC] & 0x1f) { /* Fill current entry */ address_space_rw(&s->as, dp8393x_cdp(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, false); s->cam[index][0] = dp8393x_get(s, width, 1) & 0xff; s->cam[index][1] = dp8393x_get(s, width, 1) >> 8; s->cam[index][2] = dp8393x_get(s, width, 2) & 0xff; @@ -294,7 +294,7 @@ static void dp8393x_do_load_cam(dp8393xState *s) /* Read CAM enable */ address_space_rw(&s->as, dp8393x_cdp(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, false); s->regs[SONIC_CE] = dp8393x_get(s, width, 0); DPRINTF("load cam done. cam enable mask 0x%04x\n", s->regs[SONIC_CE]); @@ -312,7 +312,7 @@ static void dp8393x_do_read_rra(dp8393xState *s) width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1; size = sizeof(uint16_t) * 4 * width; address_space_rw(&s->as, dp8393x_rrp(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, false); /* Update SONIC registers */ s->regs[SONIC_CRBA0] = dp8393x_get(s, width, 0); @@ -427,7 +427,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) s->regs[SONIC_TTDA] = s->regs[SONIC_CTDA]; DPRINTF("Transmit packet at %08x\n", dp8393x_ttda(s)); address_space_rw(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, false); tx_len = 0; /* Update registers */ @@ -452,7 +452,8 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) len = sizeof(s->tx_buffer) - tx_len; } address_space_rw(&s->as, dp8393x_tsa(s), - MEMTXATTRS_UNSPECIFIED, &s->tx_buffer[tx_len], len, 0); + MEMTXATTRS_UNSPECIFIED, + &s->tx_buffer[tx_len], len, false); tx_len += len; i++; @@ -461,7 +462,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) size = sizeof(uint16_t) * 3 * width; address_space_rw(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * (4 + 3 * i) * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, false); s->regs[SONIC_TSA0] = dp8393x_get(s, width, 0); s->regs[SONIC_TSA1] = dp8393x_get(s, width, 1); s->regs[SONIC_TFS] = dp8393x_get(s, width, 2); @@ -496,7 +497,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) size = sizeof(uint16_t) * width; address_space_rw(&s->as, dp8393x_ttda(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, 1); + MEMTXATTRS_UNSPECIFIED, s->data, size, true); if (!(s->regs[SONIC_CR] & SONIC_CR_HTX)) { /* Read footer of packet */ @@ -505,7 +506,7 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) dp8393x_ttda(s) + sizeof(uint16_t) * (4 + 3 * s->regs[SONIC_TFC]) * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, false); s->regs[SONIC_CTDA] = dp8393x_get(s, width, 0) & ~0x1; if (dp8393x_get(s, width, 0) & 0x1) { /* EOL detected */ @@ -768,7 +769,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, size = sizeof(uint16_t) * 1 * width; address = dp8393x_crda(s) + sizeof(uint16_t) * 5 * width; address_space_rw(&s->as, address, MEMTXATTRS_UNSPECIFIED, - s->data, size, 0); + s->data, size, false); if (dp8393x_get(s, width, 0) & 0x1) { /* Still EOL ; stop reception */ return -1; @@ -790,7 +791,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED, buf, rx_len); address += rx_len; address_space_rw(&s->as, address, - MEMTXATTRS_UNSPECIFIED, &checksum, 4, 1); + MEMTXATTRS_UNSPECIFIED, &checksum, 4, true); rx_len += 4; s->regs[SONIC_CRBA1] = address >> 16; s->regs[SONIC_CRBA0] = address & 0xffff; @@ -819,12 +820,12 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, dp8393x_put(s, width, 4, s->regs[SONIC_RSC]); /* seq_no */ size = sizeof(uint16_t) * 5 * width; address_space_rw(&s->as, dp8393x_crda(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, 1); + MEMTXATTRS_UNSPECIFIED, s->data, size, true); /* Move to next descriptor */ size = sizeof(uint16_t) * width; address_space_rw(&s->as, dp8393x_crda(s) + sizeof(uint16_t) * 5 * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, 0); + MEMTXATTRS_UNSPECIFIED, s->data, size, false); s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0); if (s->regs[SONIC_LLFA] & 0x1) { /* EOL detected */ @@ -838,7 +839,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, } s->data[0] = 0; address_space_rw(&s->as, offset, MEMTXATTRS_UNSPECIFIED, - s->data, sizeof(uint16_t), 1); + s->data, sizeof(uint16_t), true); s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA]; s->regs[SONIC_ISR] |= SONIC_ISR_PKTRX; s->regs[SONIC_RSC] = (s->regs[SONIC_RSC] & 0xff00) | (((s->regs[SONIC_RSC] & 0x00ff) + 1) & 0x00ff); diff --git a/hw/net/i82596.c b/hw/net/i82596.c index a292984..11537f7 100644 --- a/hw/net/i82596.c +++ b/hw/net/i82596.c @@ -149,7 +149,7 @@ static void i82596_transmit(I82596State *s, uint32_t addr) if (s->nic && len) { assert(len <= sizeof(s->tx_buffer)); address_space_rw(&address_space_memory, tba, - MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len, 0); + MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len, false); DBG(PRINT_PKTHDR("Send", &s->tx_buffer)); DBG(printf("Sending %d bytes\n", len)); qemu_send_packet(qemu_get_queue(s->nic), s->tx_buffer, len); @@ -173,7 +173,7 @@ static void set_individual_address(I82596State *s, uint32_t addr) nc = qemu_get_queue(s->nic); m = s->conf.macaddr.a; address_space_rw(&address_space_memory, addr + 8, - MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN, 0); + MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN, false); qemu_format_nic_info_str(nc, m); trace_i82596_new_mac(nc->info_str); } @@ -192,7 +192,7 @@ static void set_multicast_list(I82596State *s, uint32_t addr) uint8_t multicast_addr[ETH_ALEN]; address_space_rw(&address_space_memory, addr + i * ETH_ALEN, MEMTXATTRS_UNSPECIFIED, - multicast_addr, ETH_ALEN, 0); + multicast_addr, ETH_ALEN, false); DBG(printf("Add multicast entry " MAC_FMT "\n", MAC_ARG(multicast_addr))); unsigned mcast_idx = (net_crc32(multicast_addr, ETH_ALEN) & @@ -261,7 +261,8 @@ static void command_loop(I82596State *s) byte_cnt = MIN(byte_cnt, sizeof(s->config)); /* copy byte_cnt max. */ address_space_rw(&address_space_memory, s->cmd_p + 8, - MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt, 0); + MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt, + false); /* config byte according to page 35ff */ s->config[2] &= 0x82; /* mask valid bits */ s->config[2] |= 0x40; @@ -647,7 +648,7 @@ ssize_t i82596_receive(NetClientState *nc, const uint8_t *buf, size_t sz) len -= num; if (len == 0) { /* copy crc */ address_space_rw(&address_space_memory, rba - 4, - MEMTXATTRS_UNSPECIFIED, crc_ptr, 4, 1); + MEMTXATTRS_UNSPECIFIED, crc_ptr, 4, true); } num |= 0x4000; /* set F BIT */ diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c index 427b3fb..8bff419 100644 --- a/hw/net/lasi_i82596.c +++ b/hw/net/lasi_i82596.c @@ -55,8 +55,8 @@ static void lasi_82596_mem_write(void *opaque, hwaddr addr, * Provided for SeaBIOS only. Write MAC of Network card to addr @val. * Needed for the PDC_LAN_STATION_ID_READ PDC call. */ - address_space_rw(&address_space_memory, val, - MEMTXATTRS_UNSPECIFIED, d->state.conf.macaddr.a, ETH_ALEN, 1); + address_space_rw(&address_space_memory, val, MEMTXATTRS_UNSPECIFIED, + d->state.conf.macaddr.a, ETH_ALEN, true); break; } } diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci index 9c14165..493d79c 100644 --- a/scripts/coccinelle/exec_rw_const.cocci +++ b/scripts/coccinelle/exec_rw_const.cocci @@ -9,6 +9,18 @@ --dir . */ +// Convert to boolean +@@ +expression E1, E2, E3, E4, E5; +@@ +( +- address_space_rw(E1, E2, E3, E4, E5, 0) ++ address_space_rw(E1, E2, E3, E4, E5, false) +| +- address_space_rw(E1, E2, E3, E4, E5, 1) ++ address_space_rw(E1, E2, E3, E4, E5, true) +) + // Use address_space_write instead of casting to non-const @@ type T; diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h index a115ca1..19af029 100644 --- a/target/i386/hvf/vmx.h +++ b/target/i386/hvf/vmx.h @@ -128,7 +128,7 @@ static inline void macvm_set_cr0(hv_vcpuid_t vcpu, uint64_t cr0) address_space_rw(&address_space_memory, rvmcs(vcpu, VMCS_GUEST_CR3) & ~0x1f, MEMTXATTRS_UNSPECIFIED, - pdpte, 32, 0); + pdpte, 32, false); /* Only set PDPTE when appropriate. */ for (i = 0; i < 4; i++) { wvmcs(vcpu, VMCS_GUEST_PDPTE0 + i * 2, pdpte[i]); diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/hvf/x86_mmu.c index 6a62064..451dcc9 100644 --- a/target/i386/hvf/x86_mmu.c +++ b/target/i386/hvf/x86_mmu.c @@ -89,7 +89,7 @@ static bool get_pt_entry(struct CPUState *cpu, struct gpt_translation *pt, index = gpt_entry(pt->gva, level, pae); address_space_rw(&address_space_memory, gpa + index * pte_size(pae), - MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae), 0); + MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae), false); pt->pte[level - 1] = pte; @@ -238,8 +238,8 @@ void vmx_write_mem(struct CPUState *cpu, target_ulong gva, void *data, int bytes if (!mmu_gva_to_gpa(cpu, gva, &gpa)) { VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva); } else { - address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED, - data, copy, 1); + address_space_rw(&address_space_memory, gpa, + MEMTXATTRS_UNSPECIFIED, data, copy, true); } bytes -= copy; @@ -260,7 +260,7 @@ void vmx_read_mem(struct CPUState *cpu, void *data, target_ulong gva, int bytes) VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva); } address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED, - data, copy, 0); + data, copy, false); bytes -= copy; gva += copy; From patchwork Tue Feb 25 11:50:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403689 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0739514E3 for ; Tue, 25 Feb 2020 13:03:28 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C1ECE218AC for ; Tue, 25 Feb 2020 13:03:27 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 03:52:34 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:33 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 095/136] Avoid address_space_rw() with a constant is_write argument Date: Tue, 25 Feb 2020 12:50:25 +0100 Message-Id: <1582631466-13880-95-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell The address_space_rw() function allows either reads or writes depending on the is_write argument passed to it; this is useful when the direction of the access is determined programmatically (as for instance when handling the KVM_EXIT_MMIO exit reason). Under the hood it just calls either address_space_write() or address_space_read_full(). We also use it a lot with a constant is_write argument, though, which has two issues: * when reading "address_space_rw(..., 1)" this is less immediately clear to the reader as being a write than "address_space_write(...)" * calling address_space_rw() bypasses the optimization in address_space_read() that fast-paths reads of a fixed length This commit was produced with the included Coccinelle script scripts/coccinelle/exec_rw_const.cocci. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias Reviewed-by: Laurent Vivier Reviewed-by: Cédric Le Goater Acked-by: Christian Borntraeger Reviewed-by: Cornelia Huck Reviewed-by: Alistair Francis Acked-by: David Gibson Message-Id: <20200218112457.22712-1-peter.maydell@linaro.org> [PMD: Update macvm_set_cr0() reported by Laurent Vivier] Signed-off-by: Philippe Mathieu-Daudé --- accel/kvm/kvm-all.c | 6 +-- dma-helpers.c | 4 +- exec.c | 4 +- hw/dma/xlnx-zdma.c | 11 ++---- hw/net/dp8393x.c | 70 ++++++++++++++++++---------------- hw/net/i82596.c | 22 +++++------ hw/net/lasi_i82596.c | 5 ++- hw/ppc/pnv_lpc.c | 8 ++-- hw/s390x/css.c | 12 +++--- qtest.c | 52 ++++++++++++------------- scripts/coccinelle/exec_rw_const.cocci | 13 +++++++ target/i386/hvf/vmx.h | 7 ++-- target/i386/hvf/x86_mmu.c | 12 +++--- 13 files changed, 119 insertions(+), 107 deletions(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index c111312..0cfe6fd 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -2178,9 +2178,9 @@ void kvm_flush_coalesced_mmio_buffer(void) ent = &ring->coalesced_mmio[ring->first]; if (ent->pio == 1) { - address_space_rw(&address_space_io, ent->phys_addr, - MEMTXATTRS_UNSPECIFIED, ent->data, - ent->len, true); + address_space_write(&address_space_io, ent->phys_addr, + MEMTXATTRS_UNSPECIFIED, ent->data, + ent->len); } else { cpu_physical_memory_write(ent->phys_addr, ent->data, ent->len); } diff --git a/dma-helpers.c b/dma-helpers.c index d3871dc..e8a26e8 100644 --- a/dma-helpers.c +++ b/dma-helpers.c @@ -28,8 +28,8 @@ int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len) memset(fillbuf, c, FILLBUF_SIZE); while (len > 0) { l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE; - error |= address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED, - fillbuf, l, true); + error |= address_space_write(as, addr, MEMTXATTRS_UNSPECIFIED, + fillbuf, l); len -= l; addr += l; } diff --git a/exec.c b/exec.c index 90ac015..ec6e460 100644 --- a/exec.c +++ b/exec.c @@ -3815,8 +3815,8 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, address_space_write_rom(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf, l); } else { - address_space_rw(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf, - l, false); + address_space_read(cpu->cpu_ases[asidx].as, phys_addr, attrs, buf, + l); } len -= l; buf += l; diff --git a/hw/dma/xlnx-zdma.c b/hw/dma/xlnx-zdma.c index 683abbe..1c1b142 100644 --- a/hw/dma/xlnx-zdma.c +++ b/hw/dma/xlnx-zdma.c @@ -311,8 +311,7 @@ static bool zdma_load_descriptor(XlnxZDMA *s, uint64_t addr, void *buf) return false; } - address_space_rw(s->dma_as, addr, s->attr, - buf, sizeof(XlnxZDMADescr), false); + address_space_read(s->dma_as, addr, s->attr, buf, sizeof(XlnxZDMADescr)); return true; } @@ -364,7 +363,7 @@ static uint64_t zdma_update_descr_addr(XlnxZDMA *s, bool type, } else { addr = zdma_get_regaddr64(s, basereg); addr += sizeof(s->dsc_dst); - address_space_rw(s->dma_as, addr, s->attr, &next, 8, false); + address_space_read(s->dma_as, addr, s->attr, &next, 8); zdma_put_regaddr64(s, basereg, next); } return next; @@ -416,8 +415,7 @@ static void zdma_write_dst(XlnxZDMA *s, uint8_t *buf, uint32_t len) } } - address_space_rw(s->dma_as, s->dsc_dst.addr, s->attr, buf, dlen, - true); + address_space_write(s->dma_as, s->dsc_dst.addr, s->attr, buf, dlen); if (burst_type == AXI_BURST_INCR) { s->dsc_dst.addr += dlen; } @@ -493,8 +491,7 @@ static void zdma_process_descr(XlnxZDMA *s) len = s->cfg.bus_width / 8; } } else { - address_space_rw(s->dma_as, src_addr, s->attr, s->buf, len, - false); + address_space_read(s->dma_as, src_addr, s->attr, s->buf, len); if (burst_type == AXI_BURST_INCR) { src_addr += len; } diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index b4363e3..7045193 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -275,8 +275,8 @@ static void dp8393x_do_load_cam(dp8393xState *s) while (s->regs[SONIC_CDC] & 0x1f) { /* Fill current entry */ - address_space_rw(&s->as, dp8393x_cdp(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, false); + address_space_read(&s->as, dp8393x_cdp(s), + MEMTXATTRS_UNSPECIFIED, s->data, size); s->cam[index][0] = dp8393x_get(s, width, 1) & 0xff; s->cam[index][1] = dp8393x_get(s, width, 1) >> 8; s->cam[index][2] = dp8393x_get(s, width, 2) & 0xff; @@ -293,8 +293,8 @@ static void dp8393x_do_load_cam(dp8393xState *s) } /* Read CAM enable */ - address_space_rw(&s->as, dp8393x_cdp(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, false); + address_space_read(&s->as, dp8393x_cdp(s), + MEMTXATTRS_UNSPECIFIED, s->data, size); s->regs[SONIC_CE] = dp8393x_get(s, width, 0); DPRINTF("load cam done. cam enable mask 0x%04x\n", s->regs[SONIC_CE]); @@ -311,8 +311,8 @@ static void dp8393x_do_read_rra(dp8393xState *s) /* Read memory */ width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1; size = sizeof(uint16_t) * 4 * width; - address_space_rw(&s->as, dp8393x_rrp(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, false); + address_space_read(&s->as, dp8393x_rrp(s), + MEMTXATTRS_UNSPECIFIED, s->data, size); /* Update SONIC registers */ s->regs[SONIC_CRBA0] = dp8393x_get(s, width, 0); @@ -426,8 +426,8 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) size = sizeof(uint16_t) * 6 * width; s->regs[SONIC_TTDA] = s->regs[SONIC_CTDA]; DPRINTF("Transmit packet at %08x\n", dp8393x_ttda(s)); - address_space_rw(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, false); + address_space_read(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width, + MEMTXATTRS_UNSPECIFIED, s->data, size); tx_len = 0; /* Update registers */ @@ -451,18 +451,19 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) if (tx_len + len > sizeof(s->tx_buffer)) { len = sizeof(s->tx_buffer) - tx_len; } - address_space_rw(&s->as, dp8393x_tsa(s), - MEMTXATTRS_UNSPECIFIED, - &s->tx_buffer[tx_len], len, false); + address_space_read(&s->as, dp8393x_tsa(s), MEMTXATTRS_UNSPECIFIED, + &s->tx_buffer[tx_len], len); tx_len += len; i++; if (i != s->regs[SONIC_TFC]) { /* Read next fragment details */ size = sizeof(uint16_t) * 3 * width; - address_space_rw(&s->as, - dp8393x_ttda(s) + sizeof(uint16_t) * (4 + 3 * i) * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, false); + address_space_read(&s->as, + dp8393x_ttda(s) + + sizeof(uint16_t) * width * (4 + 3 * i), + MEMTXATTRS_UNSPECIFIED, s->data, + size); s->regs[SONIC_TSA0] = dp8393x_get(s, width, 0); s->regs[SONIC_TSA1] = dp8393x_get(s, width, 1); s->regs[SONIC_TFS] = dp8393x_get(s, width, 2); @@ -495,18 +496,18 @@ static void dp8393x_do_transmit_packets(dp8393xState *s) dp8393x_put(s, width, 0, s->regs[SONIC_TCR] & 0x0fff); /* status */ size = sizeof(uint16_t) * width; - address_space_rw(&s->as, - dp8393x_ttda(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, true); + address_space_write(&s->as, dp8393x_ttda(s), + MEMTXATTRS_UNSPECIFIED, s->data, size); if (!(s->regs[SONIC_CR] & SONIC_CR_HTX)) { /* Read footer of packet */ size = sizeof(uint16_t) * width; - address_space_rw(&s->as, - dp8393x_ttda(s) + - sizeof(uint16_t) * - (4 + 3 * s->regs[SONIC_TFC]) * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, false); + address_space_read(&s->as, + dp8393x_ttda(s) + + sizeof(uint16_t) * width + * (4 + 3 * s->regs[SONIC_TFC]), + MEMTXATTRS_UNSPECIFIED, s->data, + size); s->regs[SONIC_CTDA] = dp8393x_get(s, width, 0) & ~0x1; if (dp8393x_get(s, width, 0) & 0x1) { /* EOL detected */ @@ -768,8 +769,8 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, /* Are we still in resource exhaustion? */ size = sizeof(uint16_t) * 1 * width; address = dp8393x_crda(s) + sizeof(uint16_t) * 5 * width; - address_space_rw(&s->as, address, MEMTXATTRS_UNSPECIFIED, - s->data, size, false); + address_space_read(&s->as, address, MEMTXATTRS_UNSPECIFIED, + s->data, size); if (dp8393x_get(s, width, 0) & 0x1) { /* Still EOL ; stop reception */ return -1; @@ -788,10 +789,11 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, /* Put packet into RBA */ DPRINTF("Receive packet at %08x\n", dp8393x_crba(s)); address = dp8393x_crba(s); - address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED, buf, rx_len); + address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED, + buf, rx_len); address += rx_len; - address_space_rw(&s->as, address, - MEMTXATTRS_UNSPECIFIED, &checksum, 4, true); + address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED, + &checksum, 4); rx_len += 4; s->regs[SONIC_CRBA1] = address >> 16; s->regs[SONIC_CRBA0] = address & 0xffff; @@ -819,13 +821,15 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, dp8393x_put(s, width, 3, s->regs[SONIC_TRBA1]); /* pkt_ptr1 */ dp8393x_put(s, width, 4, s->regs[SONIC_RSC]); /* seq_no */ size = sizeof(uint16_t) * 5 * width; - address_space_rw(&s->as, dp8393x_crda(s), - MEMTXATTRS_UNSPECIFIED, s->data, size, true); + address_space_write(&s->as, dp8393x_crda(s), + MEMTXATTRS_UNSPECIFIED, + s->data, size); /* Move to next descriptor */ size = sizeof(uint16_t) * width; - address_space_rw(&s->as, dp8393x_crda(s) + sizeof(uint16_t) * 5 * width, - MEMTXATTRS_UNSPECIFIED, s->data, size, false); + address_space_read(&s->as, + dp8393x_crda(s) + sizeof(uint16_t) * 5 * width, + MEMTXATTRS_UNSPECIFIED, s->data, size); s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0); if (s->regs[SONIC_LLFA] & 0x1) { /* EOL detected */ @@ -838,8 +842,8 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf, offset += sizeof(uint16_t); } s->data[0] = 0; - address_space_rw(&s->as, offset, MEMTXATTRS_UNSPECIFIED, - s->data, sizeof(uint16_t), true); + address_space_write(&s->as, offset, MEMTXATTRS_UNSPECIFIED, + s->data, sizeof(uint16_t)); s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA]; s->regs[SONIC_ISR] |= SONIC_ISR_PKTRX; s->regs[SONIC_RSC] = (s->regs[SONIC_RSC] & 0xff00) | (((s->regs[SONIC_RSC] & 0x00ff) + 1) & 0x00ff); diff --git a/hw/net/i82596.c b/hw/net/i82596.c index 11537f7..fe9f239 100644 --- a/hw/net/i82596.c +++ b/hw/net/i82596.c @@ -148,8 +148,8 @@ static void i82596_transmit(I82596State *s, uint32_t addr) if (s->nic && len) { assert(len <= sizeof(s->tx_buffer)); - address_space_rw(&address_space_memory, tba, - MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len, false); + address_space_read(&address_space_memory, tba, + MEMTXATTRS_UNSPECIFIED, s->tx_buffer, len); DBG(PRINT_PKTHDR("Send", &s->tx_buffer)); DBG(printf("Sending %d bytes\n", len)); qemu_send_packet(qemu_get_queue(s->nic), s->tx_buffer, len); @@ -172,8 +172,8 @@ static void set_individual_address(I82596State *s, uint32_t addr) nc = qemu_get_queue(s->nic); m = s->conf.macaddr.a; - address_space_rw(&address_space_memory, addr + 8, - MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN, false); + address_space_read(&address_space_memory, addr + 8, + MEMTXATTRS_UNSPECIFIED, m, ETH_ALEN); qemu_format_nic_info_str(nc, m); trace_i82596_new_mac(nc->info_str); } @@ -190,9 +190,8 @@ static void set_multicast_list(I82596State *s, uint32_t addr) } for (i = 0; i < mc_count; i++) { uint8_t multicast_addr[ETH_ALEN]; - address_space_rw(&address_space_memory, - addr + i * ETH_ALEN, MEMTXATTRS_UNSPECIFIED, - multicast_addr, ETH_ALEN, false); + address_space_read(&address_space_memory, addr + i * ETH_ALEN, + MEMTXATTRS_UNSPECIFIED, multicast_addr, ETH_ALEN); DBG(printf("Add multicast entry " MAC_FMT "\n", MAC_ARG(multicast_addr))); unsigned mcast_idx = (net_crc32(multicast_addr, ETH_ALEN) & @@ -260,9 +259,8 @@ static void command_loop(I82596State *s) byte_cnt = MAX(byte_cnt, 4); byte_cnt = MIN(byte_cnt, sizeof(s->config)); /* copy byte_cnt max. */ - address_space_rw(&address_space_memory, s->cmd_p + 8, - MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt, - false); + address_space_read(&address_space_memory, s->cmd_p + 8, + MEMTXATTRS_UNSPECIFIED, s->config, byte_cnt); /* config byte according to page 35ff */ s->config[2] &= 0x82; /* mask valid bits */ s->config[2] |= 0x40; @@ -647,8 +645,8 @@ ssize_t i82596_receive(NetClientState *nc, const uint8_t *buf, size_t sz) buf += num; len -= num; if (len == 0) { /* copy crc */ - address_space_rw(&address_space_memory, rba - 4, - MEMTXATTRS_UNSPECIFIED, crc_ptr, 4, true); + address_space_write(&address_space_memory, rba - 4, + MEMTXATTRS_UNSPECIFIED, crc_ptr, 4); } num |= 0x4000; /* set F BIT */ diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c index 8bff419..52637a5 100644 --- a/hw/net/lasi_i82596.c +++ b/hw/net/lasi_i82596.c @@ -55,8 +55,9 @@ static void lasi_82596_mem_write(void *opaque, hwaddr addr, * Provided for SeaBIOS only. Write MAC of Network card to addr @val. * Needed for the PDC_LAN_STATION_ID_READ PDC call. */ - address_space_rw(&address_space_memory, val, MEMTXATTRS_UNSPECIFIED, - d->state.conf.macaddr.a, ETH_ALEN, true); + address_space_write(&address_space_memory, val, + MEMTXATTRS_UNSPECIFIED, d->state.conf.macaddr.a, + ETH_ALEN); break; } } diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c index 5989d72..f150dec 100644 --- a/hw/ppc/pnv_lpc.c +++ b/hw/ppc/pnv_lpc.c @@ -238,16 +238,16 @@ static bool opb_read(PnvLpcController *lpc, uint32_t addr, uint8_t *data, int sz) { /* XXX Handle access size limits and FW read caching here */ - return !address_space_rw(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, - data, sz, false); + return !address_space_read(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, + data, sz); } static bool opb_write(PnvLpcController *lpc, uint32_t addr, uint8_t *data, int sz) { /* XXX Handle access size limits here */ - return !address_space_rw(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, - data, sz, true); + return !address_space_write(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, + data, sz); } #define ECCB_CTL_READ PPC_BIT(15) diff --git a/hw/s390x/css.c b/hw/s390x/css.c index f27f8c4..5d8e086 100644 --- a/hw/s390x/css.c +++ b/hw/s390x/css.c @@ -874,18 +874,18 @@ static inline int ida_read_next_idaw(CcwDataStream *cds) if (idaw_addr & 0x07 || !cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) { return -EINVAL; /* channel program check */ } - ret = address_space_rw(&address_space_memory, idaw_addr, - MEMTXATTRS_UNSPECIFIED, &idaw.fmt2, - sizeof(idaw.fmt2), false); + ret = address_space_read(&address_space_memory, idaw_addr, + MEMTXATTRS_UNSPECIFIED, &idaw.fmt2, + sizeof(idaw.fmt2)); cds->cda = be64_to_cpu(idaw.fmt2); } else { idaw_addr = cds->cda_orig + sizeof(idaw.fmt1) * cds->at_idaw; if (idaw_addr & 0x03 || !cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) { return -EINVAL; /* channel program check */ } - ret = address_space_rw(&address_space_memory, idaw_addr, - MEMTXATTRS_UNSPECIFIED, &idaw.fmt1, - sizeof(idaw.fmt1), false); + ret = address_space_read(&address_space_memory, idaw_addr, + MEMTXATTRS_UNSPECIFIED, &idaw.fmt1, + sizeof(idaw.fmt1)); cds->cda = be64_to_cpu(idaw.fmt1); if (cds->cda & 0x80000000) { return -EINVAL; /* channel program check */ diff --git a/qtest.c b/qtest.c index 65e33b8..dcb5749 100644 --- a/qtest.c +++ b/qtest.c @@ -429,23 +429,23 @@ static void qtest_process_command(CharBackend *chr, gchar **words) if (words[0][5] == 'b') { uint8_t data = value; - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 1, true); + address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &data, 1); } else if (words[0][5] == 'w') { uint16_t data = value; tswap16s(&data); - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 2, true); + address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &data, 2); } else if (words[0][5] == 'l') { uint32_t data = value; tswap32s(&data); - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 4, true); + address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &data, 4); } else if (words[0][5] == 'q') { uint64_t data = value; tswap64s(&data); - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 8, true); + address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &data, 8); } qtest_send_prefix(chr); qtest_send(chr, "OK\n"); @@ -463,22 +463,22 @@ static void qtest_process_command(CharBackend *chr, gchar **words) if (words[0][4] == 'b') { uint8_t data; - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 1, false); + address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &data, 1); value = data; } else if (words[0][4] == 'w') { uint16_t data; - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 2, false); + address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &data, 2); value = tswap16(data); } else if (words[0][4] == 'l') { uint32_t data; - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &data, 4, false); + address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &data, 4); value = tswap32(data); } else if (words[0][4] == 'q') { - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - &value, 8, false); + address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + &value, 8); tswap64s(&value); } qtest_send_prefix(chr); @@ -498,8 +498,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words) g_assert(len); data = g_malloc(len); - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - data, len, false); + address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data, + len); enc = g_malloc(2 * len + 1); for (i = 0; i < len; i++) { @@ -524,8 +524,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words) g_assert(ret == 0); data = g_malloc(len); - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - data, len, false); + address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data, + len); b64_data = g_base64_encode(data, len); qtest_send_prefix(chr); qtest_sendf(chr, "OK %s\n", b64_data); @@ -559,8 +559,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words) data[i] = 0; } } - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - data, len, true); + address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data, + len); g_free(data); qtest_send_prefix(chr); @@ -582,8 +582,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words) if (len) { data = g_malloc(len); memset(data, pattern, len); - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - data, len, true); + address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, + data, len); g_free(data); } @@ -616,8 +616,8 @@ static void qtest_process_command(CharBackend *chr, gchar **words) out_len = MIN(out_len, len); } - address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, - data, len, true); + address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data, + len); qtest_send_prefix(chr); qtest_send(chr, "OK\n"); diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci index 493d79c..4f0e634 100644 --- a/scripts/coccinelle/exec_rw_const.cocci +++ b/scripts/coccinelle/exec_rw_const.cocci @@ -35,6 +35,19 @@ expression E1, E2, E3, E4; + address_space_write(E1, E2, E3, V, E4) ) +// Avoid uses of address_space_rw() with a constant is_write argument. +@@ +expression E1, E2, E3, E4, E5; +symbol true, false; +@@ +( +- address_space_rw(E1, E2, E3, E4, E5, false) ++ address_space_read(E1, E2, E3, E4, E5) +| +- address_space_rw(E1, E2, E3, E4, E5, true) ++ address_space_write(E1, E2, E3, E4, E5) +) + // Remove useless cast @@ expression E1, E2, E3, E4, E5, E6; diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h index 19af029..03d2c79 100644 --- a/target/i386/hvf/vmx.h +++ b/target/i386/hvf/vmx.h @@ -125,10 +125,9 @@ static inline void macvm_set_cr0(hv_vcpuid_t vcpu, uint64_t cr0) if ((cr0 & CR0_PG) && (rvmcs(vcpu, VMCS_GUEST_CR4) & CR4_PAE) && !(efer & MSR_EFER_LME)) { - address_space_rw(&address_space_memory, - rvmcs(vcpu, VMCS_GUEST_CR3) & ~0x1f, - MEMTXATTRS_UNSPECIFIED, - pdpte, 32, false); + address_space_read(&address_space_memory, + rvmcs(vcpu, VMCS_GUEST_CR3) & ~0x1f, + MEMTXATTRS_UNSPECIFIED, pdpte, 32); /* Only set PDPTE when appropriate. */ for (i = 0; i < 4; i++) { wvmcs(vcpu, VMCS_GUEST_PDPTE0 + i * 2, pdpte[i]); diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/hvf/x86_mmu.c index 451dcc9..65d4603 100644 --- a/target/i386/hvf/x86_mmu.c +++ b/target/i386/hvf/x86_mmu.c @@ -88,8 +88,8 @@ static bool get_pt_entry(struct CPUState *cpu, struct gpt_translation *pt, } index = gpt_entry(pt->gva, level, pae); - address_space_rw(&address_space_memory, gpa + index * pte_size(pae), - MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae), false); + address_space_read(&address_space_memory, gpa + index * pte_size(pae), + MEMTXATTRS_UNSPECIFIED, &pte, pte_size(pae)); pt->pte[level - 1] = pte; @@ -238,8 +238,8 @@ void vmx_write_mem(struct CPUState *cpu, target_ulong gva, void *data, int bytes if (!mmu_gva_to_gpa(cpu, gva, &gpa)) { VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva); 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Tue, 25 Feb 2020 03:52:34 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 096/136] exec: Let cpu_[physical]_memory API use a boolean 'is_write' argument Date: Tue, 25 Feb 2020 12:50:26 +0100 Message-Id: <1582631466-13880-96-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The 'is_write' argument is either 0 or 1. Convert it to a boolean type. Signed-off-by: Philippe Mathieu-Daudé --- exec.c | 10 +++++----- include/exec/cpu-all.h | 2 +- include/exec/cpu-common.h | 6 +++--- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/exec.c b/exec.c index ec6e460..758af30 100644 --- a/exec.c +++ b/exec.c @@ -3019,7 +3019,7 @@ MemoryRegion *get_system_io(void) /* physical memory access (slow version, mainly for debug) */ #if defined(CONFIG_USER_ONLY) int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, - void *ptr, target_ulong len, int is_write) + void *ptr, target_ulong len, bool is_write) { int flags; target_ulong l, page; @@ -3313,7 +3313,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, } void cpu_physical_memory_rw(hwaddr addr, void *buf, - hwaddr len, int is_write) + hwaddr len, bool is_write) { address_space_rw(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, buf, len, is_write); @@ -3632,14 +3632,14 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, void *cpu_physical_memory_map(hwaddr addr, hwaddr *plen, - int is_write) + bool is_write) { return address_space_map(&address_space_memory, addr, plen, is_write, MEMTXATTRS_UNSPECIFIED); } void cpu_physical_memory_unmap(void *buffer, hwaddr len, - int is_write, hwaddr access_len) + bool is_write, hwaddr access_len) { return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len); } @@ -3790,7 +3790,7 @@ address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr, /* virtual memory access for debug (includes writing to ROM) */ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, - void *ptr, target_ulong len, int is_write) + void *ptr, target_ulong len, bool is_write) { hwaddr phys_addr; target_ulong l, page; diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 49e96ca..49384bb 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -388,7 +388,7 @@ void dump_opcount_info(void); #endif /* !CONFIG_USER_ONLY */ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, - void *ptr, target_ulong len, int is_write); + void *ptr, target_ulong len, bool is_write); int cpu_exec(CPUState *cpu); diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 55e5740..d127d84 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -70,7 +70,7 @@ size_t qemu_ram_pagesize(RAMBlock *block); size_t qemu_ram_pagesize_largest(void); void cpu_physical_memory_rw(hwaddr addr, void *buf, - hwaddr len, int is_write); + hwaddr len, bool is_write); static inline void cpu_physical_memory_read(hwaddr addr, void *buf, hwaddr len) { @@ -83,9 +83,9 @@ static inline void cpu_physical_memory_write(hwaddr addr, } void *cpu_physical_memory_map(hwaddr addr, hwaddr *plen, - int is_write); + bool is_write); void cpu_physical_memory_unmap(void *buffer, hwaddr len, - int is_write, hwaddr access_len); + bool is_write, hwaddr access_len); void cpu_register_map_client(QEMUBH *bh); void cpu_unregister_map_client(QEMUBH *bh); From patchwork Tue Feb 25 11:50:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403675 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 72DDB14E3 for ; Tue, 25 Feb 2020 12:59:19 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 38E6A218AC for ; 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Tue, 25 Feb 2020 03:52:35 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 097/136] Let cpu_[physical]_memory() calls pass a boolean 'is_write' argument Date: Tue, 25 Feb 2020 12:50:27 +0100 Message-Id: <1582631466-13880-97-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Use an explicit boolean type. This commit was produced with the included Coccinelle script scripts/coccinelle/exec_rw_const. Signed-off-by: Philippe Mathieu-Daudé --- hw/display/exynos4210_fimd.c | 3 ++- hw/display/milkymist-tmu2.c | 8 ++++---- hw/display/omap_dss.c | 2 +- hw/display/ramfb.c | 2 +- hw/misc/pc-testdev.c | 2 +- hw/nvram/spapr_nvram.c | 4 ++-- hw/ppc/ppc440_uc.c | 6 ++++-- hw/ppc/spapr_hcall.c | 4 ++-- hw/s390x/ipl.c | 2 +- hw/s390x/s390-pci-bus.c | 2 +- hw/s390x/virtio-ccw.c | 2 +- hw/xen/xen_pt_graphics.c | 2 +- include/exec/cpu-common.h | 4 ++-- scripts/coccinelle/exec_rw_const.cocci | 14 ++++++++++++++ target/i386/hax-all.c | 4 ++-- target/s390x/excp_helper.c | 2 +- target/s390x/helper.c | 6 +++--- 17 files changed, 43 insertions(+), 26 deletions(-) diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c index c1071ec..ec67766 100644 --- a/hw/display/exynos4210_fimd.c +++ b/hw/display/exynos4210_fimd.c @@ -1164,7 +1164,8 @@ static void fimd_update_memory_section(Exynos4210fimdState *s, unsigned win) goto error_return; } - w->host_fb_addr = cpu_physical_memory_map(fb_start_addr, &fb_mapped_len, 0); + w->host_fb_addr = cpu_physical_memory_map(fb_start_addr, &fb_mapped_len, + false); if (!w->host_fb_addr) { DPRINT_ERROR("Failed to map window %u framebuffer\n", win); goto error_return; diff --git a/hw/display/milkymist-tmu2.c b/hw/display/milkymist-tmu2.c index 199f122..513c0d5 100644 --- a/hw/display/milkymist-tmu2.c +++ b/hw/display/milkymist-tmu2.c @@ -218,7 +218,7 @@ static void tmu2_start(MilkymistTMU2State *s) glGenTextures(1, &texture); glBindTexture(GL_TEXTURE_2D, texture); fb_len = 2ULL * s->regs[R_TEXHRES] * s->regs[R_TEXVRES]; - fb = cpu_physical_memory_map(s->regs[R_TEXFBUF], &fb_len, 0); + fb = cpu_physical_memory_map(s->regs[R_TEXFBUF], &fb_len, false); if (fb == NULL) { glDeleteTextures(1, &texture); glXMakeContextCurrent(s->dpy, None, None, NULL); @@ -262,7 +262,7 @@ static void tmu2_start(MilkymistTMU2State *s) /* Read the QEMU dest. framebuffer into the OpenGL framebuffer */ fb_len = 2ULL * s->regs[R_DSTHRES] * s->regs[R_DSTVRES]; - fb = cpu_physical_memory_map(s->regs[R_DSTFBUF], &fb_len, 0); + fb = cpu_physical_memory_map(s->regs[R_DSTFBUF], &fb_len, false); if (fb == NULL) { glDeleteTextures(1, &texture); glXMakeContextCurrent(s->dpy, None, None, NULL); @@ -281,7 +281,7 @@ static void tmu2_start(MilkymistTMU2State *s) /* Map the texture */ mesh_len = MESH_MAXSIZE*MESH_MAXSIZE*sizeof(struct vertex); - mesh = cpu_physical_memory_map(s->regs[R_VERTICESADDR], &mesh_len, 0); + mesh = cpu_physical_memory_map(s->regs[R_VERTICESADDR], &mesh_len, false); if (mesh == NULL) { glDeleteTextures(1, &texture); glXMakeContextCurrent(s->dpy, None, None, NULL); @@ -298,7 +298,7 @@ static void tmu2_start(MilkymistTMU2State *s) /* Write back the OpenGL framebuffer to the QEMU framebuffer */ fb_len = 2ULL * s->regs[R_DSTHRES] * s->regs[R_DSTVRES]; - fb = cpu_physical_memory_map(s->regs[R_DSTFBUF], &fb_len, 1); + fb = cpu_physical_memory_map(s->regs[R_DSTFBUF], &fb_len, true); if (fb == NULL) { glDeleteTextures(1, &texture); glXMakeContextCurrent(s->dpy, None, None, NULL); diff --git a/hw/display/omap_dss.c b/hw/display/omap_dss.c index 637aae8..32dc0d6 100644 --- a/hw/display/omap_dss.c +++ b/hw/display/omap_dss.c @@ -632,7 +632,7 @@ static void omap_rfbi_transfer_start(struct omap_dss_s *s) len = s->rfbi.pixels * 2; data_addr = s->dispc.l[0].addr[0]; - data = cpu_physical_memory_map(data_addr, &len, 0); + data = cpu_physical_memory_map(data_addr, &len, false); if (data && len != s->rfbi.pixels * 2) { cpu_physical_memory_unmap(data, len, 0, 0); data = NULL; diff --git a/hw/display/ramfb.c b/hw/display/ramfb.c index cd94940..7ba07c8 100644 --- a/hw/display/ramfb.c +++ b/hw/display/ramfb.c @@ -57,7 +57,7 @@ static DisplaySurface *ramfb_create_display_surface(int width, int height, } size = (hwaddr)linesize * height; - data = cpu_physical_memory_map(addr, &size, 0); + data = cpu_physical_memory_map(addr, &size, false); if (size != (hwaddr)linesize * height) { cpu_physical_memory_unmap(data, size, 0, 0); return NULL; diff --git a/hw/misc/pc-testdev.c b/hw/misc/pc-testdev.c index 0fb84dd..8aa8e65 100644 --- a/hw/misc/pc-testdev.c +++ b/hw/misc/pc-testdev.c @@ -125,7 +125,7 @@ static void test_flush_page_write(void *opaque, hwaddr addr, uint64_t data, unsigned len) { hwaddr page = 4096; - void *a = cpu_physical_memory_map(data & ~0xffful, &page, 0); + void *a = cpu_physical_memory_map(data & ~0xffful, &page, false); /* We might not be able to get the full page, only mprotect what we actually have mapped */ diff --git a/hw/nvram/spapr_nvram.c b/hw/nvram/spapr_nvram.c index 877ddef..15d0828 100644 --- a/hw/nvram/spapr_nvram.c +++ b/hw/nvram/spapr_nvram.c @@ -89,7 +89,7 @@ static void rtas_nvram_fetch(PowerPCCPU *cpu, SpaprMachineState *spapr, assert(nvram->buf); - membuf = cpu_physical_memory_map(buffer, &len, 1); + membuf = cpu_physical_memory_map(buffer, &len, true); memcpy(membuf, nvram->buf + offset, len); cpu_physical_memory_unmap(membuf, len, 1, len); @@ -127,7 +127,7 @@ static void rtas_nvram_store(PowerPCCPU *cpu, SpaprMachineState *spapr, return; } - membuf = cpu_physical_memory_map(buffer, &len, 0); + membuf = cpu_physical_memory_map(buffer, &len, false); alen = len; if (nvram->blk) { diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 1a6a8fa..d5ea962 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -909,8 +909,10 @@ static void dcr_write_dma(void *opaque, int dcrn, uint32_t val) sidx = didx = 0; width = 1 << ((val & DMA0_CR_PW) >> 25); - rptr = cpu_physical_memory_map(dma->ch[chnl].sa, &rlen, 0); - wptr = cpu_physical_memory_map(dma->ch[chnl].da, &wlen, 1); + rptr = cpu_physical_memory_map(dma->ch[chnl].sa, &rlen, + false); + wptr = cpu_physical_memory_map(dma->ch[chnl].da, &wlen, + true); if (rptr && wptr) { if (!(val & DMA0_CR_DEC) && val & DMA0_CR_SAI && val & DMA0_CR_DAI) { diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index b8bb66b..caf55ab 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -832,7 +832,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr, if (!is_ram_address(spapr, dst) || (dst & ~TARGET_PAGE_MASK) != 0) { return H_PARAMETER; } - pdst = cpu_physical_memory_map(dst, &len, 1); + pdst = cpu_physical_memory_map(dst, &len, true); if (!pdst || len != TARGET_PAGE_SIZE) { return H_PARAMETER; } @@ -843,7 +843,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr, ret = H_PARAMETER; goto unmap_out; } - psrc = cpu_physical_memory_map(src, &len, 0); + psrc = cpu_physical_memory_map(src, &len, false); if (!psrc || len != TARGET_PAGE_SIZE) { ret = H_PARAMETER; goto unmap_out; diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c index 7773499..0817874 100644 --- a/hw/s390x/ipl.c +++ b/hw/s390x/ipl.c @@ -626,7 +626,7 @@ static void s390_ipl_prepare_qipl(S390CPU *cpu) uint8_t *addr; uint64_t len = 4096; - addr = cpu_physical_memory_map(cpu->env.psa, &len, 1); + addr = cpu_physical_memory_map(cpu->env.psa, &len, true); if (!addr || len < QIPL_ADDRESS + sizeof(QemuIplParameters)) { error_report("Cannot set QEMU IPL parameters"); return; diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 7c6a2b3..ed8be12 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -641,7 +641,7 @@ static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set) hwaddr len = 1; uint8_t *ind_addr; - ind_addr = cpu_physical_memory_map(ind_loc, &len, 1); + ind_addr = cpu_physical_memory_map(ind_loc, &len, true); if (!ind_addr) { s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0); return -1; diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c index 13f57e7..50cf95b 100644 --- a/hw/s390x/virtio-ccw.c +++ b/hw/s390x/virtio-ccw.c @@ -790,7 +790,7 @@ static uint8_t virtio_set_ind_atomic(SubchDev *sch, uint64_t ind_loc, hwaddr len = 1; uint8_t *ind_addr; - ind_addr = cpu_physical_memory_map(ind_loc, &len, 1); + ind_addr = cpu_physical_memory_map(ind_loc, &len, true); if (!ind_addr) { error_report("%s(%x.%x.%04x): unable to access indicator", __func__, sch->cssid, sch->ssid, sch->schid); diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c index b697327..b11e4e0 100644 --- a/hw/xen/xen_pt_graphics.c +++ b/hw/xen/xen_pt_graphics.c @@ -222,7 +222,7 @@ void xen_pt_setup_vga(XenPCIPassthroughState *s, XenHostPCIDevice *dev, } /* Currently we fixed this address as a primary for legacy BIOS. */ - cpu_physical_memory_rw(0xc0000, bios, bios_size, 1); + cpu_physical_memory_rw(0xc0000, bios, bios_size, true); } uint32_t igd_read_opregion(XenPCIPassthroughState *s) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index d127d84..b47e563 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -74,12 +74,12 @@ void cpu_physical_memory_rw(hwaddr addr, void *buf, static inline void cpu_physical_memory_read(hwaddr addr, void *buf, hwaddr len) { - cpu_physical_memory_rw(addr, buf, len, 0); + cpu_physical_memory_rw(addr, buf, len, false); } static inline void cpu_physical_memory_write(hwaddr addr, const void *buf, hwaddr len) { - cpu_physical_memory_rw(addr, (void *)buf, len, 1); + cpu_physical_memory_rw(addr, (void *)buf, len, true); } void *cpu_physical_memory_map(hwaddr addr, hwaddr *plen, diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci index 4f0e634..35ab79e 100644 --- a/scripts/coccinelle/exec_rw_const.cocci +++ b/scripts/coccinelle/exec_rw_const.cocci @@ -19,6 +19,20 @@ expression E1, E2, E3, E4, E5; | - address_space_rw(E1, E2, E3, E4, E5, 1) + address_space_rw(E1, E2, E3, E4, E5, true) +| + +- cpu_physical_memory_rw(E1, E2, E3, 0) ++ cpu_physical_memory_rw(E1, E2, E3, false) +| +- cpu_physical_memory_rw(E1, E2, E3, 1) ++ cpu_physical_memory_rw(E1, E2, E3, true) +| + +- cpu_physical_memory_map(E1, E2, 0) ++ cpu_physical_memory_map(E1, E2, false) +| +- cpu_physical_memory_map(E1, E2, 1) ++ cpu_physical_memory_map(E1, E2, true) ) // Use address_space_write instead of casting to non-const diff --git a/target/i386/hax-all.c b/target/i386/hax-all.c index a9cc51e..38936d7 100644 --- a/target/i386/hax-all.c +++ b/target/i386/hax-all.c @@ -376,8 +376,8 @@ static int hax_handle_fastmmio(CPUArchState *env, struct hax_fastmmio *hft) * hft->direction == 2: gpa ==> gpa2 */ uint64_t value; - cpu_physical_memory_rw(hft->gpa, &value, hft->size, 0); - cpu_physical_memory_rw(hft->gpa2, &value, hft->size, 1); + cpu_physical_memory_rw(hft->gpa, &value, hft->size, false); + cpu_physical_memory_rw(hft->gpa2, &value, hft->size, true); } return 0; diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 1e9d6f2..3b58d10 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -393,7 +393,7 @@ static int mchk_store_vregs(CPUS390XState *env, uint64_t mcesao) MchkExtSaveArea *sa; int i; - sa = cpu_physical_memory_map(mcesao, &len, 1); + sa = cpu_physical_memory_map(mcesao, &len, true); if (!sa) { return -EFAULT; } diff --git a/target/s390x/helper.c b/target/s390x/helper.c index a3a4916..b810ad4 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -151,7 +151,7 @@ LowCore *cpu_map_lowcore(CPUS390XState *env) LowCore *lowcore; hwaddr len = sizeof(LowCore); - lowcore = cpu_physical_memory_map(env->psa, &len, 1); + lowcore = cpu_physical_memory_map(env->psa, &len, true); if (len < sizeof(LowCore)) { cpu_abort(env_cpu(env), "Could not map lowcore\n"); @@ -246,7 +246,7 @@ int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch) hwaddr len = sizeof(*sa); int i; - sa = cpu_physical_memory_map(addr, &len, 1); + sa = cpu_physical_memory_map(addr, &len, true); if (!sa) { return -EFAULT; } @@ -298,7 +298,7 @@ int s390_store_adtl_status(S390CPU *cpu, hwaddr addr, hwaddr len) hwaddr save = len; int i; - sa = cpu_physical_memory_map(addr, &save, 1); + sa = cpu_physical_memory_map(addr, &save, true); if (!sa) { return -EFAULT; } From patchwork Tue Feb 25 11:50:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403599 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D8ACF13A4 for ; Tue, 25 Feb 2020 12:42:34 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AE9E920637 for ; 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Tue, 25 Feb 2020 03:52:36 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 098/136] Avoid cpu_physical_memory_rw() with a constant is_write argument Date: Tue, 25 Feb 2020 12:50:28 +0100 Message-Id: <1582631466-13880-98-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé This commit was produced with the included Coccinelle script scripts/coccinelle/exec_rw_const. Inspired-by: Peter Maydell Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- hw/xen/xen_pt_graphics.c | 2 +- scripts/coccinelle/exec_rw_const.cocci | 12 ++++++++++++ target/i386/hax-all.c | 4 ++-- 3 files changed, 15 insertions(+), 3 deletions(-) diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c index b11e4e0..a3bc7e3 100644 --- a/hw/xen/xen_pt_graphics.c +++ b/hw/xen/xen_pt_graphics.c @@ -222,7 +222,7 @@ void xen_pt_setup_vga(XenPCIPassthroughState *s, XenHostPCIDevice *dev, } /* Currently we fixed this address as a primary for legacy BIOS. */ - cpu_physical_memory_rw(0xc0000, bios, bios_size, true); + cpu_physical_memory_write(0xc0000, bios, bios_size); } uint32_t igd_read_opregion(XenPCIPassthroughState *s) diff --git a/scripts/coccinelle/exec_rw_const.cocci b/scripts/coccinelle/exec_rw_const.cocci index 35ab79e..1a20296 100644 --- a/scripts/coccinelle/exec_rw_const.cocci +++ b/scripts/coccinelle/exec_rw_const.cocci @@ -62,6 +62,18 @@ symbol true, false; + address_space_write(E1, E2, E3, E4, E5) ) +// Avoid uses of cpu_physical_memory_rw() with a constant is_write argument. +@@ +expression E1, E2, E3; +@@ +( +- cpu_physical_memory_rw(E1, E2, E3, false) ++ cpu_physical_memory_read(E1, E2, E3) +| +- cpu_physical_memory_rw(E1, E2, E3, true) ++ cpu_physical_memory_write(E1, E2, E3) +) + // Remove useless cast @@ expression E1, E2, E3, E4, E5, E6; diff --git a/target/i386/hax-all.c b/target/i386/hax-all.c index 38936d7..f9c83ff 100644 --- a/target/i386/hax-all.c +++ b/target/i386/hax-all.c @@ -376,8 +376,8 @@ static int hax_handle_fastmmio(CPUArchState *env, struct hax_fastmmio *hft) * hft->direction == 2: gpa ==> gpa2 */ uint64_t value; - cpu_physical_memory_rw(hft->gpa, &value, hft->size, false); - cpu_physical_memory_rw(hft->gpa2, &value, hft->size, true); + cpu_physical_memory_read(hft->gpa, &value, hft->size); + cpu_physical_memory_write(hft->gpa2, &value, hft->size); } return 0; From patchwork Tue Feb 25 11:50:29 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 03:52:37 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 099/136] memory: Correctly return alias region type Date: Tue, 25 Feb 2020 12:50:29 +0100 Message-Id: <1582631466-13880-99-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Since memory region aliases are neither rom nor ram, they are described as i/o, which is often incorrect. Return instead the type of the original region we are aliasing. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-2-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- memory.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/memory.c b/memory.c index aeaa8dc..ce11798 100644 --- a/memory.c +++ b/memory.c @@ -2818,6 +2818,9 @@ void address_space_destroy(AddressSpace *as) static const char *memory_region_type(MemoryRegion *mr) { + if (mr->alias) { + return memory_region_type(mr->alias); + } if (memory_region_is_ram_device(mr)) { return "ramd"; } else if (memory_region_is_romd(mr)) { From patchwork Tue Feb 25 11:50:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403685 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0D73D1395 for ; Tue, 25 Feb 2020 13:01:32 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D80EC218AC for ; Tue, 25 Feb 2020 13:01:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="a/MPSC/S" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D80EC218AC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:55112 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Zq6-0003sv-Vp for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 08:01:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50217) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6YlV-0002NZ-9B for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6YlU-0002IW-8t for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:41 -0500 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]:40716) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6YlU-0002Eo-1y for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:40 -0500 Received: by mail-wm1-x32c.google.com with SMTP id t14so2838119wmi.5 for ; Tue, 25 Feb 2020 03:52:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=khYyWh5ZZESTsDhSwmW3NzZ5C/nmqjY42tMKoymp4Fc=; b=a/MPSC/SEswGKwEuGJFOTIgpJiMWzbzf44N3Y71w3MuxxDO+8XjRf18Wu7hYsKkPDV pF9O4G8pQmr/8av2u6X3aJQeL5L+BGzuHYcDpU9RKA7VGg0Yx9fuOkOdkm4P0pSNN3Ys iHU7N6LrAXSCzqIzmvW85eOW/jWsWf5Fv5w9574IfLlhhrYFJsQxOEC1mjx29v8XzlOn e7/TMfvPLd035rQHPAOX4G1E11XiR300XdWCq9AHThQYoukDG9YDzuA4Vj40GN/+7qRI VADXVqKs2G6vdACYMAOyj9LGKh9dFsUmVnFeOZZmrPc6dSq+IoIXpSyp1lYVpZ5wVZDh tZ4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=khYyWh5ZZESTsDhSwmW3NzZ5C/nmqjY42tMKoymp4Fc=; b=qiS9ovlX2TmH5M2RaHXYDdZFJ1aOczbWnHWLG5rIr40pLlyfQA7cZ07Q+vrs4yv1/2 cPU3HIikq+JAkfYHniaYzwSERnnxkxep7+jjYEClIecp0rtw43NVy828TP/DOJHF1qOe ufdDwVxKw//ClVSoN6aUgvVK4X0q/mVZ5ev2Ag9493UJodjNr2JZLz23002DEdKpSe6t klSXfZ8YHPXt/PRua4zGeoZZTXlxft+jqfwbrqgBW7H/1wWah9EYhS6PLM6ZVGgJInIK dlgDSHbj3/PZOdh3r4Gj/MqVBJabI6TimnKlL8lFfvbrZiuqJlf6x81DoMManNuJr0+0 m9Tg== X-Gm-Message-State: APjAAAUyYGL1zHSjTPHN6FV3+NgsHEdPzMpMSKx9Aush8gm097ppCEb6 WvjyrOJLLkZZ9cwgtKqhXd8vLtUh X-Google-Smtp-Source: APXvYqwnpir2BZi9chncLQyycA1EBEO0CKpmB4DJe5MJTUP81RrqTGDzHQVONi/DB9Giwl41D5GKqw== X-Received: by 2002:a7b:c851:: with SMTP id c17mr4851277wml.71.1582631558806; Tue, 25 Feb 2020 03:52:38 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:38 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 100/136] memory: Simplify memory_region_init_rom_nomigrate() to ease review Date: Tue, 25 Feb 2020 12:50:30 +0100 Message-Id: <1582631466-13880-100-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé memory_region_init_rom_nomigrate() has the same content than memory_region_init_ram_shared_nomigrate(), with setting the readonly mode. The code is easier to review as creating a readonly ram/shared/nomigrate region. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-3-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- memory.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/memory.c b/memory.c index ce11798..6a327a5 100644 --- a/memory.c +++ b/memory.c @@ -1659,19 +1659,8 @@ void memory_region_init_rom_nomigrate(MemoryRegion *mr, uint64_t size, Error **errp) { - Error *err = NULL; - memory_region_init(mr, owner, name, size); - mr->ram = true; + memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp); mr->readonly = true; - mr->terminates = true; - mr->destructor = memory_region_destructor_ram; - mr->ram_block = qemu_ram_alloc(size, false, mr, &err); - mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; - if (err) { - mr->size = int128_zero(); - object_unparent(OBJECT(mr)); - error_propagate(errp, err); - } } void memory_region_init_rom_device_nomigrate(MemoryRegion *mr, From patchwork Tue Feb 25 11:50:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403693 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AA2E81395 for ; Tue, 25 Feb 2020 13:05:57 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 816DE2176D for ; Tue, 25 Feb 2020 13:05:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="dLZ+33xP" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 816DE2176D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:55222 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6ZuO-0001tm-HQ for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 08:05:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50232) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6YlW-0002Pn-3M for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6YlV-0002Mc-22 for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:42 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]:40720) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6YlU-0002IN-R1 for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:41 -0500 Received: by mail-wm1-x330.google.com with SMTP id t14so2838164wmi.5 for ; Tue, 25 Feb 2020 03:52:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8TDYd04UA0rta6zGgONMidUyYq1Fh/peI3QjQAoJMVs=; b=dLZ+33xPr4HB9mTbNwBfP7thYSuTbJsdIoKRDLnPIpqkAqEooN+9BPx2T0oCq6Sg6S JHjeeGd0UjeZpw+hjLqckRbovEhmApURZRfAOnpp3PFzmRiaEP8nQ/YwEwsnjs0d0JoP PpH39rt21JkbFThhXAYpSWTm5Q+0BsLTHu5Rt+2oha3gyfQyPU1ssrqPoBy2Dv6hpO6a +TGNGoZ9A95q9nth183BjB8vR+aDhY01JT56SynvRpgh5pTlf1LlXoHWZW7fOldpZV7z 9Kjlr8EWO7UmiNamnMSRuGrW4g/Qk7BRy8LQ3olYxUEZD/Du9gYmZ0B+/+6EZ5jS/e5T oaQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=8TDYd04UA0rta6zGgONMidUyYq1Fh/peI3QjQAoJMVs=; b=tSskwsGXvh3QcaF1cDBJ5uQYyJSXWRkxmKLiwEf/MakGiGZAmWzIdH8ivvLBEbKCAA rX7Y4+9m/6rD7XY2XTrfmFpMoXb4AUfdRM1BJXNn3vmHfdIaI9sKr4Zf8U8sIYR9r5tD zNQcPfMDpv2IbRx7tRzb+jfORou1FFmHZQisnXu2y3LZohqp4TIl+D2NvwOcXsPbpcBM 1DRJDO1t2IPY05+WHD3ybuatvbYdHP+pnts7tyzNt1uAoMtX/BZycSKMrU78gM8kMllw uyzVy4R40e95Abh8n96nCB2oz2CvPVFWiHLig6PVwp7iC+xLr76EFB0ZMY/vhZkrMqZc owig== X-Gm-Message-State: APjAAAVq19LxCsBGV5LhC/lpmh+9lApSzn72NrbAtwG5jKxetMWh/CwV FZPnHOzgtDXavc7RswI7C/J3TRp4 X-Google-Smtp-Source: APXvYqyzqVuQTAe5mO8QL/XLZGUUdjKlSNC9yVOICjHxQZko6NGdq7mbMwoY7rLF/ObR291YNPrm7Q== X-Received: by 2002:a05:600c:3d1:: with SMTP id z17mr5157071wmd.90.1582631559654; Tue, 25 Feb 2020 03:52:39 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:39 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 101/136] scripts/cocci: Rename memory-region-{init-ram -> housekeeping} Date: Tue, 25 Feb 2020 12:50:31 +0100 Message-Id: <1582631466-13880-101-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::330 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé As we are going to add various semantic changes related to the memory region API, rename this script to be more generic. Add a 'usage' header, and an entry in MAINTAINERS to avoid checkpatch warning. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-4-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- MAINTAINERS | 1 + ...gion-init-ram.cocci => memory-region-housekeeping.cocci} | 13 +++++++++++++ 2 files changed, 14 insertions(+) rename scripts/coccinelle/{memory-region-init-ram.cocci => memory-region-housekeeping.cocci} (84%) diff --git a/MAINTAINERS b/MAINTAINERS index 195dd58..316a8ed 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1998,6 +1998,7 @@ F: include/exec/ramblock.h F: memory.c F: include/exec/memory-internal.h F: exec.c +F: scripts/coccinelle/memory-region-housekeeping.cocci SPICE M: Gerd Hoffmann diff --git a/scripts/coccinelle/memory-region-init-ram.cocci b/scripts/coccinelle/memory-region-housekeeping.cocci similarity index 84% rename from scripts/coccinelle/memory-region-init-ram.cocci rename to scripts/coccinelle/memory-region-housekeeping.cocci index d290150..3699c10 100644 --- a/scripts/coccinelle/memory-region-init-ram.cocci +++ b/scripts/coccinelle/memory-region-housekeeping.cocci @@ -1,3 +1,16 @@ +/* + Usage: + + spatch \ + --macro-file scripts/cocci-macro-file.h \ + --sp-file scripts/coccinelle/memory-region-housekeeping.cocci \ + --keep-comments \ + --in-place \ + --dir . + +*/ + + // Replace by-hand memory_region_init_ram_nomigrate/vmstate_register_ram // code sequences with use of the new memory_region_init_ram function. // Similarly for the _rom and _rom_device functions. From patchwork Tue Feb 25 11:50:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403701 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B40AB14E3 for ; Tue, 25 Feb 2020 13:07:44 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8B21220CC7 for ; Tue, 25 Feb 2020 13:07:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Ze0JH70v" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8B21220CC7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:55250 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Zw7-0004kl-PC for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 08:07:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50245) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6YlW-0002SN-Vf for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6YlW-0002Qk-0N for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:42 -0500 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]:35861) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6YlV-0002NC-QA for qemu-devel@nongnu.org; Tue, 25 Feb 2020 06:52:41 -0500 Received: by mail-wm1-x331.google.com with SMTP id p17so2862335wma.1 for ; Tue, 25 Feb 2020 03:52:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1tKsxoYp7GhUyN36SIdtT+qkYcQ6Z8f09kM0pNR69JI=; b=Ze0JH70vh5meLEkBVmd1CPKCXufMGjWXbJT5q+A15zsbEGuRWeFUVkgbgKWxp8oswl kOzRvu3IljCTnQMOpjqOO1trPui8cgeYf55BeCsBICJhWwtsX1isZB6KArQpx+FxDvTV V0M65kyuTERlUJU2cYag/BSfAyilBWVBL9O8pTD5c4nPdYhHj2BtXIo1dVdV9Q4eW0ST YCLUBPBzBftnuPFf6J3aUINM9dOIf1xlv0r+Bfffzb/Thb3cr30fvbdsu56ZrGCx4bp/ GRDo6uIk+9kWWnXxaSgY9G9I9jDq30zWb2NlWzpWzm0BveUdXIgOKciZW7lhgdzCAFwg Gq+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=1tKsxoYp7GhUyN36SIdtT+qkYcQ6Z8f09kM0pNR69JI=; b=egYH9XI6rM778UZk9XUVCAd44qbPZtJxhYUZ829SRGRD/WwFX7wgIgJDsI0a9rzEzL U1i7hxHtcUSEWXLWjANA3qgxwSwQg0zrKxSvWZ9fl+xj3XYhOSwVNvWNdGyrqUo0UJnp en3Tf3zvsRjIySk1W5lcDdiTxnsOFJogG1cir1VY/ppPlGW6/3DrJCrytZfrfOIHQ/Gz VTxQxmIgENhfLUNi3HA8utfeIq1w135tT1TPxEzlzpK2orb+CbscvSgoHPMZ42H5OY/W y8wBQ7KSM010b3uFgq0TQjC7PBUO2n+btFkcR7Ank1ChjkmWyMyP1Y2vWiaCy9OW4+S/ geOw== X-Gm-Message-State: APjAAAVg2H3BhpVYxK3dpt75cdRhFm7408N5/3WzwpT94U6jxiBR3JVe g3d3Kg1r6t0MtZWxTWUZYPYTFA+e X-Google-Smtp-Source: APXvYqzoA9CWfZmKS0vDptNiCJ1jRh/wjlrdtEcVSrl7oj24vbi0SHW/mEgkAq3/ETKgY+t4Q8WD1A== X-Received: by 2002:a1c:1f56:: with SMTP id f83mr2674177wmf.101.1582631560569; Tue, 25 Feb 2020 03:52:40 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id b67sm3922326wmc.38.2020.02.25.03.52.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 03:52:39 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 102/136] scripts/cocci: Patch to replace memory_region_init_{ram, readonly -> rom} Date: Tue, 25 Feb 2020 12:50:32 +0100 Message-Id: <1582631466-13880-102-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::331 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Add a semantic patch to replace memory_region_init_ram(readonly) by memory_region_init_rom(). Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-5-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- scripts/coccinelle/memory-region-housekeeping.cocci | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/scripts/coccinelle/memory-region-housekeeping.cocci b/scripts/coccinelle/memory-region-housekeeping.cocci index 3699c10..ee3923d 100644 --- a/scripts/coccinelle/memory-region-housekeeping.cocci +++ b/scripts/coccinelle/memory-region-housekeeping.cocci @@ -11,6 +11,24 @@ */ +// Replace memory_region_init_ram(readonly) by memory_region_init_rom() +@@ +expression E1, E2, E3, E4, E5; +symbol true; +@@ +( +- memory_region_init_ram(E1, E2, E3, E4, E5); ++ memory_region_init_rom(E1, E2, E3, E4, E5); + ... WHEN != E1 +- memory_region_set_readonly(E1, true); +| +- memory_region_init_ram_nomigrate(E1, E2, E3, E4, E5); ++ memory_region_init_rom_nomigrate(E1, E2, E3, E4, E5); + ... WHEN != E1 +- memory_region_set_readonly(E1, true); +) + + // Replace by-hand memory_region_init_ram_nomigrate/vmstate_register_ram // code sequences with use of the new memory_region_init_ram function. // Similarly for the _rom and _rom_device functions. From patchwork Tue Feb 25 12:07:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403615 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CF24513A4 for ; Tue, 25 Feb 2020 12:46:48 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A5A6A20726 for ; Tue, 25 Feb 2020 12:46:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Kr21J/RT" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A5A6A20726 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:54580 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Zbr-0004U1-Qc for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 07:46:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:52391) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Yzz-0003BG-NS for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:07:41 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6Yzy-0003MU-C5 for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:07:39 -0500 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]:45763) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6Yzy-0003M1-6B for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:07:38 -0500 Received: by mail-wr1-x431.google.com with SMTP id g3so14386357wrs.12 for ; Tue, 25 Feb 2020 04:07:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hQKEDHZ7ybfue6PbnahmlzzYTgRr4IP7NeUXkWEOGMQ=; b=Kr21J/RTdCPlQL5paFIxj3wJx4OIx02kR06LVYZYUmz1Ln2GEmpqwWUtePMbfyMirI j2zakc946ISbbeJXqc3dVYIY9llXucc5SLJKa7rW2OQZKl8uBJ9ojLklfApBtbE5px4d +phZcLkBK/NV4hCqaQapy86VWUAL/Em1rjMjnOKxoUaHycSEtDXz4yBgQFw6FPclULTA jT2YA4aMHzFD1oivS2+kWzHuE4BeOO1ryNi2YDlD+bM9cCKi32Gi4l9MtGIpnMqzn0km tJJWCS2chlSZyBGxtvsSyZPmkQgy64/tOdY1dMkqItZogMbVRxIuR1tmKci3nJCTqSQd TI8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=hQKEDHZ7ybfue6PbnahmlzzYTgRr4IP7NeUXkWEOGMQ=; b=hQIfacHmzYBmcy+VTLGKkvJ0TA/g6rGn54nF0VWCYLCPc37xG+zSspaSvLqqZGBWhL 05hc/vktjLMz1SfqF49CvsZHMg2ZtNqb8bhI8XPExw0aAtXZkGmENdGrQUBnIpGb384W HJWQKrpTu2xdcMOUJQVIRyHHF3T7SJp7x6oUnWW5+z+9ZUC9yVJyKs+A/A4FrdNyaiBU 7yAfateGf/muD5wxdcVIfMz86smfpVDaB1wkyVmh6/2qqzRmBX5vyIGX26ELwknz6HAF B0GCprX5+Zu5vm9jXlIl5ebx3FrCGjANTgv6tNPsd73SueTN18mMjm1PpVFPUvHU4eqY agRA== X-Gm-Message-State: APjAAAUhd/f/Daz+/Skc1FDFnJsXHcKdWx0vrd5L9IVTqmAsX3E9cWOg V8HGl2k9brirWNGtY0IYDKrREBpH X-Google-Smtp-Source: APXvYqzrO4zbz4wIgy/XqxPtvHj6chd20YmsF2oaDQEjz3MMMhVU+BxppPTmubM9R83vsJT0Dm/FOQ== X-Received: by 2002:adf:eb48:: with SMTP id u8mr71895435wrn.283.1582632456624; Tue, 25 Feb 2020 04:07:36 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id h13sm22709423wrw.54.2020.02.25.04.07.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 04:07:35 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 103/136] hw/arm: Use memory_region_init_rom() with read-only regions Date: Tue, 25 Feb 2020 13:07:01 +0100 Message-Id: <1582632454-16491-1-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::431 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-6-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/arm/exynos4210.c | 3 +-- hw/arm/mainstone.c | 3 +-- hw/arm/omap_sx1.c | 6 ++---- hw/arm/palm.c | 3 +-- hw/arm/spitz.c | 3 +-- hw/arm/stellaris.c | 3 +-- hw/arm/tosa.c | 3 +-- 7 files changed, 8 insertions(+), 16 deletions(-) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 59a27bd..3af6502 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -311,9 +311,8 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) &s->chipid_mem); /* Internal ROM */ - memory_region_init_ram(&s->irom_mem, NULL, "exynos4210.irom", + memory_region_init_rom(&s->irom_mem, NULL, "exynos4210.irom", EXYNOS4210_IROM_SIZE, &error_fatal); - memory_region_set_readonly(&s->irom_mem, true); memory_region_add_subregion(system_mem, EXYNOS4210_IROM_BASE_ADDR, &s->irom_mem); /* mirror of iROM */ diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c index 6e64dfa..05a806b 100644 --- a/hw/arm/mainstone.c +++ b/hw/arm/mainstone.c @@ -125,9 +125,8 @@ static void mainstone_common_init(MemoryRegion *address_space_mem, /* Setup CPU & memory */ mpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, machine->cpu_type); - memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM, + memory_region_init_rom(rom, NULL, "mainstone.rom", MAINSTONE_ROM, &error_fatal); - memory_region_set_readonly(rom, true); memory_region_add_subregion(address_space_mem, 0, rom); #ifdef TARGET_WORDS_BIGENDIAN diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c index be24571..6c3fd1b 100644 --- a/hw/arm/omap_sx1.c +++ b/hw/arm/omap_sx1.c @@ -126,9 +126,8 @@ static void sx1_init(MachineState *machine, const int version) mpu = omap310_mpu_init(dram, machine->cpu_type); /* External Flash (EMIFS) */ - memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size, + memory_region_init_rom(flash, NULL, "omap_sx1.flash0-0", flash_size, &error_fatal); - memory_region_set_readonly(flash, true); memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash); memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val, @@ -168,9 +167,8 @@ static void sx1_init(MachineState *machine, const int version) if ((version == 1) && (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) { MemoryRegion *flash_1 = g_new(MemoryRegion, 1); - memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", + memory_region_init_rom(flash_1, NULL, "omap_sx1.flash1-0", flash1_size, &error_fatal); - memory_region_set_readonly(flash_1, true); memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1); memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val, diff --git a/hw/arm/palm.c b/hw/arm/palm.c index 72eca8c..265d589 100644 --- a/hw/arm/palm.c +++ b/hw/arm/palm.c @@ -206,9 +206,8 @@ static void palmte_init(MachineState *machine) mpu = omap310_mpu_init(dram, machine->cpu_type); /* External Flash (EMIFS) */ - memory_region_init_ram(flash, NULL, "palmte.flash", flash_size, + memory_region_init_rom(flash, NULL, "palmte.flash", flash_size, &error_fatal); - memory_region_set_readonly(flash, true); memory_region_add_subregion(address_space_mem, OMAP_CS0_BASE, flash); memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val, "palmte-cs0", diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index e001088..1d27399 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -924,8 +924,7 @@ static void spitz_common_init(MachineState *machine, sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); - memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); - memory_region_set_readonly(rom, true); + memory_region_init_rom(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); memory_region_add_subregion(address_space_mem, 0, rom); /* Setup peripherals */ diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 221a786..d136ba1 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -1300,9 +1300,8 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board) sram_size = ((board->dc0 >> 18) + 1) * 1024; /* Flash programming is done via the SCU, so pretend it is ROM. */ - memory_region_init_ram(flash, NULL, "stellaris.flash", flash_size, + memory_region_init_rom(flash, NULL, "stellaris.flash", flash_size, &error_fatal); - memory_region_set_readonly(flash, true); memory_region_add_subregion(system_memory, 0, flash); memory_region_init_ram(sram, NULL, "stellaris.sram", sram_size, diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c index 4d95a1f..5dee2d7 100644 --- a/hw/arm/tosa.c +++ b/hw/arm/tosa.c @@ -226,8 +226,7 @@ static void tosa_init(MachineState *machine) mpu = pxa255_init(address_space_mem, tosa_binfo.ram_size); - memory_region_init_ram(rom, NULL, "tosa.rom", TOSA_ROM, &error_fatal); - memory_region_set_readonly(rom, true); + memory_region_init_rom(rom, NULL, "tosa.rom", TOSA_ROM, &error_fatal); memory_region_add_subregion(address_space_mem, 0, rom); tmio = tc6393xb_init(address_space_mem, 0x10000000, From patchwork Tue Feb 25 12:07:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403743 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E106D14E3 for ; Tue, 25 Feb 2020 13:16:35 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B88BD21744 for ; Tue, 25 Feb 2020 13:16:35 +0000 (UTC) Authentication-Results: mail.kernel.org; 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X-Received-From: 2a00:1450:4864:20::432 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-7-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/display/cg3.c | 5 ++--- hw/display/tcx.c | 5 ++--- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 4fb67c6..a1ede10 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -287,9 +287,8 @@ static void cg3_initfn(Object *obj) SysBusDevice *sbd = SYS_BUS_DEVICE(obj); CG3State *s = CG3(obj); - memory_region_init_ram_nomigrate(&s->rom, obj, "cg3.prom", FCODE_MAX_ROM_SIZE, - &error_fatal); - memory_region_set_readonly(&s->rom, true); + memory_region_init_rom_nomigrate(&s->rom, obj, "cg3.prom", + FCODE_MAX_ROM_SIZE, &error_fatal); sysbus_init_mmio(sbd, &s->rom); memory_region_init_io(&s->reg, obj, &cg3_reg_ops, s, "cg3.reg", diff --git a/hw/display/tcx.c b/hw/display/tcx.c index ca458f9..76de16e 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -755,9 +755,8 @@ static void tcx_initfn(Object *obj) SysBusDevice *sbd = SYS_BUS_DEVICE(obj); TCXState *s = TCX(obj); - memory_region_init_ram_nomigrate(&s->rom, obj, "tcx.prom", FCODE_MAX_ROM_SIZE, - &error_fatal); - memory_region_set_readonly(&s->rom, true); + memory_region_init_rom_nomigrate(&s->rom, obj, "tcx.prom", + FCODE_MAX_ROM_SIZE, &error_fatal); sysbus_init_mmio(sbd, &s->rom); /* 2/STIP : Stippler */ From patchwork Tue Feb 25 12:07:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403747 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 72DA114D5 for ; Tue, 25 Feb 2020 13:18:36 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4860A24653 for ; Tue, 25 Feb 2020 13:18:36 +0000 (UTC) Authentication-Results: mail.kernel.org; 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X-Received-From: 2a00:1450:4864:20::42f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-8-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/mips/mips_fulong2e.c | 3 +-- hw/mips/mips_jazz.c | 6 ++---- hw/mips/mips_mipssim.c | 3 +-- hw/mips/mips_r4k.c | 3 +-- 4 files changed, 5 insertions(+), 10 deletions(-) diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index 2e043cb..547a7d3 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -319,9 +319,8 @@ static void mips_fulong2e_init(MachineState *machine) /* allocate RAM */ memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size); - memory_region_init_ram(bios, NULL, "fulong2e.bios", BIOS_SIZE, + memory_region_init_rom(bios, NULL, "fulong2e.bios", BIOS_SIZE, &error_fatal); - memory_region_set_readonly(bios, true); memory_region_add_subregion(address_space_mem, 0, ram); memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c index 66fd4d8..cf47335 100644 --- a/hw/mips/mips_jazz.c +++ b/hw/mips/mips_jazz.c @@ -195,9 +195,8 @@ static void mips_jazz_init(MachineState *machine, machine->ram_size); memory_region_add_subregion(address_space, 0, ram); - memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE, + memory_region_init_rom(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE, &error_fatal); - memory_region_set_readonly(bios, true); memory_region_init_alias(bios2, NULL, "mips_jazz.bios", bios, 0, MAGNUM_BIOS_SIZE); memory_region_add_subregion(address_space, 0x1fc00000LL, bios); @@ -263,9 +262,8 @@ static void mips_jazz_init(MachineState *machine, { /* Simple ROM, so user doesn't have to provide one */ MemoryRegion *rom_mr = g_new(MemoryRegion, 1); - memory_region_init_ram(rom_mr, NULL, "g364fb.rom", 0x80000, + memory_region_init_rom(rom_mr, NULL, "g364fb.rom", 0x80000, &error_fatal); - memory_region_set_readonly(rom_mr, true); uint8_t *rom = memory_region_get_ram_ptr(rom_mr); memory_region_add_subregion(address_space, 0x60000000, rom_mr); rom[0] = 0x10; /* Mips G364 */ diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index b934ca9..3fdbb21 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -169,9 +169,8 @@ mips_mipssim_init(MachineState *machine) /* Allocate RAM. */ memory_region_allocate_system_memory(ram, NULL, "mips_mipssim.ram", ram_size); - memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE, + memory_region_init_rom(bios, NULL, "mips_mipssim.bios", BIOS_SIZE, &error_fatal); - memory_region_set_readonly(bios, true); memory_region_add_subregion(address_space_mem, 0, ram); diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c index b2aec43..54b286c 100644 --- a/hw/mips/mips_r4k.c +++ b/hw/mips/mips_r4k.c @@ -241,9 +241,8 @@ void mips_r4k_init(MachineState *machine) dinfo = drive_get(IF_PFLASH, 0, 0); if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) { bios = g_new(MemoryRegion, 1); - memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE, + memory_region_init_rom(bios, NULL, "mips_r4k.bios", BIOS_SIZE, &error_fatal); - memory_region_set_readonly(bios, true); memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios); load_image_targphys(filename, 0x1fc00000, BIOS_SIZE); From patchwork Tue Feb 25 12:07:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403621 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3A3BB13A4 for ; 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Tue, 25 Feb 2020 04:07:38 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 106/136] hw/m68k: Use memory_region_init_rom() with read-only regions Date: Tue, 25 Feb 2020 13:07:04 +0100 Message-Id: <1582632454-16491-4-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::432 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-9-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/m68k/q800.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 1e32363..8083326 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -402,13 +402,12 @@ static void q800_init(MachineState *machine) uint8_t *ptr; /* allocate and load BIOS */ rom = g_malloc(sizeof(*rom)); - memory_region_init_ram(rom, NULL, "m68k_mac.rom", MACROM_SIZE, + memory_region_init_rom(rom, NULL, "m68k_mac.rom", MACROM_SIZE, &error_abort); if (bios_name == NULL) { bios_name = MACROM_FILENAME; } filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); - memory_region_set_readonly(rom, true); memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); /* Load MacROM binary */ From patchwork Tue Feb 25 12:07:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403639 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 978DD13A4 for ; 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Tue, 25 Feb 2020 04:07:40 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 107/136] hw/net: Use memory_region_init_rom() with read-only regions Date: Tue, 25 Feb 2020 13:07:05 +0100 Message-Id: <1582632454-16491-5-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. 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Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-10-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/net/dp8393x.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index a134d43..6bcdfe1 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -916,13 +916,12 @@ static void dp8393x_realize(DeviceState *dev, Error **errp) s->watchdog = timer_new_ns(QEMU_CLOCK_VIRTUAL, dp8393x_watchdog, s); s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux */ - memory_region_init_ram(&s->prom, OBJECT(dev), - "dp8393x-prom", SONIC_PROM_SIZE, &local_err); + memory_region_init_rom(&s->prom, OBJECT(dev), "dp8393x-prom", + SONIC_PROM_SIZE, &local_err); if (local_err) { error_propagate(errp, local_err); return; } - memory_region_set_readonly(&s->prom, true); prom = memory_region_get_ram_ptr(&s->prom); checksum = 0; for (i = 0; i < 6; i++) { From patchwork Tue Feb 25 12:07:06 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 04:07:41 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 108/136] hw/pci-host: Use memory_region_init_rom() with read-only regions Date: Tue, 25 Feb 2020 13:07:06 +0100 Message-Id: <1582632454-16491-6-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-11-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/pci-host/prep.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 1aff72b..1a02e9a 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -325,9 +325,8 @@ static void raven_realize(PCIDevice *d, Error **errp) d->config[0x0D] = 0x10; // latency_timer d->config[0x34] = 0x00; // capabilities_pointer - memory_region_init_ram_nomigrate(&s->bios, OBJECT(s), "bios", BIOS_SIZE, - &error_fatal); - memory_region_set_readonly(&s->bios, true); + memory_region_init_rom_nomigrate(&s->bios, OBJECT(s), "bios", BIOS_SIZE, + &error_fatal); memory_region_add_subregion(get_system_memory(), (uint32_t)(-BIOS_SIZE), &s->bios); if (s->bios_name) { From patchwork Tue Feb 25 12:07:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403493 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2F2FA138D for ; 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Tue, 25 Feb 2020 04:07:42 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 109/136] hw/ppc: Use memory_region_init_rom() with read-only regions Date: Tue, 25 Feb 2020 13:07:07 +0100 Message-Id: <1582632454-16491-7-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42b X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-12-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/ppc/mac_newworld.c | 3 +-- hw/ppc/mac_oldworld.c | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 464d012..566413e 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -156,13 +156,12 @@ static void ppc_core99_init(MachineState *machine) memory_region_add_subregion(get_system_memory(), 0, ram); /* allocate and load BIOS */ - memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE, + memory_region_init_rom(bios, NULL, "ppc_core99.bios", BIOS_SIZE, &error_fatal); if (bios_name == NULL) bios_name = PROM_FILENAME; filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); - memory_region_set_readonly(bios, true); memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios); /* Load OpenBIOS (ELF) */ diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 7318d7e..8b22ff6 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -132,13 +132,12 @@ static void ppc_heathrow_init(MachineState *machine) memory_region_add_subregion(sysmem, 0, ram); /* allocate and load BIOS */ - memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE, + memory_region_init_rom(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE, &error_fatal); if (bios_name == NULL) bios_name = PROM_FILENAME; filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); - memory_region_set_readonly(bios, true); memory_region_add_subregion(sysmem, PROM_ADDR, bios); /* Load OpenBIOS (ELF) */ From patchwork Tue Feb 25 12:07:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403531 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2B14E138D for ; Tue, 25 Feb 2020 12:34:54 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0141E20CC7 for ; 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Tue, 25 Feb 2020 04:07:43 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 110/136] hw/riscv: Use memory_region_init_rom() with read-only regions Date: Tue, 25 Feb 2020 13:07:08 +0100 Message-Id: <1582632454-16491-8-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. 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Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-13-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/riscv/sifive_e.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index 8a6b034..6f6360a 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -208,9 +208,8 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp) memmap[SIFIVE_E_PWM2].base, memmap[SIFIVE_E_PWM2].size); /* Flash memory */ - memory_region_init_ram(&s->xip_mem, NULL, "riscv.sifive.e.xip", - memmap[SIFIVE_E_XIP].size, &error_fatal); - memory_region_set_readonly(&s->xip_mem, true); + memory_region_init_rom(&s->xip_mem, NULL, "riscv.sifive.e.xip", + memmap[SIFIVE_E_XIP].size, &error_fatal); memory_region_add_subregion(sys_mem, memmap[SIFIVE_E_XIP].base, &s->xip_mem); } From patchwork Tue Feb 25 12:07:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403541 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 166AE13A4 for ; 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Tue, 25 Feb 2020 04:07:44 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 111/136] hw/sh4: Use memory_region_init_rom() with read-only regions Date: Tue, 25 Feb 2020 13:07:09 +0100 Message-Id: <1582632454-16491-9-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::429 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-14-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/sh4/shix.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/sh4/shix.c b/hw/sh4/shix.c index 2fc2915..56c7d29 100644 --- a/hw/sh4/shix.c +++ b/hw/sh4/shix.c @@ -53,8 +53,7 @@ static void shix_init(MachineState *machine) cpu = SUPERH_CPU(cpu_create(machine->cpu_type)); /* Allocate memory space */ - memory_region_init_ram(rom, NULL, "shix.rom", 0x4000, &error_fatal); - memory_region_set_readonly(rom, true); + memory_region_init_rom(rom, NULL, "shix.rom", 0x4000, &error_fatal); memory_region_add_subregion(sysmem, 0x00000000, rom); memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000, &error_fatal); From patchwork Tue Feb 25 12:07:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403661 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A5D3B13A4 for ; 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Tue, 25 Feb 2020 04:07:45 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 112/136] hw/sparc: Use memory_region_init_rom() with read-only regions Date: Tue, 25 Feb 2020 13:07:10 +0100 Message-Id: <1582632454-16491-10-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-15-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/sparc/leon3.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index f5a087d..23d0bdb 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -256,8 +256,7 @@ static void leon3_generic_hw_init(MachineState *machine) /* Allocate BIOS */ prom_size = 8 * MiB; - memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size, &error_fatal); - memory_region_set_readonly(prom, true); + memory_region_init_rom(prom, NULL, "Leon3.bios", prom_size, &error_fatal); memory_region_add_subregion(address_space_mem, LEON3_PROM_OFFSET, prom); /* Load boot prom */ From patchwork Tue Feb 25 12:07:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403667 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 04BB91580 for ; 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Tue, 25 Feb 2020 04:07:46 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 113/136] scripts/cocci: Patch to detect potential use of memory_region_init_rom Date: Tue, 25 Feb 2020 13:07:11 +0100 Message-Id: <1582632454-16491-11-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42b X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Add a semantic patch to detect potential replacement of memory_region_init_ram(readonly) by memory_region_init_rom(). Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-16-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- scripts/coccinelle/memory-region-housekeeping.cocci | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/scripts/coccinelle/memory-region-housekeeping.cocci b/scripts/coccinelle/memory-region-housekeeping.cocci index ee3923d..9cdde71 100644 --- a/scripts/coccinelle/memory-region-housekeeping.cocci +++ b/scripts/coccinelle/memory-region-housekeeping.cocci @@ -29,6 +29,25 @@ symbol true; ) +@possible_memory_region_init_rom@ +expression E1, E2, E3, E4, E5; +position p; +@@ +( + memory_region_init_ram@p(E1, E2, E3, E4, E5); + ... + memory_region_set_readonly(E1, true); +| + memory_region_init_ram_nomigrate@p(E1, E2, E3, E4, E5); + ... + memory_region_set_readonly(E1, true); +) +@script:python@ +p << possible_memory_region_init_rom.p; +@@ +cocci.print_main("potential use of memory_region_init_rom*() in ", p) + + // Replace by-hand memory_region_init_ram_nomigrate/vmstate_register_ram // code sequences with use of the new memory_region_init_ram function. // Similarly for the _rom and _rom_device functions. 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X-Received-From: 2a00:1450:4864:20::330 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The scripts/coccinelle/memory-region-housekeeping.cocci reported: * TODO [[view:./hw/arm/stm32f205_soc.c::face=ovl-face1::linb=96::colb=4::cole=26][potential use of memory_region_init_rom*() in ./hw/arm/stm32f205_soc.c::96]] * TODO [[view:./hw/arm/stm32f405_soc.c::face=ovl-face1::linb=98::colb=4::cole=26][potential use of memory_region_init_rom*() in ./hw/arm/stm32f405_soc.c::98]] We can indeed replace the memory_region_init_ram() and memory_region_set_readonly() calls by memory_region_init_rom(). Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-17-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/arm/stm32f205_soc.c | 4 +--- hw/arm/stm32f405_soc.c | 4 +--- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index 627fd44..2de5627 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -93,12 +93,10 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) MemoryRegion *flash = g_new(MemoryRegion, 1); MemoryRegion *flash_alias = g_new(MemoryRegion, 1); - memory_region_init_ram(flash, NULL, "STM32F205.flash", FLASH_SIZE, + memory_region_init_rom(flash, NULL, "STM32F205.flash", FLASH_SIZE, &error_fatal); memory_region_init_alias(flash_alias, NULL, "STM32F205.flash.alias", flash, 0, FLASH_SIZE); - - memory_region_set_readonly(flash, true); memory_region_set_readonly(flash_alias, true); memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, flash); diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c index 9bcad97..b8fca13 100644 --- a/hw/arm/stm32f405_soc.c +++ b/hw/arm/stm32f405_soc.c @@ -95,7 +95,7 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) Error *err = NULL; int i; - memory_region_init_ram(&s->flash, NULL, "STM32F405.flash", FLASH_SIZE, + memory_region_init_rom(&s->flash, NULL, "STM32F405.flash", FLASH_SIZE, &err); if (err != NULL) { error_propagate(errp, err); @@ -103,8 +103,6 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) } memory_region_init_alias(&s->flash_alias, NULL, "STM32F405.flash.alias", &s->flash, 0, FLASH_SIZE); - - memory_region_set_readonly(&s->flash, true); memory_region_set_readonly(&s->flash_alias, true); memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash); From patchwork Tue Feb 25 12:07:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403679 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8945D14E3 for ; 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Tue, 25 Feb 2020 04:07:48 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 115/136] hw/ppc/ppc405: Use memory_region_init_rom() with read-only regions Date: Tue, 25 Feb 2020 13:07:13 +0100 Message-Id: <1582632454-16491-13-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::331 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The scripts/coccinelle/memory-region-housekeeping.cocci reported: * TODO [[view:./hw/ppc/ppc405_boards.c::face=ovl-face1::linb=195::colb=8::cole=30][potential use of memory_region_init_rom*() in ./hw/ppc/ppc405_boards.c::195]] * TODO [[view:./hw/ppc/ppc405_boards.c::face=ovl-face1::linb=464::colb=8::cole=30][potential use of memory_region_init_rom*() in ./hw/ppc/ppc405_boards.c::464]] We can indeed replace the memory_region_init_ram() and memory_region_set_readonly() calls by memory_region_init_rom(). Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-18-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/ppc/ppc405_boards.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index 1f721fe..5afe023 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -192,7 +192,7 @@ static void ref405ep_init(MachineState *machine) #endif { bios = g_new(MemoryRegion, 1); - memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE, + memory_region_init_rom(bios, NULL, "ef405ep.bios", BIOS_SIZE, &error_fatal); if (bios_name == NULL) @@ -216,7 +216,6 @@ static void ref405ep_init(MachineState *machine) /* Avoid an uninitialized variable warning */ bios_size = -1; } - memory_region_set_readonly(bios, true); } /* Register FPGA */ ref405ep_fpga_init(sysmem, 0xF0300000); @@ -461,7 +460,7 @@ static void taihu_405ep_init(MachineState *machine) if (bios_name == NULL) bios_name = BIOS_FILENAME; bios = g_new(MemoryRegion, 1); - memory_region_init_ram(bios, NULL, "taihu_405ep.bios", BIOS_SIZE, + memory_region_init_rom(bios, NULL, "taihu_405ep.bios", BIOS_SIZE, &error_fatal); filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); if (filename) { @@ -479,7 +478,6 @@ static void taihu_405ep_init(MachineState *machine) error_report("Could not load PowerPC BIOS '%s'", bios_name); exit(1); } - memory_region_set_readonly(bios, true); } /* Register Linux flash */ dinfo = drive_get(IF_PFLASH, 0, fl_idx); From patchwork Tue Feb 25 12:07:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403687 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A35AB14E3 for ; Tue, 25 Feb 2020 13:02:13 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7962E218AC for ; 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Tue, 25 Feb 2020 04:07:49 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 116/136] hw/i386/pc_sysfw: Simplify using memory_region_init_alias() Date: Tue, 25 Feb 2020 13:07:14 +0100 Message-Id: <1582632454-16491-14-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::334 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The scripts/coccinelle/memory-region-housekeeping.cocci reported: * TODO [[view:hw/i386/pc_sysfw.c::face=ovl-face1::linb=67::colb=4::cole=26][potential use of memory_region_init_rom*() in hw/i386/pc_sysfw.c::67]] pc_isa_bios_init() does a manual copy of a part of the BIOS, from a read-only region. We can simplify by directly aliasing the same part. Before: (qemu) info mtree memory-region: system 0000000000000000-ffffffffffffffff (prio 0, i/o): system 0000000000000000-0000000007ffffff (prio 0, ram): alias ram-below-4g @pc.ram 0000000000000000-0000000007ffffff 0000000000000000-ffffffffffffffff (prio -1, i/o): pci 00000000000a0000-00000000000bffff (prio 1, i/o): vga-lowmem 00000000000c0000-00000000000dffff (prio 1, rom): pc.rom 00000000000e0000-00000000000fffff (prio 1, rom): isa-bios ... 00000000fff00000-00000000ffffffff (prio 0, romd): system.flash0 After: (qemu) info mtree memory-region: system 0000000000000000-ffffffffffffffff (prio 0, i/o): system 0000000000000000-0000000007ffffff (prio 0, ram): alias ram-below-4g @pc.ram 0000000000000000-0000000007ffffff 0000000000000000-ffffffffffffffff (prio -1, i/o): pci 00000000000a0000-00000000000bffff (prio 1, i/o): vga-lowmem 00000000000c0000-00000000000dffff (prio 1, rom): pc.rom 00000000000e0000-00000000000fffff (prio 1, romd): alias isa-bios @system.flash0 00000000000e0000-00000000000fffff ... 00000000fff00000-00000000ffffffff (prio 0, romd): system.flash0 Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-19-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/i386/pc_sysfw.c | 24 ++++++------------------ 1 file changed, 6 insertions(+), 18 deletions(-) diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index f5f3f46..e864c09 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -54,31 +54,19 @@ static void pc_isa_bios_init(MemoryRegion *rom_memory, MemoryRegion *flash_mem, int ram_size) { - int isa_bios_size; - MemoryRegion *isa_bios; - uint64_t flash_size; - void *flash_ptr, *isa_bios_ptr; - - flash_size = memory_region_size(flash_mem); + uint64_t isa_bios_size; + MemoryRegion *isa_bios = g_new(MemoryRegion, 1); + uint64_t flash_size = memory_region_size(flash_mem); /* map the last 128KB of the BIOS in ISA space */ isa_bios_size = MIN(flash_size, 128 * KiB); - isa_bios = g_malloc(sizeof(*isa_bios)); - memory_region_init_ram(isa_bios, NULL, "isa-bios", isa_bios_size, - &error_fatal); + memory_region_init_alias(isa_bios, NULL, "isa-bios", flash_mem, + flash_size - isa_bios_size, + isa_bios_size); memory_region_add_subregion_overlap(rom_memory, 0x100000 - isa_bios_size, isa_bios, 1); - - /* copy ISA rom image from top of flash memory */ - flash_ptr = memory_region_get_ram_ptr(flash_mem); - isa_bios_ptr = memory_region_get_ram_ptr(isa_bios); - memcpy(isa_bios_ptr, - ((uint8_t*)flash_ptr) + (flash_size - isa_bios_size), - isa_bios_size); - - memory_region_set_readonly(isa_bios, true); } static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms, From patchwork Tue Feb 25 12:07:15 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 04:07:49 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 117/136] hw/i386/pc_sysfw: Remove unused 'ram_size' argument Date: Tue, 25 Feb 2020 13:07:15 +0100 Message-Id: <1582632454-16491-15-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::334 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé While named 'ram_size', this argument holds the size of the flash. Since it is unused, remove it. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-20-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/i386/pc_sysfw.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index e864c09..07b35ee 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -51,8 +51,7 @@ #define FLASH_SECTOR_SIZE 4096 static void pc_isa_bios_init(MemoryRegion *rom_memory, - MemoryRegion *flash_mem, - int ram_size) + MemoryRegion *flash_mem) { uint64_t isa_bios_size; MemoryRegion *isa_bios = g_new(MemoryRegion, 1); @@ -182,7 +181,7 @@ static void pc_system_flash_map(PCMachineState *pcms, if (i == 0) { flash_mem = pflash_cfi01_get_memory(system_flash); - pc_isa_bios_init(rom_memory, flash_mem, size); + pc_isa_bios_init(rom_memory, flash_mem); /* Encrypt the pflash boot ROM */ if (kvm_memcrypt_enabled()) { From patchwork Tue Feb 25 12:07:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403577 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 30888138D for ; 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Tue, 25 Feb 2020 04:07:51 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 118/136] scripts/cocci: Patch to remove unnecessary memory_region_set_readonly() Date: Tue, 25 Feb 2020 13:07:16 +0100 Message-Id: <1582632454-16491-16-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::330 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Add a semantic patch to remove memory_region_set_readonly() calls on ROM memory regions. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-21-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- scripts/coccinelle/memory-region-housekeeping.cocci | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/scripts/coccinelle/memory-region-housekeeping.cocci b/scripts/coccinelle/memory-region-housekeeping.cocci index 9cdde71..5e6b31d 100644 --- a/scripts/coccinelle/memory-region-housekeeping.cocci +++ b/scripts/coccinelle/memory-region-housekeeping.cocci @@ -48,6 +48,21 @@ p << possible_memory_region_init_rom.p; cocci.print_main("potential use of memory_region_init_rom*() in ", p) +// Do not call memory_region_set_readonly() on ROM alias +@@ +expression ROM, E1, E2, E3, E4; +expression ALIAS, E5, E6, E7, E8; +@@ +( + memory_region_init_rom(ROM, E1, E2, E3, E4); +| + memory_region_init_rom_nomigrate(ROM, E1, E2, E3, E4); +) + ... + memory_region_init_alias(ALIAS, E5, E6, ROM, E7, E8); +- memory_region_set_readonly(ALIAS, true); + + // Replace by-hand memory_region_init_ram_nomigrate/vmstate_register_ram // code sequences with use of the new memory_region_init_ram function. // Similarly for the _rom and _rom_device functions. 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X-Received-From: 2a00:1450:4864:20::436 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-22-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/arm/exynos4210.c | 1 - hw/arm/stm32f205_soc.c | 1 - hw/arm/stm32f405_soc.c | 1 - 3 files changed, 3 deletions(-) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 3af6502..4e1fd7e 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -320,7 +320,6 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) &s->irom_mem, 0, EXYNOS4210_IROM_SIZE); - memory_region_set_readonly(&s->irom_alias_mem, true); memory_region_add_subregion(system_mem, EXYNOS4210_IROM_MIRROR_BASE_ADDR, &s->irom_alias_mem); diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index 2de5627..6e93726 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -97,7 +97,6 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) &error_fatal); memory_region_init_alias(flash_alias, NULL, "STM32F205.flash.alias", flash, 0, FLASH_SIZE); - memory_region_set_readonly(flash_alias, true); memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, flash); memory_region_add_subregion(system_memory, 0, flash_alias); diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c index b8fca13..d590cd0 100644 --- a/hw/arm/stm32f405_soc.c +++ b/hw/arm/stm32f405_soc.c @@ -103,7 +103,6 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) } memory_region_init_alias(&s->flash_alias, NULL, "STM32F405.flash.alias", &s->flash, 0, FLASH_SIZE); - memory_region_set_readonly(&s->flash_alias, true); memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash); memory_region_add_subregion(system_memory, 0, &s->flash_alias); From patchwork Tue Feb 25 12:07:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403607 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EEC9D13A4 for ; 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Tue, 25 Feb 2020 04:07:53 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 120/136] scripts/cocci: Patch to let devices own their MemoryRegions Date: Tue, 25 Feb 2020 13:07:18 +0100 Message-Id: <1582632454-16491-18-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::334 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé When a device creates a MemoryRegion without setting its ownership, the MemoryRegion is added to the machine "/unattached" container in the QOM tree. Example with the Samsung SMDKC210 board: $ arm-softmmu/qemu-system-arm -M smdkc210 -S -monitor stdio (qemu) info qom-tree /machine (smdkc210-machine) /unattached (container) /io[0] (qemu:memory-region) /exynos4210.dram0[0] (qemu:memory-region) /exynos4210.irom[0] (qemu:memory-region) /exynos4210.iram[0] (qemu:memory-region) /exynos4210.chipid[0] (qemu:memory-region) ... /device[26] (exynos4210.uart) /exynos4210.uart[0] (qemu:memory-region) /soc (exynos4210) ^ \__ [*] The irom/iram/chipid regions should go under 'soc' at [*]. Add a semantic patch to let the device own the memory region. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-23-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- .../coccinelle/memory-region-housekeeping.cocci | 56 ++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/scripts/coccinelle/memory-region-housekeeping.cocci b/scripts/coccinelle/memory-region-housekeeping.cocci index 5e6b31d..c768d81 100644 --- a/scripts/coccinelle/memory-region-housekeeping.cocci +++ b/scripts/coccinelle/memory-region-housekeeping.cocci @@ -101,3 +101,59 @@ expression ERRP; +memory_region_init_rom_device(MR, NULL, OPS, OPAQUE, NAME, SIZE, ERRP); ... -vmstate_register_ram_global(MR); + + +// Device is owner +@@ +typedef DeviceState; +identifier device_fn, dev, obj; +expression E1, E2, E3, E4, E5; +@@ +static void device_fn(DeviceState *dev, ...) +{ + ... + Object *obj = OBJECT(dev); + <+... +( +- memory_region_init(E1, NULL, E2, E3); ++ memory_region_init(E1, obj, E2, E3); +| +- memory_region_init_io(E1, NULL, E2, E3, E4, E5); ++ memory_region_init_io(E1, obj, E2, E3, E4, E5); +| +- memory_region_init_alias(E1, NULL, E2, E3, E4, E5); ++ memory_region_init_alias(E1, obj, E2, E3, E4, E5); +| +- memory_region_init_rom(E1, NULL, E2, E3, E4); ++ memory_region_init_rom(E1, obj, E2, E3, E4); +| +- memory_region_init_ram_shared_nomigrate(E1, NULL, E2, E3, E4, E5); ++ memory_region_init_ram_shared_nomigrate(E1, obj, E2, E3, E4, E5); +) + ...+> +} +@@ +identifier device_fn, dev; +expression E1, E2, E3, E4, E5; +@@ +static void device_fn(DeviceState *dev, ...) +{ + <+... +( +- memory_region_init(E1, NULL, E2, E3); ++ memory_region_init(E1, OBJECT(dev), E2, E3); +| +- memory_region_init_io(E1, NULL, E2, E3, E4, E5); ++ memory_region_init_io(E1, OBJECT(dev), E2, E3, E4, E5); +| +- memory_region_init_alias(E1, NULL, E2, E3, E4, E5); ++ memory_region_init_alias(E1, OBJECT(dev), E2, E3, E4, E5); +| +- memory_region_init_rom(E1, NULL, E2, E3, E4); ++ memory_region_init_rom(E1, OBJECT(dev), E2, E3, E4); +| +- memory_region_init_ram_shared_nomigrate(E1, NULL, E2, E3, E4, E5); ++ memory_region_init_ram_shared_nomigrate(E1, OBJECT(dev), E2, E3, E4, E5); +) + ...+> +} From patchwork Tue Feb 25 12:07:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403691 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B32301395 for ; Tue, 25 Feb 2020 13:04:18 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 75978218AC for ; Tue, 25 Feb 2020 13:04:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OkjWx5FE" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 75978218AC Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 04:07:54 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id h13sm22709423wrw.54.2020.02.25.04.07.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 04:07:54 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 121/136] hw/arm: Let devices own the MemoryRegion they create Date: Tue, 25 Feb 2020 13:07:19 +0100 Message-Id: <1582632454-16491-19-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Avoid orphan memory regions being added in the /unattached QOM container. This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-24-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/arm/exynos4210.c | 12 ++++++------ hw/arm/fsl-imx25.c | 10 +++++----- hw/arm/fsl-imx31.c | 6 +++--- hw/arm/fsl-imx6.c | 6 +++--- hw/arm/fsl-imx6ul.c | 9 +++++---- hw/arm/msf2-soc.c | 6 +++--- hw/arm/nrf51_soc.c | 2 +- hw/arm/stm32f205_soc.c | 8 ++++---- hw/arm/stm32f405_soc.c | 9 +++++---- hw/arm/xlnx-zynqmp.c | 11 +++++------ 10 files changed, 40 insertions(+), 39 deletions(-) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 4e1fd7e..1f7253e 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -305,20 +305,20 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) /*** Memory ***/ /* Chip-ID and OMR */ - memory_region_init_io(&s->chipid_mem, NULL, &exynos4210_chipid_and_omr_ops, - NULL, "exynos4210.chipid", sizeof(chipid_and_omr)); + memory_region_init_io(&s->chipid_mem, OBJECT(socdev), + &exynos4210_chipid_and_omr_ops, NULL, + "exynos4210.chipid", sizeof(chipid_and_omr)); memory_region_add_subregion(system_mem, EXYNOS4210_CHIPID_ADDR, &s->chipid_mem); /* Internal ROM */ - memory_region_init_rom(&s->irom_mem, NULL, "exynos4210.irom", + memory_region_init_rom(&s->irom_mem, OBJECT(socdev), "exynos4210.irom", EXYNOS4210_IROM_SIZE, &error_fatal); memory_region_add_subregion(system_mem, EXYNOS4210_IROM_BASE_ADDR, &s->irom_mem); /* mirror of iROM */ - memory_region_init_alias(&s->irom_alias_mem, NULL, "exynos4210.irom_alias", - &s->irom_mem, - 0, + memory_region_init_alias(&s->irom_alias_mem, OBJECT(socdev), + "exynos4210.irom_alias", &s->irom_mem, 0, EXYNOS4210_IROM_SIZE); memory_region_add_subregion(system_mem, EXYNOS4210_IROM_MIRROR_BASE_ADDR, &s->irom_alias_mem); diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index da3471b..104bff6 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -247,16 +247,16 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) } /* initialize 2 x 16 KB ROM */ - memory_region_init_rom(&s->rom[0], NULL, - "imx25.rom0", FSL_IMX25_ROM0_SIZE, &err); + memory_region_init_rom(&s->rom[0], OBJECT(dev), "imx25.rom0", + FSL_IMX25_ROM0_SIZE, &err); if (err) { error_propagate(errp, err); return; } memory_region_add_subregion(get_system_memory(), FSL_IMX25_ROM0_ADDR, &s->rom[0]); - memory_region_init_rom(&s->rom[1], NULL, - "imx25.rom1", FSL_IMX25_ROM1_SIZE, &err); + memory_region_init_rom(&s->rom[1], OBJECT(dev), "imx25.rom1", + FSL_IMX25_ROM1_SIZE, &err); if (err) { error_propagate(errp, err); return; @@ -275,7 +275,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) &s->iram); /* internal RAM (128 KB) is aliased over 128 MB - 128 KB */ - memory_region_init_alias(&s->iram_alias, NULL, "imx25.iram_alias", + memory_region_init_alias(&s->iram_alias, OBJECT(dev), "imx25.iram_alias", &s->iram, 0, FSL_IMX25_IRAM_ALIAS_SIZE); memory_region_add_subregion(get_system_memory(), FSL_IMX25_IRAM_ALIAS_ADDR, &s->iram_alias); diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index 55e90d1..8472d2e 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -206,7 +206,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) } /* On a real system, the first 16k is a `secure boot rom' */ - memory_region_init_rom(&s->secure_rom, NULL, "imx31.secure_rom", + memory_region_init_rom(&s->secure_rom, OBJECT(dev), "imx31.secure_rom", FSL_IMX31_SECURE_ROM_SIZE, &err); if (err) { error_propagate(errp, err); @@ -216,7 +216,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) &s->secure_rom); /* There is also a 16k ROM */ - memory_region_init_rom(&s->rom, NULL, "imx31.rom", + memory_region_init_rom(&s->rom, OBJECT(dev), "imx31.rom", FSL_IMX31_ROM_SIZE, &err); if (err) { error_propagate(errp, err); @@ -236,7 +236,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) &s->iram); /* internal RAM (16 KB) is aliased over 256 MB - 16 KB */ - memory_region_init_alias(&s->iram_alias, NULL, "imx31.iram_alias", + memory_region_init_alias(&s->iram_alias, OBJECT(dev), "imx31.iram_alias", &s->iram, 0, FSL_IMX31_IRAM_ALIAS_SIZE); memory_region_add_subregion(get_system_memory(), FSL_IMX31_IRAM_ALIAS_ADDR, &s->iram_alias); diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index ecc6285..9c09f71 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -405,7 +405,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) } /* ROM memory */ - memory_region_init_rom(&s->rom, NULL, "imx6.rom", + memory_region_init_rom(&s->rom, OBJECT(dev), "imx6.rom", FSL_IMX6_ROM_SIZE, &err); if (err) { error_propagate(errp, err); @@ -415,7 +415,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) &s->rom); /* CAAM memory */ - memory_region_init_rom(&s->caam, NULL, "imx6.caam", + memory_region_init_rom(&s->caam, OBJECT(dev), "imx6.caam", FSL_IMX6_CAAM_MEM_SIZE, &err); if (err) { error_propagate(errp, err); @@ -435,7 +435,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) &s->ocram); /* internal OCRAM (256 KB) is aliased over 1 MB */ - memory_region_init_alias(&s->ocram_alias, NULL, "imx6.ocram_alias", + memory_region_init_alias(&s->ocram_alias, OBJECT(dev), "imx6.ocram_alias", &s->ocram, 0, FSL_IMX6_OCRAM_ALIAS_SIZE); memory_region_add_subregion(get_system_memory(), FSL_IMX6_OCRAM_ALIAS_ADDR, &s->ocram_alias); diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index c405b68..f4a9ed6 100644 --- a/hw/arm/fsl-imx6ul.c +++ b/hw/arm/fsl-imx6ul.c @@ -543,7 +543,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) /* * ROM memory */ - memory_region_init_rom(&s->rom, NULL, "imx6ul.rom", + memory_region_init_rom(&s->rom, OBJECT(dev), "imx6ul.rom", FSL_IMX6UL_ROM_SIZE, &error_abort); memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_ROM_ADDR, &s->rom); @@ -551,7 +551,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) /* * CAAM memory */ - memory_region_init_rom(&s->caam, NULL, "imx6ul.caam", + memory_region_init_rom(&s->caam, OBJECT(dev), "imx6ul.caam", FSL_IMX6UL_CAAM_MEM_SIZE, &error_abort); memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_CAAM_MEM_ADDR, &s->caam); @@ -568,8 +568,9 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) /* * internal OCRAM (128 KB) is aliased over 512 KB */ - memory_region_init_alias(&s->ocram_alias, NULL, "imx6ul.ocram_alias", - &s->ocram, 0, FSL_IMX6UL_OCRAM_ALIAS_SIZE); + memory_region_init_alias(&s->ocram_alias, OBJECT(dev), + "imx6ul.ocram_alias", &s->ocram, 0, + FSL_IMX6UL_OCRAM_ALIAS_SIZE); memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_OCRAM_ALIAS_ADDR, &s->ocram_alias); } diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c index 8f84692..588d643 100644 --- a/hw/arm/msf2-soc.c +++ b/hw/arm/msf2-soc.c @@ -96,7 +96,7 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp) MemoryRegion *nvm_alias = g_new(MemoryRegion, 1); MemoryRegion *sram = g_new(MemoryRegion, 1); - memory_region_init_rom(nvm, NULL, "MSF2.eNVM", s->envm_size, + memory_region_init_rom(nvm, OBJECT(dev_soc), "MSF2.eNVM", s->envm_size, &error_fatal); /* * On power-on, the eNVM region 0x60000000 is automatically @@ -104,8 +104,8 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp) * start address (0x0). We do not support remapping other eNVM, * eSRAM and DDR regions by guest(via Sysreg) currently. */ - memory_region_init_alias(nvm_alias, NULL, "MSF2.eNVM", - nvm, 0, s->envm_size); + memory_region_init_alias(nvm_alias, OBJECT(dev_soc), "MSF2.eNVM", nvm, 0, + s->envm_size); memory_region_add_subregion(system_memory, ENVM_BASE_ADDRESS, nvm); memory_region_add_subregion(system_memory, 0, nvm_alias); diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index 4817a76..57eff63 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -165,7 +165,7 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) } /* STUB Peripherals */ - memory_region_init_io(&s->clock, NULL, &clock_ops, NULL, + memory_region_init_io(&s->clock, OBJECT(dev_soc), &clock_ops, NULL, "nrf51_soc.clock", 0x1000); memory_region_add_subregion_overlap(&s->container, NRF51_IOMEM_BASE, &s->clock, -1); diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index 6e93726..118c342 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -93,10 +93,10 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) MemoryRegion *flash = g_new(MemoryRegion, 1); MemoryRegion *flash_alias = g_new(MemoryRegion, 1); - memory_region_init_rom(flash, NULL, "STM32F205.flash", FLASH_SIZE, - &error_fatal); - memory_region_init_alias(flash_alias, NULL, "STM32F205.flash.alias", - flash, 0, FLASH_SIZE); + memory_region_init_rom(flash, OBJECT(dev_soc), "STM32F205.flash", + FLASH_SIZE, &error_fatal); + memory_region_init_alias(flash_alias, OBJECT(dev_soc), + "STM32F205.flash.alias", flash, 0, FLASH_SIZE); memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, flash); memory_region_add_subregion(system_memory, 0, flash_alias); diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c index d590cd0..4f10ce6 100644 --- a/hw/arm/stm32f405_soc.c +++ b/hw/arm/stm32f405_soc.c @@ -95,14 +95,15 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) Error *err = NULL; int i; - memory_region_init_rom(&s->flash, NULL, "STM32F405.flash", FLASH_SIZE, - &err); + memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F405.flash", + FLASH_SIZE, &err); if (err != NULL) { error_propagate(errp, err); return; } - memory_region_init_alias(&s->flash_alias, NULL, "STM32F405.flash.alias", - &s->flash, 0, FLASH_SIZE); + memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc), + "STM32F405.flash.alias", &s->flash, 0, + FLASH_SIZE); memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash); memory_region_add_subregion(system_memory, 0, &s->flash_alias); diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index cab0160..49f1c8d 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -318,9 +318,9 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) ddr_low_size = XLNX_ZYNQMP_MAX_LOW_RAM_SIZE; ddr_high_size = ram_size - XLNX_ZYNQMP_MAX_LOW_RAM_SIZE; - memory_region_init_alias(&s->ddr_ram_high, NULL, - "ddr-ram-high", s->ddr_ram, - ddr_low_size, ddr_high_size); + memory_region_init_alias(&s->ddr_ram_high, OBJECT(dev), + "ddr-ram-high", s->ddr_ram, ddr_low_size, + ddr_high_size); memory_region_add_subregion(get_system_memory(), XLNX_ZYNQMP_HIGH_RAM_START, &s->ddr_ram_high); @@ -330,9 +330,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) ddr_low_size = ram_size; } - memory_region_init_alias(&s->ddr_ram_low, NULL, - "ddr-ram-low", s->ddr_ram, - 0, ddr_low_size); + memory_region_init_alias(&s->ddr_ram_low, OBJECT(dev), "ddr-ram-low", + s->ddr_ram, 0, ddr_low_size); memory_region_add_subregion(get_system_memory(), 0, &s->ddr_ram_low); /* Create the four OCM banks */ From patchwork Tue Feb 25 12:07:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403603 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BB37013A4 for ; Tue, 25 Feb 2020 12:42:57 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 922D620637 for ; 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Tue, 25 Feb 2020 04:07:55 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 122/136] hw/char: Let devices own the MemoryRegion they create Date: Tue, 25 Feb 2020 13:07:20 +0100 Message-Id: <1582632454-16491-20-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::331 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Avoid orphan memory regions being added in the /unattached QOM container. This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-25-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/char/serial.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/char/serial.c b/hw/char/serial.c index 9298881..2ab8b69 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -997,7 +997,7 @@ static void serial_io_realize(DeviceState *dev, Error **errp) return; } - memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8); + memory_region_init_io(&s->io, OBJECT(dev), &serial_io_ops, s, "serial", 8); sysbus_init_mmio(SYS_BUS_DEVICE(sio), &s->io); sysbus_init_irq(SYS_BUS_DEVICE(sio), &s->irq); } @@ -1106,8 +1106,9 @@ static void serial_mm_realize(DeviceState *dev, Error **errp) return; } - memory_region_init_io(&s->io, NULL, &serial_mm_ops[smm->endianness], smm, - "serial", 8 << smm->regshift); + memory_region_init_io(&s->io, OBJECT(dev), + &serial_mm_ops[smm->endianness], smm, "serial", + 8 << smm->regshift); sysbus_init_mmio(SYS_BUS_DEVICE(smm), &s->io); sysbus_init_irq(SYS_BUS_DEVICE(smm), &smm->serial.irq); } From patchwork Tue Feb 25 12:07:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403703 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6FC771395 for ; Tue, 25 Feb 2020 13:08:16 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 46A5B20CC7 for ; Tue, 25 Feb 2020 13:08:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="dWiAQUNi" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 46A5B20CC7 Authentication-Results: mail.kernel.org; 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X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Avoid orphan memory regions being added in the /unattached QOM container. This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-26-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/core/platform-bus.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/core/platform-bus.c b/hw/core/platform-bus.c index 22c5f76..d494e5c 100644 --- a/hw/core/platform-bus.c +++ b/hw/core/platform-bus.c @@ -187,7 +187,8 @@ static void platform_bus_realize(DeviceState *dev, Error **errp) d = SYS_BUS_DEVICE(dev); pbus = PLATFORM_BUS_DEVICE(dev); - memory_region_init(&pbus->mmio, NULL, "platform bus", pbus->mmio_size); + memory_region_init(&pbus->mmio, OBJECT(dev), "platform bus", + pbus->mmio_size); sysbus_init_mmio(d, &pbus->mmio); pbus->used_irqs = bitmap_new(pbus->num_irqs); From patchwork Tue Feb 25 12:07:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403751 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 33A9914E3 for ; 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Tue, 25 Feb 2020 04:07:56 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 124/136] hw/display: Let devices own the MemoryRegion they create Date: Tue, 25 Feb 2020 13:07:22 +0100 Message-Id: <1582632454-16491-22-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::433 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Avoid orphan memory regions being added in the /unattached QOM container. This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-27-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/display/g364fb.c | 3 ++- hw/display/macfb.c | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/display/g364fb.c b/hw/display/g364fb.c index 55185c9..adcba96 100644 --- a/hw/display/g364fb.c +++ b/hw/display/g364fb.c @@ -477,7 +477,8 @@ static void g364fb_init(DeviceState *dev, G364State *s) s->con = graphic_console_init(dev, 0, &g364fb_ops, s); - memory_region_init_io(&s->mem_ctrl, NULL, &g364fb_ctrl_ops, s, "ctrl", 0x180000); + memory_region_init_io(&s->mem_ctrl, OBJECT(dev), &g364fb_ctrl_ops, s, + "ctrl", 0x180000); memory_region_init_ram_ptr(&s->mem_vram, NULL, "vram", s->vram_size, s->vram); vmstate_register_ram(&s->mem_vram, dev); diff --git a/hw/display/macfb.c b/hw/display/macfb.c index 8bff16d..b68faff 100644 --- a/hw/display/macfb.c +++ b/hw/display/macfb.c @@ -362,8 +362,8 @@ static void macfb_common_realize(DeviceState *dev, MacfbState *s, Error **errp) return; } - memory_region_init_io(&s->mem_ctrl, NULL, &macfb_ctrl_ops, s, "macfb-ctrl", - 0x1000); + memory_region_init_io(&s->mem_ctrl, OBJECT(dev), &macfb_ctrl_ops, s, + "macfb-ctrl", 0x1000); memory_region_init_ram_nomigrate(&s->mem_vram, OBJECT(s), "macfb-vram", MACFB_VRAM_SIZE, errp); From patchwork Tue Feb 25 12:07:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403763 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 27AED14E3 for ; Tue, 25 Feb 2020 13:22:21 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F31212176D for ; Tue, 25 Feb 2020 13:22:20 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 04:07:58 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id h13sm22709423wrw.54.2020.02.25.04.07.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 04:07:57 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 125/136] hw/dma: Let devices own the MemoryRegion they create Date: Tue, 25 Feb 2020 13:07:23 +0100 Message-Id: <1582632454-16491-23-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Avoid orphan memory regions being added in the /unattached QOM container. This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-28-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/dma/i8257.c | 2 +- hw/dma/rc4030.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c index bad8deb..ef15c06 100644 --- a/hw/dma/i8257.c +++ b/hw/dma/i8257.c @@ -553,7 +553,7 @@ static void i8257_realize(DeviceState *dev, Error **errp) I8257State *d = I8257(dev); int i; - memory_region_init_io(&d->channel_io, NULL, &channel_io_ops, d, + memory_region_init_io(&d->channel_io, OBJECT(dev), &channel_io_ops, d, "dma-chan", 8 << d->dshift); memory_region_add_subregion(isa_address_space_io(isa), d->base, &d->channel_io); diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index c4cf823..f62eb3d 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -679,9 +679,9 @@ static void rc4030_realize(DeviceState *dev, Error **errp) s->periodic_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, rc4030_periodic_timer, s); - memory_region_init_io(&s->iomem_chipset, NULL, &rc4030_ops, s, + memory_region_init_io(&s->iomem_chipset, o, &rc4030_ops, s, "rc4030.chipset", 0x300); - memory_region_init_io(&s->iomem_jazzio, NULL, &jazzio_ops, s, + memory_region_init_io(&s->iomem_jazzio, o, &jazzio_ops, s, "rc4030.jazzio", 0x00001000); memory_region_init_iommu(&s->dma_mr, sizeof(s->dma_mr), From patchwork Tue Feb 25 12:07:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403695 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2313A1395 for ; Tue, 25 Feb 2020 13:06:36 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EDCF020CC7 for ; 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Tue, 25 Feb 2020 04:07:58 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 126/136] hw/riscv: Let devices own the MemoryRegion they create Date: Tue, 25 Feb 2020 13:07:24 +0100 Message-Id: <1582632454-16491-24-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Avoid orphan memory regions being added in the /unattached QOM container. This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-29-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/riscv/sifive_e.c | 6 +++--- hw/riscv/sifive_u.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index 6f6360a..64eb8ce 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -145,8 +145,8 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp) &error_abort); /* Mask ROM */ - memory_region_init_rom(&s->mask_rom, NULL, "riscv.sifive.e.mrom", - memmap[SIFIVE_E_MROM].size, &error_fatal); + memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.e.mrom", + memmap[SIFIVE_E_MROM].size, &error_fatal); memory_region_add_subregion(sys_mem, memmap[SIFIVE_E_MROM].base, &s->mask_rom); @@ -208,7 +208,7 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp) memmap[SIFIVE_E_PWM2].base, memmap[SIFIVE_E_PWM2].size); /* Flash memory */ - memory_region_init_rom(&s->xip_mem, NULL, "riscv.sifive.e.xip", + memory_region_init_rom(&s->xip_mem, OBJECT(dev), "riscv.sifive.e.xip", memmap[SIFIVE_E_XIP].size, &error_fatal); memory_region_add_subregion(sys_mem, memmap[SIFIVE_E_XIP].base, &s->xip_mem); diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 0e12b3c..be7d438 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -497,7 +497,7 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) &error_abort); /* boot rom */ - memory_region_init_rom(mask_rom, NULL, "riscv.sifive.u.mrom", + memory_region_init_rom(mask_rom, OBJECT(dev), "riscv.sifive.u.mrom", memmap[SIFIVE_U_MROM].size, &error_fatal); memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base, mask_rom); From patchwork Tue Feb 25 12:07:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403715 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E78941395 for ; Tue, 25 Feb 2020 13:09:51 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BEB5020CC7 for ; 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Tue, 25 Feb 2020 04:07:59 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 127/136] hw/input/milkymist-softusb: Remove unused 'pmem_ptr' field Date: Tue, 25 Feb 2020 13:07:25 +0100 Message-Id: <1582632454-16491-25-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::333 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé In commit 029ad4bcf3 we removed softusb_{read, write}_pmem(), we can also remove the 'pmem_ptr' field. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-30-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/input/milkymist-softusb.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/hw/input/milkymist-softusb.c b/hw/input/milkymist-softusb.c index 3e0a7eb..7deeb12 100644 --- a/hw/input/milkymist-softusb.c +++ b/hw/input/milkymist-softusb.c @@ -64,7 +64,6 @@ struct MilkymistSoftUsbState { MemoryRegion dmem; qemu_irq irq; - void *pmem_ptr; void *dmem_ptr; /* device properties */ @@ -263,7 +262,6 @@ static void milkymist_softusb_realize(DeviceState *dev, Error **errp) memory_region_init_ram_nomigrate(&s->pmem, OBJECT(s), "milkymist-softusb.pmem", s->pmem_size, &error_fatal); vmstate_register_ram_global(&s->pmem); - s->pmem_ptr = memory_region_get_ram_ptr(&s->pmem); sysbus_init_mmio(sbd, &s->pmem); memory_region_init_ram_nomigrate(&s->dmem, OBJECT(s), "milkymist-softusb.dmem", s->dmem_size, &error_fatal); From patchwork Tue Feb 25 12:07:26 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 04:08:00 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 128/136] hw/input/milkymist-softusb: Let devices own the MemoryRegion they create Date: Tue, 25 Feb 2020 13:07:26 +0100 Message-Id: <1582632454-16491-26-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::432 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Avoid orphan memory regions being added in the /unattached QOM container. Note this change break the migration of the LM32 milkymist machine. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-31-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/input/milkymist-softusb.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/hw/input/milkymist-softusb.c b/hw/input/milkymist-softusb.c index 7deeb12..72bc7ba 100644 --- a/hw/input/milkymist-softusb.c +++ b/hw/input/milkymist-softusb.c @@ -259,13 +259,11 @@ static void milkymist_softusb_realize(DeviceState *dev, Error **errp) sysbus_init_mmio(sbd, &s->regs_region); /* register pmem and dmem */ - memory_region_init_ram_nomigrate(&s->pmem, OBJECT(s), "milkymist-softusb.pmem", + memory_region_init_ram(&s->pmem, OBJECT(s), "milkymist-softusb.pmem", s->pmem_size, &error_fatal); - vmstate_register_ram_global(&s->pmem); sysbus_init_mmio(sbd, &s->pmem); - memory_region_init_ram_nomigrate(&s->dmem, OBJECT(s), "milkymist-softusb.dmem", + memory_region_init_ram(&s->dmem, OBJECT(s), "milkymist-softusb.dmem", s->dmem_size, &error_fatal); - vmstate_register_ram_global(&s->dmem); s->dmem_ptr = memory_region_get_ram_ptr(&s->dmem); sysbus_init_mmio(sbd, &s->dmem); @@ -275,8 +273,8 @@ static void milkymist_softusb_realize(DeviceState *dev, Error **errp) static const VMStateDescription vmstate_milkymist_softusb = { .name = "milkymist-softusb", - .version_id = 1, - .minimum_version_id = 1, + .version_id = 2, + .minimum_version_id = 2, .fields = (VMStateField[]) { VMSTATE_UINT32_ARRAY(regs, MilkymistSoftUsbState, R_MAX), VMSTATE_HID_KEYBOARD_DEVICE(hid_kbd, MilkymistSoftUsbState), From patchwork Tue Feb 25 12:07:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403519 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BF53F138D for ; Tue, 25 Feb 2020 12:31:49 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9652120CC7 for ; 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Tue, 25 Feb 2020 04:08:01 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 129/136] hw/net/milkymist-minimac2: Let devices own the MemoryRegion they create Date: Tue, 25 Feb 2020 13:07:27 +0100 Message-Id: <1582632454-16491-27-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::336 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Avoid orphan memory regions being added in the /unattached QOM container. Note this change break the migration of the LM32 milkymist machine. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-32-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/net/milkymist-minimac2.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/net/milkymist-minimac2.c b/hw/net/milkymist-minimac2.c index 1ba0175..9582b5f 100644 --- a/hw/net/milkymist-minimac2.c +++ b/hw/net/milkymist-minimac2.c @@ -473,9 +473,9 @@ static void milkymist_minimac2_realize(DeviceState *dev, Error **errp) sysbus_init_mmio(sbd, &s->regs_region); /* register buffers memory */ - memory_region_init_ram_nomigrate(&s->buffers, OBJECT(dev), "milkymist-minimac2.buffers", + memory_region_init_ram(&s->buffers, OBJECT(dev), + "milkymist-minimac2.buffers", buffers_size, &error_fatal); - vmstate_register_ram_global(&s->buffers); s->rx0_buf = memory_region_get_ram_ptr(&s->buffers); s->rx1_buf = s->rx0_buf + MINIMAC2_BUFFER_SIZE; s->tx_buf = s->rx1_buf + MINIMAC2_BUFFER_SIZE; @@ -506,8 +506,8 @@ static const VMStateDescription vmstate_milkymist_minimac2_mdio = { static const VMStateDescription vmstate_milkymist_minimac2 = { .name = "milkymist-minimac2", - .version_id = 1, - .minimum_version_id = 1, + .version_id = 2, + .minimum_version_id = 2, .fields = (VMStateField[]) { VMSTATE_UINT32_ARRAY(regs, MilkymistMinimac2State, R_MAX), VMSTATE_UINT16_ARRAY(phy_regs, MilkymistMinimac2State, R_PHY_MAX), From patchwork Tue Feb 25 12:07:28 2020 Content-Type: text/plain; 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Tue, 25 Feb 2020 04:08:02 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 130/136] hw/block/onenand: Let devices own the MemoryRegion they create Date: Tue, 25 Feb 2020 13:07:28 +0100 Message-Id: <1582632454-16491-28-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32b X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé Avoid orphan memory regions being added in the /unattached QOM container. Note this change break the migration of the nSeries machines. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200224205533.23798-33-philmd@redhat.com> Supersedes: <20200221173049.18134-1-philmd@redhat.com> --- hw/block/onenand.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/block/onenand.c b/hw/block/onenand.c index 898ac56..f49db0b 100644 --- a/hw/block/onenand.c +++ b/hw/block/onenand.c @@ -173,8 +173,8 @@ static int onenand_post_load(void *opaque, int version_id) static const VMStateDescription vmstate_onenand = { .name = "onenand", - .version_id = 1, - .minimum_version_id = 1, + .version_id = 2, + .minimum_version_id = 2, .pre_save = onenand_pre_save, .post_load = onenand_post_load, .fields = (VMStateField[]) { @@ -809,9 +809,8 @@ static void onenand_realize(DeviceState *dev, Error **errp) } s->otp = memset(g_malloc((64 + 2) << PAGE_SHIFT), 0xff, (64 + 2) << PAGE_SHIFT); - memory_region_init_ram_nomigrate(&s->ram, OBJECT(s), "onenand.ram", + memory_region_init_ram(&s->ram, OBJECT(s), "onenand.ram", 0xc000 << s->shift, &error_fatal); - vmstate_register_ram_global(&s->ram); ram = memory_region_get_ram_ptr(&s->ram); s->boot[0] = ram + (0x0000 << s->shift); s->boot[1] = ram + (0x8000 << s->shift); From patchwork Tue Feb 25 12:07:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403783 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DD08514E3 for ; Tue, 25 Feb 2020 13:23:52 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B2BC420726 for ; Tue, 25 Feb 2020 13:23:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="IF5PoHm8" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B2BC420726 Authentication-Results: mail.kernel.org; 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Tue, 25 Feb 2020 04:08:04 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id h13sm22709423wrw.54.2020.02.25.04.08.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 04:08:03 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 131/136] memory: batch allocate ioeventfds[] in address_space_update_ioeventfds() Date: Tue, 25 Feb 2020 13:07:29 +0100 Message-Id: <1582632454-16491-29-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stefan Hajnoczi Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Stefan Hajnoczi Reallocing the ioeventfds[] array each time an element is added is very expensive as the number of ioeventfds increases. Batch allocate instead to amortize the cost of realloc. This patch reduces Linux guest boot times from 362s to 140s when there are 2 virtio-blk devices with 1 virtqueue and 99 virtio-blk devices with 32 virtqueues. Signed-off-by: Stefan Hajnoczi Message-Id: <20200218182226.913977-1-stefanha@redhat.com> Signed-off-by: Paolo Bonzini --- memory.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/memory.c b/memory.c index aeaa8dc..09be40e 100644 --- a/memory.c +++ b/memory.c @@ -794,10 +794,19 @@ static void address_space_update_ioeventfds(AddressSpace *as) FlatView *view; FlatRange *fr; unsigned ioeventfd_nb = 0; - MemoryRegionIoeventfd *ioeventfds = NULL; + unsigned ioeventfd_max; + MemoryRegionIoeventfd *ioeventfds; AddrRange tmp; unsigned i; + /* + * It is likely that the number of ioeventfds hasn't changed much, so use + * the previous size as the starting value, with some headroom to avoid + * gratuitous reallocations. + */ + ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4); + ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max); + view = address_space_get_flatview(as); FOR_EACH_FLAT_RANGE(fr, view) { for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { @@ -806,8 +815,11 @@ static void address_space_update_ioeventfds(AddressSpace *as) int128_make64(fr->offset_in_region))); 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Tue, 25 Feb 2020 04:08:04 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 132/136] mem-prealloc: optimize large guest startup Date: Tue, 25 Feb 2020 13:07:30 +0100 Message-Id: <1582632454-16491-30-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: bauerchen Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: bauerchen [desc]: Large memory VM starts slowly when using -mem-prealloc, and there are some areas to optimize in current method; 1、mmap will be used to alloc threads stack during create page clearing threads, and it will attempt mm->mmap_sem for write lock, but clearing threads have hold read lock, this competition will cause threads createion very slow; 2、methods of calcuating pages for per threads is not well;if we use 64 threads to split 160 hugepage,63 threads clear 2page,1 thread clear 34 page,so the entire speed is very slow; to solve the first problem,we add a mutex in thread function,and start all threads when all threads finished createion; and the second problem, we spread remainder to other threads,in situation that 160 hugepage and 64 threads, there are 32 threads clear 3 pages,and 32 threads clear 2 pages. [test]: 320G 84c VM start time can be reduced to 10s 680G 84c VM start time can be reduced to 18s Signed-off-by: bauerchen Reviewed-by: Pan Rui Reviewed-by: Ivan Ren [Simplify computation of the number of pages per thread. - Paolo] Signed-off-by: Paolo Bonzini --- util/oslib-posix.c | 32 ++++++++++++++++++++++++-------- 1 file changed, 24 insertions(+), 8 deletions(-) diff --git a/util/oslib-posix.c b/util/oslib-posix.c index 5a291cc..897e8f3 100644 --- a/util/oslib-posix.c +++ b/util/oslib-posix.c @@ -76,6 +76,10 @@ static MemsetThread *memset_thread; static int memset_num_threads; static bool memset_thread_failed; +static QemuMutex page_mutex; +static QemuCond page_cond; +static bool threads_created_flag; + int qemu_get_thread_id(void) { #if defined(__linux__) @@ -403,6 +407,17 @@ static void *do_touch_pages(void *arg) MemsetThread *memset_args = (MemsetThread *)arg; sigset_t set, oldset; + /* + * On Linux, the page faults from the loop below can cause mmap_sem + * contention with allocation of the thread stacks. Do not start + * clearing until all threads have been created. + */ + qemu_mutex_lock(&page_mutex); + while(!threads_created_flag){ + qemu_cond_wait(&page_cond, &page_mutex); + } + qemu_mutex_unlock(&page_mutex); + /* unblock SIGBUS */ sigemptyset(&set); sigaddset(&set, SIGBUS); @@ -451,27 +466,28 @@ static inline int get_memset_num_threads(int smp_cpus) static bool touch_all_pages(char *area, size_t hpagesize, size_t numpages, int smp_cpus) { - size_t numpages_per_thread; - size_t size_per_thread; + size_t numpages_per_thread, leftover; char *addr = area; int i = 0; memset_thread_failed = false; + threads_created_flag = false; memset_num_threads = get_memset_num_threads(smp_cpus); memset_thread = g_new0(MemsetThread, memset_num_threads); - numpages_per_thread = (numpages / memset_num_threads); - size_per_thread = (hpagesize * numpages_per_thread); + numpages_per_thread = numpages / memset_num_threads; + leftover = numpages % memset_num_threads; for (i = 0; i < memset_num_threads; i++) { memset_thread[i].addr = addr; - memset_thread[i].numpages = (i == (memset_num_threads - 1)) ? - numpages : numpages_per_thread; + memset_thread[i].numpages = numpages_per_thread + (i < leftover); memset_thread[i].hpagesize = hpagesize; qemu_thread_create(&memset_thread[i].pgthread, "touch_pages", do_touch_pages, &memset_thread[i], QEMU_THREAD_JOINABLE); - addr += size_per_thread; - numpages -= numpages_per_thread; + addr += memset_thread[i].numpages * hpagesize; } + threads_created_flag = true; + qemu_cond_broadcast(&page_cond); + for (i = 0; i < memset_num_threads; i++) { qemu_thread_join(&memset_thread[i].pgthread); } From patchwork Tue Feb 25 12:07:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403729 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4D0F014E3 for ; Tue, 25 Feb 2020 13:11:23 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2342121744 for ; Tue, 25 Feb 2020 13:11:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="uRMQR5OC" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2342121744 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:55326 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Zze-0002TE-BL for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 08:11:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:52794) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Z0S-0003wt-Ug for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:08:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6Z0R-0003fX-Uo for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:08:08 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]:34179) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6Z0R-0003ew-Mi for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:08:07 -0500 Received: by mail-wm1-x336.google.com with SMTP id i10so970032wmd.1 for ; Tue, 25 Feb 2020 04:08:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=QL74FXwo5fD2SXPQVC1GZn7aE6A8HimpNFP2yM67+qI=; b=uRMQR5OCpXk3GNJ+wX6EzmWT5zBEOJwJc7ntvhgfhjOpxm+zYTGRCT48BnsUMA2los S6CSswxa7U3PVrdYwFsmBfeLelAewrANgNhQhnNyDEpxZDXkIhYOobazHZL2NiFiQWw6 DkGxoDFSDCnLg93GiovPKHbZOFqiiI/vJTFFu5/Nyhb5lxCYoUFYi/wcz3FDw8WGrHo5 /8qpLABr4XJCeogP6o+gyQEyL2BOTy4L2UiPWuqNriQ/dQymlSiRqT+R//pA7fMDF/oE KPQfYaiTDc4DMq4wHI5YgYUUDpJ317S4o6ghgHCVEABUm2CGXRjsA2Ib9x6rKalSeXRv tXYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=QL74FXwo5fD2SXPQVC1GZn7aE6A8HimpNFP2yM67+qI=; b=X8Q3XmJDjYUCXtRre6OA73fnTDCjtRF/KFMdMhCcj4gT0THdKhFLScstB8AU4xONmi 4HiEdq4mjDb2Ul8S/wXV9NiGlWJxy6Z+D60UjKl3SCRSsooqveOR8BQXvd7cOhGFffbR hY6iG/fotOCZpwaPsJ017jst2Uzu7GQQIQ3Co8eYPcAfb9X6v0KhysFMnR90NeWrcBHo kOMgHYb1qsjX4XrRp0Dba8HIyKzQox0AYiw+vV9JIdRAXRC8ykZgKwYXE3L1qpb8/5Jb GJd/DkJk9CEPhK5/GrTJhwGfAnWpECXiqGfqpeUtJvnBjTGUNzmL53fu25p1kuqw/77V du1g== X-Gm-Message-State: APjAAAVVE0JlRKTrkLKq5LKtoKTIWP+2Tm0Bf3aM9LS3NJThzxLfCSPO 2NDANC7wP9Fq1E8jc5Y+0yPXCg6e X-Google-Smtp-Source: APXvYqzH31Mdwsf8F3Fh4FVc+PROgAJgP9ejtaLptQ9UsyJTrZVsnVElKEVmqR680q3E7LxmwCPTOA== X-Received: by 2002:a7b:c218:: with SMTP id x24mr4769596wmi.149.1582632486380; Tue, 25 Feb 2020 04:08:06 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id h13sm22709423wrw.54.2020.02.25.04.08.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 04:08:05 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 133/136] qdev-monitor: Forbid repeated device_del Date: Tue, 25 Feb 2020 13:07:31 +0100 Message-Id: <1582632454-16491-31-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::336 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Julia Suvorova Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Julia Suvorova Device unplug can be done asynchronously. Thus, sending the second device_del before the previous unplug is complete may lead to unexpected results. On PCIe devices, this cancels the hot-unplug process. Signed-off-by: Julia Suvorova Reviewed-by: Stefan Hajnoczi Message-Id: <20200220165556.39388-1-jusual@redhat.com> Signed-off-by: Paolo Bonzini --- qdev-monitor.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/qdev-monitor.c b/qdev-monitor.c index 8ce71a2..8a2a953 100644 --- a/qdev-monitor.c +++ b/qdev-monitor.c @@ -887,6 +887,12 @@ void qmp_device_del(const char *id, Error **errp) { DeviceState *dev = find_device_state(id, errp); if (dev != NULL) { + if (dev->pending_deleted_event) { + error_setg(errp, "Device %s is already in the " + "process of unplug", id); + return; + } + qdev_unplug(dev, errp); } } From patchwork Tue Feb 25 12:07:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403733 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A397C138D for ; Tue, 25 Feb 2020 13:12:55 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7A3E221744 for ; Tue, 25 Feb 2020 13:12:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="FOVCUFgw" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7A3E221744 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:55356 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6a18-0004r8-Mw for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 08:12:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:52848) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Z0W-00046m-Ff for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:08:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6Z0S-0003gO-SE for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:08:12 -0500 Received: from mail-wm1-x342.google.com ([2a00:1450:4864:20::342]:36794) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6Z0S-0003fr-Lt for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:08:08 -0500 Received: by mail-wm1-x342.google.com with SMTP id p17so2909570wma.1 for ; Tue, 25 Feb 2020 04:08:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:subject:date:message-id:in-reply-to:references; bh=nRYIH3y8Xom3CDp8/YJ/8ijjUz0MFPeZCZ7j0YIYXuA=; b=FOVCUFgw2lwD0DRu/yfu/+4h/GffIBwjEahoISDTSz0pU12fqAIFZB3i7PABQSYlgP Dfqjlsagoa54o92wwdf6ZJoegEJso8A8+7eTyObtGTnauPk8REIwop+/6K8IE927DehZ ErZ2szhDY5XhQJ5SG35fbOWity4XVOzEfBekRpLux/dUeJB3M72HbdBk1p7dZIo7re3E x5V0SZjCLVYgHykcDbXt68pkyivqP2dhltxu9U6wihNgU2zstwcSzeWpSpNYmyEFXq3M kijQUsIpL+kH0cjTCHrekpIVG6TDUM078o75yCp70xoMUC5J8ZTrbTBvJ9CyJG+rytjK 5Q9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:subject:date:message-id :in-reply-to:references; bh=nRYIH3y8Xom3CDp8/YJ/8ijjUz0MFPeZCZ7j0YIYXuA=; b=FwEv24aSZlp301xKRcGYeEdILIIYYO8x4vAqyU4wa4L0xHgYdVoBZJpLuFlSnCo0sy qqjFxR0n5FoxsKGIMA72RwINiVrKThLcLMhfwiyyEdtEOkbgFA7ao7I3SYDxrIxi+i0i ko1NUi5QCewPL63Ly/b9Uu4nZGttWer9042RP/y7U4wklVFk/Ziafh8QCdDaTI+peHnN ub8x1aKS0OrzDWTpera1VezcxZdhBMWjNBjG+y65CdSiVbMoZBaRlzrvrQMbjAmjr0cd ky8MRWldwbnt5HTQk/DYJ3eGYMfoAWPxoohZ/N+0TaEDKkdM4tlley1ke9xmqwBT0El0 jeaw== X-Gm-Message-State: APjAAAX4owA0ec4q40Ui41gSQZx2oB4O4z24wKepr8+gJ96tWyF2vD0u Nw63P41UYLepxZ16J7VAGqJqY1x/ X-Google-Smtp-Source: APXvYqx19jLdegQumBGiGuw8C8p+Lvt8/mia6eShoJH7UZe1kglwzu2mb/syedICyF1vOsn6cqn7Lg== X-Received: by 2002:a1c:6389:: with SMTP id x131mr5208682wmb.155.1582632487426; Tue, 25 Feb 2020 04:08:07 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id h13sm22709423wrw.54.2020.02.25.04.08.06 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 04:08:06 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 134/136] target/i386: check for empty register in FXAM Date: Tue, 25 Feb 2020 13:07:32 +0100 Message-Id: <1582632454-16491-32-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The fxam instruction returns the wrong result after fdecstp or after an underflow. Check fptags to handle this. Reported-by: Signed-off-by: Paolo Bonzini --- target/i386/fpu_helper.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c index 99f28f2..792a128 100644 --- a/target/i386/fpu_helper.c +++ b/target/i386/fpu_helper.c @@ -991,7 +991,11 @@ void helper_fxam_ST0(CPUX86State *env) env->fpus |= 0x200; /* C1 <-- 1 */ } - /* XXX: test fptags too */ + if (env->fptags[env->fpstt]) { + env->fpus |= 0x4100; /* Empty */ + return; + } + expdif = EXPD(temp); if (expdif == MAXEXPD) { if (MANTD(temp) == 0x8000000000000000ULL) { From patchwork Tue Feb 25 12:07:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403789 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CDB5B92A for ; Tue, 25 Feb 2020 13:25:42 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A48F121927 for ; Tue, 25 Feb 2020 13:25:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OXEzyiJB" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A48F121927 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:55692 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6aDV-0002Bp-SA for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 08:25:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:52832) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Z0V-00043z-BD for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:08:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6Z0U-0003hN-A5 for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:08:11 -0500 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:54632) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6Z0U-0003gu-3J for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:08:10 -0500 Received: by mail-wm1-x343.google.com with SMTP id z12so2724357wmi.4 for ; Tue, 25 Feb 2020 04:08:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PIafvyQfHwf8flcgdrRq/WGoQSyodU6qPc8agqHB4HE=; b=OXEzyiJBxRQHaXtDrUH1R7xedeSGF96CYA6foLLYIqgZT8p02WDSuSnOSBVfbdHxEj Bz6qA/pmV7R10Xx0ZvMqstzBChC/PAmF72uM7yHu4t/q31K65l/LnkkDH9x8b2ES+J6H Jk1j0YrU1ICdxSbwC9QQ3F6I5pZ4lxx1130Mr2Pi2MHKjrdS6feIJMNHcgeHvfYh/pGR MgqM0HlH7LqMYk6WardFvjDAZIWWYLEWTQUrOsQsaPsSLSmdyK8AF6drHjoPJ0bC7Vjs KnskMmtoWQkNofu8QJJ93eHOElf3Xx5Pmm+AqiZBjxVNAjL0HCbX6GGPDDe7M/D3D/Q4 gXVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=PIafvyQfHwf8flcgdrRq/WGoQSyodU6qPc8agqHB4HE=; b=Q6fazOCV3RDDmCwalnKnfgfjHY8KFM3Uzy74aE+zi+RTgDTn5f4Y9YBYmiXrfyQFiK OA7p3gQgIOy3/TzR/I2ob7zE8Ry/Vyz3G95Yt6aCK/V5s8HX2kqv4QFmei4Ht1GOo9rw RVJNteeKfh3Ufl/1s6XjlnDYiUA6vqAuxEKI/n1dOn7oiDKSKuSTcbSkYRBoU+RMQDRA IvX8mqei4EwtXEsslN3jcgd6dJj0Jc5e+1rF8pJ9uETSdh1ZvwOT2yZKklJ9+13wg+a1 iO67ZAx8/RDGOWryvcS9ZMeR70G40jwVvXoaDarZgy2Z+hVWAx4OEx7aqTaTVsFkVo/1 NJ5Q== X-Gm-Message-State: APjAAAUoX4EvDJ09Uxs317KxTxAj4gim2PMZrEDafxrqdj94dgYeiS3K 7X5O2DheRJVuk1UALE40O3KR2Xg0 X-Google-Smtp-Source: APXvYqz4hfx1FnjqcsgHuVlAOejMe1qP4rWMfqaZJz3H8hbWa+XooknxKEO4vv+RGgP11W6pDvd4Ng== X-Received: by 2002:a05:600c:2042:: with SMTP id p2mr5200251wmg.79.1582632488264; Tue, 25 Feb 2020 04:08:08 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id h13sm22709423wrw.54.2020.02.25.04.08.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 04:08:07 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 135/136] accel/kvm: Check ioctl(KVM_SET_USER_MEMORY_REGION) return value Date: Tue, 25 Feb 2020 13:07:33 +0100 Message-Id: <1582632454-16491-33-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé kvm_vm_ioctl() can fail, check its return value, and log an error when it failed. This fixes Coverity CID 1412229: Unchecked return value (CHECKED_RETURN) check_return: Calling kvm_vm_ioctl without checking return value Reported-by: Coverity (CID 1412229) Fixes: 235e8982ad3 ("support using KVM_MEM_READONLY flag for regions") Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Xu Message-Id: <20200221163336.2362-1-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- accel/kvm/kvm-all.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index c111312..6df3a4d 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -308,13 +308,23 @@ static int kvm_set_user_memory_region(KVMMemoryListener *kml, KVMSlot *slot, boo /* Set the slot size to 0 before setting the slot to the desired * value. This is needed based on KVM commit 75d61fbc. */ mem.memory_size = 0; - kvm_vm_ioctl(s, KVM_SET_USER_MEMORY_REGION, &mem); + ret = kvm_vm_ioctl(s, KVM_SET_USER_MEMORY_REGION, &mem); + if (ret < 0) { + goto err; + } } mem.memory_size = slot->memory_size; ret = kvm_vm_ioctl(s, KVM_SET_USER_MEMORY_REGION, &mem); slot->old_flags = mem.flags; +err: trace_kvm_set_user_memory(mem.slot, mem.flags, mem.guest_phys_addr, mem.memory_size, mem.userspace_addr, ret); + if (ret < 0) { + error_report("%s: KVM_SET_USER_MEMORY_REGION failed, slot=%d," + " start=0x%" PRIx64 ", size=0x%" PRIx64 ": %s", + __func__, mem.slot, slot->start_addr, + (uint64_t)mem.memory_size, strerror(errno)); + } return ret; } From patchwork Tue Feb 25 12:07:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 11403525 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6AA5F138D for ; Tue, 25 Feb 2020 12:33:58 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3DCD920CC7 for ; Tue, 25 Feb 2020 12:33:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="krlXXX0O" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3DCD920CC7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:54286 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6ZPR-0002hs-DU for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 07:33:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:52834) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6Z0V-00044O-GK for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:08:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6Z0U-0003hV-Ez for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:08:11 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]:38766) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j6Z0U-0003h3-9G for qemu-devel@nongnu.org; Tue, 25 Feb 2020 07:08:10 -0500 Received: by mail-wm1-x32f.google.com with SMTP id a9so2897915wmj.3 for ; Tue, 25 Feb 2020 04:08:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=+QntnSwGiMZJz9M5LirsEIfpTxlqSVZPz0auwZeZsmQ=; b=krlXXX0OAzQCaKqynMM6ZpzDE8EfxzfR2nGl3wOhV+Htgc43gjg8EIvh2I9dnBBQH6 GAXNjyTcgXZUjZ+vX1Sq77VPdpBeWseuneIiNz9LnVssvpHE3SDvRJzmVDLJcMV2vms5 ETC8spvr15gZOOM2DdN70s7wmZTqsemmgGFIjbhyYmW+dDiXy7ooISafkkyqMmU0bR/D A9+b4PZMHaeyu1hYlH/bm4idRiAt1YNXZ7UuH/6nID2ovGpGfjErPc16OzyaRQk6uIKM XeLNlenPIDQi4g2tjp30xklO7MMZbXVT6K37zUG65emYTexmn7ZEi9AM0HHYLvK75fZD SKAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=+QntnSwGiMZJz9M5LirsEIfpTxlqSVZPz0auwZeZsmQ=; b=Pp9RQTGHOihUjvclf6Nj3P+mM9m029KQTepyMLu5RgJVp0w9YDttHiwt/R4pKy3YeA 0reRlyRipjaEhFa8MiEUHhs8cWyRM1jQmoRCck/eDCMWux7OTba43zl4GhTVA4GHaTTT uooSIvhQoULvxyWdhYOdfglugBA5FUgRXyApGBytmEpF+5pJrAE2D5PgQgn+u71ZhG2i do9aMivZLKQiLjmWMoQLArn5lnsObxzwou/mg2RilaIo9ZlvvwkW0PooeIbqhLY2K8CU xjyFtqnfOSXHflw6uxB9nsQgV7A9MVlqqQmXZQ1NAmjZ/ZpuGIdD3D4Xe/RKHhf0GpVF /FHA== X-Gm-Message-State: APjAAAXI/qnFeMZyPDlCJ7eIatBH3yQLfRlCKbbh69U+S/UcKTT/0XMm wSnX0/n77zJLPzVBYs1GVJGVd9HQ X-Google-Smtp-Source: APXvYqyV4aoKxSrz9M1zfiWtDvTUSC9+pIysCajzZz3sBbJDaCpiDyn4OJSLAB6pwq8FbOQXlS5WBA== X-Received: by 2002:a1c:4857:: with SMTP id v84mr5039115wma.8.1582632489044; Tue, 25 Feb 2020 04:08:09 -0800 (PST) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id h13sm22709423wrw.54.2020.02.25.04.08.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Feb 2020 04:08:08 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 136/136] WHPX: Assigning maintainer for Windows Hypervisor Platform Date: Tue, 25 Feb 2020 13:07:34 +0100 Message-Id: <1582632454-16491-34-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> References: <1582631466-13880-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sunil Muthuswamy Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Sunil Muthuswamy Signed-off-by: Sunil Muthuswamy Message-Id: Reviewed-by: Justin Terry (VM) Signed-off-by: Paolo Bonzini --- MAINTAINERS | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 195dd58..36d94c1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -404,6 +404,14 @@ S: Supported F: target/i386/kvm.c F: scripts/kvm/vmxcap +WHPX CPUs +M: Sunil Muthuswamy +S: Supported +F: target/i386/whpx-all.c +F: target/i386/whp-dispatch.h +F: accel/stubs/whpx-stub.c +F: include/sysemu/whpx.h + Guest CPU Cores (Xen) --------------------- X86 Xen CPUs