From patchwork Tue Feb 25 16:11:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 11404185 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6D65C1395 for ; Tue, 25 Feb 2020 16:12:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 566D22084E for ; Tue, 25 Feb 2020 16:12:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730950AbgBYQMG (ORCPT ); Tue, 25 Feb 2020 11:12:06 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:40239 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729206AbgBYQMG (ORCPT ); Tue, 25 Feb 2020 11:12:06 -0500 Received: by mail-wm1-f68.google.com with SMTP id t14so3713545wmi.5; Tue, 25 Feb 2020 08:12:05 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=g6DQBCL1J6m7CoP9ENl+OA6l5n10vKz1KQp1E0CCoWY=; b=sRciTubcIEThZ+RT5lykhenWNNSKXJxdptKckXJNiyMWkzy+iJSlzCVPwHZQr6nWM+ 9hJVEl6NlnZ4iLv+a2bpHBABvfsJ2K//ZR8PH/Jpa9wosMRjh+KvnF1jyzsPke+0/92o YH9frIGUBdp5AD0+x1cTrtMfKdUru+Kn3HIDJSHPEKBMBzQybr7dAEInRIXSnIzMLL86 oqbybIkTGK/uUH9nAHmsecbpF4HjPFY1ialbZ+EORUBx3XSjYcuZHOAEKF2K2aXor84I GIk7hEP0xpFPUEHz71MBS66uGPnpY9bH0JBezpjau9zwghggzGWfsLOwbhWU+pDIoW8U Y+QA== X-Gm-Message-State: APjAAAVB7sHGtFBLJXfKoqXZ8sB8vHl9BOQmsdEG3Lt9bcoPIBx4cLN/ NfM97FdD3EiD7SGOp0Y2F1VG+bXYfXw= X-Google-Smtp-Source: APXvYqz2GddcSqaJtZUCCRWuAVNSfLkFf7wKPo8DHL8CvjqQTROqeO/fxgFpdv9+VIUsyHizZWLqZQ== X-Received: by 2002:a05:600c:1009:: with SMTP id c9mr30312wmc.162.1582647124463; Tue, 25 Feb 2020 08:12:04 -0800 (PST) Received: from 1aq-andre.garage.tyco.com ([77.107.218.170]) by smtp.gmail.com with ESMTPSA id h10sm4757339wml.18.2020.02.25.08.12.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2020 08:12:03 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= To: linux-kernel@vger.kernel.org Cc: =?utf-8?q?Andr=C3=A9_Draszik?= , Rob Herring , =?utf-8?q?Horia_Geant=C4=83?= , Aymen Sghaier , Herbert Xu , "David S. Miller" , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Dmitry Torokhov , Anson Huang , Robin Gong , linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-input@vger.kernel.org Subject: [PATCH v2 1/6] dt-bindings: crypto: fsl-sec4: add snvs clock to pwrkey Date: Tue, 25 Feb 2020 16:11:56 +0000 Message-Id: <20200225161201.1975-1-git@andred.net> X-Mailer: git-send-email 2.23.0.rc1 MIME-Version: 1.0 Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org On i.MX7 and i.MX8M, the SNVS requires a clock. This is similar to the clock bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled, then SNVS doesn't work, and as such the pwrkey driver doesn't work (i.e. hangs the kernel, as the clock isn't enabled). Also see commit ec2a844ef7c1 ("ARM: dts: imx7s: add snvs rtc clock") for a similar fix. Signed-off-by: André Draszik Acked-by: Rob Herring Cc: "Horia Geantă" Cc: Aymen Sghaier Cc: Herbert Xu Cc: "David S. Miller" Cc: Rob Herring Cc: Mark Rutland Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Dmitry Torokhov Cc: Anson Huang Cc: Robin Gong Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-input@vger.kernel.org Reviewed-by: Horia Geantă --- v2: * split documentation and i.MX7 dts update into two patches * remove stray RTC references from documentation (copy/paste error) --- .../devicetree/bindings/crypto/fsl-sec4.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt index 2fe245ca816a..a73722c58fab 100644 --- a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt +++ b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt @@ -449,6 +449,19 @@ System ON/OFF key driver Value type: Definition: this is phandle to the register map node. + - clocks + Usage: optional, required if SNVS LP requires explicit + enablement of clocks + Value type: + Definition: a clock specifier describing the clock required for + enabling and disabling SNVS LP. + + - clock-names + Usage: optional, required if SNVS LP requires explicit + enablement of clocks + Value type: + Definition: clock name string should be "snvs-pwrkey". + EXAMPLE: snvs-pwrkey@020cc000 { compatible = "fsl,sec-v4.0-pwrkey"; @@ -456,6 +469,8 @@ EXAMPLE: interrupts = <0 4 0x4> linux,keycode = <116>; /* KEY_POWER */ wakeup-source; + clocks = <&clks IMX7D_SNVS_CLK>; + clock-names = "snvs-pwrkey"; }; ===================================================================== @@ -547,6 +562,8 @@ FULL EXAMPLE interrupts = <0 4 0x4>; linux,keycode = <116>; /* KEY_POWER */ wakeup-source; + clocks = <&clks IMX7D_SNVS_CLK>; + clock-names = "snvs-pwrkey"; }; }; From patchwork Tue Feb 25 16:11:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 11404207 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D70D01395 for ; Tue, 25 Feb 2020 16:12:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C0E47218AC for ; Tue, 25 Feb 2020 16:12:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731178AbgBYQML (ORCPT ); Tue, 25 Feb 2020 11:12:11 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:39288 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730293AbgBYQMI (ORCPT ); Tue, 25 Feb 2020 11:12:08 -0500 Received: by mail-wm1-f67.google.com with SMTP id c84so3714294wme.4; Tue, 25 Feb 2020 08:12:06 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sdeifxeE4hzWYWIT9laRsQZ2w7d8/CJoVsmACfUBNlY=; b=ZE3R0Dh96zS29xXshsL6Rq6qW20hrZSswktMbsV/t4ugR0cdcXz263Yzyg2wChbBAN D+Iqclq+4q585FmZLJzW4QxaPx8/Z3Y2AG3XzKiFRakkFhYMkdsQXKjMWi2i8K7cXbgK /zNdd70mV0TG5nbeMrqux4IilEC3I/PVfAQi8wXq/KL4/SVf4fL7ZFUTOME7xqlqkoDm naW3KxRuGe56aq282C+NIS3HHv756t7sVdjlXsrd1T89F1komeSAAamoQP7WyYhfryHG ITbH2rbVFy3gaw+s4xlpH/1oOxuxfgtdYTR9aHkjRV1gM4yy7E9dEeNys25ffOmbUcdv qacg== X-Gm-Message-State: APjAAAVlcKG02dD7aIi2wm/7GpAGWBAlAzsa4nOql70lfGTbXuQHdA7+ 3Cd6hI9VeqLUrdrUcFnpWkuK7Q5zRHc= X-Google-Smtp-Source: APXvYqw+HC3E0o+9joAk3gJaqGZqzCQ72Gyh2WWimQ2jitq2NlTC1r9f2qBIs5dB+oJPxlIClsMSyg== X-Received: by 2002:a1c:6189:: with SMTP id v131mr6270952wmb.185.1582647125537; Tue, 25 Feb 2020 08:12:05 -0800 (PST) Received: from 1aq-andre.garage.tyco.com ([77.107.218.170]) by smtp.gmail.com with ESMTPSA id h10sm4757339wml.18.2020.02.25.08.12.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2020 08:12:05 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= To: linux-kernel@vger.kernel.org Cc: =?utf-8?q?Andr=C3=A9_Draszik?= , Rob Herring , =?utf-8?q?Horia_Geant=C4=83?= , Aymen Sghaier , Herbert Xu , "David S. Miller" , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Dmitry Torokhov , Anson Huang , Robin Gong , linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-input@vger.kernel.org Subject: [PATCH v2 2/6] ARM: dts: imx7s: add snvs clock to pwrkey Date: Tue, 25 Feb 2020 16:11:57 +0000 Message-Id: <20200225161201.1975-2-git@andred.net> X-Mailer: git-send-email 2.23.0.rc1 In-Reply-To: <20200225161201.1975-1-git@andred.net> References: <20200225161201.1975-1-git@andred.net> MIME-Version: 1.0 Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org On i.MX7, the SNVS requires a clock. This is similar to the clock bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled, then SNVS doesn't work, and as such the pwrkey driver doesn't work (i.e. hangs the kernel, as the clock isn't enabled). Also see commit ec2a844ef7c1 ("ARM: dts: imx7s: add snvs rtc clock") for a similar fix. Signed-off-by: André Draszik Acked-by: Rob Herring Cc: "Horia Geantă" Cc: Aymen Sghaier Cc: Herbert Xu Cc: "David S. Miller" Cc: Rob Herring Cc: Mark Rutland Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Dmitry Torokhov Cc: Anson Huang Cc: Robin Gong Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-input@vger.kernel.org --- v2: * split documentation and i.MX7 dts update into two patches --- arch/arm/boot/dts/imx7s.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 139ab9b98472..edc8c542da7e 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -611,6 +611,8 @@ compatible = "fsl,sec-v4.0-pwrkey"; regmap = <&snvs>; interrupts = ; + clocks = <&clks IMX7D_SNVS_CLK>; + clock-names = "snvs-pwrkey"; linux,keycode = ; wakeup-source; status = "disabled"; From patchwork Tue Feb 25 16:11:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 11404209 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 804891395 for ; Tue, 25 Feb 2020 16:12:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6A92621744 for ; Tue, 25 Feb 2020 16:12:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731136AbgBYQMK (ORCPT ); Tue, 25 Feb 2020 11:12:10 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:36094 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729206AbgBYQMJ (ORCPT ); Tue, 25 Feb 2020 11:12:09 -0500 Received: by mail-wr1-f65.google.com with SMTP id z3so15415672wru.3; Tue, 25 Feb 2020 08:12:07 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fC8IWNnAE99VUOqzzszcLhSt7LoIGXK7nF3gE1G09Bs=; b=jVC7R5H7DhM65gFfhTaHg5TAq6mify6m9/fi2otf+x2+wk7X+RzYUwN3juQUr8CfUx +I0y8df4AWaZL/MdTP+A07LxzQj7gD5PgMh35ogRe6uSR+eMrfkM5s+R7k6D8lrFZRoT AJqBrxDW3kkMjzq/RBu0FPsiHScpmCkU9pmxxk5SenxWQO74chDyWovq0KCDfapVK27H SGfhIYJQ86ItmdpCU8wRG+ORtWtL+hFETovK9sK/gF5tn4q5vkaFfyKUzAViuqIeWUbi dlYSQOqoivY5Ld44uXUFn5NQJg0jDGfFsuQN4glx5/Od7A04h3OrZ3XSb9+r2+KhFeaD GcUw== X-Gm-Message-State: APjAAAXTSrk4hu1FScahBOFY5ZG3AwIH1ESha3XO6mCVGYzPd46A+yjz X+qLQSxULDqgqdTuWHsD4a9sufK8Ffs= X-Google-Smtp-Source: APXvYqzUizPxXdhLVFH8Pc8TvFvpiyM7nhjaoxaFjP0/A4WKAcCtx2U92Y02Qne8XBL3nyKovvTJ3A== X-Received: by 2002:a5d:4584:: with SMTP id p4mr78175875wrq.25.1582647126645; Tue, 25 Feb 2020 08:12:06 -0800 (PST) Received: from 1aq-andre.garage.tyco.com ([77.107.218.170]) by smtp.gmail.com with ESMTPSA id h10sm4757339wml.18.2020.02.25.08.12.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2020 08:12:06 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= To: linux-kernel@vger.kernel.org Cc: =?utf-8?q?Andr=C3=A9_Draszik?= , =?utf-8?q?Horia_Geant?= =?utf-8?q?=C4=83?= , Aymen Sghaier , Herbert Xu , "David S. Miller" , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Dmitry Torokhov , Anson Huang , Robin Gong , linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-input@vger.kernel.org Subject: [PATCH v2 3/6] arm64: dts: imx8mm: add snvs clock to pwrkey Date: Tue, 25 Feb 2020 16:11:58 +0000 Message-Id: <20200225161201.1975-3-git@andred.net> X-Mailer: git-send-email 2.23.0.rc1 In-Reply-To: <20200225161201.1975-1-git@andred.net> References: <20200225161201.1975-1-git@andred.net> MIME-Version: 1.0 Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org On i.MX8MM, the SNVS requires a clock. This is similar to the clock bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled, then SNVS doesn't work, and as such the pwrkey driver doesn't work (i.e. hangs the kernel, as the clock isn't enabled). Also see commit ec2a844ef7c1 ("ARM: dts: imx7s: add snvs rtc clock") for a similar fix. Signed-off-by: André Draszik Cc: "Horia Geantă" Cc: Aymen Sghaier Cc: Herbert Xu Cc: "David S. Miller" Cc: Rob Herring Cc: Mark Rutland Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Dmitry Torokhov Cc: Anson Huang Cc: Robin Gong Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-input@vger.kernel.org --- v2: new patch --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 3d95b66a2d71..804031010a8a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -460,6 +460,8 @@ compatible = "fsl,sec-v4.0-pwrkey"; regmap = <&snvs>; interrupts = ; + clocks = <&clk IMX8MM_CLK_SNVS_ROOT>; + clock-names = "snvs-pwrkey"; linux,keycode = ; wakeup-source; status = "disabled"; From patchwork Tue Feb 25 16:11:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 11404189 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 56CD71395 for ; Tue, 25 Feb 2020 16:12:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3F4FC2084E for ; Tue, 25 Feb 2020 16:12:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731134AbgBYQMK (ORCPT ); Tue, 25 Feb 2020 11:12:10 -0500 Received: from mail-wr1-f68.google.com ([209.85.221.68]:42722 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731125AbgBYQMJ (ORCPT ); Tue, 25 Feb 2020 11:12:09 -0500 Received: by mail-wr1-f68.google.com with SMTP id p18so11750019wre.9; Tue, 25 Feb 2020 08:12:08 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5iVYMAf3KBBmBN8bPXGHIYJDp6KSir9PCdvRV/c4buI=; b=ZzuHnvjK7FAcHFoPikOh3iLCFksYqEx1slSgUTeOgKbeVFIevGLfaotmeEgZ2FJmWL MVFMUnn/KjtHAm5uGnsn7ITF3knLkMuH0x2oSe6zNWXj8Mxdp4ySYzm3304M54G2UbPV STfticLkpBHNF4IX1+ukvxoiMDmHoJlFL6S+Ift7G49JGYJb0I7Z6T8692YK237Srnpi ebMVSXaxOVEvVw+FOuAIEOHHnIaQUhl4wAg4no2Te7zRMjBGU22PoPnu67uR+02zeccq igN+khRIkvbl9RoHG+h77Cskdlnr8Z9A7cMeaj1rhv4KugcYON6+IJ28r210xbDQm0Hq fXAg== X-Gm-Message-State: APjAAAX8urQfgenqaKTKJXOHGYQKnD4ubgd6pBYNnY4NghBYYOuq1ios punWasO0zwckrppBhT4Mg2YWEqHjZYY= X-Google-Smtp-Source: APXvYqwVFbTeK+gtM5LGRrDz4P5JBGZYNZnTL7U+Ql1eq5kiHsrnuyxsnSA9ZxfS5KEcA0Yx+tY6xw== X-Received: by 2002:a5d:5647:: with SMTP id j7mr74240686wrw.265.1582647127853; Tue, 25 Feb 2020 08:12:07 -0800 (PST) Received: from 1aq-andre.garage.tyco.com ([77.107.218.170]) by smtp.gmail.com with ESMTPSA id h10sm4757339wml.18.2020.02.25.08.12.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2020 08:12:07 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= To: linux-kernel@vger.kernel.org Cc: =?utf-8?q?Andr=C3=A9_Draszik?= , =?utf-8?q?Horia_Geant?= =?utf-8?q?=C4=83?= , Aymen Sghaier , Herbert Xu , "David S. Miller" , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Dmitry Torokhov , Anson Huang , Robin Gong , linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-input@vger.kernel.org Subject: [PATCH v2 4/6] arm64: dts: imx8mq: add snvs clock to pwrkey Date: Tue, 25 Feb 2020 16:11:59 +0000 Message-Id: <20200225161201.1975-4-git@andred.net> X-Mailer: git-send-email 2.23.0.rc1 In-Reply-To: <20200225161201.1975-1-git@andred.net> References: <20200225161201.1975-1-git@andred.net> MIME-Version: 1.0 Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org On i.MX8MM, the SNVS requires a clock. This is similar to the clock bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled, then SNVS doesn't work, and as such the pwrkey driver doesn't work (i.e. hangs the kernel, as the clock isn't enabled). Also see commit ec2a844ef7c1 ("ARM: dts: imx7s: add snvs rtc clock") for a similar fix. Signed-off-by: André Draszik Cc: "Horia Geantă" Cc: Aymen Sghaier Cc: Herbert Xu Cc: "David S. Miller" Cc: Rob Herring Cc: Mark Rutland Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Dmitry Torokhov Cc: Anson Huang Cc: Robin Gong Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-input@vger.kernel.org --- v2: new patch --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 7f9319452b58..e4ab037183d7 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -501,6 +501,8 @@ compatible = "fsl,sec-v4.0-pwrkey"; regmap = <&snvs>; interrupts = ; + clocks = <&clk IMX8MQ_CLK_SNVS_ROOT>; + clock-names = "snvs-pwrkey"; linux,keycode = ; wakeup-source; status = "disabled"; From patchwork Tue Feb 25 16:12:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 11404199 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4AED31395 for ; Tue, 25 Feb 2020 16:12:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2B7BC21744 for ; Tue, 25 Feb 2020 16:12:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731219AbgBYQMY (ORCPT ); Tue, 25 Feb 2020 11:12:24 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:32856 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731127AbgBYQML (ORCPT ); Tue, 25 Feb 2020 11:12:11 -0500 Received: by mail-wr1-f66.google.com with SMTP id u6so15440220wrt.0; Tue, 25 Feb 2020 08:12:09 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=e3LiUsdwFrYwevxlo/tz4vkKcjo7pGSKzPtt39owm1w=; b=Pa/j9RSPkF+ZT/audkxXrc7qIgzuS3iV9YEvFARLXjkFhOnc115wLQISqPvEnJR21D hx8R40jzoGdefDls0ewWpGaHxEiCXk7A0YXeVrzIvY9A4GrMWMSl74Wz2ZQ8KAKoisQH xdGvjoLYItXiCaVXw5yed87xeyrwoikKBMeTvZ7UAoG5yIeLkNT1HhYrBvwCiS51OgbU 5RXpGVXMzjf/sjXsdd3VIeBNANxW1u1krVmaxd4XAcld527WJwRp48zMmEYfSWE0PlWi N72YZ7kaSRv9c1JWTA7sHhXcZXdBRntTqNX1sx1qbUdkutEAyP9GlRDrqsO7t+GqF6fi aNYg== X-Gm-Message-State: APjAAAVGqKEScJAxCx0sqonXCRE9n8hZK4xcWsc7ib4BmK8g6NZJ9Pil ABhuYbGhcZRviqEEFP+vKaFB+brD+/0= X-Google-Smtp-Source: APXvYqxg8OI6/QT5oIPTDgdPR6qug+ApccVoWzypMiLSjCLoZ5bHtn7thLRYK6+6Bvk7z0gzN3h8yg== X-Received: by 2002:a5d:4687:: with SMTP id u7mr71319194wrq.176.1582647128894; Tue, 25 Feb 2020 08:12:08 -0800 (PST) Received: from 1aq-andre.garage.tyco.com ([77.107.218.170]) by smtp.gmail.com with ESMTPSA id h10sm4757339wml.18.2020.02.25.08.12.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2020 08:12:08 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= To: linux-kernel@vger.kernel.org Cc: =?utf-8?q?Andr=C3=A9_Draszik?= , =?utf-8?q?Horia_Geant?= =?utf-8?q?=C4=83?= , Aymen Sghaier , Herbert Xu , "David S. Miller" , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Dmitry Torokhov , Anson Huang , Robin Gong , linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-input@vger.kernel.org Subject: [PATCH v2 5/6] Input: snvs_pwrkey - enable snvs clock as needed Date: Tue, 25 Feb 2020 16:12:00 +0000 Message-Id: <20200225161201.1975-5-git@andred.net> X-Mailer: git-send-email 2.23.0.rc1 In-Reply-To: <20200225161201.1975-1-git@andred.net> References: <20200225161201.1975-1-git@andred.net> MIME-Version: 1.0 Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org At the moment, enabling this driver without the SNVS RTC driver being active will hang the kernel as soon as the power button is pressed. The reason is that in that case the SNVS isn't enabled, and any attempt to read the SNVS registers will simply hang forever. Ensure the clock is enabled (during the interrupt handler) to make this driver work. Also see commit 7f8993995410 ("drivers/rtc/rtc-snvs: add clock support") and commit edb190cb1734 ("rtc: snvs: make sure clock is enabled for interrupt handle") for similar updates to the snvs rtc driver. Signed-off-by: André Draszik Cc: "Horia Geantă" Cc: Aymen Sghaier Cc: Herbert Xu Cc: "David S. Miller" Cc: Rob Herring Cc: Mark Rutland Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Dmitry Torokhov Cc: Anson Huang Cc: Robin Gong Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-input@vger.kernel.org --- v2: * drop redundant tests and simplify error handling by using devm_clk_get_optional() * add clock handling to imx_imx_snvs_check_for_events() --- drivers/input/keyboard/snvs_pwrkey.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/input/keyboard/snvs_pwrkey.c b/drivers/input/keyboard/snvs_pwrkey.c index 2f5e3ab5ed63..382d2ae82c9b 100644 --- a/drivers/input/keyboard/snvs_pwrkey.c +++ b/drivers/input/keyboard/snvs_pwrkey.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -38,6 +39,7 @@ struct pwrkey_drv_data { int wakeup; struct timer_list check_timer; struct input_dev *input; + struct clk *clk; u8 minor_rev; }; @@ -47,7 +49,10 @@ static void imx_imx_snvs_check_for_events(struct timer_list *t) struct input_dev *input = pdata->input; u32 state; + clk_enable(pdata->clk); regmap_read(pdata->snvs, SNVS_HPSR_REG, &state); + clk_disable(pdata->clk); + state = state & SNVS_HPSR_BTN ? 1 : 0; /* only report new event if status changed */ @@ -74,11 +79,13 @@ static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id) pm_wakeup_event(input->dev.parent, 0); + clk_enable(pdata->clk); + regmap_read(pdata->snvs, SNVS_LPSR_REG, &lp_status); if (lp_status & SNVS_LPSR_SPO) { if (pdata->minor_rev == 0) { /* - * The first generation i.MX6 SoCs only sends an + * The first generation i.MX[6|7] SoCs only send an * interrupt on button release. To mimic power-key * usage, we'll prepend a press event. */ @@ -96,6 +103,8 @@ static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id) /* clear SPO status */ regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO); + clk_disable(pdata->clk); + return IRQ_HANDLED; } @@ -140,6 +149,23 @@ static int imx_snvs_pwrkey_probe(struct platform_device *pdev) if (pdata->irq < 0) return -EINVAL; + pdata->clk = devm_clk_get_optional(&pdev->dev, "snvs-pwrkey"); + if (IS_ERR(pdata->clk)) + return PTR_ERR(pdata->clk); + + error = clk_prepare(pdata->clk); + if (error) { + dev_err(&pdev->dev, "failed to prepare the snvs clock\n"); + return error; + } + error = devm_add_action_or_reset(&pdev->dev, + (void(*)(void *))clk_unprepare, + pdata->clk); + if (error) { + dev_err(&pdev->dev, "failed to add reset action on 'snvs-pwrkey'"); + return error; + } + regmap_read(pdata->snvs, SNVS_HPVIDR1_REG, &vid); pdata->minor_rev = vid & 0xff; From patchwork Tue Feb 25 16:12:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 11404195 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 44F54138D for ; Tue, 25 Feb 2020 16:12:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2E6F521744 for ; Tue, 25 Feb 2020 16:12:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731207AbgBYQMS (ORCPT ); Tue, 25 Feb 2020 11:12:18 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:39694 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731152AbgBYQMM (ORCPT ); Tue, 25 Feb 2020 11:12:12 -0500 Received: by mail-wr1-f67.google.com with SMTP id y17so6593339wrn.6; Tue, 25 Feb 2020 08:12:10 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PehnyNjd4V5FhnMmSN6y9oe+uTRnJaBKHZh2ORrfGyg=; b=gPQa0Z4JPLDPGFO8t30CmgnRqeUMugK4I5dLRkwKFRy9tZizE6o7L/Ha0Cs4tJhxBx UtIlgSwDoke78zcgfFzRvQRD/qHFuXCBq6GCR0VYqjzjZo04+e2uB2gQXfJrJR56Ngyw wngWh7dQJ09gFe41rAAtUbcOvMBQ9J+VGSoeCQXqqLa7ZIETW5NIQPe5qdfGyyEevDSw bR8I1pB71H73c1V+5XmcwOjtbqhZAUHVMllolzC2iW0D9sgei93FwY6q0CnYDvblVU6z LEXME1OFFfI73nRau5ELAwvicIZ976ltSfp4g/D5aohDUq+4eDt/y1K2uE0arHMXLj2Q xt+w== X-Gm-Message-State: APjAAAXutaii6yCyAIxY0hEz35TkX47kZWg+It/POlp1eBpSxOMCxczm 7oJD/buNUnkonPuJwZTNVcPjHToG+/U= X-Google-Smtp-Source: APXvYqxfwPA8/K18hEK9dZ/LbLLqMQ/rHwxFMS0s62Mkl/7CuOWqsdN/CRTQmIRNx5EexFElK7Lrzg== X-Received: by 2002:adf:cd11:: with SMTP id w17mr77166388wrm.66.1582647129944; Tue, 25 Feb 2020 08:12:09 -0800 (PST) Received: from 1aq-andre.garage.tyco.com ([77.107.218.170]) by smtp.gmail.com with ESMTPSA id h10sm4757339wml.18.2020.02.25.08.12.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Feb 2020 08:12:09 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= To: linux-kernel@vger.kernel.org Cc: =?utf-8?q?Andr=C3=A9_Draszik?= , =?utf-8?q?Horia_Geant?= =?utf-8?q?=C4=83?= , Aymen Sghaier , Herbert Xu , "David S. Miller" , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Dmitry Torokhov , Anson Huang , Robin Gong , linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-input@vger.kernel.org Subject: [PATCH v2 6/6] Input: snvs_pwrkey - only IRQ_HANDLED for our own events Date: Tue, 25 Feb 2020 16:12:01 +0000 Message-Id: <20200225161201.1975-6-git@andred.net> X-Mailer: git-send-email 2.23.0.rc1 In-Reply-To: <20200225161201.1975-1-git@andred.net> References: <20200225161201.1975-1-git@andred.net> MIME-Version: 1.0 Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org The snvs_pwrkey shares the SNVS LPSR status register with the snvs_rtc. This driver here should only return IRQ_HANDLED if the status register indicates that the event we're handling in the irq handler was genuinely intended for this driver. Otheriwse the interrupt subsystem will assume the interrupt was handled successfully even though it wasn't at all. Signed-off-by: André Draszik Cc: "Horia Geantă" Cc: Aymen Sghaier Cc: Herbert Xu Cc: "David S. Miller" Cc: Rob Herring Cc: Mark Rutland Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Dmitry Torokhov Cc: Anson Huang Cc: Robin Gong Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-input@vger.kernel.org Reviewed-by: Robin Gong Reviewed-by: Horia Geantă --- v2: * no changes --- drivers/input/keyboard/snvs_pwrkey.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/input/keyboard/snvs_pwrkey.c b/drivers/input/keyboard/snvs_pwrkey.c index 382d2ae82c9b..980867886b34 100644 --- a/drivers/input/keyboard/snvs_pwrkey.c +++ b/drivers/input/keyboard/snvs_pwrkey.c @@ -82,7 +82,9 @@ static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id) clk_enable(pdata->clk); regmap_read(pdata->snvs, SNVS_LPSR_REG, &lp_status); - if (lp_status & SNVS_LPSR_SPO) { + lp_status &= SNVS_LPSR_SPO; + + if (lp_status) { if (pdata->minor_rev == 0) { /* * The first generation i.MX[6|7] SoCs only send an @@ -98,14 +100,14 @@ static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id) mod_timer(&pdata->check_timer, jiffies + msecs_to_jiffies(DEBOUNCE_TIME)); } - } - /* clear SPO status */ - regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO); + /* clear SPO status */ + regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO); + } clk_disable(pdata->clk); - return IRQ_HANDLED; + return lp_status ? IRQ_HANDLED : IRQ_NONE; } static void imx_snvs_pwrkey_act(void *pdata)