From patchwork Thu Feb 27 02:43:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kammela, Gayatri" X-Patchwork-Id: 11407657 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 76A2513A4 for ; Thu, 27 Feb 2020 02:47:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5E8FC222C2 for ; Thu, 27 Feb 2020 02:47:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728234AbgB0Crq (ORCPT ); Wed, 26 Feb 2020 21:47:46 -0500 Received: from mga05.intel.com ([192.55.52.43]:47772 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728173AbgB0Crc (ORCPT ); Wed, 26 Feb 2020 21:47:32 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Feb 2020 18:47:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,490,1574150400"; d="scan'208";a="438670600" Received: from gayuk-dev-mach.sc.intel.com ([10.3.79.171]) by fmsmga006.fm.intel.com with ESMTP; 26 Feb 2020 18:47:31 -0800 From: Gayatri Kammela To: platform-driver-x86@vger.kernel.org Cc: linux-kernel@vger.kernel.org, vishwanath.somayaji@intel.com, dvhart@infradead.org, mika.westerberg@intel.com, peterz@infradead.org, charles.d.prestopine@intel.com, Gayatri Kammela , Chen Zhou , Andy Shevchenko , "David E . Box" Subject: [PATCH v1 1/4] platform/x86: intel_pmc_core: fix: Make pmc_core_lpm_display() generic for platforms that support sub-states Date: Wed, 26 Feb 2020 18:43:27 -0800 Message-Id: <4ed31a98bbb65717f5182f6d512dd4df80c78272.1582770011.git.gayatri.kammela@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Currently pmc_core_lpm_display() uses array of struct pointers i.e., tgl_lpm_maps for Tiger Lake directly to iterate through and to get the number of status/live status registers which is hardcoded and will not work for future platforms that support sub-states. To maintain readability, make pmc_core_lpm_display() generic, so that it can re-used for future platforms. Cc: Chen Zhou Cc: Andy Shevchenko Cc: David E. Box Suggested-by: Andy Shevchenko Signed-off-by: Gayatri Kammela Reported-by: kbuild test robot --- drivers/platform/x86/intel_pmc_core.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index f4a36fbabf4c..333c6963d270 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -979,10 +979,14 @@ static void pmc_core_lpm_display(struct pmc_dev *pmcdev, struct device *dev, const char *str, const struct pmc_bit_map **maps) { - u32 lpm_regs[ARRAY_SIZE(tgl_lpm_maps)-1]; - int index, idx, len = 32, bit_mask; + int index, idx, len = 32, bit_mask, arr_size = 0; - for (index = 0; tgl_lpm_maps[index]; index++) { + for (index = 0; maps[index]; index++) + arr_size++; + + u32 lpm_regs[arr_size]; + + for (index = 0; maps[index]; index++) { lpm_regs[index] = pmc_core_reg_read(pmcdev, offset); offset += 4; } From patchwork Thu Feb 27 02:43:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kammela, Gayatri" X-Patchwork-Id: 11407651 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A6F4A14D5 for ; Thu, 27 Feb 2020 02:47:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 867C9222C2 for ; Thu, 27 Feb 2020 02:47:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728262AbgB0Crd (ORCPT ); Wed, 26 Feb 2020 21:47:33 -0500 Received: from mga05.intel.com ([192.55.52.43]:47772 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728221AbgB0Crc (ORCPT ); Wed, 26 Feb 2020 21:47:32 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Feb 2020 18:47:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,490,1574150400"; d="scan'208";a="438670604" Received: from gayuk-dev-mach.sc.intel.com ([10.3.79.171]) by fmsmga006.fm.intel.com with ESMTP; 26 Feb 2020 18:47:32 -0800 From: Gayatri Kammela To: platform-driver-x86@vger.kernel.org Cc: linux-kernel@vger.kernel.org, vishwanath.somayaji@intel.com, dvhart@infradead.org, mika.westerberg@intel.com, peterz@infradead.org, charles.d.prestopine@intel.com, Gayatri Kammela , Chen Zhou , Andy Shevchenko , "David E . Box" Subject: [PATCH v1 2/4] platform/x86: intel_pmc_core: fix: Relocate pmc_core_slps0_display() and pmc_core_lpm_display() to outside of CONFIG_DEBUG_FS Date: Wed, 26 Feb 2020 18:43:28 -0800 Message-Id: <329f6dbbe6c7b690cd87db9e8ca05dc86a7b0393.1582770011.git.gayatri.kammela@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Since pmc_core_slps0_display() and pmc_core_lpm_display() is responsible for dumping as well as displaying debug registers, there is no need for these two functions to be defined under CONFIG_DEBUG_FS. Hence, relocate these functions from under CONFIG_DEBUG_FS to above the block. Cc: Chen Zhou Cc: Andy Shevchenko Cc: David E. Box Signed-off-by: Gayatri Kammela --- drivers/platform/x86/intel_pmc_core.c | 130 +++++++++++++------------- 1 file changed, 65 insertions(+), 65 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index 333c6963d270..37db13ad7d39 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -612,6 +612,71 @@ static int pmc_core_check_read_lock_bit(void) return value & BIT(pmcdev->map->pm_read_disable_bit); } +static void pmc_core_slps0_display(struct pmc_dev *pmcdev, struct device *dev, + struct seq_file *s) +{ + const struct pmc_bit_map **maps = pmcdev->map->slps0_dbg_maps; + const struct pmc_bit_map *map; + int offset = pmcdev->map->slps0_dbg_offset; + u32 data; + + while (*maps) { + map = *maps; + data = pmc_core_reg_read(pmcdev, offset); + offset += 4; + while (map->name) { + if (dev) + dev_dbg(dev, "SLP_S0_DBG: %-32s\tState: %s\n", + map->name, + data & map->bit_mask ? "Yes" : "No"); + if (s) + seq_printf(s, "SLP_S0_DBG: %-32s\tState: %s\n", + map->name, + data & map->bit_mask ? "Yes" : "No"); + ++map; + } + ++maps; + } +} + +static void pmc_core_lpm_display(struct pmc_dev *pmcdev, struct device *dev, + struct seq_file *s, u32 offset, + const char *str, + const struct pmc_bit_map **maps) +{ + int index, idx, len = 32, bit_mask, arr_size = 0; + + for (index = 0; maps[index]; index++) + arr_size++; + + u32 lpm_regs[arr_size]; + + for (index = 0; maps[index]; index++) { + lpm_regs[index] = pmc_core_reg_read(pmcdev, offset); + offset += 4; + } + + for (idx = 0; maps[idx]; idx++) { + if (dev) + dev_dbg(dev, "\nLPM_%s_%d:\t0x%x\n", str, idx, + lpm_regs[idx]); + if (s) + seq_printf(s, "\nLPM_%s_%d:\t0x%x\n", str, idx, + lpm_regs[idx]); + for (index = 0; maps[idx][index].name && index < len; index++) { + bit_mask = maps[idx][index].bit_mask; + if (dev) + dev_dbg(dev, "%-30s %-30d\n", + maps[idx][index].name, + lpm_regs[idx] & bit_mask ? 1 : 0); + if (s) + seq_printf(s, "%-30s %-30d\n", + maps[idx][index].name, + lpm_regs[idx] & bit_mask ? 1 : 0); + } + } +} + #if IS_ENABLED(CONFIG_DEBUG_FS) static bool slps0_dbg_latch; @@ -844,33 +909,6 @@ static void pmc_core_slps0_dbg_latch(struct pmc_dev *pmcdev, bool reset) mutex_unlock(&pmcdev->lock); } -static void pmc_core_slps0_display(struct pmc_dev *pmcdev, struct device *dev, - struct seq_file *s) -{ - const struct pmc_bit_map **maps = pmcdev->map->slps0_dbg_maps; - const struct pmc_bit_map *map; - int offset = pmcdev->map->slps0_dbg_offset; - u32 data; - - while (*maps) { - map = *maps; - data = pmc_core_reg_read(pmcdev, offset); - offset += 4; - while (map->name) { - if (dev) - dev_dbg(dev, "SLP_S0_DBG: %-32s\tState: %s\n", - map->name, - data & map->bit_mask ? "Yes" : "No"); - if (s) - seq_printf(s, "SLP_S0_DBG: %-32s\tState: %s\n", - map->name, - data & map->bit_mask ? "Yes" : "No"); - ++map; - } - ++maps; - } -} - static int pmc_core_slps0_dbg_show(struct seq_file *s, void *unused) { struct pmc_dev *pmcdev = s->private; @@ -974,44 +1012,6 @@ static int pmc_core_substate_res_show(struct seq_file *s, void *unused) } DEFINE_SHOW_ATTRIBUTE(pmc_core_substate_res); -static void pmc_core_lpm_display(struct pmc_dev *pmcdev, struct device *dev, - struct seq_file *s, u32 offset, - const char *str, - const struct pmc_bit_map **maps) -{ - int index, idx, len = 32, bit_mask, arr_size = 0; - - for (index = 0; maps[index]; index++) - arr_size++; - - u32 lpm_regs[arr_size]; - - for (index = 0; maps[index]; index++) { - lpm_regs[index] = pmc_core_reg_read(pmcdev, offset); - offset += 4; - } - - for (idx = 0; maps[idx]; idx++) { - if (dev) - dev_dbg(dev, "\nLPM_%s_%d:\t0x%x\n", str, idx, - lpm_regs[idx]); - if (s) - seq_printf(s, "\nLPM_%s_%d:\t0x%x\n", str, idx, - lpm_regs[idx]); - for (index = 0; maps[idx][index].name && index < len; index++) { - bit_mask = maps[idx][index].bit_mask; - if (dev) - dev_dbg(dev, "%-30s %-30d\n", - maps[idx][index].name, - lpm_regs[idx] & bit_mask ? 1 : 0); - if (s) - seq_printf(s, "%-30s %-30d\n", - maps[idx][index].name, - lpm_regs[idx] & bit_mask ? 1 : 0); - } - } -} - static int pmc_core_substate_sts_regs_show(struct seq_file *s, void *unused) { struct pmc_dev *pmcdev = s->private; From patchwork Thu Feb 27 02:43:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kammela, Gayatri" X-Patchwork-Id: 11407655 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9708513A4 for ; Thu, 27 Feb 2020 02:47:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7589424672 for ; Thu, 27 Feb 2020 02:47:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728238AbgB0Crd (ORCPT ); Wed, 26 Feb 2020 21:47:33 -0500 Received: from mga05.intel.com ([192.55.52.43]:47772 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728157AbgB0Crc (ORCPT ); Wed, 26 Feb 2020 21:47:32 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Feb 2020 18:47:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,490,1574150400"; d="scan'208";a="438670609" Received: from gayuk-dev-mach.sc.intel.com ([10.3.79.171]) by fmsmga006.fm.intel.com with ESMTP; 26 Feb 2020 18:47:32 -0800 From: Gayatri Kammela To: platform-driver-x86@vger.kernel.org Cc: linux-kernel@vger.kernel.org, vishwanath.somayaji@intel.com, dvhart@infradead.org, mika.westerberg@intel.com, peterz@infradead.org, charles.d.prestopine@intel.com, Gayatri Kammela , Chen Zhou , Andy Shevchenko , "David E . Box" Subject: [PATCH v1 3/4] platform/x86: intel_pmc_core: fix: Remove the duplicate if() to create debugfs entry for substate_live_status_registers Date: Wed, 26 Feb 2020 18:43:29 -0800 Message-Id: <406e49adfc3fe7a8d7ec606ee2f75bd25f3a2a8d.1582770011.git.gayatri.kammela@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org A debugfs entry for substate_live_status_registers is created only if the platform has sub-states, which requires the same condition to create substate_status_registers debugfs entry. Hence remove the redundant condition and re-use the exisiting one. Cc: Chen Zhou Cc: Andy Shevchenko Cc: David E. Box Signed-off-by: Gayatri Kammela --- drivers/platform/x86/intel_pmc_core.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index 37db13ad7d39..bbd3805f36e1 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -1112,9 +1112,6 @@ static void pmc_core_dbgfs_register(struct pmc_dev *pmcdev) debugfs_create_file("substate_status_registers", 0444, pmcdev->dbgfs_dir, pmcdev, &pmc_core_substate_sts_regs_fops); - } - - if (pmcdev->map->lpm_status_offset) { debugfs_create_file("substate_live_status_registers", 0444, pmcdev->dbgfs_dir, pmcdev, &pmc_core_substate_l_sts_regs_fops); From patchwork Thu Feb 27 02:43:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kammela, Gayatri" X-Patchwork-Id: 11407653 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C91AF14D5 for ; Thu, 27 Feb 2020 02:47:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B240C2467A for ; Thu, 27 Feb 2020 02:47:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728221AbgB0Crk (ORCPT ); Wed, 26 Feb 2020 21:47:40 -0500 Received: from mga05.intel.com ([192.55.52.43]:47772 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728235AbgB0Crd (ORCPT ); Wed, 26 Feb 2020 21:47:33 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Feb 2020 18:47:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,490,1574150400"; d="scan'208";a="438670612" Received: from gayuk-dev-mach.sc.intel.com ([10.3.79.171]) by fmsmga006.fm.intel.com with ESMTP; 26 Feb 2020 18:47:32 -0800 From: Gayatri Kammela To: platform-driver-x86@vger.kernel.org Cc: linux-kernel@vger.kernel.org, vishwanath.somayaji@intel.com, dvhart@infradead.org, mika.westerberg@intel.com, peterz@infradead.org, charles.d.prestopine@intel.com, Gayatri Kammela , Chen Zhou , Andy Shevchenko , "David E . Box" Subject: [PATCH v1 4/4] platform/x86: intel_pmc_core: fix: Add slp_s0_offset attribute back to tgl_reg_map Date: Wed, 26 Feb 2020 18:43:30 -0800 Message-Id: <8a3ba27589afd8d66545618f863e0c860ddd1944.1582770011.git.gayatri.kammela@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org If platforms such as Tiger Lake has sub-states of S0ix, then attributes such as slps0_dbg_offset become invalid. But slp_s0_offset is still valid as it is used to get the pmcdev_base_addr. Hence, add back slp_s0_offset and remove slps0_dbg_offset attributes. Cc: Chen Zhou Cc: Andy Shevchenko Cc: David E. Box Signed-off-by: Gayatri Kammela --- drivers/platform/x86/intel_pmc_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index bbd3805f36e1..87a6aa4f43fa 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -556,9 +556,9 @@ static const struct pmc_bit_map *tgl_lpm_maps[] = { static const struct pmc_reg_map tgl_reg_map = { .pfear_sts = ext_tgl_pfear_map, + .slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET, .ltr_show_sts = cnp_ltr_show_map, .msr_sts = msr_map, - .slps0_dbg_offset = CNP_PMC_SLPS0_DBG_OFFSET, .ltr_ignore_offset = CNP_PMC_LTR_IGNORE_OFFSET, .regmap_length = CNP_PMC_MMIO_REG_LEN, .ppfear0_offset = CNP_PMC_HOST_PPFEAR0A,