From patchwork Sat Sep 29 21:44:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 10621013 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8C0D014BD for ; Sat, 29 Sep 2018 21:44:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7DB5829B89 for ; Sat, 29 Sep 2018 21:44:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 724E429B9D; Sat, 29 Sep 2018 21:44:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1FBD629B89 for ; Sat, 29 Sep 2018 21:44:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726149AbeI3EOR (ORCPT ); Sun, 30 Sep 2018 00:14:17 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:39192 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726082AbeI3EOR (ORCPT ); Sun, 30 Sep 2018 00:14:17 -0400 Received: by mail-pf1-f195.google.com with SMTP id j8-v6so6595046pff.6; Sat, 29 Sep 2018 14:44:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=r6n8Snxmx6UNLna4Rq9oHkp8SANzBfEF7kjJ2RrPGmo=; b=Nbgpg07C/T4QCCuI1uJThvV1xtbd6m2jEDxSFyugAmDTw+LH1cKH1WZmoZOJIsgQ0C 6KcKvpiOgIxsDv5ZzfeJjI9XuZ3LarubFNYjCWBI6yE/a/sbyxz6QZsNgWMWVh3mtVqM Sz3sb5o3PYwqBiZBa9c9aLMzyx4ZHOk41EwL8IJLxivdqHwdkkUOR1gdeuldgW2d97nd TRuBU/Sm0XWvLCek/yS+9kR3xY6rOYFTOLnhXyt0QzoPe6Des/ijFC8d8TweDk8PqdjX Yj3sotg4rmoAEx1OOL79Uxjj/25J+yocre6HlT6fku2TD9v5tmZdca3cS+o2GUgSVd+j nlUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=r6n8Snxmx6UNLna4Rq9oHkp8SANzBfEF7kjJ2RrPGmo=; b=t/yt9rlqZI/tWjXQarmc/I0svjCzuVp7xQ3GHLyAAOId/vgxOcpAQirWzdKu5QXo9O lUk9+yzf1CwfcXQQQSAVYIiGHAzgpHNwEJ+UYkpig1rhyQFH6w0BWhYHoiqolrYZyX8t 6KLZHyAQNZartx43fkWlUPbquoar28/7MRJSZ94JN11SkCdarczUn6UtjJP76Bcda3e1 vwkykGjWlBcm74xKukYVwcH7GN6nQbUvwu79jflu9AnDw2+KJJk+mlVyntMvTu3ePc9v f6LeaG16+BD74O/wSlu58+fB6J7RgInpU6cFa2ZWGIG1e7vEWRdj9rPCpfUV3f8rESma mfPQ== X-Gm-Message-State: ABuFfohtZ1fkdRLCgK3svpNur8MeCK34ofIjtMT6tK9LzxBIRSMJC1gL 0sONqYViqJi13cZ1qVtENl0= X-Google-Smtp-Source: ACcGV63da/uK2Ar8DJS/LTA1oAJsQjjJ9dBOiz9Z5GYDOFiJiZglmZO4f3/4xG99zuMkvG0XWeM0SA== X-Received: by 2002:a17:902:8e81:: with SMTP id bg1-v6mr4794429plb.129.1538257455178; Sat, 29 Sep 2018 14:44:15 -0700 (PDT) Received: from Asurada-Nvidia.nvidia.com (thunderhill.nvidia.com. [216.228.112.22]) by smtp.gmail.com with ESMTPSA id o20-v6sm17780313pfj.35.2018.09.29.14.44.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 29 Sep 2018 14:44:14 -0700 (PDT) From: Nicolin Chen To: jdelvare@suse.com, linux@roeck-us.net Cc: afd@ti.com, linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/3] hwmon: ina3221: Add INA3221_CONFIG to volatile_table Date: Sat, 29 Sep 2018 14:44:05 -0700 Message-Id: <20180929214407.27208-2-nicoleotsuka@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180929214407.27208-1-nicoleotsuka@gmail.com> References: <20180929214407.27208-1-nicoleotsuka@gmail.com> Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The MSB (15th bit) of INA3221_CONFIG is a self-clear reset bit. So this register should be added to the volatile_table of the regmap_config. Otherwise, we will see this bit is sticky in the regcache which might accidentally reset the chip when an actual write happens to the register. This might not be a severe bug for the current code line since there's no second place touching the INA3221_CONFIG except the reset routine in the probe(). Signed-off-by: Nicolin Chen --- drivers/hwmon/ina3221.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/ina3221.c b/drivers/hwmon/ina3221.c index e6b49500c52a..cfe65ff01051 100644 --- a/drivers/hwmon/ina3221.c +++ b/drivers/hwmon/ina3221.c @@ -353,7 +353,7 @@ static struct attribute *ina3221_attrs[] = { ATTRIBUTE_GROUPS(ina3221); static const struct regmap_range ina3221_yes_ranges[] = { - regmap_reg_range(INA3221_SHUNT1, INA3221_BUS3), + regmap_reg_range(INA3221_CONFIG, INA3221_BUS3), regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE), }; From patchwork Sat Sep 29 21:44:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 10621011 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 77B7514BD for ; Sat, 29 Sep 2018 21:44:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6883429B89 for ; Sat, 29 Sep 2018 21:44:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5CE0B29B9D; Sat, 29 Sep 2018 21:44:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 14ED429B89 for ; Sat, 29 Sep 2018 21:44:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726461AbeI3EOT (ORCPT ); Sun, 30 Sep 2018 00:14:19 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:35304 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726082AbeI3EOS (ORCPT ); Sun, 30 Sep 2018 00:14:18 -0400 Received: by mail-pf1-f196.google.com with SMTP id p12-v6so6603055pfh.2; Sat, 29 Sep 2018 14:44:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lKWbMkp368XzmVlJVun9ac08PeLhKi9JwX0MssQOjqQ=; b=MMR+QCn/veKndWWeKP3/d0ixGMu/V4Fo0B8/4FVRiVvgqpuID/hSO8QvlbZv0WlSGI MyA1RQ8iaP13R3B9AgaGCku8+Se8FXZK4pzijHMFB/GSJJCZ0LQkH7vSLd5+PwCRnEkJ HY0zXx0WlGqdk8KDbZM59RS2ppV9qFsclZve1UBwCgjGR4+vANdW0S4rx6IunJjsvbvf yocR1dviJq4ACJ2GpAUMO0AnMbhoT/b39PiLeYjBms+/6JMZDW1K9PlKkManVt+25nIK bYgzD9CIVnBTqAfDs5sqmNDjDcnzaIAGuyy0p3vHvVAjRfSHrR9QCHlqigZ7fpWQ2Twa 3Nmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lKWbMkp368XzmVlJVun9ac08PeLhKi9JwX0MssQOjqQ=; b=OdkKGlM/jX1zmjQYesWdjyiCZjBVlxo1cOffXuZMSJ4Rpmyw7qhJVP4Bag+7rvUvCF 2XnF809Gq8Rasq59jMmzcZBpcdvsM7FFoyZKFOcOyJrpJMGfvwj+5wHCEAU+4DBD0kqE h2Bd6MsC5OngRSJWwki8jYd5KGf8wGVxONkQa9tkKhxvQLvRT1HJjJqPQTvgMz9Bj5O1 EQdzVFY75fwX4bnWIbAKEsLO0BbDU2epvJX7ilfQselAbx3zVdEADzVQiAJdCmXVsyVN Uvv9lglIJMNytLaAcOOFkdw32QeChtNZyigL/+oWY/8h6gBn6wakNbXNr6p1UVbKgrtF 0nRA== X-Gm-Message-State: ABuFfogZA3OlRJQgdlpBF3fZlMREuvMQkhg4I2Fix8TscYcSfofoveT8 3qBctB+G1BMeMW1VAk9TJ9U= X-Google-Smtp-Source: ACcGV61K/npanOLBDxq+t/7801acDzwXlsxjdKjV2Gcv1pe+advO6dNmLhuiShZAd+cqTbaPa5GrgQ== X-Received: by 2002:a63:8343:: with SMTP id h64-v6mr3105113pge.368.1538257456062; Sat, 29 Sep 2018 14:44:16 -0700 (PDT) Received: from Asurada-Nvidia.nvidia.com (thunderhill.nvidia.com. [216.228.112.22]) by smtp.gmail.com with ESMTPSA id o20-v6sm17780313pfj.35.2018.09.29.14.44.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 29 Sep 2018 14:44:15 -0700 (PDT) From: Nicolin Chen To: jdelvare@suse.com, linux@roeck-us.net Cc: afd@ti.com, linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/3] hwmon: ina3221: Fix INA3221_CONFIG_MODE macros Date: Sat, 29 Sep 2018 14:44:06 -0700 Message-Id: <20180929214407.27208-3-nicoleotsuka@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180929214407.27208-1-nicoleotsuka@gmail.com> References: <20180929214407.27208-1-nicoleotsuka@gmail.com> Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The three INA3221_CONFIG_MODE macros are not correctly defined here. The MODE3-1 filed is loacted at BIT 2-0 according to the datasheet. So this patch just fixes them by shifting all of them with a correct offset. However, this isn't a crital bug fix as the driver does not use any of them at this point. Signed-off-by: Nicolin Chen --- drivers/hwmon/ina3221.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/hwmon/ina3221.c b/drivers/hwmon/ina3221.c index cfe65ff01051..e0c4f4d83f4e 100644 --- a/drivers/hwmon/ina3221.c +++ b/drivers/hwmon/ina3221.c @@ -38,9 +38,9 @@ #define INA3221_WARN3 0x0c #define INA3221_MASK_ENABLE 0x0f -#define INA3221_CONFIG_MODE_SHUNT BIT(1) -#define INA3221_CONFIG_MODE_BUS BIT(2) -#define INA3221_CONFIG_MODE_CONTINUOUS BIT(3) +#define INA3221_CONFIG_MODE_SHUNT BIT(0) +#define INA3221_CONFIG_MODE_BUS BIT(1) +#define INA3221_CONFIG_MODE_CONTINUOUS BIT(2) #define INA3221_RSHUNT_DEFAULT 10000 From patchwork Sat Sep 29 21:44:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 10621009 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EEFB715E8 for ; Sat, 29 Sep 2018 21:44:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DFE2F29B89 for ; Sat, 29 Sep 2018 21:44:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D374D29B9D; Sat, 29 Sep 2018 21:44:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 70D1D29B89 for ; Sat, 29 Sep 2018 21:44:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726082AbeI3EOU (ORCPT ); Sun, 30 Sep 2018 00:14:20 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:42775 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726543AbeI3EOT (ORCPT ); Sun, 30 Sep 2018 00:14:19 -0400 Received: by mail-pg1-f196.google.com with SMTP id i4-v6so6239604pgq.9; Sat, 29 Sep 2018 14:44:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jIcczCRJA7bP+5h9Te1N43SjRq2VNPPLL50OG3IxI4c=; b=Gqw5sTDDrdpJkHshjfWTkFb7NL4mC7M1jMFEMpfQjjj0bdbPLQWd5P+NEQi5vI/xy7 mhhHMQcd3sD3PaaEp93WlSGU4Ibr8RILc2lrswI9BJJ/8lpAMzkhlKNZuYO7cenlKoyF oUNcD6T1b1mSQvxJgzvZo29Z9nhDYJ8m8To1oKcEu9oOQoDSvQeibcxB3jFmxiZqhHux N7N/Io1A9crQWb81LarhHB2aMHOLm1C0QkCQfZq4a2vQAsxdYQ+Oz3V++oNqACW6Onof zm69Px1TdgR3PbMog7ogxI4m2393bTrLEHqNMLDtTijNBi8GLMZCs9MP5U/sRUZ4N0Qm 3IxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jIcczCRJA7bP+5h9Te1N43SjRq2VNPPLL50OG3IxI4c=; b=daHEfHbPpMAMz2v5UORZR6hni7jw/65xwrlF4ygqMvLOJftWu2sJf1Ck4MfkXx4DTY oKPEt+kqgcDLsi7B8B3qFhpWTKbBxGwIGiZJxP8LiSD93csu8FWcH88DhVJvoaOLG2Xq XFmtt+fmT0p7QrBmM3/knpLgSt8YbuQsu56wmi5D95Wp/cjpuL/NuqhzxzpOJYjeJdFZ N+/qxDPLR7Z/ZUNRy6wBydFih5uXN/ac+OYafd+5MgAdc0ngmZUF5qVa8nf8FxeTXhA1 Yuq/LdnFdach40bGNIdaUY8+Ct3rqfynlrmEIr5BoWj7eVxSbn2Iz/M2Xqd/FyQ+U9NR PkaQ== X-Gm-Message-State: ABuFfogLQ2SFJTJ1ivvMKZeSvOZrYIENaPV+n+h6qP5LL4NFIk4M0E3y YtD3Ondh4PG85b3rnbaQNik= X-Google-Smtp-Source: ACcGV62z028jGyXJObtfc0st/T3SjcoKZ0Fd8ZuZcQ6eWyfyfkeqwtyS+f702kjx4kDSjUEHCj4NhQ== X-Received: by 2002:a17:902:103:: with SMTP id 3-v6mr2918531plb.58.1538257457170; Sat, 29 Sep 2018 14:44:17 -0700 (PDT) Received: from Asurada-Nvidia.nvidia.com (thunderhill.nvidia.com. [216.228.112.22]) by smtp.gmail.com with ESMTPSA id o20-v6sm17780313pfj.35.2018.09.29.14.44.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 29 Sep 2018 14:44:16 -0700 (PDT) From: Nicolin Chen To: jdelvare@suse.com, linux@roeck-us.net Cc: afd@ti.com, linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] hwmon: ina3221: Add suspend and resume functions Date: Sat, 29 Sep 2018 14:44:07 -0700 Message-Id: <20180929214407.27208-4-nicoleotsuka@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180929214407.27208-1-nicoleotsuka@gmail.com> References: <20180929214407.27208-1-nicoleotsuka@gmail.com> Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Depending on the hardware design, an INA3221 chip might lose its power during system suspend/resume. So this patch adds a set of suspend and resume functions to cache the register values including config register value and limit settings. Signed-off-by: Nicolin Chen --- Changelog v1->v2: * Added power-down setting during suspend for power saving drivers/hwmon/ina3221.c | 63 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/drivers/hwmon/ina3221.c b/drivers/hwmon/ina3221.c index e0c4f4d83f4e..877952efaa88 100644 --- a/drivers/hwmon/ina3221.c +++ b/drivers/hwmon/ina3221.c @@ -38,6 +38,8 @@ #define INA3221_WARN3 0x0c #define INA3221_MASK_ENABLE 0x0f +#define INA3221_CONFIG_MODE_MASK GENMASK(2, 0) +#define INA3221_CONFIG_MODE_POWERDOWN 0 #define INA3221_CONFIG_MODE_SHUNT BIT(0) #define INA3221_CONFIG_MODE_BUS BIT(1) #define INA3221_CONFIG_MODE_CONTINUOUS BIT(2) @@ -91,11 +93,13 @@ static const unsigned int register_channel[] = { * @regmap: Register map of the device * @fields: Register fields of the device * @shunt_resistors: Array of resistor values per channel + * @reg_config: Register value of INA3221_CONFIG */ struct ina3221_data { struct regmap *regmap; struct regmap_field *fields[F_MAX_FIELDS]; int shunt_resistors[INA3221_NUM_CHANNELS]; + u32 reg_config; }; static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg, @@ -415,9 +419,67 @@ static int ina3221_probe(struct i2c_client *client, return PTR_ERR(hwmon_dev); } + dev_set_drvdata(dev, ina); + return 0; } +#ifdef CONFIG_PM +static int ina3221_suspend(struct device *dev) +{ + struct ina3221_data *ina = dev_get_drvdata(dev); + int ret; + + /* Save config register value and enable cache-only */ + ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config); + if (ret) + return ret; + + /* Set to power-down mode for power saving */ + ret = regmap_update_bits(ina->regmap, INA3221_CONFIG, + INA3221_CONFIG_MODE_MASK, + INA3221_CONFIG_MODE_POWERDOWN); + if (ret) + return ret; + + regcache_cache_only(ina->regmap, true); + regcache_mark_dirty(ina->regmap); + + return 0; +} + +static int ina3221_resume(struct device *dev) +{ + struct ina3221_data *ina = dev_get_drvdata(dev); + int ret; + + regcache_cache_only(ina->regmap, false); + + /* Software reset the chip */ + ret = regmap_field_write(ina->fields[F_RST], true); + if (ret) { + dev_err(dev, "Unable to reset device\n"); + return ret; + } + + /* Restore cached register values to hardware */ + ret = regcache_sync(ina->regmap); + if (ret) + return ret; + + /* Restore config register value to hardware */ + ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config); + if (ret) + return ret; + + return 0; +} +#endif + +static const struct dev_pm_ops ina3221_pm = { + SET_SYSTEM_SLEEP_PM_OPS(ina3221_suspend, ina3221_resume) +}; + static const struct of_device_id ina3221_of_match_table[] = { { .compatible = "ti,ina3221", }, { /* sentinel */ } @@ -435,6 +497,7 @@ static struct i2c_driver ina3221_i2c_driver = { .driver = { .name = INA3221_DRIVER_NAME, .of_match_table = ina3221_of_match_table, + .pm = &ina3221_pm, }, .id_table = ina3221_ids, };