From patchwork Sun Mar 1 20:44:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kammela, Gayatri" X-Patchwork-Id: 11414373 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A4A5C14E3 for ; Sun, 1 Mar 2020 20:48:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 83CEB206CC for ; Sun, 1 Mar 2020 20:48:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726188AbgCAUs3 (ORCPT ); Sun, 1 Mar 2020 15:48:29 -0500 Received: from mga09.intel.com ([134.134.136.24]:58737 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725895AbgCAUs2 (ORCPT ); Sun, 1 Mar 2020 15:48:28 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Mar 2020 12:48:28 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,505,1574150400"; d="scan'208";a="233094858" Received: from gayuk-dev-mach.sc.intel.com ([10.3.79.171]) by fmsmga008.fm.intel.com with ESMTP; 01 Mar 2020 12:48:27 -0800 From: Gayatri Kammela To: platform-driver-x86@vger.kernel.org Cc: linux-kernel@vger.kernel.org, vishwanath.somayaji@intel.com, dvhart@infradead.org, mika.westerberg@intel.com, peterz@infradead.org, charles.d.prestopine@intel.com, Gayatri Kammela , Chen Zhou , Andy Shevchenko , "David E . Box" Subject: [PATCH v3 1/5] platform/x86: intel_pmc_core: fix: Relocate pmc_core_slps0_display() and pmc_core_lpm_display() to outside of CONFIG_DEBUG_FS Date: Sun, 1 Mar 2020 12:44:22 -0800 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Since pmc_core_slps0_display() and pmc_core_lpm_display() is responsible for dumping as well as displaying debug registers, there is no need for these two functions to be defined under CONFIG_DEBUG_FS. Hence, relocate these functions from under CONFIG_DEBUG_FS to above the block. Cc: Chen Zhou Cc: Andy Shevchenko Cc: David E. Box Signed-off-by: Gayatri Kammela --- drivers/platform/x86/intel_pmc_core.c | 122 +++++++++++++------------- 1 file changed, 61 insertions(+), 61 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index f4a36fbabf4c..20b2f49726cf 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -612,6 +612,67 @@ static int pmc_core_check_read_lock_bit(void) return value & BIT(pmcdev->map->pm_read_disable_bit); } +static void pmc_core_slps0_display(struct pmc_dev *pmcdev, struct device *dev, + struct seq_file *s) +{ + const struct pmc_bit_map **maps = pmcdev->map->slps0_dbg_maps; + const struct pmc_bit_map *map; + int offset = pmcdev->map->slps0_dbg_offset; + u32 data; + + while (*maps) { + map = *maps; + data = pmc_core_reg_read(pmcdev, offset); + offset += 4; + while (map->name) { + if (dev) + dev_dbg(dev, "SLP_S0_DBG: %-32s\tState: %s\n", + map->name, + data & map->bit_mask ? "Yes" : "No"); + if (s) + seq_printf(s, "SLP_S0_DBG: %-32s\tState: %s\n", + map->name, + data & map->bit_mask ? "Yes" : "No"); + ++map; + } + ++maps; + } +} + +static void pmc_core_lpm_display(struct pmc_dev *pmcdev, struct device *dev, + struct seq_file *s, u32 offset, + const char *str, + const struct pmc_bit_map **maps) +{ + u32 lpm_regs[ARRAY_SIZE(tgl_lpm_maps)-1]; + int index, idx, len = 32, bit_mask; + + for (index = 0; tgl_lpm_maps[index]; index++) { + lpm_regs[index] = pmc_core_reg_read(pmcdev, offset); + offset += 4; + } + + for (idx = 0; maps[idx]; idx++) { + if (dev) + dev_dbg(dev, "\nLPM_%s_%d:\t0x%x\n", str, idx, + lpm_regs[idx]); + if (s) + seq_printf(s, "\nLPM_%s_%d:\t0x%x\n", str, idx, + lpm_regs[idx]); + for (index = 0; maps[idx][index].name && index < len; index++) { + bit_mask = maps[idx][index].bit_mask; + if (dev) + dev_dbg(dev, "%-30s %-30d\n", + maps[idx][index].name, + lpm_regs[idx] & bit_mask ? 1 : 0); + if (s) + seq_printf(s, "%-30s %-30d\n", + maps[idx][index].name, + lpm_regs[idx] & bit_mask ? 1 : 0); + } + } +} + #if IS_ENABLED(CONFIG_DEBUG_FS) static bool slps0_dbg_latch; @@ -844,33 +905,6 @@ static void pmc_core_slps0_dbg_latch(struct pmc_dev *pmcdev, bool reset) mutex_unlock(&pmcdev->lock); } -static void pmc_core_slps0_display(struct pmc_dev *pmcdev, struct device *dev, - struct seq_file *s) -{ - const struct pmc_bit_map **maps = pmcdev->map->slps0_dbg_maps; - const struct pmc_bit_map *map; - int offset = pmcdev->map->slps0_dbg_offset; - u32 data; - - while (*maps) { - map = *maps; - data = pmc_core_reg_read(pmcdev, offset); - offset += 4; - while (map->name) { - if (dev) - dev_dbg(dev, "SLP_S0_DBG: %-32s\tState: %s\n", - map->name, - data & map->bit_mask ? "Yes" : "No"); - if (s) - seq_printf(s, "SLP_S0_DBG: %-32s\tState: %s\n", - map->name, - data & map->bit_mask ? "Yes" : "No"); - ++map; - } - ++maps; - } -} - static int pmc_core_slps0_dbg_show(struct seq_file *s, void *unused) { struct pmc_dev *pmcdev = s->private; @@ -974,40 +1008,6 @@ static int pmc_core_substate_res_show(struct seq_file *s, void *unused) } DEFINE_SHOW_ATTRIBUTE(pmc_core_substate_res); -static void pmc_core_lpm_display(struct pmc_dev *pmcdev, struct device *dev, - struct seq_file *s, u32 offset, - const char *str, - const struct pmc_bit_map **maps) -{ - u32 lpm_regs[ARRAY_SIZE(tgl_lpm_maps)-1]; - int index, idx, len = 32, bit_mask; - - for (index = 0; tgl_lpm_maps[index]; index++) { - lpm_regs[index] = pmc_core_reg_read(pmcdev, offset); - offset += 4; - } - - for (idx = 0; maps[idx]; idx++) { - if (dev) - dev_dbg(dev, "\nLPM_%s_%d:\t0x%x\n", str, idx, - lpm_regs[idx]); - if (s) - seq_printf(s, "\nLPM_%s_%d:\t0x%x\n", str, idx, - lpm_regs[idx]); - for (index = 0; maps[idx][index].name && index < len; index++) { - bit_mask = maps[idx][index].bit_mask; - if (dev) - dev_dbg(dev, "%-30s %-30d\n", - maps[idx][index].name, - lpm_regs[idx] & bit_mask ? 1 : 0); - if (s) - seq_printf(s, "%-30s %-30d\n", - maps[idx][index].name, - lpm_regs[idx] & bit_mask ? 1 : 0); - } - } -} - static int pmc_core_substate_sts_regs_show(struct seq_file *s, void *unused) { struct pmc_dev *pmcdev = s->private; From patchwork Sun Mar 1 20:44:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kammela, Gayatri" X-Patchwork-Id: 11414375 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3069614E3 for ; Sun, 1 Mar 2020 20:48:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 19A7F246C3 for ; Sun, 1 Mar 2020 20:48:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726751AbgCAUsc (ORCPT ); Sun, 1 Mar 2020 15:48:32 -0500 Received: from mga09.intel.com ([134.134.136.24]:58737 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725895AbgCAUsb (ORCPT ); Sun, 1 Mar 2020 15:48:31 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Mar 2020 12:48:31 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,505,1574150400"; d="scan'208";a="233094869" Received: from gayuk-dev-mach.sc.intel.com ([10.3.79.171]) by fmsmga008.fm.intel.com with ESMTP; 01 Mar 2020 12:48:31 -0800 From: Gayatri Kammela To: platform-driver-x86@vger.kernel.org Cc: linux-kernel@vger.kernel.org, vishwanath.somayaji@intel.com, dvhart@infradead.org, mika.westerberg@intel.com, peterz@infradead.org, charles.d.prestopine@intel.com, Gayatri Kammela , Chen Zhou , Andy Shevchenko , "David E . Box" Subject: [PATCH v3 2/5] platform/x86: intel_pmc_core: fix: Remove the duplicate if() to create debugfs entry for substate_live_status_registers Date: Sun, 1 Mar 2020 12:44:23 -0800 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org A debugfs entry for substate_live_status_registers is created only if the platform has sub-states, which requires the same condition to create substate_status_registers debugfs entry. Hence remove the redundant condition and re-use the exisiting one. Cc: Chen Zhou Cc: Andy Shevchenko Cc: David E. Box Signed-off-by: Gayatri Kammela --- drivers/platform/x86/intel_pmc_core.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index 20b2f49726cf..a36051c2a18c 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -1108,9 +1108,6 @@ static void pmc_core_dbgfs_register(struct pmc_dev *pmcdev) debugfs_create_file("substate_status_registers", 0444, pmcdev->dbgfs_dir, pmcdev, &pmc_core_substate_sts_regs_fops); - } - - if (pmcdev->map->lpm_status_offset) { debugfs_create_file("substate_live_status_registers", 0444, pmcdev->dbgfs_dir, pmcdev, &pmc_core_substate_l_sts_regs_fops); From patchwork Sun Mar 1 20:44:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kammela, Gayatri" X-Patchwork-Id: 11414381 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 28C2114E3 for ; Sun, 1 Mar 2020 20:48:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 12006206CC for ; Sun, 1 Mar 2020 20:48:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726811AbgCAUsf (ORCPT ); Sun, 1 Mar 2020 15:48:35 -0500 Received: from mga09.intel.com ([134.134.136.24]:58737 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726791AbgCAUse (ORCPT ); Sun, 1 Mar 2020 15:48:34 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Mar 2020 12:48:33 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,505,1574150400"; d="scan'208";a="233094875" Received: from gayuk-dev-mach.sc.intel.com ([10.3.79.171]) by fmsmga008.fm.intel.com with ESMTP; 01 Mar 2020 12:48:33 -0800 From: Gayatri Kammela To: platform-driver-x86@vger.kernel.org Cc: linux-kernel@vger.kernel.org, vishwanath.somayaji@intel.com, dvhart@infradead.org, mika.westerberg@intel.com, peterz@infradead.org, charles.d.prestopine@intel.com, Gayatri Kammela , Chen Zhou , Andy Shevchenko , "David E . Box" Subject: [PATCH v3 3/5] platform/x86: intel_pmc_core: fix: Add slp_s0_offset attribute back to tgl_reg_map Date: Sun, 1 Mar 2020 12:44:24 -0800 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org If platforms such as Tiger Lake has sub-states of S0ix, then attributes such as slps0_dbg_offset become invalid. But slp_s0_offset is still valid as it is used to get the pmcdev_base_addr. Hence, add back slp_s0_offset and remove slps0_dbg_offset attributes. Cc: Chen Zhou Cc: Andy Shevchenko Cc: David E. Box Signed-off-by: Gayatri Kammela --- drivers/platform/x86/intel_pmc_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index a36051c2a18c..986fe677d6fe 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -556,9 +556,9 @@ static const struct pmc_bit_map *tgl_lpm_maps[] = { static const struct pmc_reg_map tgl_reg_map = { .pfear_sts = ext_tgl_pfear_map, + .slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET, .ltr_show_sts = cnp_ltr_show_map, .msr_sts = msr_map, - .slps0_dbg_offset = CNP_PMC_SLPS0_DBG_OFFSET, .ltr_ignore_offset = CNP_PMC_LTR_IGNORE_OFFSET, .regmap_length = CNP_PMC_MMIO_REG_LEN, .ppfear0_offset = CNP_PMC_HOST_PPFEAR0A, From patchwork Sun Mar 1 20:44:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kammela, Gayatri" X-Patchwork-Id: 11414379 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 06F8414E3 for ; Sun, 1 Mar 2020 20:48:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E3B6E206CC for ; Sun, 1 Mar 2020 20:48:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726877AbgCAUsk (ORCPT ); Sun, 1 Mar 2020 15:48:40 -0500 Received: from mga09.intel.com ([134.134.136.24]:58737 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726859AbgCAUsh (ORCPT ); Sun, 1 Mar 2020 15:48:37 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Mar 2020 12:48:37 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,505,1574150400"; d="scan'208";a="233094882" Received: from gayuk-dev-mach.sc.intel.com ([10.3.79.171]) by fmsmga008.fm.intel.com with ESMTP; 01 Mar 2020 12:48:37 -0800 From: Gayatri Kammela To: platform-driver-x86@vger.kernel.org Cc: linux-kernel@vger.kernel.org, vishwanath.somayaji@intel.com, dvhart@infradead.org, mika.westerberg@intel.com, peterz@infradead.org, charles.d.prestopine@intel.com, Gayatri Kammela , Chen Zhou , Andy Shevchenko , "David E . Box" Subject: [PATCH v3 4/5] platform/x86: intel_pmc_core: Make pmc_core_substate_res_show() generic Date: Sun, 1 Mar 2020 12:44:25 -0800 Message-Id: <683f6e76eace905f570d496a3e6e21b5fd795229.1583093898.git.gayatri.kammela@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Currently pmc_core_substate_res_show() uses array of char pointers i.e., lpm_modes for Tiger Lake directly to iterate through and to get the number of low power modes which is hardcoded and cannot be re-used for future platforms that support sub-states. To maintain readability, make pmc_core_substate_res_show() generic, so that it can re-used for future platforms. Cc: Chen Zhou Cc: Andy Shevchenko Cc: David E. Box Signed-off-by: Gayatri Kammela --- drivers/platform/x86/intel_pmc_core.c | 2 ++ drivers/platform/x86/intel_pmc_core.h | 3 ++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index 986fe677d6fe..04ac058b9871 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -566,6 +566,7 @@ static const struct pmc_reg_map tgl_reg_map = { .pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET, .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT, .ltr_ignore_max = TGL_NUM_IP_IGN_ALLOWED, + .lpm_modes = tgl_lpm_modes, .lpm_en_offset = TGL_LPM_EN_OFFSET, .lpm_residency_offset = TGL_LPM_RESIDENCY_OFFSET, .lpm_sts = tgl_lpm_maps, @@ -991,6 +992,7 @@ DEFINE_SHOW_ATTRIBUTE(pmc_core_ltr); static int pmc_core_substate_res_show(struct seq_file *s, void *unused) { struct pmc_dev *pmcdev = s->private; + const char **lpm_modes = pmcdev->map->lpm_modes; u32 offset = pmcdev->map->lpm_residency_offset; u32 lpm_en; int index; diff --git a/drivers/platform/x86/intel_pmc_core.h b/drivers/platform/x86/intel_pmc_core.h index 1bbdffe80bde..0d50b2402abe 100644 --- a/drivers/platform/x86/intel_pmc_core.h +++ b/drivers/platform/x86/intel_pmc_core.h @@ -198,7 +198,7 @@ enum ppfear_regs { #define TGL_LPM_STATUS_OFFSET 0x1C3C #define TGL_LPM_LIVE_STATUS_OFFSET 0x1C5C -const char *lpm_modes[] = { +const char *tgl_lpm_modes[] = { "S0i2.0", "S0i2.1", "S0i2.2", @@ -255,6 +255,7 @@ struct pmc_reg_map { const u32 ltr_ignore_max; const u32 pm_vric1_offset; /* Low Power Mode registers */ + const char **lpm_modes; const u32 lpm_en_offset; const u32 lpm_residency_offset; const u32 lpm_status_offset; From patchwork Sun Mar 1 20:44:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kammela, Gayatri" X-Patchwork-Id: 11414377 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 288A314BC for ; Sun, 1 Mar 2020 20:48:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1152C206CC for ; Sun, 1 Mar 2020 20:48:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726884AbgCAUsk (ORCPT ); Sun, 1 Mar 2020 15:48:40 -0500 Received: from mga09.intel.com ([134.134.136.24]:58737 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726562AbgCAUsk (ORCPT ); Sun, 1 Mar 2020 15:48:40 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Mar 2020 12:48:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,505,1574150400"; d="scan'208";a="233094895" Received: from gayuk-dev-mach.sc.intel.com ([10.3.79.171]) by fmsmga008.fm.intel.com with ESMTP; 01 Mar 2020 12:48:39 -0800 From: Gayatri Kammela To: platform-driver-x86@vger.kernel.org Cc: linux-kernel@vger.kernel.org, vishwanath.somayaji@intel.com, dvhart@infradead.org, mika.westerberg@intel.com, peterz@infradead.org, charles.d.prestopine@intel.com, Gayatri Kammela , Chen Zhou , Andy Shevchenko , "David E . Box" Subject: [PATCH v3 5/5] platform/x86: intel_pmc_core: fix: Make pmc_core_lpm_display() generic for platforms that support sub-states Date: Sun, 1 Mar 2020 12:44:26 -0800 Message-Id: <5e28f488a6cc8b7c1e08b536868844b586a1eaf1.1583093898.git.gayatri.kammela@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Currently pmc_core_lpm_display() uses array of struct pointers i.e., tgl_lpm_maps for Tiger Lake directly to iterate through and to get the number of status/live status registers which is hardcoded and cannot be re-used for future platforms that support sub-states. To maintain readability, make pmc_core_lpm_display() generic, so that it can re-used for future platforms. Cc: Chen Zhou Cc: Andy Shevchenko Cc: David E. Box Suggested-by: Andy Shevchenko Signed-off-by: Gayatri Kammela --- drivers/platform/x86/intel_pmc_core.c | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index 04ac058b9871..cf3aaace21d5 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -640,15 +641,30 @@ static void pmc_core_slps0_display(struct pmc_dev *pmcdev, struct device *dev, } } +static int pmc_core_lpm_get_arr_size(const struct pmc_bit_map **maps) +{ + int idx, arr_size = 0; + + for (idx = 0; maps[idx]; idx++) + arr_size++; + + return arr_size; +} + static void pmc_core_lpm_display(struct pmc_dev *pmcdev, struct device *dev, struct seq_file *s, u32 offset, const char *str, const struct pmc_bit_map **maps) { - u32 lpm_regs[ARRAY_SIZE(tgl_lpm_maps)-1]; - int index, idx, len = 32, bit_mask; + int arr_size = pmc_core_lpm_get_arr_size(maps); + int index, idx, bit_mask, len = 32; + u32 *lpm_regs; + + lpm_regs = kmalloc_array(arr_size, sizeof(*lpm_regs), GFP_KERNEL); + if(!lpm_regs) + goto err; - for (index = 0; tgl_lpm_maps[index]; index++) { + for (index = 0; maps[index]; index++) { lpm_regs[index] = pmc_core_reg_read(pmcdev, offset); offset += 4; } @@ -672,6 +688,9 @@ static void pmc_core_lpm_display(struct pmc_dev *pmcdev, struct device *dev, lpm_regs[idx] & bit_mask ? 1 : 0); } } + +err: + kfree(lpm_regs); } #if IS_ENABLED(CONFIG_DEBUG_FS)