From patchwork Fri Jul 27 14:37:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Hedde X-Patchwork-Id: 10547271 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4A0B1174A for ; Fri, 27 Jul 2018 14:42:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 392A22BDF0 for ; Fri, 27 Jul 2018 14:42:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2D3E02BDF6; Fri, 27 Jul 2018 14:42:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 97E022BDF0 for ; Fri, 27 Jul 2018 14:42:27 +0000 (UTC) Received: from localhost ([::1]:41620 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3wo-0006qK-Si for patchwork-qemu-devel@patchwork.kernel.org; Fri, 27 Jul 2018 10:42:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34372) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3sH-0003FE-SQ for qemu-devel@nongnu.org; Fri, 27 Jul 2018 10:37:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fj3sG-0008Ib-IY for qemu-devel@nongnu.org; Fri, 27 Jul 2018 10:37:45 -0400 Received: from greensocs.com ([193.104.36.180]:50605) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3sB-0008Ac-FY; Fri, 27 Jul 2018 10:37:39 -0400 Received: from localhost (localhost [127.0.0.1]) by greensocs.com (Postfix) with ESMTP id D5D2642899A; Fri, 27 Jul 2018 16:37:30 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702250; bh=TBvJXPPgCFdfbLN9eDsNvJN9V0c/E9DoiD6BK2AxeaA=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=oDk74velvNhby1mpSLcDpIMB+YUEtflCOlVW/a1yguBNsoSjzep3YaBLOrvsrdhMr A2XnwqVRmexaOAEaMNSNSDfvtNuTTrTWhtlnDo1NleEKoE3p+lw/twv2Hnquuhz2SJ gPTRrIAgGyi1yveHv35LgxEAAOTygZKsWH1MZtes= X-Virus-Scanned: amavisd-new at greensocs.com Authentication-Results: gs-01.greensocs.com (amavisd-new); dkim=pass (1024-bit key) header.d=greensocs.com header.b=U8Jd9xDc; dkim=pass (1024-bit key) header.d=greensocs.com header.b=U8Jd9xDc Received: from greensocs.com ([127.0.0.1]) by localhost (gs-01.greensocs.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id KgjokB7tLjZZ; Fri, 27 Jul 2018 16:37:30 +0200 (CEST) Received: by greensocs.com (Postfix, from userid 998) id ECCE9443482; Fri, 27 Jul 2018 16:37:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702249; bh=TBvJXPPgCFdfbLN9eDsNvJN9V0c/E9DoiD6BK2AxeaA=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=U8Jd9xDcAKoH2UmbN7e+dfA/4zBqKdoNHPGwVuSRiCiK05JVZz4Lr4plmU7ladfRe 06ccZ0Gn/USTy2Yg3Ar5/e6DabZNrNDTKcJBt/n8ic8vpJnUYeFzwZ9eNe7jxeWyrw t7aBbT2LukrH+8VrnltWApsWDcW3nU0F+YGmTkec= Received: from kouign-amann.hive.antfield.fr (antfield.tima.u-ga.fr [147.171.129.253]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: damien.hedde@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id 8C1D3400DC8; Fri, 27 Jul 2018 16:37:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702249; bh=TBvJXPPgCFdfbLN9eDsNvJN9V0c/E9DoiD6BK2AxeaA=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=U8Jd9xDcAKoH2UmbN7e+dfA/4zBqKdoNHPGwVuSRiCiK05JVZz4Lr4plmU7ladfRe 06ccZ0Gn/USTy2Yg3Ar5/e6DabZNrNDTKcJBt/n8ic8vpJnUYeFzwZ9eNe7jxeWyrw t7aBbT2LukrH+8VrnltWApsWDcW3nU0F+YGmTkec= From: Damien Hedde To: qemu-devel@nongnu.org Date: Fri, 27 Jul 2018 16:37:20 +0200 Message-Id: <0379e54aecc5534d68e1ac3bdf61fda79916396e.1532701430.git.damien.hedde@greensocs.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [RFC PATCH 1/6] qdev: add a power and clock gating support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, alistair@alistair23.me, mark.burton@greensocs.com, saipava@xilinx.com, qemu-arm@nongnu.org, Damien Hedde , pbonzini@redhat.com, luc.michel@greensocs.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add two boolean new fields _powered_ and _clocked_ to hold the gating state. Also add methods to act on each gating change. The power/clock gating is controlled by 2 functions *device_set_power* and *device_set_clock*. Add a default behavior to do a device_reset at power-up. Signed-off-by: Damien Hedde --- include/hw/qdev-core.h | 30 ++++++++++++++++++++++++ hw/core/qdev.c | 52 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 82 insertions(+) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index f1fd0f8736..659287e185 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -34,6 +34,7 @@ typedef void (*DeviceUnrealize)(DeviceState *dev, Error **errp); typedef void (*DeviceReset)(DeviceState *dev); typedef void (*BusRealize)(BusState *bus, Error **errp); typedef void (*BusUnrealize)(BusState *bus, Error **errp); +typedef void (*DeviceGatingUpdate)(DeviceState *dev); struct VMStateDescription; @@ -109,6 +110,8 @@ typedef struct DeviceClass { DeviceReset reset; DeviceRealize realize; DeviceUnrealize unrealize; + DeviceGatingUpdate power_update; + DeviceGatingUpdate clock_update; /* device state */ const struct VMStateDescription *vmsd; @@ -151,6 +154,9 @@ struct DeviceState { int num_child_bus; int instance_id_alias; int alias_required_for_version; + + bool powered; + bool clocked; }; struct DeviceListener { @@ -404,6 +410,12 @@ void device_class_set_parent_realize(DeviceClass *dc, void device_class_set_parent_unrealize(DeviceClass *dc, DeviceUnrealize dev_unrealize, DeviceUnrealize *parent_unrealize); +void device_class_set_parent_power_update(DeviceClass *dc, + DeviceGatingUpdate dev_power_update, + DeviceGatingUpdate *parent_power_update); +void device_class_set_parent_clock_update(DeviceClass *dc, + DeviceGatingUpdate dev_clock_update, + DeviceGatingUpdate *parent_clock_update); const struct VMStateDescription *qdev_get_vmsd(DeviceState *dev); @@ -434,4 +446,22 @@ static inline bool qbus_is_hotpluggable(BusState *bus) void device_listener_register(DeviceListener *listener); void device_listener_unregister(DeviceListener *listener); +/** + * device_set_power: + * Enable/Disable the power of a device + * + * @dev: device to update + * @en: true to enable, false to disable + */ +void device_set_power(DeviceState *dev, bool en); + +/** + * device_set_clock: + * Enable/Disable the clock of a device + * + * @dev: device to update + * @en: true to enable, false to disable + */ +void device_set_clock(DeviceState *dev, bool en); + #endif diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 529b82de18..bb6d36eab9 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -950,6 +950,8 @@ static void device_initfn(Object *obj) dev->instance_id_alias = -1; dev->realized = false; + dev->powered = true; + dev->clocked = true; object_property_add_bool(obj, "realized", device_get_realized, device_set_realized, NULL); @@ -1038,6 +1040,13 @@ static void device_unparent(Object *obj) } } +static void device_power_update(DeviceState *dev) +{ + if (dev->powered) { + device_reset(dev); + } +} + static void device_class_init(ObjectClass *class, void *data) { DeviceClass *dc = DEVICE_CLASS(class); @@ -1052,6 +1061,8 @@ static void device_class_init(ObjectClass *class, void *data) */ dc->hotpluggable = true; dc->user_creatable = true; + + dc->power_update = device_power_update; } void device_class_set_parent_reset(DeviceClass *dc, @@ -1078,6 +1089,22 @@ void device_class_set_parent_unrealize(DeviceClass *dc, dc->unrealize = dev_unrealize; } +void device_class_set_parent_power_update(DeviceClass *dc, + DeviceGatingUpdate dev_power_update, + DeviceGatingUpdate *parent_power_update) +{ + *parent_power_update = dc->power_update; + dc->power_update = dev_power_update; +} + +void device_class_set_parent_clock_update(DeviceClass *dc, + DeviceGatingUpdate dev_clock_update, + DeviceGatingUpdate *parent_clock_update) +{ + *parent_clock_update = dc->clock_update; + dc->clock_update = dev_clock_update; +} + void device_reset(DeviceState *dev) { DeviceClass *klass = DEVICE_GET_CLASS(dev); @@ -1087,6 +1114,31 @@ void device_reset(DeviceState *dev) } } +void device_set_power(DeviceState *dev, bool en) +{ + DeviceClass *klass = DEVICE_GET_CLASS(dev); + + if (en != dev->powered) { + dev->powered = en; + if (klass->power_update) { + klass->power_update(dev); + } + } +} + +void device_set_clock(DeviceState *dev, bool en) +{ + DeviceClass *klass = DEVICE_GET_CLASS(dev); + + if (en != dev->clocked) { + dev->clocked = en; + if (klass->clock_update) { + klass->clock_update(dev); + } + } +} + + Object *qdev_get_machine(void) { static Object *dev; From patchwork Fri Jul 27 14:37:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Hedde X-Patchwork-Id: 10547269 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 084EE174A for ; Fri, 27 Jul 2018 14:42:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EB5EB2BDF0 for ; Fri, 27 Jul 2018 14:42:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DFC532BDF6; Fri, 27 Jul 2018 14:42:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 781D12BDF0 for ; Fri, 27 Jul 2018 14:42:25 +0000 (UTC) Received: from localhost ([::1]:41619 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3wm-0006mz-Id for patchwork-qemu-devel@patchwork.kernel.org; Fri, 27 Jul 2018 10:42:24 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34365) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3sH-0003FB-Ma for qemu-devel@nongnu.org; Fri, 27 Jul 2018 10:37:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fj3sG-0008Ih-Nt for qemu-devel@nongnu.org; Fri, 27 Jul 2018 10:37:45 -0400 Received: from greensocs.com ([193.104.36.180]:50606) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3sB-0008Ae-Fb; Fri, 27 Jul 2018 10:37:39 -0400 Received: from localhost (localhost [127.0.0.1]) by greensocs.com (Postfix) with ESMTP id 3ED5B443482; Fri, 27 Jul 2018 16:37:31 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702251; bh=hTz2cBGR4g3rz6906UkiYcQqelpk1tHGFoiGUNsN8Wk=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=BmGwER437dP0jV9qxrW30g7MkYd71nH/mhoKpslJ23OKKj/9MJeIIIQfDPd/ivZed AvUvGrgDTHWE5eTEdA44p5Df1l5Hc48UCryALbsqzS89gGxvnXaLWKTsaf0VSp29sa vKLZ4bnxtkpRHG/oGTIM4G8WiYsRsD2tH5Se5lLM= X-Virus-Scanned: amavisd-new at greensocs.com Authentication-Results: gs-01.greensocs.com (amavisd-new); dkim=pass (1024-bit key) header.d=greensocs.com header.b=wyuAMg87; dkim=pass (1024-bit key) header.d=greensocs.com header.b=wyuAMg87 Received: from greensocs.com ([127.0.0.1]) by localhost (gs-01.greensocs.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id yeX5WTX0vOB6; Fri, 27 Jul 2018 16:37:30 +0200 (CEST) Received: by greensocs.com (Postfix, from userid 998) id 53A6F4434A4; Fri, 27 Jul 2018 16:37:30 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702250; bh=hTz2cBGR4g3rz6906UkiYcQqelpk1tHGFoiGUNsN8Wk=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=wyuAMg87wxndpVAy3v+ltoMfi6sQg8HQS2KqXz7+i8p+4J4w4sAZUYE87QbwCu3aF lMfnZElEzxR/54xVVG+eZoFCP3XKx+SnMgDlxu0qXKDeyyW5f/dNSVUhsQnx/FG4zA 4c3bZi7LiVKjYlgz4lL4doViB07pjHQJvICcJ2a4= Received: from kouign-amann.hive.antfield.fr (antfield.tima.u-ga.fr [147.171.129.253]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: damien.hedde@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id EC10642899A; Fri, 27 Jul 2018 16:37:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702250; bh=hTz2cBGR4g3rz6906UkiYcQqelpk1tHGFoiGUNsN8Wk=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=wyuAMg87wxndpVAy3v+ltoMfi6sQg8HQS2KqXz7+i8p+4J4w4sAZUYE87QbwCu3aF lMfnZElEzxR/54xVVG+eZoFCP3XKx+SnMgDlxu0qXKDeyyW5f/dNSVUhsQnx/FG4zA 4c3bZi7LiVKjYlgz4lL4doViB07pjHQJvICcJ2a4= From: Damien Hedde To: qemu-devel@nongnu.org Date: Fri, 27 Jul 2018 16:37:21 +0200 Message-Id: <2b92ae960dfc47149945c9e47f90b4433d8eee35.1532701430.git.damien.hedde@greensocs.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [RFC PATCH 2/6] qdev: add power/clock gating control on bus tree X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, alistair@alistair23.me, mark.burton@greensocs.com, saipava@xilinx.com, qemu-arm@nongnu.org, Damien Hedde , pbonzini@redhat.com, luc.michel@greensocs.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add functions [qdev|qbus]_set_[power|clock]_all(_fn). Theses allow to control power and clock gating along a bus hierarchy. Signed-off-by: Damien Hedde --- include/hw/qdev-core.h | 20 +++++++++++++++++ hw/core/qdev.c | 51 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 71 insertions(+) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index 659287e185..607c367738 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -464,4 +464,24 @@ void device_set_power(DeviceState *dev, bool en); */ void device_set_clock(DeviceState *dev, bool en); +/** + * qdev/qbus_set_power_all(_fn) + * Enable/Disable the power of a tree starting + * at given device or bus + */ +void qdev_set_power_all(DeviceState *dev, bool en); +void qdev_set_power_all_fn(void *opaque, bool en); +void qbus_set_power_all(BusState *bus, bool en); +void qbus_set_power_all_fn(void *opaque, bool en); + +/** + * qdev/qbus_set_clock_all(_fn) + * Enable/Disable the clock of a tree starting + * at given device or bus + */ +void qdev_set_clock_all(DeviceState *dev, bool en); +void qdev_set_clock_all_fn(void *opaque, bool en); +void qbus_set_clock_all(BusState *bus, bool en); +void qbus_set_clock_all_fn(void *opaque, bool en); + #endif diff --git a/hw/core/qdev.c b/hw/core/qdev.c index bb6d36eab9..24b90bd45f 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -1138,6 +1138,57 @@ void device_set_clock(DeviceState *dev, bool en) } } +static int qdev_set_power_one(DeviceState *dev, void *opaque) +{ + device_set_power(dev, *((bool *)opaque)); + return 0; +} + +void qdev_set_power_all(DeviceState *dev, bool en) +{ + qdev_walk_children(dev, NULL, NULL, qdev_set_power_one, NULL, &en); +} + +void qdev_set_power_all_fn(void *opaque, bool en) +{ + qdev_set_power_all(DEVICE(opaque), en); +} + +void qbus_set_power_all(BusState *bus, bool en) +{ + qbus_walk_children(bus, NULL, NULL, qdev_set_power_one, NULL, &en); +} + +void qbus_set_power_all_fn(void *opaque, bool en) +{ + qbus_set_power_all(BUS(opaque), en); +} + +static int qdev_set_clock_one(DeviceState *dev, void *opaque) +{ + device_set_clock(dev, *((bool *)opaque)); + return 0; +} + +void qdev_set_clock_all(DeviceState *dev, bool en) +{ + qdev_walk_children(dev, NULL, NULL, qdev_set_clock_one, NULL, &en); +} + +void qdev_set_clock_all_fn(void *opaque, bool en) +{ + qdev_set_clock_all(DEVICE(opaque), en); +} + +void qbus_set_clock_all(BusState *bus, bool en) +{ + qbus_walk_children(bus, NULL, NULL, qdev_set_clock_one, NULL, &en); +} + +void qbus_set_clock_all_fn(void *opaque, bool en) +{ + qbus_set_clock_all(BUS(opaque), en); +} Object *qdev_get_machine(void) { From patchwork Fri Jul 27 14:37:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Hedde X-Patchwork-Id: 10547265 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 97A4B112B for ; Fri, 27 Jul 2018 14:39:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 870462BDCD for ; Fri, 27 Jul 2018 14:39:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7B1B72BDD2; Fri, 27 Jul 2018 14:39:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C25752BDCD for ; Fri, 27 Jul 2018 14:39:29 +0000 (UTC) Received: from localhost ([::1]:41596 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3tw-0004Pc-P1 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 27 Jul 2018 10:39:28 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34360) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3sH-0003F8-GU for qemu-devel@nongnu.org; Fri, 27 Jul 2018 10:37:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fj3sG-0008IN-EZ for qemu-devel@nongnu.org; Fri, 27 Jul 2018 10:37:45 -0400 Received: from greensocs.com ([193.104.36.180]:50603) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3sB-0008AZ-GM; Fri, 27 Jul 2018 10:37:39 -0400 Received: from localhost (localhost [127.0.0.1]) by greensocs.com (Postfix) with ESMTP id AD592428994; Fri, 27 Jul 2018 16:37:31 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702251; bh=LGDNDsuRp4qjQNaH95Al+G0mu5NCl3tzJ7GidKARFAw=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=4BrV7Lj43D6iSISUgq2dEmXbyhQsu5n6qXg+eNx8z26qYAcPuJ6zGocx4b/Vykh5h dgRKsy9JAjKvnN+4iKQfElTPL2bKJkAXvlNNhxue5dgnsTG5UDi2P+jiGWO5/KyqYm LF4bupL+M90rnwxAC3oevmvW18mITltQNDWKNp+g= X-Virus-Scanned: amavisd-new at greensocs.com Authentication-Results: gs-01.greensocs.com (amavisd-new); dkim=pass (1024-bit key) header.d=greensocs.com header.b=NdNCrU8w; dkim=pass (1024-bit key) header.d=greensocs.com header.b=NdNCrU8w Received: from greensocs.com ([127.0.0.1]) by localhost (gs-01.greensocs.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id JNZQXAzkuP4F; Fri, 27 Jul 2018 16:37:30 +0200 (CEST) Received: by greensocs.com (Postfix, from userid 998) id CDEC64434B9; Fri, 27 Jul 2018 16:37:30 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702250; bh=LGDNDsuRp4qjQNaH95Al+G0mu5NCl3tzJ7GidKARFAw=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=NdNCrU8wCoxsgDEuV+l+RUkKqcepA0YyGmZ6XwPFnMK45+HQGNi32DLwIsAe5h1nP oNPkCqylF0hQ+UumaX0Nvx2frtVLLmbK9pASpzqyb8W2ImDMUpitosLtO7mA/jKlhk 4eCdf5rFJ373Mv7wIQR8mxbfNyqgABpeJvIg0UGY= Received: from kouign-amann.hive.antfield.fr (antfield.tima.u-ga.fr [147.171.129.253]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: damien.hedde@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id 56F1C42899A; Fri, 27 Jul 2018 16:37:30 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702250; bh=LGDNDsuRp4qjQNaH95Al+G0mu5NCl3tzJ7GidKARFAw=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=NdNCrU8wCoxsgDEuV+l+RUkKqcepA0YyGmZ6XwPFnMK45+HQGNi32DLwIsAe5h1nP oNPkCqylF0hQ+UumaX0Nvx2frtVLLmbK9pASpzqyb8W2ImDMUpitosLtO7mA/jKlhk 4eCdf5rFJ373Mv7wIQR8mxbfNyqgABpeJvIg0UGY= From: Damien Hedde To: qemu-devel@nongnu.org Date: Fri, 27 Jul 2018 16:37:22 +0200 Message-Id: <09041c553fbe1d78bf282513bffdb981e7a1d201.1532701430.git.damien.hedde@greensocs.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [RFC PATCH 3/6] sysbus: Specialize gating_update to enable/disable memory regions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, alistair@alistair23.me, mark.burton@greensocs.com, saipava@xilinx.com, qemu-arm@nongnu.org, Damien Hedde , pbonzini@redhat.com, luc.michel@greensocs.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The default methods are overriden to add the activation/deactivation of the memory regions according to the gating state: Regions are enabled only when powered and clocked. As powering-up triggers a reset call, memory regions should be reset in specialized sysbus devices. Signed-off-by: Damien Hedde --- include/hw/sysbus.h | 3 +++ hw/core/sysbus.c | 39 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h index 0b59a3b8d6..e17165e78f 100644 --- a/include/hw/sysbus.h +++ b/include/hw/sysbus.h @@ -59,6 +59,9 @@ typedef struct SysBusDeviceClass { */ char *(*explicit_ofw_unit_address)(const SysBusDevice *dev); void (*connect_irq_notifier)(SysBusDevice *dev, qemu_irq irq); + + DeviceGatingUpdate parent_power_update; + DeviceGatingUpdate parent_clock_update; } SysBusDeviceClass; struct SysBusDevice { diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index 3c8e53b188..4a2dfbe907 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -325,6 +325,39 @@ MemoryRegion *sysbus_address_space(SysBusDevice *dev) return get_system_memory(); } +/* + * Action take on power or clock update. + */ +static void sysbus_device_gating_update(DeviceState *dev) +{ + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + int i; + + for (i = 0;; i++) { + MemoryRegion *mr = sysbus_mmio_get_region(sbd, i); + if (!mr) { + break; + } + memory_region_set_enabled(mr, dev->powered && dev->clocked); + } +} + +/* + * Action take on power update. + * + * Call parent method before doing local action. + * So that we override any action taken in parent method (eg if reset + * is called due to leaving OFF state) + */ +static void sysbus_device_power_update(DeviceState *dev) +{ + SysBusDeviceClass *sbdk = SYS_BUS_DEVICE_GET_CLASS(dev); + + sbdk->parent_power_update(dev); + + sysbus_device_gating_update(dev); +} + static void sysbus_device_class_init(ObjectClass *klass, void *data) { DeviceClass *k = DEVICE_CLASS(klass); @@ -341,6 +374,12 @@ static void sysbus_device_class_init(ObjectClass *klass, void *data) * subclass needs to override it and set user_creatable=true. */ k->user_creatable = false; + + SysBusDeviceClass *sbdk = SYS_BUS_DEVICE_CLASS(klass); + device_class_set_parent_power_update(k, + sysbus_device_power_update, &sbdk->parent_power_update); + device_class_set_parent_clock_update(k, + sysbus_device_gating_update, &sbdk->parent_clock_update); } static const TypeInfo sysbus_device_type_info = { From patchwork Fri Jul 27 14:37:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Hedde X-Patchwork-Id: 10547261 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7F3FB1822 for ; Fri, 27 Jul 2018 14:39:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6DA3A2BDCE for ; Fri, 27 Jul 2018 14:39:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 61BA82BDD8; Fri, 27 Jul 2018 14:39:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 095192BDCE for ; Fri, 27 Jul 2018 14:39:30 +0000 (UTC) Received: from localhost ([::1]:41597 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3ty-0004Qk-3d for patchwork-qemu-devel@patchwork.kernel.org; Fri, 27 Jul 2018 10:39:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34362) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3sH-0003F9-HO for qemu-devel@nongnu.org; Fri, 27 Jul 2018 10:37:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fj3sG-0008IW-Ge for qemu-devel@nongnu.org; Fri, 27 Jul 2018 10:37:45 -0400 Received: from greensocs.com ([193.104.36.180]:50602) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3sB-0008Aa-Fd; Fri, 27 Jul 2018 10:37:39 -0400 Received: from localhost (localhost [127.0.0.1]) by greensocs.com (Postfix) with ESMTP id 2E30D4434B9; Fri, 27 Jul 2018 16:37:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702252; bh=UBhdrBu2BfWci6XjZcmChBfVWClCxpRVoV2fRvnJnIE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=YHgyaG+SHy6PAzRacAZbfiZxsnljJ4404PXXsHuT9EbEEMJ7SX8Ak9gPAINnKi0li q/WUaDft4/ivuHR0UMkJCb83xJfdyCuMfBUTYLbRMlE32em9ONVYxW8hUBoKyNATm6 w2tKwGwtY30YfUlFa3cSJe3FBiwQ/PLaGbQzHUtw= X-Virus-Scanned: amavisd-new at greensocs.com Authentication-Results: gs-01.greensocs.com (amavisd-new); dkim=pass (1024-bit key) header.d=greensocs.com header.b=O2KzR2Sk; dkim=pass (1024-bit key) header.d=greensocs.com header.b=O2KzR2Sk Received: from greensocs.com ([127.0.0.1]) by localhost (gs-01.greensocs.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id sgUzPoqcCvsw; Fri, 27 Jul 2018 16:37:31 +0200 (CEST) Received: by greensocs.com (Postfix, from userid 998) id 4E104443552; Fri, 27 Jul 2018 16:37:31 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702251; bh=UBhdrBu2BfWci6XjZcmChBfVWClCxpRVoV2fRvnJnIE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=O2KzR2Sku+YnMJ4m1cersMprpJILLXjlws4WagiFgUmzx4WrC0bzbZBw3t2dfS74K kqmog3mjJ32v+ZjAQnP8tpnaBKgFsM4E61iL8248qJB1BsUc3H1fuGF5RbYx2sruP6 R73IhI6UkFQ/JjSzWWShoJaIyjiFuCRU+Kz+IDnI= Received: from kouign-amann.hive.antfield.fr (antfield.tima.u-ga.fr [147.171.129.253]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: damien.hedde@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id C3A34428994; Fri, 27 Jul 2018 16:37:30 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702251; bh=UBhdrBu2BfWci6XjZcmChBfVWClCxpRVoV2fRvnJnIE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=O2KzR2Sku+YnMJ4m1cersMprpJILLXjlws4WagiFgUmzx4WrC0bzbZBw3t2dfS74K kqmog3mjJ32v+ZjAQnP8tpnaBKgFsM4E61iL8248qJB1BsUc3H1fuGF5RbYx2sruP6 R73IhI6UkFQ/JjSzWWShoJaIyjiFuCRU+Kz+IDnI= From: Damien Hedde To: qemu-devel@nongnu.org Date: Fri, 27 Jul 2018 16:37:23 +0200 Message-Id: <81e37f79d335d17d8802f127d59f89e263c50136.1532701430.git.damien.hedde@greensocs.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [RFC PATCH 4/6] cadence_uart: add clock/power gating support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, alistair@alistair23.me, mark.burton@greensocs.com, saipava@xilinx.com, qemu-arm@nongnu.org, Damien Hedde , pbonzini@redhat.com, luc.michel@greensocs.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Only discard input characters when unpowered/unclocked. As it is a sysbus device, mmio are already disabled when unpowered or unclocked. Signed-off-by: Damien Hedde --- hw/char/cadence_uart.c | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c index fbdbd463bb..dd51d9a087 100644 --- a/hw/char/cadence_uart.c +++ b/hw/char/cadence_uart.c @@ -335,8 +335,14 @@ static void uart_write_tx_fifo(CadenceUARTState *s, const uint8_t *buf, static void uart_receive(void *opaque, const uint8_t *buf, int size) { CadenceUARTState *s = opaque; + DeviceState *dev = DEVICE(s); uint32_t ch_mode = s->r[R_MR] & UART_MR_CHMODE; + /* ignore characters if unpowered or unclocked */ + if (!dev->powered || !dev->clocked) { + return; + } + if (ch_mode == NORMAL_MODE || ch_mode == ECHO_MODE) { uart_write_rx_fifo(opaque, buf, size); } @@ -348,8 +354,14 @@ static void uart_receive(void *opaque, const uint8_t *buf, int size) static void uart_event(void *opaque, int event) { CadenceUARTState *s = opaque; + DeviceState *dev = DEVICE(s); uint8_t buf = '\0'; + /* ignore event if we're unpowered or unclocked */ + if (!dev->powered || !dev->clocked) { + return; + } + if (event == CHR_EVENT_BREAK) { uart_write_rx_fifo(opaque, &buf, 1); } @@ -516,10 +528,19 @@ static int cadence_uart_post_load(void *opaque, int version_id) return 0; } +static int cadence_uart_pre_load(void *opaque) +{ + DeviceState *s = opaque; + s->clocked = true; + s->powered = true; + return 0; +} + static const VMStateDescription vmstate_cadence_uart = { .name = "cadence_uart", - .version_id = 2, + .version_id = 3, .minimum_version_id = 2, + .pre_load = cadence_uart_pre_load, .post_load = cadence_uart_post_load, .fields = (VMStateField[]) { VMSTATE_UINT32_ARRAY(r, CadenceUARTState, CADENCE_UART_R_MAX), @@ -531,6 +552,8 @@ static const VMStateDescription vmstate_cadence_uart = { VMSTATE_UINT32(tx_count, CadenceUARTState), VMSTATE_UINT32(rx_wpos, CadenceUARTState), VMSTATE_TIMER_PTR(fifo_trigger_handle, CadenceUARTState), + VMSTATE_BOOL_V(powered, DeviceState, 3), + VMSTATE_BOOL_V(clocked, DeviceState, 3), VMSTATE_END_OF_LIST() } }; From patchwork Fri Jul 27 14:37:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Hedde X-Patchwork-Id: 10547263 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 36B34112B for ; Fri, 27 Jul 2018 14:39:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2654E2BDCE for ; Fri, 27 Jul 2018 14:39:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1AD972BDD8; Fri, 27 Jul 2018 14:39:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 95D8E2BDCE for ; Fri, 27 Jul 2018 14:39:31 +0000 (UTC) Received: from localhost ([::1]:41598 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3ty-0004RP-QK for patchwork-qemu-devel@patchwork.kernel.org; Fri, 27 Jul 2018 10:39:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34370) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3sH-0003FD-R3 for qemu-devel@nongnu.org; Fri, 27 Jul 2018 10:37:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fj3sG-0008Ii-Mm for qemu-devel@nongnu.org; Fri, 27 Jul 2018 10:37:45 -0400 Received: from greensocs.com ([193.104.36.180]:50635) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3sC-0008Ds-8z; Fri, 27 Jul 2018 10:37:40 -0400 Received: from localhost (localhost [127.0.0.1]) by greensocs.com (Postfix) with ESMTP id 89B63443552; Fri, 27 Jul 2018 16:37:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702252; bh=OCks8lWEHQrMx7BDLkkH3U8NABen5kUobqryDET58Pk=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=SlvREz96J3eGu0J53zSUVOmF6MG+kMruZOyp6QFAoQydwa+OG8RN/XrnVLVejrBmX kcjuxh5VJmD+KfEqKgzheDwYVt6vHjTIJW3/vbrEl6UVCA+6lH/01Jl0mdToXoT8Cs cUAWfNJoQSKR4Y1TeoN5Lja+5VxEyX5xO6eppEhg= X-Virus-Scanned: amavisd-new at greensocs.com Authentication-Results: gs-01.greensocs.com (amavisd-new); dkim=pass (1024-bit key) header.d=greensocs.com header.b=2ypbAFVA; dkim=pass (1024-bit key) header.d=greensocs.com header.b=2ypbAFVA Received: from greensocs.com ([127.0.0.1]) by localhost (gs-01.greensocs.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id t87wm-J9GX67; Fri, 27 Jul 2018 16:37:31 +0200 (CEST) Received: by greensocs.com (Postfix, from userid 998) id B6A784434A4; Fri, 27 Jul 2018 16:37:31 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702251; bh=OCks8lWEHQrMx7BDLkkH3U8NABen5kUobqryDET58Pk=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=2ypbAFVAMnIrBd/57IUj3OD7egi2rAslQnEnl0UFOPk/viD2CdxFj3lkK0snEJ1uH AR6dVGEd3UjvdSqW5hZVG7IlN8pQJdbqAPGGMmumGUYhXE/N1K26rCropihnCRny8w 9Lnh0QqnPEy0VnL5+LPivKNBLU8gE0p1OJUiQxNE= Received: from kouign-amann.hive.antfield.fr (antfield.tima.u-ga.fr [147.171.129.253]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: damien.hedde@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id 470F6443548; Fri, 27 Jul 2018 16:37:31 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702251; bh=OCks8lWEHQrMx7BDLkkH3U8NABen5kUobqryDET58Pk=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=2ypbAFVAMnIrBd/57IUj3OD7egi2rAslQnEnl0UFOPk/viD2CdxFj3lkK0snEJ1uH AR6dVGEd3UjvdSqW5hZVG7IlN8pQJdbqAPGGMmumGUYhXE/N1K26rCropihnCRny8w 9Lnh0QqnPEy0VnL5+LPivKNBLU8gE0p1OJUiQxNE= From: Damien Hedde To: qemu-devel@nongnu.org Date: Fri, 27 Jul 2018 16:37:24 +0200 Message-Id: <172aa4f0544c31a22603c783a836aef3c29d564e.1532701430.git.damien.hedde@greensocs.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [RFC PATCH 5/6] zynq_slcr: add uart clock gating and soft reset support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, alistair@alistair23.me, mark.burton@greensocs.com, saipava@xilinx.com, qemu-arm@nongnu.org, Damien Hedde , pbonzini@redhat.com, luc.michel@greensocs.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Clock gating and reset of uart0 and uart1 is controlled by UART_CLK_CTRL and UART_RST_CTRL. Uart0 and uart1 links are kept in properties to allow taking action. The CLKACT bit in UART_CLK_CTRL is used to driver the clock gating. In order to implement the reset behavior, which can be hold: when reset is asserted, device_reset is called on the uart and the clock is also disabled until reset is deasserted. Signed-off-by: Damien Hedde --- hw/misc/zynq_slcr.c | 63 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c index d6bdd027ef..55dd586066 100644 --- a/hw/misc/zynq_slcr.c +++ b/hw/misc/zynq_slcr.c @@ -168,6 +168,14 @@ enum { #define DDRIOB_LENGTH 14 }; +enum { + UART_CLK_CTRL_CLKACT0 = 0x0001, + UART_CLK_CTRL_CLKACT1 = 0x0002, + + UART_RST_CTRL_UART0_REF_RST = 0x04, + UART_RST_CTRL_UART1_REF_RST = 0x08, +}; + #define ZYNQ_SLCR_MMIO_SIZE 0x1000 #define ZYNQ_SLCR_NUM_REGS (ZYNQ_SLCR_MMIO_SIZE / 4) @@ -180,6 +188,9 @@ typedef struct ZynqSLCRState { MemoryRegion iomem; uint32_t regs[ZYNQ_SLCR_NUM_REGS]; + + DeviceState *uart0; + DeviceState *uart1; } ZynqSLCRState; static void zynq_slcr_reset(DeviceState *d) @@ -355,6 +366,35 @@ static uint64_t zynq_slcr_read(void *opaque, hwaddr offset, return ret; } +/* + * zynq_slcr_update_clock: + * Update a device clock state given its: + * + clock enable bit + * + reset asserted bit + * Since reset cannot be enabled and disabled, the clock is disabled when + * reset is asserted + */ +static void zynq_slcr_update_clock(DeviceState *dev, bool clken, bool rsten) +{ + if (dev) { + device_set_clock(dev, clken && !rsten); + } +} + +/* + * zynq_slcr_update_reset: + * Update a device reset state given its: + * + reset asserted bit + * Also trigger a clock update + */ +static void zynq_slcr_update_reset(DeviceState *dev, bool clken, bool rsten) +{ + if (dev && rsten) { + device_reset(dev); + } + zynq_slcr_update_clock(dev, clken, rsten); +} + static void zynq_slcr_write(void *opaque, hwaddr offset, uint64_t val, unsigned size) { @@ -408,6 +448,22 @@ static void zynq_slcr_write(void *opaque, hwaddr offset, qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); } break; + case UART_CLK_CTRL: + zynq_slcr_update_clock(s->uart0, + s->regs[UART_CLK_CTRL] & UART_CLK_CTRL_CLKACT0, + s->regs[UART_RST_CTRL] & UART_RST_CTRL_UART0_REF_RST); + zynq_slcr_update_clock(s->uart1, + s->regs[UART_CLK_CTRL] & UART_CLK_CTRL_CLKACT1, + s->regs[UART_RST_CTRL] & UART_RST_CTRL_UART1_REF_RST); + break; + case UART_RST_CTRL: + zynq_slcr_update_reset(s->uart0, + s->regs[UART_CLK_CTRL] & UART_CLK_CTRL_CLKACT0, + s->regs[UART_RST_CTRL] & UART_RST_CTRL_UART0_REF_RST); + zynq_slcr_update_reset(s->uart1, + s->regs[UART_CLK_CTRL] & UART_CLK_CTRL_CLKACT1, + s->regs[UART_RST_CTRL] & UART_RST_CTRL_UART1_REF_RST); + break; } } @@ -436,12 +492,19 @@ static const VMStateDescription vmstate_zynq_slcr = { } }; +static Property zynq_slcr_properties[] = { + DEFINE_PROP_LINK("uart0", ZynqSLCRState, uart0, TYPE_DEVICE, DeviceState *), + DEFINE_PROP_LINK("uart1", ZynqSLCRState, uart1, TYPE_DEVICE, DeviceState *), + DEFINE_PROP_END_OF_LIST(), +}; + static void zynq_slcr_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->vmsd = &vmstate_zynq_slcr; dc->reset = zynq_slcr_reset; + dc->props = zynq_slcr_properties; } static const TypeInfo zynq_slcr_info = { From patchwork Fri Jul 27 14:37:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Hedde X-Patchwork-Id: 10547259 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 03AA914E0 for ; Fri, 27 Jul 2018 14:39:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E07142BDCE for ; Fri, 27 Jul 2018 14:39:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D33CF2BDD8; Fri, 27 Jul 2018 14:39:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C6BC52BDCE for ; Fri, 27 Jul 2018 14:39:29 +0000 (UTC) Received: from localhost ([::1]:41595 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3tw-0004PS-9c for patchwork-qemu-devel@patchwork.kernel.org; Fri, 27 Jul 2018 10:39:28 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34364) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3sH-0003FA-Lk for qemu-devel@nongnu.org; Fri, 27 Jul 2018 10:37:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fj3sG-0008Iw-PO for qemu-devel@nongnu.org; Fri, 27 Jul 2018 10:37:45 -0400 Received: from greensocs.com ([193.104.36.180]:50634) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fj3sC-0008Du-9K; Fri, 27 Jul 2018 10:37:40 -0400 Received: from localhost (localhost [127.0.0.1]) by greensocs.com (Postfix) with ESMTP id 0B3604434A4; Fri, 27 Jul 2018 16:37:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702253; bh=/EvO9y+yBj8mI+048fwg1NECN+kG+3HyNMtEWLEux5o=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=qq8ENKMQd85HD9VRwawkgCVdSdnhnOdZWuBBMAIjFNg1OzgFftxtA3KOo/9PEqbNC awYzZ8+ioVbZpPkywNDZMTa0hXJW1AmDwnlJmaoGYabDi/GXvNZ/HOsW0F9jEPMIlX nWG9tHw/Lg1b4FzGsQghqms0IQVdjNoqXvE1o2eY= X-Virus-Scanned: amavisd-new at greensocs.com Authentication-Results: gs-01.greensocs.com (amavisd-new); dkim=pass (1024-bit key) header.d=greensocs.com header.b=CZ9gA00W; dkim=pass (1024-bit key) header.d=greensocs.com header.b=CZ9gA00W Received: from greensocs.com ([127.0.0.1]) by localhost (gs-01.greensocs.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id C_Bfm8teoVj3; Fri, 27 Jul 2018 16:37:32 +0200 (CEST) Received: by greensocs.com (Postfix, from userid 998) id 2ED98443548; Fri, 27 Jul 2018 16:37:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702252; bh=/EvO9y+yBj8mI+048fwg1NECN+kG+3HyNMtEWLEux5o=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=CZ9gA00WmYpoj1VakN32ttCPdiKYPStvS7eHotI0LFF4yMowdlHlASUGfX5nkUG9o GqfaUk0B7sWLOmGnZs0KbuOxdry4eZVlnhnY+3xHgYuOpt/RsbDGjKV0+fORNhAqi1 2WPVfPnE+Bh+JFcOXyJOHBA+nlsy5AXwM6rVDRQw= Received: from kouign-amann.hive.antfield.fr (antfield.tima.u-ga.fr [147.171.129.253]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: damien.hedde@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id B6B99443555; Fri, 27 Jul 2018 16:37:31 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1532702252; bh=/EvO9y+yBj8mI+048fwg1NECN+kG+3HyNMtEWLEux5o=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=CZ9gA00WmYpoj1VakN32ttCPdiKYPStvS7eHotI0LFF4yMowdlHlASUGfX5nkUG9o GqfaUk0B7sWLOmGnZs0KbuOxdry4eZVlnhnY+3xHgYuOpt/RsbDGjKV0+fORNhAqi1 2WPVfPnE+Bh+JFcOXyJOHBA+nlsy5AXwM6rVDRQw= From: Damien Hedde To: qemu-devel@nongnu.org Date: Fri, 27 Jul 2018 16:37:25 +0200 Message-Id: X-Mailer: git-send-email 2.18.0 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [RFC PATCH 6/6] xilinx_zynq: add uart clock gating support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, alistair@alistair23.me, mark.burton@greensocs.com, saipava@xilinx.com, qemu-arm@nongnu.org, Damien Hedde , pbonzini@redhat.com, luc.michel@greensocs.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add the link between the clock controller _slcr_ and the two uarts _uart0_ and _uart1_ so that the controller can do the gating. Signed-off-by: Damien Hedde --- hw/arm/xilinx_zynq.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index f1496d2927..2ca2dc32cf 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -166,7 +166,7 @@ static void zynq_init(MachineState *machine) MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *ext_ram = g_new(MemoryRegion, 1); MemoryRegion *ocm_ram = g_new(MemoryRegion, 1); - DeviceState *dev; + DeviceState *dev, *slcr; SysBusDevice *busdev; qemu_irq pic[64]; int n; @@ -212,9 +212,11 @@ static void zynq_init(MachineState *machine) 1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa, 0); - dev = qdev_create(NULL, "xilinx,zynq_slcr"); - qdev_init_nofail(dev); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xF8000000); + /* + * Create slcr, initialization is completed below + * because we have some properties to set + */ + slcr = qdev_create(NULL, "xilinx,zynq_slcr"); dev = qdev_create(NULL, TYPE_A9MPCORE_PRIV); qdev_prop_set_uint32(dev, "num-cpu", 1); @@ -235,8 +237,10 @@ static void zynq_init(MachineState *machine) sysbus_create_simple("xlnx,ps7-usb", 0xE0002000, pic[53-IRQ_OFFSET]); sysbus_create_simple("xlnx,ps7-usb", 0xE0003000, pic[76-IRQ_OFFSET]); - cadence_uart_create(0xE0000000, pic[59 - IRQ_OFFSET], serial_hd(0)); - cadence_uart_create(0xE0001000, pic[82 - IRQ_OFFSET], serial_hd(1)); + dev = cadence_uart_create(0xE0000000, pic[59 - IRQ_OFFSET], serial_hd(0)); + object_property_set_link(OBJECT(slcr), OBJECT(dev), "uart0", &error_abort); + dev = cadence_uart_create(0xE0001000, pic[82 - IRQ_OFFSET], serial_hd(1)); + object_property_set_link(OBJECT(slcr), OBJECT(dev), "uart1", &error_abort); sysbus_create_varargs("cadence_ttc", 0xF8001000, pic[42-IRQ_OFFSET], pic[43-IRQ_OFFSET], pic[44-IRQ_OFFSET], NULL); @@ -246,6 +250,10 @@ static void zynq_init(MachineState *machine) gem_init(&nd_table[0], 0xE000B000, pic[54-IRQ_OFFSET]); gem_init(&nd_table[1], 0xE000C000, pic[77-IRQ_OFFSET]); + /* Complete the slcr initialization */ + qdev_init_nofail(slcr); + sysbus_mmio_map(SYS_BUS_DEVICE(slcr), 0, 0xF8000000); + for (n = 0; n < 2; n++) { int hci_irq = n ? 79 : 56; hwaddr hci_addr = n ? 0xE0101000 : 0xE0100000;