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Mon, 02 Mar 2020 13:50:58 -0800 Received: from xsj-pvapsmtp01 (mailhost.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id 022Lops6009838; Mon, 2 Mar 2020 13:50:51 -0800 Received: from [172.19.2.91] (helo=xsjjollys50.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1j8sxf-0005fm-JR; Mon, 02 Mar 2020 13:50:51 -0800 From: Jolly Shah To: olof@lixom.net, mturquette@baylibre.com, sboyd@kernel.org, michal.simek@xilinx.com, arm@kernel.org, linux-clk@vger.kernel.org Cc: rajanv@xilinx.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rajan Vaja , Jolly Shah Subject: [PATCH v2 1/4] drivers: clk: zynqmp: Limit bestdiv with maxdiv Date: Mon, 2 Mar 2020 13:50:40 -0800 Message-Id: <1583185843-20707-2-git-send-email-jolly.shah@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1583185843-20707-1-git-send-email-jolly.shah@xilinx.com> References: <1583185843-20707-1-git-send-email-jolly.shah@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(4636009)(376002)(136003)(39860400002)(396003)(346002)(199004)(189003)(107886003)(336012)(5660300002)(2906002)(356004)(6666004)(4744005)(316002)(70206006)(44832011)(8936002)(426003)(478600001)(36756003)(9786002)(70586007)(81156014)(81166006)(8676002)(7696005)(186003)(26005)(54906003)(2616005)(4326008);DIR:OUT;SFP:1101;SCL:1;SRVR:DM5PR0201MB3607;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;A:1;MX:1; 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So use minimum of best divider or maximum divider value. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah --- drivers/clk/zynqmp/divider.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c index 973cdf0..7d2cb61 100644 --- a/drivers/clk/zynqmp/divider.c +++ b/drivers/clk/zynqmp/divider.c @@ -198,6 +198,8 @@ static long zynqmp_clk_divider_round_rate(struct clk_hw *hw, if ((clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) && divider->is_frac) bestdiv = rate % *prate ? 1 : bestdiv; + + bestdiv = min_t(u32, bestdiv, divider->max_div); *prate = rate * bestdiv; return rate; From patchwork Mon Mar 2 21:50:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jolly Shah X-Patchwork-Id: 11416447 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 36F8D14E3 for ; Mon, 2 Mar 2020 21:51:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0BC982465E for ; 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Mon, 02 Mar 2020 13:50:51 -0800 From: Jolly Shah To: olof@lixom.net, mturquette@baylibre.com, sboyd@kernel.org, michal.simek@xilinx.com, arm@kernel.org, linux-clk@vger.kernel.org Cc: rajanv@xilinx.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tejas Patel , Jolly Shah Subject: [PATCH v2 2/4] drivers: clk: zynqmp: Fix divider2 calculation Date: Mon, 2 Mar 2020 13:50:41 -0800 Message-Id: <1583185843-20707-3-git-send-email-jolly.shah@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1583185843-20707-1-git-send-email-jolly.shah@xilinx.com> References: <1583185843-20707-1-git-send-email-jolly.shah@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(4636009)(376002)(346002)(396003)(136003)(39860400002)(199004)(189003)(356004)(6666004)(70586007)(2616005)(9786002)(336012)(70206006)(186003)(26005)(7696005)(36756003)(54906003)(426003)(316002)(4326008)(478600001)(5660300002)(8676002)(81156014)(8936002)(107886003)(2906002)(44832011)(81166006);DIR:OUT;SFP:1101;SCL:1;SRVR:BN7PR02MB4241;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;A:1;MX:1; MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 6d327200-cf4c-4da0-210e-08d7bef3cea9 X-MS-TrafficTypeDiagnostic: BN7PR02MB4241: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:6108; X-Forefront-PRVS: 033054F29A X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: CxAmGCosOshgyKEecsb+nsqRkz58GmXC6piMXS6gqvfsEetZ9ntFiBNlaZ+kfIAwBrP40qW5KLRXUCglADNgt1OOpuBJnz3zc02Q9uBzZk13Dz5FrxxrWz1qRKGy4QL82MwlWsdzIYWcgGdEFjfNaNKCtW/o7wROt8WaacQHseM39LwAjpMN7U8NuHlmPjsHl7iWKyrq5DDlMeaiVGgeiXVFZKYasczKTjw+QcWmJL4yp/LSjhdFEFFtYKtQGJu9nYISeuDvasSEnGoq1Yg43d2MTt6D6zJIkLyRAKq7HiAsnD8ioH0TqubehJx/wJtYKAye6Glz9qMS6l10M/swrU+8LQiQP6eLmjshu9O8OFf2EvKd4Yt40Un5OdLj4/hnh4lcZWTThk8phSI4uQ4mZIK6rMdC5eNbLsIRVJ7LXIAjpDpkYer+9F5qj4mmknPF X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2020 21:51:04.7323 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6d327200-cf4c-4da0-210e-08d7bef3cea9 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PR02MB4241 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Tejas Patel zynqmp_get_divider2_val() calculates, divider value of type DIV2 clock, considering best possible combination of DIV1 and DIV2. To find best possible values of DIV1 and DIV2, DIV1's parent rate should be consider and not DIV2's parent rate since it would rate of div1 clock. Consider a below topology, out_clk->div2_clk->div1_clk->fixed_parent where out_clk = (fixed_parent/div1_clk) / div2_clk, so parent clock of div1_clk (i.e. out_clk) should be divided by div1_clk and div2_clk. Existing code divides parent rate of div2_clk's clock instead of div1_clk's parent rate, which is wrong. Fix the same by considering div1's parent clock rate. Fixes: 4ebd92d2e228 ("clk: zynqmp: Fix divider calculation") Signed-off-by: Tejas Patel Signed-off-by: Jolly Shah --- drivers/clk/zynqmp/divider.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c index 7d2cb61..dea3e21 100644 --- a/drivers/clk/zynqmp/divider.c +++ b/drivers/clk/zynqmp/divider.c @@ -112,23 +112,30 @@ static unsigned long zynqmp_clk_divider_recalc_rate(struct clk_hw *hw, static void zynqmp_get_divider2_val(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate, struct zynqmp_clk_divider *divider, int *bestdiv) { int div1; int div2; long error = LONG_MAX; - struct clk_hw *parent_hw = clk_hw_get_parent(hw); - struct zynqmp_clk_divider *pdivider = to_zynqmp_clk_divider(parent_hw); + unsigned long div1_prate; + struct clk_hw *div1_parent_hw; + struct clk_hw *div2_parent_hw = clk_hw_get_parent(hw); + struct zynqmp_clk_divider *pdivider = + to_zynqmp_clk_divider(div2_parent_hw); if (!pdivider) return; + div1_parent_hw = clk_hw_get_parent(div2_parent_hw); + if (!div1_parent_hw) + return; + + div1_prate = clk_hw_get_rate(div1_parent_hw); *bestdiv = 1; for (div1 = 1; div1 <= pdivider->max_div;) { for (div2 = 1; div2 <= divider->max_div;) { - long new_error = ((parent_rate / div1) / div2) - rate; + long new_error = ((div1_prate / div1) / div2) - rate; if (abs(new_error) < abs(error)) { *bestdiv = div2; @@ -193,7 +200,7 @@ static long zynqmp_clk_divider_round_rate(struct clk_hw *hw, */ if (div_type == TYPE_DIV2 && (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) { - zynqmp_get_divider2_val(hw, rate, *prate, divider, &bestdiv); + zynqmp_get_divider2_val(hw, rate, divider, &bestdiv); } if ((clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) && divider->is_frac) From patchwork Mon Mar 2 21:50:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jolly Shah X-Patchwork-Id: 11416449 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A5CD014E3 for ; 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Mon, 02 Mar 2020 13:50:51 -0800 From: Jolly Shah To: olof@lixom.net, mturquette@baylibre.com, sboyd@kernel.org, michal.simek@xilinx.com, arm@kernel.org, linux-clk@vger.kernel.org Cc: rajanv@xilinx.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rajan Vaja , Tejas Patel , Jolly Shah Subject: [PATCH v2 3/4] drivers: clk: zynqmp: Fix invalid clock name queries Date: Mon, 2 Mar 2020 13:50:42 -0800 Message-Id: <1583185843-20707-4-git-send-email-jolly.shah@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1583185843-20707-1-git-send-email-jolly.shah@xilinx.com> References: <1583185843-20707-1-git-send-email-jolly.shah@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(4636009)(136003)(346002)(39860400002)(396003)(376002)(199004)(189003)(107886003)(316002)(478600001)(2616005)(336012)(8936002)(8676002)(81156014)(81166006)(44832011)(36756003)(9786002)(426003)(2906002)(186003)(26005)(6666004)(54906003)(70586007)(5660300002)(4326008)(7696005)(356004)(70206006);DIR:OUT;SFP:1101;SCL:1;SRVR:DM6PR02MB5340;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;A:1;MX:1; MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3c7d54bd-edb9-478b-637c-08d7bef3ce90 X-MS-TrafficTypeDiagnostic: DM6PR02MB5340: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:2201; X-Forefront-PRVS: 033054F29A X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: E0WrAVdh41JsP0iULhWJkTQMqwRu/kj10/+t0Znh+qwxWT0NuVak5YOaYHajLQ9EG6i3weXIRm8pquLuOFpIT6ojRStl7/TwLuba9vnnRVtaaTXnAM/o0mhD9nbl15Z4meGyldl4dN6GKxJgL77Xympt0zXWu4hNYNL1OlcYeBW44AsqN3trHLpWQi5V/Ut4TGJRK/BFDiHGUeas+JMzRqcbyunPnR96OdqnVPUyEd0a3bQE60LVGaQFhAdfWLADy7XNlWdnDR9kp2QOpYjbeVan81jwo2cKdPgpPN4EVdw+NVwXDGjEtrtFtmeHawioYE8/VqHEhsw48Z8cp3Ge8EUnXQpanGQ4xTImuW7eOTyuF3zsk+rm+AhtMxymWIzR8M3hciqJEgQt/eY/OAvF4NynFXZYgH9tHL/fYo1aPB3Dh6rCVpc4vBatLz66zdql X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2020 21:51:04.5862 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3c7d54bd-edb9-478b-637c-08d7bef3ce90 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR02MB5340 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Rajan Vaja The clock driver makes EEMI call to get the name of invalid clk when executing versal_get_clock_info() function. This results in error messages. Added check for validating clock before saving clock attribute and calling zynqmp_pm_clock_get_name() in versal_get_clock_info() function. Signed-off-by: Rajan Vaja Signed-off-by: Tejas Patel Signed-off-by: Jolly Shah --- drivers/clk/zynqmp/clkc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/clk/zynqmp/clkc.c b/drivers/clk/zynqmp/clkc.c index 4dd8413..ff2d229 100644 --- a/drivers/clk/zynqmp/clkc.c +++ b/drivers/clk/zynqmp/clkc.c @@ -667,6 +667,11 @@ static void zynqmp_get_clock_info(void) continue; clock[i].valid = FIELD_GET(CLK_ATTR_VALID, attr.attr[0]); + /* skip query for Invalid clock */ + ret = zynqmp_is_valid_clock(i); + if (ret != CLK_ATTR_VALID) + continue; + clock[i].type = FIELD_GET(CLK_ATTR_TYPE, attr.attr[0]) ? CLK_TYPE_EXTERNAL : CLK_TYPE_OUTPUT; From patchwork Mon Mar 2 21:50:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jolly Shah X-Patchwork-Id: 11416439 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7100414E3 for ; Mon, 2 Mar 2020 21:51:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3CD4B2465D for ; Mon, 2 Mar 2020 21:51:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=xilinx.onmicrosoft.com header.i=@xilinx.onmicrosoft.com header.b="bydHTUIG" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726720AbgCBVvH (ORCPT ); Mon, 2 Mar 2020 16:51:07 -0500 Received: from mail-co1nam11on2077.outbound.protection.outlook.com ([40.107.220.77]:42849 "EHLO NAM11-CO1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725781AbgCBVvH (ORCPT ); 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Mon, 02 Mar 2020 13:50:58 -0800 Received: from xsj-pvapsmtp01 (xsj-smtp1.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id 022Lopoo009844; Mon, 2 Mar 2020 13:50:52 -0800 Received: from [172.19.2.91] (helo=xsjjollys50.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1j8sxf-0005fm-PL; Mon, 02 Mar 2020 13:50:51 -0800 From: Jolly Shah To: olof@lixom.net, mturquette@baylibre.com, sboyd@kernel.org, michal.simek@xilinx.com, arm@kernel.org, linux-clk@vger.kernel.org Cc: rajanv@xilinx.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Quanyang Wang , Tejas Patel , Jolly Shah Subject: [PATCH v2 4/4] drivers: clk: zynqmp: fix memory leak in zynqmp_register_clocks Date: Mon, 2 Mar 2020 13:50:43 -0800 Message-Id: <1583185843-20707-5-git-send-email-jolly.shah@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1583185843-20707-1-git-send-email-jolly.shah@xilinx.com> References: <1583185843-20707-1-git-send-email-jolly.shah@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(4636009)(376002)(346002)(136003)(396003)(39860400002)(199004)(189003)(5660300002)(54906003)(70586007)(186003)(336012)(426003)(26005)(316002)(70206006)(2616005)(356004)(6666004)(4326008)(44832011)(107886003)(8936002)(81166006)(81156014)(8676002)(9786002)(2906002)(7696005)(36756003)(478600001)(505234006);DIR:OUT;SFP:1101;SCL:1;SRVR:DM5PR02MB3702;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;A:1;MX:1; MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: b906819b-7952-403d-c5d3-08d7bef3ce69 X-MS-TrafficTypeDiagnostic: DM5PR02MB3702: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:466; X-Forefront-PRVS: 033054F29A X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 1ovpOR00TZ+sBHoTaATXcuolrFFg7dsiE6R2GokATg0aGrAXBZc4nuXA5tKR4ruSPg/OA0CTnRXyiq4EdxHXq1+N7t8dai3Bzrhqef9PceIlCXRXPRhqD/Ut7lu0Rg2XAyV4YcT19cuTYJRdTMiZQkA8peQ/3NLxZyQ4WySU0kKZjFZE35Mv7bRFAbCbBzRqgv7htnu+8zaWvmGf/fcGCk/xnR11wtM0RII/XuuvzJG8/pzlwiKgGU1STQBidaIuqTIByyICOvHBpjCcm7kuTUgEzTa9x7rrqEPvCfHYdrnWlb+sdywD4W4sQNi6LSdlpMCIt1HnbOq/GF+Bw+J9vy3NJLQA/TOrrDwQhJjk010Gg3DqunA9SKb5sIBn94+AYqQf06Mxm7MGN2Xsj9M9C5Mtb/OIuQM6gKinT/uFn6b+JJIpZf/uXJk713EQE+4qO9KBsrfx5p9XEKqhTv11HtsP1IZBPo2xipo3YcoG+I6hQ4ThR45D/IS2rw+3T8A7 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2020 21:51:04.3851 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b906819b-7952-403d-c5d3-08d7bef3ce69 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR02MB3702 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Quanyang Wang This is detected by kmemleak running on zcu102 board: unreferenced object 0xffffffc877e48180 (size 128): comm "swapper/0", pid 1, jiffies 4294892909 (age 315.436s) hex dump (first 32 bytes): 64 70 5f 76 69 64 65 6f 5f 72 65 66 5f 64 69 76 dp_video_ref_div 31 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1............... backtrace: [<00000000c9be883b>] __kmalloc_track_caller+0x200/0x380 [<00000000f02c3809>] kvasprintf+0x7c/0x100 [<00000000e51dde4d>] kasprintf+0x60/0x80 [<0000000092298b05>] zynqmp_register_clocks+0x29c/0x398 [<00000000faaff182>] zynqmp_clock_probe+0x3cc/0x4c0 [<000000005f5986f0>] platform_drv_probe+0x58/0xa8 [<00000000d5810136>] really_probe+0xd8/0x2a8 [<00000000f5b671be>] driver_probe_device+0x5c/0x100 [<0000000038f91fcf>] __device_attach_driver+0x98/0xb8 [<000000008a3f2ac2>] bus_for_each_drv+0x74/0xd8 [<000000001cb2783d>] __device_attach+0xe0/0x140 [<00000000c268031b>] device_initial_probe+0x24/0x30 [<000000006998de4b>] bus_probe_device+0x9c/0xa8 [<00000000647ae6ff>] device_add+0x3c0/0x610 [<0000000071c14bb8>] of_device_add+0x40/0x50 [<000000004bb5d132>] of_platform_device_create_pdata+0xbc/0x138 This is because that when num_nodes is larger than 1, clk_out is allocated using kasprintf for these nodes but only the last node's clk_out is freed. Signed-off-by: Quanyang Wang Signed-off-by: Michal Simek Signed-off-by: Tejas Patel Signed-off-by: Jolly Shah --- drivers/clk/zynqmp/clkc.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/clk/zynqmp/clkc.c b/drivers/clk/zynqmp/clkc.c index ff2d229..bfc1e7d 100644 --- a/drivers/clk/zynqmp/clkc.c +++ b/drivers/clk/zynqmp/clkc.c @@ -562,7 +562,7 @@ static struct clk_hw *zynqmp_register_clk_topology(int clk_id, char *clk_name, { int j; u32 num_nodes, clk_dev_id; - char *clk_out = NULL; + char *clk_out[MAX_NODES]; struct clock_topology *nodes; struct clk_hw *hw = NULL; @@ -576,16 +576,16 @@ static struct clk_hw *zynqmp_register_clk_topology(int clk_id, char *clk_name, * Intermediate clock names are postfixed with type of clock. */ if (j != (num_nodes - 1)) { - clk_out = kasprintf(GFP_KERNEL, "%s%s", clk_name, + clk_out[j] = kasprintf(GFP_KERNEL, "%s%s", clk_name, clk_type_postfix[nodes[j].type]); } else { - clk_out = kasprintf(GFP_KERNEL, "%s", clk_name); + clk_out[j] = kasprintf(GFP_KERNEL, "%s", clk_name); } if (!clk_topology[nodes[j].type]) continue; - hw = (*clk_topology[nodes[j].type])(clk_out, clk_dev_id, + hw = (*clk_topology[nodes[j].type])(clk_out[j], clk_dev_id, parent_names, num_parents, &nodes[j]); @@ -594,9 +594,12 @@ static struct clk_hw *zynqmp_register_clk_topology(int clk_id, char *clk_name, __func__, clk_dev_id, clk_name, PTR_ERR(hw)); - parent_names[0] = clk_out; + parent_names[0] = clk_out[j]; } - kfree(clk_out); + + for (j = 0; j < num_nodes; j++) + kfree(clk_out[j]); + return hw; }