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Mon, 1 Oct 2018 20:56:36 +0000 From: Leonard Crestez To: Lucas Stach , Lorenzo Pieralisi , Shawn Guo Cc: Fabio Estevam , Stefan Agner , Marek Vasut , Ulf Hansson , dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, kernel@pengutronix.de Subject: [PATCH 1/3] soc: imx: gpc: Increase GPC_CLK_MAX to 7 Date: Mon, 1 Oct 2018 23:56:16 +0300 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [95.76.156.53] X-ClientProxiedBy: HE1P190CA0058.EURP190.PROD.OUTLOOK.COM (2603:10a6:7:52::47) To VI1PR04MB4303.eurprd04.prod.outlook.com (2603:10a6:803:3f::30) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: bcbc27ae-d593-4f8e-7dc8-08d627e06128 X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534165)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:VI1PR04MB4303; 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Signed-off-by: Leonard Crestez --- drivers/soc/imx/gpc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index c1d0ffdac6dd..51cbfe63ec12 100644 --- a/drivers/soc/imx/gpc.c +++ b/drivers/soc/imx/gpc.c @@ -39,11 +39,11 @@ #define GPC_PGC_DISP_SR 0x24c #define GPU_VPU_PUP_REQ BIT(1) #define GPU_VPU_PDN_REQ BIT(0) -#define GPC_CLK_MAX 6 +#define GPC_CLK_MAX 7 #define PGC_DOMAIN_FLAG_NO_PD BIT(0) struct imx_pm_domain { struct generic_pm_domain base; From patchwork Mon Oct 1 20:56:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leonard Crestez X-Patchwork-Id: 10622741 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DEAE813BB for ; Mon, 1 Oct 2018 20:56:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CED342836F for ; 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a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=M5Z5lfXTiW+4bRSBkYYtMeRmSqfTS2wgVljtRSIrkXM=; b=jfxJc2Q/Xk6W8mP98DiqjD20mW9tWKoKZFDHRiMsED4XQmnUBw2iYmM6t7HTYd3Gn4dhzqJtpswcx1NVyIkeOJ/C6QOe6ffgMQ8zfw/E+81mdxSycJKjSB9Hl8+8cwB4frjB42NG1P4ghz1O1/QlQoNK+I1AlwmcbToWQWdWXno= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=leonard.crestez@nxp.com; Received: from localhost.localdomain (95.76.156.53) by VI1PR04MB4303.eurprd04.prod.outlook.com (2603:10a6:803:3f::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1185.25; Mon, 1 Oct 2018 20:56:37 +0000 From: Leonard Crestez To: Lucas Stach , Lorenzo Pieralisi , Shawn Guo Cc: Fabio Estevam , Stefan Agner , Marek Vasut , Ulf Hansson , dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, kernel@pengutronix.de Subject: [PATCH 2/3] PCI: imx: Add multi-pd support Date: Mon, 1 Oct 2018 23:56:17 +0300 Message-Id: <5832128f3b1822839a0f0bbd1cf8313cf586f15f.1538426534.git.leonard.crestez@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [95.76.156.53] X-ClientProxiedBy: HE1P190CA0058.EURP190.PROD.OUTLOOK.COM (2603:10a6:7:52::47) To VI1PR04MB4303.eurprd04.prod.outlook.com (2603:10a6:803:3f::30) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 1a93b8d0-e616-4c42-d2df-08d627e06260 X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534165)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:VI1PR04MB4303; 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The driver needs to handle this by keeping both domain active. This is intended for imx6sx where PCIE is in DISPMIX and PCIE_PHY in it's own domain. Defining the DISPMIX domain requires a way for pcie to keep it active or it will break when displays are off. The power-domains on imx6sx are meant to look like this: power-domains = <&pd_disp>, <&pd_pci>; power-domain-names = "pcie", "pcie_phy"; Signed-off-by: Leonard Crestez Reviewed-by: Ulf Hansson --- drivers/pci/controller/dwc/pci-imx6.c | 48 +++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) Previously sent as RFC: https://lkml.org/lkml/2018/7/24/849 diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index d13dae50dc99..6ba16fd1373c 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -25,10 +25,12 @@ #include #include #include #include #include +#include +#include #include "pcie-designware.h" #define to_imx6_pcie(x) dev_get_drvdata((x)->dev) @@ -56,10 +58,15 @@ struct imx6_pcie { u32 tx_deemph_gen2_6db; u32 tx_swing_full; u32 tx_swing_low; int link_gen; struct regulator *vpcie; + + /* power domain for pcie itself (dispmix) */ + struct device *pd_pcie; + /* power domain for pcie phy */ + struct device *pd_pcie_phy; }; /* Parameters for the waiting for PCIe PHY PLL to lock on i.MX7 */ #define PHY_PLL_LOCK_WAIT_MAX_RETRIES 2000 #define PHY_PLL_LOCK_WAIT_USLEEP_MIN 50 @@ -289,10 +296,47 @@ static int imx6q_pcie_abort_handler(unsigned long addr, } return 1; } +static int imx6_pcie_attach_pd(struct device *dev) +{ + struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); + struct device_link *link; + + /* Do nothing when in a single power domain */ + if (dev->pm_domain) + return 0; + + imx6_pcie->pd_pcie = dev_pm_domain_attach_by_name(dev, "pcie"); + if (IS_ERR(imx6_pcie->pd_pcie)) + return PTR_ERR(imx6_pcie->pd_pcie); + link = device_link_add(dev, imx6_pcie->pd_pcie, + DL_FLAG_STATELESS | + DL_FLAG_PM_RUNTIME | + DL_FLAG_RPM_ACTIVE); + if (IS_ERR(link)) { + dev_err(dev, "Failed to add device_link to pcie pd: %ld\n", PTR_ERR(link)); + return PTR_ERR(link); + } + + imx6_pcie->pd_pcie_phy = dev_pm_domain_attach_by_name(dev, "pcie_phy"); + if (IS_ERR(imx6_pcie->pd_pcie_phy)) + return PTR_ERR(imx6_pcie->pd_pcie_phy); + + device_link_add(dev, imx6_pcie->pd_pcie_phy, + DL_FLAG_STATELESS | + DL_FLAG_PM_RUNTIME | + DL_FLAG_RPM_ACTIVE); + if (IS_ERR(link)) { + dev_err(dev, "Failed to add device_link to pcie_phy pd: %ld\n", PTR_ERR(link)); + return PTR_ERR(link); + } + + return 0; +} + static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) { struct device *dev = imx6_pcie->pci->dev; switch (imx6_pcie->variant) { @@ -959,10 +1003,14 @@ static int imx6_pcie_probe(struct platform_device *pdev) imx6_pcie->vpcie = NULL; } platform_set_drvdata(pdev, imx6_pcie); + ret = imx6_pcie_attach_pd(dev); + if (ret) + return ret; + ret = imx6_add_pcie_port(imx6_pcie, pdev); if (ret < 0) return ret; return 0; From patchwork Mon Oct 1 20:56:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leonard Crestez X-Patchwork-Id: 10622751 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3CE8E175A for ; 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Mon, 1 Oct 2018 23:36:45 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ymB5PaIzpYK0nwzhnzpVodOjLoOtudQBTHMNfisUjmU=; b=clEwHx/RA0ATO3RUYi8Wrgk3XvseShlykPp9H1bGjsOKzkSWxgCChppKYiwkt+O669xsN5HGwl15voq3ct+xY/mrc1JVATmNMZEk+16KDiyUaSXUebF0WkzTIsp6/IRjpfRQjSPxrjT8cN54rB/yTVbvB1WxdwsF80HP1dxoqbU= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=leonard.crestez@nxp.com; Received: from localhost.localdomain (95.76.156.53) by VI1PR04MB4303.eurprd04.prod.outlook.com (2603:10a6:803:3f::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1185.25; Mon, 1 Oct 2018 20:56:39 +0000 From: Leonard Crestez To: Lucas Stach , Lorenzo Pieralisi , Shawn Guo Cc: Fabio Estevam , Stefan Agner , Marek Vasut , Ulf Hansson , dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, kernel@pengutronix.de Subject: [PATCH 3/3] ARM: dts: imx6sx: Add DISPLAY power domain support Date: Mon, 1 Oct 2018 23:56:18 +0300 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [95.76.156.53] X-ClientProxiedBy: HE1P190CA0058.EURP190.PROD.OUTLOOK.COM (2603:10a6:7:52::47) To VI1PR04MB4303.eurprd04.prod.outlook.com (2603:10a6:803:3f::30) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 4d730324-33e9-4bec-505b-08d627e06381 X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534165)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:VI1PR04MB4303; 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This makes it always on. From reference manual in section "10.4.1.4.1 Power Distribution": "Display domain - The DISPLAY domain contains GIS, CSI, PXP, LCDIF, PCIe, DCIC, and LDB. It is supplied by internal regulator." The current pd_pcie is actually only for PCIE_PHY, the PCIE ip block is actually inside the DISPLAY domain. Handle this by adding the pcie node in both power domains. Signed-off-by: Leonard Crestez --- arch/arm/boot/dts/imx6sx.dtsi | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 844caa39364f..054d812bcdbc 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -778,10 +778,22 @@ #power-domain-cells = <0>; power-supply = <®_soc>; clocks = <&clks IMX6SX_CLK_GPU>; }; + pd_disp: power-domain@2 { + reg = <2>; + #power-domain-cells = <0>; + clocks = <&clks IMX6SX_CLK_PXP_AXI>, + <&clks IMX6SX_CLK_DISPLAY_AXI>, + <&clks IMX6SX_CLK_LCDIF1_PIX>, + <&clks IMX6SX_CLK_LCDIF_APB>, + <&clks IMX6SX_CLK_LCDIF2_PIX>, + <&clks IMX6SX_CLK_CSI>, + <&clks IMX6SX_CLK_VADC>; + }; + pd_pci: power-domain@3 { reg = <3>; #power-domain-cells = <0>; power-supply = <®_pcie>; }; @@ -1196,10 +1208,11 @@ reg = <0x02218000 0x4000>; interrupts = ; clocks = <&clks IMX6SX_CLK_PXP_AXI>, <&clks IMX6SX_CLK_DISPLAY_AXI>; clock-names = "pxp-axi", "disp-axi"; + power-domains = <&pd_disp>; status = "disabled"; }; csi2: csi@221c000 { reg = <0x0221c000 0x4000>; @@ -1217,10 +1230,11 @@ interrupts = ; clocks = <&clks IMX6SX_CLK_LCDIF1_PIX>, <&clks IMX6SX_CLK_LCDIF_APB>, <&clks IMX6SX_CLK_DISPLAY_AXI>; clock-names = "pix", "axi", "disp_axi"; + power-domains = <&pd_disp>; status = "disabled"; }; lcdif2: lcdif@2224000 { compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif"; @@ -1228,19 +1242,21 @@ interrupts = ; clocks = <&clks IMX6SX_CLK_LCDIF2_PIX>, <&clks IMX6SX_CLK_LCDIF_APB>, <&clks IMX6SX_CLK_DISPLAY_AXI>; clock-names = "pix", "axi", "disp_axi"; + power-domains = <&pd_disp>; status = "disabled"; }; vadc: vadc@2228000 { reg = <0x02228000 0x4000>, <0x0222c000 0x4000>; reg-names = "vadc-vafe", "vadc-vdec"; clocks = <&clks IMX6SX_CLK_VADC>, <&clks IMX6SX_CLK_CSI>; clock-names = "vadc", "csi"; + power-domains = <&pd_disp>; status = "disabled"; }; }; adc1: adc@2280000 { @@ -1361,10 +1377,11 @@ clocks = <&clks IMX6SX_CLK_PCIE_AXI>, <&clks IMX6SX_CLK_LVDS1_OUT>, <&clks IMX6SX_CLK_PCIE_REF_125M>, <&clks IMX6SX_CLK_DISPLAY_AXI>; clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi"; - power-domains = <&pd_pci>; + power-domains = <&pd_disp>, <&pd_pci>; + power-domain-names = "pcie", "pcie_phy"; status = "disabled"; }; }; };