From patchwork Wed Mar 11 12:44:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 11431609 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DE57F1580 for ; Wed, 11 Mar 2020 12:46:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BD853222C3 for ; Wed, 11 Mar 2020 12:46:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="v/Zaf60v" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729461AbgCKMq7 (ORCPT ); Wed, 11 Mar 2020 08:46:59 -0400 Received: from mail-wm1-f44.google.com ([209.85.128.44]:53916 "EHLO mail-wm1-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729450AbgCKMq6 (ORCPT ); Wed, 11 Mar 2020 08:46:58 -0400 Received: by mail-wm1-f44.google.com with SMTP id 25so1932398wmk.3 for ; Wed, 11 Mar 2020 05:46:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3krMYkJ5TguiyRWERa/+CMYLcOJYUhlPd6t/ch8qqgQ=; b=v/Zaf60vUqEkNfZdt1gJK9VC+hb3PZmmanEVWPvFm7vnZBA5ZwW1m4ZykGbhtwPbxS WDb8SaSMRfYNq9MWw8D64WiMIUDABRqX0BpAT4ePCPBmBilmDeqovdmyjQQbeeinzjT3 dU7ZYFiTiptVbhWvRNSSwkbXuMm85b7zo3+WewNnxbyUAgpAYg6IacX7b8dZIsVjmoPL ljKaqQwgtRwTqJbizGpaPcYht4A3xsbwTlrPglZUOAUbUiWXn8f1kPSnUL4oTeXCwx5a HVG7oETbPqToLR4mHqQQfeuOcp3PJuFsthzK2H6yoTG+E5ivLt3KD6d/PuIk6kKoxhmV ptdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3krMYkJ5TguiyRWERa/+CMYLcOJYUhlPd6t/ch8qqgQ=; b=oAKZ2gGBmW2d/+0NDaRcmi+zBu12lZa7oz6HQdDt6qtPK19s7lY1pvBvU6T4Dr1EBV mhffuXvYuk4uyABfzeLkHQ3MkKeTT4ZUYUdevduqMYpUgk7+XPA6xFDrxKt8XgIum3/7 xeZXtoH+ZRO2AM2kvQzOf6Fwm/NWEybkGOwzm5PNfEPczJznWKdHRqz3ewGZizRiekU7 E6SG/b5s/ufe/4ZwOOMwNsND2XjYCXb1fpaotiVg7Plg4aCdSmqv1beoqBVblR9DxoZJ oMpLs6TiAMy26gvRrEllsJWqJK5Ny+vZJlf6/3vySjDGniUaiGAYW31PZqzZ/9a5FeB6 DTrw== X-Gm-Message-State: ANhLgQ1OB+zVvyGmWXSTFC0F1eh9PlvoLCqtJtQZKkMCfz3HrlHXRmwC KychP9BF8YvvceGqdKhD6iUBQw== X-Google-Smtp-Source: ADFU+vt+OuMwfLSUXiB+t1SNAG3tC3rRy29ica+E537TLkfPGDuXQo1KUhGf31RO2GY8IfyREARQ2w== X-Received: by 2002:a1c:c3c3:: with SMTP id t186mr3842975wmf.118.1583930815804; Wed, 11 Mar 2020 05:46:55 -0700 (PDT) Received: from localhost.localdomain ([2001:171b:c9a8:fbc0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id c2sm8380020wma.39.2020.03.11.05.46.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Mar 2020 05:46:55 -0700 (PDT) From: Jean-Philippe Brucker To: bhelgaas@google.com, will@kernel.org, robh+dt@kernel.org, joro@8bytes.org, baolu.lu@linux.intel.com, sudeep.holla@arm.com, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org Cc: lorenzo.pieralisi@arm.com, corbet@lwn.net, mark.rutland@arm.com, liviu.dudau@arm.com, guohanjun@huawei.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, dwmw2@infradead.org, amurray@thegoodpenguin.co.uk, frowand.list@gmail.com, Jean-Philippe Brucker , Rob Herring Subject: [PATCH v2 01/11] dt-bindings: PCI: generic: Add ats-supported property Date: Wed, 11 Mar 2020 13:44:56 +0100 Message-Id: <20200311124506.208376-2-jean-philippe@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200311124506.208376-1-jean-philippe@linaro.org> References: <20200311124506.208376-1-jean-philippe@linaro.org> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add a way for firmware to tell the OS that ATS is supported by the PCI root complex. An endpoint with ATS enabled may send Translation Requests and Translated Memory Requests, which look just like Normal Memory Requests with a non-zero AT field. So a root controller that ignores the AT field may simply forward the request to the IOMMU as a Normal Memory Request, which could end badly. In any case, the endpoint will be unusable. The ats-supported property allows the OS to only enable ATS in endpoints if the root controller can handle ATS requests. Only add the property to pcie-host-ecam-generic for the moment. For non-generic root controllers, availability of ATS can be inferred from the compatible string. Reviewed-by: Rob Herring Signed-off-by: Jean-Philippe Brucker --- Documentation/devicetree/bindings/pci/host-generic-pci.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml index 47353d0cd394..7d40edd7f1ef 100644 --- a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml +++ b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml @@ -107,6 +107,12 @@ properties: dma-coherent: true + ats-supported: + description: + Indicates that a PCIe host controller supports ATS, and can handle Memory + Requests with Address Type (AT). + type: boolean + required: - compatible - reg From patchwork Wed Mar 11 12:44:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 11431615 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 720E71874 for ; Wed, 11 Mar 2020 12:47:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 50E99222C3 for ; Wed, 11 Mar 2020 12:47:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="R8RuT72W" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729469AbgCKMrA (ORCPT ); Wed, 11 Mar 2020 08:47:00 -0400 Received: from mail-wr1-f68.google.com ([209.85.221.68]:33528 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729457AbgCKMq6 (ORCPT ); Wed, 11 Mar 2020 08:46:58 -0400 Received: by mail-wr1-f68.google.com with SMTP id a25so2460955wrd.0 for ; Wed, 11 Mar 2020 05:46:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=N4gyYG6pd1qHC2GjZUAc/a5emn2edBGVA7chcRhvAO8=; b=R8RuT72WL1I4haJ6qD2A19NADfHGGL4h8E65a5bB32JeKEnVO9JbfE6y04C41FHnLL AiH3yxrWmV4b4ouGsgZnYDvH6JyHDntuFb3/9DvYzPs3xRWl9CkmzwGARwuOAyD3ENG8 ExLs4O2EfRkqOxjujXUUTbIjhiAylBxQ8ybvym8Qyo1jwtRGcka/n1mIYt++nCi7pTJf r7VZnDbXLgsvy6IWe8+Hwi6VVKzu0VjNNczUmct/KxpEmMqWQtjtAeb2DhsSv3KYbkPr VSYMt4h9O6gpK0lYTWS8aMFDJFwbWDK7v4kkJazCh6yUcurLTvS7ONepD43137VO3oBz gmyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=N4gyYG6pd1qHC2GjZUAc/a5emn2edBGVA7chcRhvAO8=; b=HUAvZTneLIkn7mUQmHwUVwEXqsOgA/qjonTT2QEutLeZUXsFuBc6IkjEQbksTIaw+b bHGdAuengCu7rmEyvEwFE11cQpgWIkpGFEfaWgEzEO0zr4+htKVWho1Z+OuDTyb70+h7 y6aw9dMgXH0VnAOtxBSwLcERyS2+AtATLthnSeb24pC+VIsz2S4Z0wnR+/79nRQ0aKVs 0sCU95m1UR0j16y/fM58M+Ld+A2AhLKK9XbkXsV6crkpZ5UdSXPEQP8xpYDvQXi5jeDn qvjB30FUWU0uHqOX25oOopR4t3Yo4aGP5CqQeIfi5gMf/1OswbnFa8BGa0if5NW996ki 1fvw== X-Gm-Message-State: ANhLgQ0zcZ71gzIdWWWQWcvrYR0HPrbeDcCSgtSGvpjSKCtzeuAFFvjy 6TL6N7UVKm0UZZFhw7UYvKSIgQ== X-Google-Smtp-Source: ADFU+vtVplsLJKhJ5k96cjG7bQIJiqMwH6aOvBxLDVX3vK8y4Ou+veGu1hCYgxMQXp8PN1ugVbeDHg== X-Received: by 2002:adf:a555:: with SMTP id j21mr4427467wrb.409.1583930817062; Wed, 11 Mar 2020 05:46:57 -0700 (PDT) Received: from localhost.localdomain ([2001:171b:c9a8:fbc0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id c2sm8380020wma.39.2020.03.11.05.46.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Mar 2020 05:46:56 -0700 (PDT) From: Jean-Philippe Brucker To: bhelgaas@google.com, will@kernel.org, robh+dt@kernel.org, joro@8bytes.org, baolu.lu@linux.intel.com, sudeep.holla@arm.com, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org Cc: lorenzo.pieralisi@arm.com, corbet@lwn.net, mark.rutland@arm.com, liviu.dudau@arm.com, guohanjun@huawei.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, dwmw2@infradead.org, amurray@thegoodpenguin.co.uk, frowand.list@gmail.com, Jean-Philippe Brucker Subject: [PATCH v2 02/11] PCI: Add ats_supported host bridge flag Date: Wed, 11 Mar 2020 13:44:57 +0100 Message-Id: <20200311124506.208376-3-jean-philippe@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200311124506.208376-1-jean-philippe@linaro.org> References: <20200311124506.208376-1-jean-philippe@linaro.org> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Each vendor has their own way of describing whether a host bridge supports ATS. The Intel and AMD ACPI tables selectively enable or disable ATS per device or sub-tree, while Arm has a single bit for each host bridge. For those that need it, add an ats_supported bit to the host bridge structure. Signed-off-by: Jean-Philippe Brucker --- v1->v2: try to improve the comment --- drivers/pci/probe.c | 8 ++++++++ include/linux/pci.h | 1 + 2 files changed, 9 insertions(+) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 512cb4312ddd..b5e36f06b40a 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -598,6 +598,14 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge) bridge->native_shpc_hotplug = 1; bridge->native_pme = 1; bridge->native_ltr = 1; + + /* + * Some systems (ACPI IORT, device-tree) declare ATS support at the host + * bridge, and clear this bit when ATS isn't supported. Others (ACPI + * DMAR and IVRS) declare ATS support with a smaller granularity, and + * need this bit set. + */ + bridge->ats_supported = 1; } struct pci_host_bridge *pci_alloc_host_bridge(size_t priv) diff --git a/include/linux/pci.h b/include/linux/pci.h index 3840a541a9de..9fe2e84d74d7 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -511,6 +511,7 @@ struct pci_host_bridge { unsigned int native_pme:1; /* OS may use PCIe PME */ unsigned int native_ltr:1; /* OS may use PCIe LTR */ unsigned int preserve_config:1; /* Preserve FW resource setup */ + unsigned int ats_supported:1; /* Resource alignment requirements */ resource_size_t (*align_resource)(struct pci_dev *dev, From patchwork Wed Mar 11 12:44:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 11431619 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1B04B1580 for ; Wed, 11 Mar 2020 12:47:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EDDCB22464 for ; Wed, 11 Mar 2020 12:47:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="d0OldcPY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729457AbgCKMrA (ORCPT ); Wed, 11 Mar 2020 08:47:00 -0400 Received: from mail-wm1-f67.google.com ([209.85.128.67]:37587 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729460AbgCKMrA (ORCPT ); Wed, 11 Mar 2020 08:47:00 -0400 Received: by mail-wm1-f67.google.com with SMTP id a141so1973045wme.2 for ; Wed, 11 Mar 2020 05:46:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=d7fzzw/5lEfLgru+68iO/J8krazqjJjWjKm9fH3TH5I=; b=d0OldcPYPTwC6lUxav+jf6KB+UcGBjwxPVFVLOS8P+DRcf4Nq9+Cgk3ER62YCupyKO n63Plm+lXXP1tDCSs66zuHCHs/M9n6CcfUD83j6S1A3sgTchEZWf/GNdy1+Sg6PJsXx7 v6vVCuz7+yMQ9U+jeSTzabfnBGdgbxAl7+8p5eiV0vMWAbcwpvxqhcw3kVlpD7RcuEis e5lM+BenuFHNorZQvoPD0B0I5/lix/gZ+JhB+tlQQjDMmJ4sZt8Pupm67tdBc4wFY0mf EgB/VSPg8NrV9V5qGawXDH19VqniDfIEy7gvlpILkFxSAN86lG2R7fZNu+SKWuDilrZc hdmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=d7fzzw/5lEfLgru+68iO/J8krazqjJjWjKm9fH3TH5I=; b=BqMnYN2abfk3d3rxmePpqOa7ytIZkFCL32Lzx4T9F9ijl9jsYzs5PTftBiZCeYcqtw /ttoH3YXVCrp0/vqhLfQbriDwc4vVH6Z/Jm64+U8MLU+THe/0fRftRRb+LEL9LZ/X7qs FBk5oxxKlkpcbBG5YAPVIBgHRut1a7zFgho+Wlr4sbKg9jxoxYGQqKiH4M8tiPNgVvxU JYUlPI7+MCgbGvYCFd2Do3N0D0HMNniwb8sPlqjkeIoDPQhoL4ecKAra+ALJYwVtx2KF 6kVJNWWligd3sBW3mA0ffnKv6ezXyazX2QuuUiQBJvXX6C/U2lsfOEIVv+u/VJdqtO0c Zd6g== X-Gm-Message-State: ANhLgQ3TAMdHbbc2Elto4vQOZgMgiN9+A7mCB2D2t40L5xp7FQM2MA7Q /VTWJyMV7EJo3pIJcNHSHNPGPA== X-Google-Smtp-Source: ADFU+vtrrbz3xW1uwROP0nlDBlOyziir6FkZYgi3Shk3F4IjgLnSc2vkzPiEnYQH9VQXQDGBOwBJWg== X-Received: by 2002:a1c:7e08:: with SMTP id z8mr3550520wmc.166.1583930818310; Wed, 11 Mar 2020 05:46:58 -0700 (PDT) Received: from localhost.localdomain ([2001:171b:c9a8:fbc0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id c2sm8380020wma.39.2020.03.11.05.46.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Mar 2020 05:46:57 -0700 (PDT) From: Jean-Philippe Brucker To: bhelgaas@google.com, will@kernel.org, robh+dt@kernel.org, joro@8bytes.org, baolu.lu@linux.intel.com, sudeep.holla@arm.com, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org Cc: lorenzo.pieralisi@arm.com, corbet@lwn.net, mark.rutland@arm.com, liviu.dudau@arm.com, guohanjun@huawei.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, dwmw2@infradead.org, amurray@thegoodpenguin.co.uk, frowand.list@gmail.com, Jean-Philippe Brucker Subject: [PATCH v2 03/11] PCI: OF: Check whether the host bridge supports ATS Date: Wed, 11 Mar 2020 13:44:58 +0100 Message-Id: <20200311124506.208376-4-jean-philippe@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200311124506.208376-1-jean-philippe@linaro.org> References: <20200311124506.208376-1-jean-philippe@linaro.org> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org When setting up a generic host on a device-tree based system, copy the ats-supported flag into the pci_host_bridge structure. Signed-off-by: Jean-Philippe Brucker Acked-by: Bjorn Helgaas --- v1->v2: keep the helper in pci-host-common.c --- drivers/pci/controller/pci-host-common.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/pci/controller/pci-host-common.c b/drivers/pci/controller/pci-host-common.c index 250a3fc80ec6..2e800bc6ae7a 100644 --- a/drivers/pci/controller/pci-host-common.c +++ b/drivers/pci/controller/pci-host-common.c @@ -54,6 +54,16 @@ static struct pci_config_window *gen_pci_init(struct device *dev, return ERR_PTR(err); } +static void of_pci_host_check_ats(struct pci_host_bridge *bridge) +{ + struct device_node *np = bridge->bus->dev.of_node; + + if (!np) + return; + + bridge->ats_supported = of_property_read_bool(np, "ats-supported"); +} + int pci_host_common_probe(struct platform_device *pdev, struct pci_ecam_ops *ops) { @@ -92,6 +102,7 @@ int pci_host_common_probe(struct platform_device *pdev, return ret; } + of_pci_host_check_ats(bridge); platform_set_drvdata(pdev, bridge->bus); return 0; } From patchwork Wed Mar 11 12:44:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 11431625 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6C1B418E8 for ; Wed, 11 Mar 2020 12:47:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4BA01222D9 for ; Wed, 11 Mar 2020 12:47:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="PaFI7USc" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729475AbgCKMrC (ORCPT ); Wed, 11 Mar 2020 08:47:02 -0400 Received: from mail-wm1-f65.google.com ([209.85.128.65]:53827 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729459AbgCKMrB (ORCPT ); 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Wed, 11 Mar 2020 05:46:59 -0700 (PDT) Received: from localhost.localdomain ([2001:171b:c9a8:fbc0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id c2sm8380020wma.39.2020.03.11.05.46.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Mar 2020 05:46:59 -0700 (PDT) From: Jean-Philippe Brucker To: bhelgaas@google.com, will@kernel.org, robh+dt@kernel.org, joro@8bytes.org, baolu.lu@linux.intel.com, sudeep.holla@arm.com, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org Cc: lorenzo.pieralisi@arm.com, corbet@lwn.net, mark.rutland@arm.com, liviu.dudau@arm.com, guohanjun@huawei.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, dwmw2@infradead.org, amurray@thegoodpenguin.co.uk, frowand.list@gmail.com, Jean-Philippe Brucker Subject: [PATCH v2 04/11] ACPI/IORT: Check ATS capability in root complex node Date: Wed, 11 Mar 2020 13:44:59 +0100 Message-Id: <20200311124506.208376-5-jean-philippe@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200311124506.208376-1-jean-philippe@linaro.org> References: <20200311124506.208376-1-jean-philippe@linaro.org> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org When initializing a PCI root bridge, copy its "ATS supported" attribute into the root bridge. Acked-by: Hanjun Guo Signed-off-by: Jean-Philippe Brucker --- drivers/acpi/arm64/iort.c | 27 +++++++++++++++++++++++++++ drivers/acpi/pci_root.c | 3 +++ include/linux/acpi_iort.h | 8 ++++++++ 3 files changed, 38 insertions(+) diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c index ed3d2d1a7ae9..d99d7f5b51e1 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -1633,6 +1633,33 @@ static void __init iort_enable_acs(struct acpi_iort_node *iort_node) } } } + +static acpi_status iort_match_host_bridge_callback(struct acpi_iort_node *node, + void *context) +{ + struct acpi_iort_root_complex *pci_rc; + struct pci_host_bridge *host_bridge = context; + + pci_rc = (struct acpi_iort_root_complex *)node->node_data; + + return pci_domain_nr(host_bridge->bus) == pci_rc->pci_segment_number ? + AE_OK : AE_NOT_FOUND; +} + +void iort_pci_host_bridge_setup(struct pci_host_bridge *host_bridge) +{ + struct acpi_iort_node *node; + struct acpi_iort_root_complex *pci_rc; + + node = iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX, + iort_match_host_bridge_callback, host_bridge); + if (!node) + return; + + pci_rc = (struct acpi_iort_root_complex *)node->node_data; + host_bridge->ats_supported = !!(pci_rc->ats_attribute & + ACPI_IORT_ATS_SUPPORTED); +} #else static inline void iort_enable_acs(struct acpi_iort_node *iort_node) { } #endif diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c index d1e666ef3fcc..eb2fb8f17c0b 100644 --- a/drivers/acpi/pci_root.c +++ b/drivers/acpi/pci_root.c @@ -6,6 +6,7 @@ * Copyright (C) 2001, 2002 Paul Diefenbaugh */ +#include #include #include #include @@ -917,6 +918,8 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL)) host_bridge->native_ltr = 0; + iort_pci_host_bridge_setup(host_bridge); + /* * Evaluate the "PCI Boot Configuration" _DSM Function. If it * exists and returns 0, we must preserve any PCI resource diff --git a/include/linux/acpi_iort.h b/include/linux/acpi_iort.h index 8e7e2ec37f1b..7b06871cc3aa 100644 --- a/include/linux/acpi_iort.h +++ b/include/linux/acpi_iort.h @@ -10,6 +10,7 @@ #include #include #include +#include #define IORT_IRQ_MASK(irq) (irq & 0xffffffffULL) #define IORT_IRQ_TRIGGER_MASK(irq) ((irq >> 32) & 0xffffffffULL) @@ -55,4 +56,11 @@ int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head) { return 0; } #endif +#if defined(CONFIG_ACPI_IORT) && defined(CONFIG_PCI) +void iort_pci_host_bridge_setup(struct pci_host_bridge *host_bridge); +#else +static inline +void iort_pci_host_bridge_setup(struct pci_host_bridge *host_bridge) { } +#endif + #endif /* __ACPI_IORT_H__ */ From patchwork Wed Mar 11 12:45:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 11431627 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E66051580 for ; Wed, 11 Mar 2020 12:47:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C5A6722522 for ; Wed, 11 Mar 2020 12:47:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="MjFUpxHp" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729471AbgCKMrD (ORCPT ); Wed, 11 Mar 2020 08:47:03 -0400 Received: from mail-wm1-f67.google.com ([209.85.128.67]:55544 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729453AbgCKMrC (ORCPT ); Wed, 11 Mar 2020 08:47:02 -0400 Received: by mail-wm1-f67.google.com with SMTP id 6so1931644wmi.5 for ; Wed, 11 Mar 2020 05:47:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=b6OCZpMX/zgjbiuYOZTv/yFn5g+Ml1pLP7pmNaB6uOk=; b=MjFUpxHpBskH8AZCa8gyvEeUFGWD8nE+I7Ccpw5x/EXEZNlkDfyhMtLIM9pIzDpMVv yv0WXrEyAyadtJ8laExtvI33SAK/Yj/XjyQUF33QkNa3LaJWSWjjXypqpRKmE99YyjLb Kzy38i8AKYH4slxDJSkaJhQqvJ0EyrgpZHy986v4LgMtDJY23CAifDPwM90WBTpJll1C aCNKlrXt1hD1ylm12EIODmL0J+kS46opQN5Wu90Eqk0d9OEv7vwJtW1G2hoWdmN9jEBN PsbTfgKubpyqXHQuVx5zuV7EXMF/qnMdkHydeM2T9wWjSBiZg5D3b6eUELp4nBntbfqe BObw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=b6OCZpMX/zgjbiuYOZTv/yFn5g+Ml1pLP7pmNaB6uOk=; b=iZXIY/PRER2Ym/rTLwxO4LFhPH69tGyWRvm7C2R0baxME90fO/NGB3neE3vAFgcxDP Kex01+52E+2xu5py8Ndy1sG5bMKxqK5ZlJk6xgfc8i4Hf8h1ih1TQZCHWreEfzVbeGK5 U0ZqG706EGovkenepafwfNY7BqDEct8u/Xvh8Tqbsu8nMxu/xTVP0bgCMIn/QpBvz/q5 giDcqwu0cLZTPAxnm69QRQnQ1W874PYi/qYFhAXhFJZ3EVnDUnTkpmIQEhk9+dOI9Jea AQ2CLMJsD8EC8Ao022ubevfPvxgo+vkiWKGE267OHuLqXrl8rgcqr0w/SCuwT6hi8bFn TLfw== X-Gm-Message-State: ANhLgQ0oj4wTk3J7D4pF2oOlnUlfoBOW0zG0MY2wdtONGiCr8r36spjG h5p5UUYzI1Fwo9mFwFAqkuKyxQ== X-Google-Smtp-Source: ADFU+vtkHVanNQvPFzQ2zU8Odytq9w4wgEuuvipDqHybssyuXsKZkeB4j+7vEMafMywcklgaRLR7SA== X-Received: by 2002:a7b:c414:: with SMTP id k20mr3677774wmi.119.1583930820944; Wed, 11 Mar 2020 05:47:00 -0700 (PDT) Received: from localhost.localdomain ([2001:171b:c9a8:fbc0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id c2sm8380020wma.39.2020.03.11.05.46.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Mar 2020 05:47:00 -0700 (PDT) From: Jean-Philippe Brucker To: bhelgaas@google.com, will@kernel.org, robh+dt@kernel.org, joro@8bytes.org, baolu.lu@linux.intel.com, sudeep.holla@arm.com, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org Cc: lorenzo.pieralisi@arm.com, corbet@lwn.net, mark.rutland@arm.com, liviu.dudau@arm.com, guohanjun@huawei.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, dwmw2@infradead.org, amurray@thegoodpenguin.co.uk, frowand.list@gmail.com, Jean-Philippe Brucker Subject: [PATCH v2 05/11] PCI/ATS: Gather checks into pci_ats_supported() Date: Wed, 11 Mar 2020 13:45:00 +0100 Message-Id: <20200311124506.208376-6-jean-philippe@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200311124506.208376-1-jean-philippe@linaro.org> References: <20200311124506.208376-1-jean-philippe@linaro.org> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org IOMMU drivers need to perform several tests when checking if a device supports ATS. Move them all into a new function that returns true when a device and its host bridge support ATS. Since pci_enable_ats() now calls pci_ats_supported(), the following new checks are now common: * whether a device is trusted. Devices plugged into external-facing ports such as thunderbolt are untrusted. * whether the host bridge supports ATS, which defaults to true unless the firmware description states that ATS isn't supported by the host bridge. Signed-off-by: Jean-Philippe Brucker Acked-by: Bjorn Helgaas --- drivers/pci/ats.c | 30 +++++++++++++++++++++++++++++- include/linux/pci-ats.h | 3 +++ 2 files changed, 32 insertions(+), 1 deletion(-) diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c index 390e92f2d8d1..bbfd0d42b8b9 100644 --- a/drivers/pci/ats.c +++ b/drivers/pci/ats.c @@ -30,6 +30,34 @@ void pci_ats_init(struct pci_dev *dev) dev->ats_cap = pos; } +/** + * pci_ats_supported - check if the device can use ATS + * @dev: the PCI device + * + * Returns true if the device supports ATS and is allowed to use it, false + * otherwise. + */ +bool pci_ats_supported(struct pci_dev *dev) +{ + struct pci_host_bridge *bridge; + + if (!dev->ats_cap) + return false; + + if (dev->untrusted) + return false; + + bridge = pci_find_host_bridge(dev->bus); + if (!bridge) + return false; + + if (!bridge->ats_supported) + return false; + + return true; +} +EXPORT_SYMBOL_GPL(pci_ats_supported); + /** * pci_enable_ats - enable the ATS capability * @dev: the PCI device @@ -42,7 +70,7 @@ int pci_enable_ats(struct pci_dev *dev, int ps) u16 ctrl; struct pci_dev *pdev; - if (!dev->ats_cap) + if (!pci_ats_supported(dev)) return -EINVAL; if (WARN_ON(dev->ats_enabled)) diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h index d08f0869f121..f75c307f346d 100644 --- a/include/linux/pci-ats.h +++ b/include/linux/pci-ats.h @@ -6,11 +6,14 @@ #ifdef CONFIG_PCI_ATS /* Address Translation Service */ +bool pci_ats_supported(struct pci_dev *dev); int pci_enable_ats(struct pci_dev *dev, int ps); void pci_disable_ats(struct pci_dev *dev); int pci_ats_queue_depth(struct pci_dev *dev); int pci_ats_page_aligned(struct pci_dev *dev); #else /* CONFIG_PCI_ATS */ +static inline bool pci_ats_supported(struct pci_dev *d) +{ return false; } static inline int pci_enable_ats(struct pci_dev *d, int ps) { return -ENODEV; } static inline void pci_disable_ats(struct pci_dev *d) { } From patchwork Wed Mar 11 12:45:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 11431633 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A20F8924 for ; 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Wed, 11 Mar 2020 05:47:02 -0700 (PDT) Received: from localhost.localdomain ([2001:171b:c9a8:fbc0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id c2sm8380020wma.39.2020.03.11.05.47.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Mar 2020 05:47:01 -0700 (PDT) From: Jean-Philippe Brucker To: bhelgaas@google.com, will@kernel.org, robh+dt@kernel.org, joro@8bytes.org, baolu.lu@linux.intel.com, sudeep.holla@arm.com, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org Cc: lorenzo.pieralisi@arm.com, corbet@lwn.net, mark.rutland@arm.com, liviu.dudau@arm.com, guohanjun@huawei.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, dwmw2@infradead.org, amurray@thegoodpenguin.co.uk, frowand.list@gmail.com, Jean-Philippe Brucker Subject: [PATCH v2 06/11] iommu/amd: Use pci_ats_supported() Date: Wed, 11 Mar 2020 13:45:01 +0100 Message-Id: <20200311124506.208376-7-jean-philippe@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200311124506.208376-1-jean-philippe@linaro.org> References: <20200311124506.208376-1-jean-philippe@linaro.org> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The pci_ats_supported() function checks if a device supports ATS and is allowed to use it. In addition to checking that the device has an ATS capability and that the global pci=noats is not set (pci_ats_disabled()), it also checks if a device is untrusted (plugged into an external-facing port such as thunderbolt). Signed-off-by: Jean-Philippe Brucker --- drivers/iommu/amd_iommu.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index aac132bd1ef0..084f0b2e132e 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c @@ -291,16 +291,15 @@ static struct iommu_group *acpihid_device_group(struct device *dev) static bool pci_iommuv2_capable(struct pci_dev *pdev) { static const int caps[] = { - PCI_EXT_CAP_ID_ATS, PCI_EXT_CAP_ID_PRI, PCI_EXT_CAP_ID_PASID, }; int i, pos; - if (pci_ats_disabled()) + if (!pci_ats_supported(pdev)) return false; - for (i = 0; i < 3; ++i) { + for (i = 0; i < 2; ++i) { pos = pci_find_ext_capability(pdev, caps[i]); if (pos == 0) return false; @@ -3040,11 +3039,8 @@ int amd_iommu_device_info(struct pci_dev *pdev, memset(info, 0, sizeof(*info)); - if (!pci_ats_disabled()) { - pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ATS); - if (pos) - info->flags |= AMD_IOMMU_DEVICE_FLAG_ATS_SUP; - } + if (pci_ats_supported(pdev)) + info->flags |= AMD_IOMMU_DEVICE_FLAG_ATS_SUP; pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); if (pos) From patchwork Wed Mar 11 12:45:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 11431635 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CC67C1874 for ; Wed, 11 Mar 2020 12:47:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AB7C321D7E for ; Wed, 11 Mar 2020 12:47:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="kGuexoqb" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729485AbgCKMrG (ORCPT ); Wed, 11 Mar 2020 08:47:06 -0400 Received: from mail-wm1-f66.google.com ([209.85.128.66]:51217 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729483AbgCKMrF (ORCPT ); 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Wed, 11 Mar 2020 05:47:03 -0700 (PDT) Received: from localhost.localdomain ([2001:171b:c9a8:fbc0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id c2sm8380020wma.39.2020.03.11.05.47.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Mar 2020 05:47:03 -0700 (PDT) From: Jean-Philippe Brucker To: bhelgaas@google.com, will@kernel.org, robh+dt@kernel.org, joro@8bytes.org, baolu.lu@linux.intel.com, sudeep.holla@arm.com, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org Cc: lorenzo.pieralisi@arm.com, corbet@lwn.net, mark.rutland@arm.com, liviu.dudau@arm.com, guohanjun@huawei.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, dwmw2@infradead.org, amurray@thegoodpenguin.co.uk, frowand.list@gmail.com, Jean-Philippe Brucker Subject: [PATCH v2 07/11] iommu/arm-smmu-v3: Use pci_ats_supported() Date: Wed, 11 Mar 2020 13:45:02 +0100 Message-Id: <20200311124506.208376-8-jean-philippe@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200311124506.208376-1-jean-philippe@linaro.org> References: <20200311124506.208376-1-jean-philippe@linaro.org> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The new pci_ats_supported() function checks if a device supports ATS and is allowed to use it. Signed-off-by: Jean-Philippe Brucker Acked-by: Will Deacon --- drivers/iommu/arm-smmu-v3.c | 18 +++--------------- 1 file changed, 3 insertions(+), 15 deletions(-) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 4f0a38dae6db..87ae31ef35a1 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -2592,26 +2592,14 @@ static void arm_smmu_install_ste_for_dev(struct arm_smmu_master *master) } } -#ifdef CONFIG_PCI_ATS static bool arm_smmu_ats_supported(struct arm_smmu_master *master) { - struct pci_dev *pdev; + struct device *dev = master->dev; struct arm_smmu_device *smmu = master->smmu; - struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(master->dev); - - if (!(smmu->features & ARM_SMMU_FEAT_ATS) || !dev_is_pci(master->dev) || - !(fwspec->flags & IOMMU_FWSPEC_PCI_RC_ATS) || pci_ats_disabled()) - return false; - pdev = to_pci_dev(master->dev); - return !pdev->untrusted && pdev->ats_cap; + return (smmu->features & ARM_SMMU_FEAT_ATS) && dev_is_pci(dev) && + pci_ats_supported(to_pci_dev(dev)); } -#else -static bool arm_smmu_ats_supported(struct arm_smmu_master *master) -{ - return false; -} -#endif static void arm_smmu_enable_ats(struct arm_smmu_master *master) { From patchwork Wed Mar 11 12:45:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 11431643 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2547518E8 for ; Wed, 11 Mar 2020 12:47:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0443621D56 for ; Wed, 11 Mar 2020 12:47:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ncgLdDhr" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729499AbgCKMrJ (ORCPT ); Wed, 11 Mar 2020 08:47:09 -0400 Received: from mail-wm1-f68.google.com ([209.85.128.68]:53846 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729484AbgCKMrI (ORCPT ); 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Wed, 11 Mar 2020 05:47:05 -0700 (PDT) Received: from localhost.localdomain ([2001:171b:c9a8:fbc0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id c2sm8380020wma.39.2020.03.11.05.47.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Mar 2020 05:47:04 -0700 (PDT) From: Jean-Philippe Brucker To: bhelgaas@google.com, will@kernel.org, robh+dt@kernel.org, joro@8bytes.org, baolu.lu@linux.intel.com, sudeep.holla@arm.com, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org Cc: lorenzo.pieralisi@arm.com, corbet@lwn.net, mark.rutland@arm.com, liviu.dudau@arm.com, guohanjun@huawei.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, dwmw2@infradead.org, amurray@thegoodpenguin.co.uk, frowand.list@gmail.com, Jean-Philippe Brucker Subject: [PATCH v2 08/11] iommu/vt-d: Use pci_ats_supported() Date: Wed, 11 Mar 2020 13:45:03 +0100 Message-Id: <20200311124506.208376-9-jean-philippe@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200311124506.208376-1-jean-philippe@linaro.org> References: <20200311124506.208376-1-jean-philippe@linaro.org> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The pci_ats_supported() function checks if a device supports ATS and is allowed to use it. Signed-off-by: Jean-Philippe Brucker Acked-by: Lu Baolu --- drivers/iommu/intel-iommu.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 6fa6de2b6ad5..17208280ef5c 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -1454,8 +1454,7 @@ static void iommu_enable_dev_iotlb(struct device_domain_info *info) !pci_reset_pri(pdev) && !pci_enable_pri(pdev, 32)) info->pri_enabled = 1; #endif - if (!pdev->untrusted && info->ats_supported && - pci_ats_page_aligned(pdev) && + if (info->ats_supported && pci_ats_page_aligned(pdev) && !pci_enable_ats(pdev, VTD_PAGE_SHIFT)) { info->ats_enabled = 1; domain_update_iotlb(info->domain); @@ -2611,10 +2610,8 @@ static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu, if (dev && dev_is_pci(dev)) { struct pci_dev *pdev = to_pci_dev(info->dev); - if (!pdev->untrusted && - !pci_ats_disabled() && - ecap_dev_iotlb_support(iommu->ecap) && - pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ATS) && + if (ecap_dev_iotlb_support(iommu->ecap) && + pci_ats_supported(pdev) && dmar_find_matched_atsr_unit(pdev)) info->ats_supported = 1; From patchwork Wed Mar 11 12:45:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 11431655 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2B1D6924 for ; Wed, 11 Mar 2020 12:47:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0A4F221D7E for ; Wed, 11 Mar 2020 12:47:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="urRlNUx8" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729489AbgCKMrN (ORCPT ); Wed, 11 Mar 2020 08:47:13 -0400 Received: from mail-wm1-f68.google.com ([209.85.128.68]:54399 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729473AbgCKMrJ (ORCPT ); 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Wed, 11 Mar 2020 05:47:06 -0700 (PDT) Received: from localhost.localdomain ([2001:171b:c9a8:fbc0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id c2sm8380020wma.39.2020.03.11.05.47.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Mar 2020 05:47:06 -0700 (PDT) From: Jean-Philippe Brucker To: bhelgaas@google.com, will@kernel.org, robh+dt@kernel.org, joro@8bytes.org, baolu.lu@linux.intel.com, sudeep.holla@arm.com, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org Cc: lorenzo.pieralisi@arm.com, corbet@lwn.net, mark.rutland@arm.com, liviu.dudau@arm.com, guohanjun@huawei.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, dwmw2@infradead.org, amurray@thegoodpenguin.co.uk, frowand.list@gmail.com, Jean-Philippe Brucker Subject: [PATCH v2 09/11] ACPI/IORT: Drop ATS fwspec flag Date: Wed, 11 Mar 2020 13:45:04 +0100 Message-Id: <20200311124506.208376-10-jean-philippe@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200311124506.208376-1-jean-philippe@linaro.org> References: <20200311124506.208376-1-jean-philippe@linaro.org> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Now that the ats_supported flag is in the host bridge structure where it belongs, we can remove it from the per-device fwspec structure. Acked-by: Hanjun Guo Signed-off-by: Jean-Philippe Brucker --- drivers/acpi/arm64/iort.c | 11 ----------- include/linux/iommu.h | 4 ---- 2 files changed, 15 deletions(-) diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c index d99d7f5b51e1..f634641b3699 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -924,14 +924,6 @@ static int arm_smmu_iort_xlate(struct device *dev, u32 streamid, return ret; } -static bool iort_pci_rc_supports_ats(struct acpi_iort_node *node) -{ - struct acpi_iort_root_complex *pci_rc; - - pci_rc = (struct acpi_iort_root_complex *)node->node_data; - return pci_rc->ats_attribute & ACPI_IORT_ATS_SUPPORTED; -} - static int iort_iommu_xlate(struct device *dev, struct acpi_iort_node *node, u32 streamid) { @@ -1026,9 +1018,6 @@ const struct iommu_ops *iort_iommu_configure(struct device *dev) info.node = node; err = pci_for_each_dma_alias(to_pci_dev(dev), iort_pci_iommu_init, &info); - - if (!err && iort_pci_rc_supports_ats(node)) - dev->iommu_fwspec->flags |= IOMMU_FWSPEC_PCI_RC_ATS; } else { int i = 0; diff --git a/include/linux/iommu.h b/include/linux/iommu.h index d1b5f4d98569..1739f8a7a4b4 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -589,15 +589,11 @@ struct iommu_fwspec { const struct iommu_ops *ops; struct fwnode_handle *iommu_fwnode; void *iommu_priv; - u32 flags; u32 num_pasid_bits; unsigned int num_ids; u32 ids[1]; }; -/* ATS is supported */ -#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0) - /** * struct iommu_sva - handle to a device-mm bond */ From patchwork Wed Mar 11 12:45:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 11431657 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8530318E8 for ; Wed, 11 Mar 2020 12:47:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6454D222C3 for ; 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Wed, 11 Mar 2020 05:47:07 -0700 (PDT) From: Jean-Philippe Brucker To: bhelgaas@google.com, will@kernel.org, robh+dt@kernel.org, joro@8bytes.org, baolu.lu@linux.intel.com, sudeep.holla@arm.com, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org Cc: lorenzo.pieralisi@arm.com, corbet@lwn.net, mark.rutland@arm.com, liviu.dudau@arm.com, guohanjun@huawei.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, dwmw2@infradead.org, amurray@thegoodpenguin.co.uk, frowand.list@gmail.com, Jean-Philippe Brucker Subject: [PATCH v2 10/11] arm64: dts: fast models: Enable PCIe ATS for Base RevC FVP Date: Wed, 11 Mar 2020 13:45:05 +0100 Message-Id: <20200311124506.208376-11-jean-philippe@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200311124506.208376-1-jean-philippe@linaro.org> References: <20200311124506.208376-1-jean-philippe@linaro.org> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Declare that the host controller supports ATS, so the OS can enable it for ATS-capable PCIe endpoints. Signed-off-by: Jean-Philippe Brucker --- arch/arm64/boot/dts/arm/fvp-base-revc.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts index 335fff762451..9171bf0254bf 100644 --- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts +++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts @@ -170,6 +170,7 @@ pci: pci@40000000 { iommu-map = <0x0 &smmu 0x0 0x10000>; dma-coherent; + ats-supported; }; smmu: smmu@2b400000 { From patchwork Wed Mar 11 12:45:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 11431649 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 092AC924 for ; Wed, 11 Mar 2020 12:47:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DC4B421D56 for ; Wed, 11 Mar 2020 12:47:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="IMq0GOgl" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729364AbgCKMrM (ORCPT ); Wed, 11 Mar 2020 08:47:12 -0400 Received: from mail-wm1-f67.google.com ([209.85.128.67]:35184 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729505AbgCKMrL (ORCPT ); Wed, 11 Mar 2020 08:47:11 -0400 Received: by mail-wm1-f67.google.com with SMTP id m3so1978800wmi.0 for ; Wed, 11 Mar 2020 05:47:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=d0rLUPpWc9LKXF0i9+CPpLN+OwQQCuUUQ2gfv2HulHQ=; b=IMq0GOglrv9AJ7IWePlqPKh+g5vEP7KPGWHNuTRmuqqvl++Phj5Ie3+A+QfEKkME3h q0vWho6oLDy9c22giASuCH1G1T6he+iSuHY/0OPrxfchkouzillYMOGGlzBA9bwKR7Yg +I0CgBIjKYUYCNZqgojagWqC+afKYcAZQQapMTNAk/850hRMXduZJO1Etpt2EYWQCcUy n3ofi2ltjHGzGZBjILh2yTVAHr185N6iaj4H1T9AvACvPv+DIvL+M85edL84HEByBf8K uVCJ+BkBjMVx15RAWG7GqnxYs9Z1XwTzh1D54MLnPmoo3LAkRQYN2UwFDW+zLVcZypwF ZfOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=d0rLUPpWc9LKXF0i9+CPpLN+OwQQCuUUQ2gfv2HulHQ=; b=VVsmPk1k2rjKPYLMe80Lf7LzAUySzxRv1iItSw8B10Po6E1SiBMME9XYpVfgjFZZ/t MLuMvTORM0TmvTr6fge7otG5gWPjwm5DLIezG0E0cpNLGPbIS4bRU2RF8CvfYZNpUljm JAO0moBpmr8kvusTub/NkFC+ph8gSy5/AtHbhZBIY5PiS/V6TbELiS7p6ZUZahQEZoxe s61l4PGmTjK4i2B75pUHJqrDIQp2FWc7UXtSO5Jfa0KxZOt/upWGIVRUO01onTwKw4NI YnP/4NMq0ObkNOjgRFa5ICiNIjbHZhnE3Jim4UnPNI1XoYz/rrm5ZCgLAswOVkDUoiTf 5Wnw== X-Gm-Message-State: ANhLgQ0faS/05XdC6F12zDlGDPlyQZSou8oqeiU8jSTrVOMIXVSSMFnT mGSnG75AHXE8De1+qvYj8EOMrA== X-Google-Smtp-Source: ADFU+vtSp3bp4YHfuXWS38IAA5q6tgH8hB5aWJ3nzhD3eOkPVBueydoPmuaFZUj0SnvU9SNNjQlTgg== X-Received: by 2002:a7b:c414:: with SMTP id k20mr3678319wmi.119.1583930829492; Wed, 11 Mar 2020 05:47:09 -0700 (PDT) Received: from localhost.localdomain ([2001:171b:c9a8:fbc0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id c2sm8380020wma.39.2020.03.11.05.47.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Mar 2020 05:47:09 -0700 (PDT) From: Jean-Philippe Brucker To: bhelgaas@google.com, will@kernel.org, robh+dt@kernel.org, joro@8bytes.org, baolu.lu@linux.intel.com, sudeep.holla@arm.com, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org Cc: lorenzo.pieralisi@arm.com, corbet@lwn.net, mark.rutland@arm.com, liviu.dudau@arm.com, guohanjun@huawei.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, dwmw2@infradead.org, amurray@thegoodpenguin.co.uk, frowand.list@gmail.com, Jean-Philippe Brucker Subject: [PATCH v2 11/11] Documentation: Generalize the "pci=noats" boot parameter Date: Wed, 11 Mar 2020 13:45:06 +0100 Message-Id: <20200311124506.208376-12-jean-philippe@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200311124506.208376-1-jean-philippe@linaro.org> References: <20200311124506.208376-1-jean-philippe@linaro.org> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The "pci=noats" kernel parameter disables PCIe ATS globally, and affects any ATS-capable IOMMU driver. So rather than adding Arm SMMUv3, which recently gained ATS support, to the list of relevant build options, simplify the noats description. Signed-off-by: Jean-Philippe Brucker --- Documentation/admin-guide/kernel-parameters.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index c07815d230bc..3e17ddb76731 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -3610,8 +3610,8 @@ on: Turn realloc on realloc same as realloc=on noari do not use PCIe ARI. - noats [PCIE, Intel-IOMMU, AMD-IOMMU] - do not use PCIe ATS (and IOMMU device IOTLB). + noats [PCIE] Do not use PCIe ATS (and IOMMU device + IOTLB). pcie_scan_all Scan all possible PCIe devices. Otherwise we only look for one device below a PCIe downstream port.