From patchwork Thu Mar 12 04:10:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenyu Ye X-Patchwork-Id: 11433187 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8AE2292A for ; Thu, 12 Mar 2020 04:11:03 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4457C206F2 for ; Thu, 12 Mar 2020 04:11:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="mipkX8AP" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4457C206F2 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=E9nm88MS9BUQVtMSROClwng29AI1ucRrpf7fvsvnOqs=; b=mipkX8APId3Uv4 iHX4BAMHH62JnEAq4WqtEcscOsmS8eoRIHSh86uYkX+VYd9y0gfhmJtt3M1sg7OhYI2G4bpeQcPJT tHsfToaUvBsdp5Evn9OWGXN33Pu1SS7t9mk6JRFt1bVHmCQ7NCaDLCJkwKHuZikb3cQHOeQjwLRPK eKm53RUNQ7Jk3ve54MpbiJKq+PGP007959csv7JzUxMCESxDGKmip6cfSglbZKImYYarTNdxGhlQK CMuqWKre5U3+cttvug0Cu5Lffuey/f1QJ+kKqiu9/bYWNSJu55+PMnpFEq9D1SAnF6WniYxUQ6ECl ZHIKAQRh6qKdq9Nzi5eg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jCFBS-0003IO-Cc; Thu, 12 Mar 2020 04:10:58 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jCFBG-00037X-0B for linux-arm-kernel@lists.infradead.org; Thu, 12 Mar 2020 04:10:47 +0000 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 999F68A68DD6D196A9F1; Thu, 12 Mar 2020 12:10:36 +0800 (CST) Received: from DESKTOP-KKJBAGG.china.huawei.com (10.173.220.25) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.487.0; Thu, 12 Mar 2020 12:10:26 +0800 From: Zhenyu Ye To: , , , , , , , Subject: [RFC PATCH v2 1/3] arm64: tlb: use __tlbi_level replace __tlbi in Stage-1 Date: Thu, 12 Mar 2020 12:10:16 +0800 Message-ID: <20200312041018.1927-2-yezhenyu2@huawei.com> X-Mailer: git-send-email 2.22.0.windows.1 In-Reply-To: <20200312041018.1927-1-yezhenyu2@huawei.com> References: <20200312041018.1927-1-yezhenyu2@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.173.220.25] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200311_211046_220149_E177C009 X-CRM114-Status: GOOD ( 10.56 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.35 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, yezhenyu2@huawei.com, linux-kernel@vger.kernel.org, xiexiangyou@huawei.com, zhangshaokun@hisilicon.com, linux-mm@kvack.org, arm@kernel.org, prime.zeng@hisilicon.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org ARMv8.4-TTL provides the TTL field in tlbi instruction to indicate the level of translation table walk holding the leaf entry for the address that is being invalidated. This patch use __tlbi_level replace __tlbi and __tlbi_user in Stage-1, and set the default value of level to 0. Signed-off-by: Zhenyu Ye --- arch/arm64/include/asm/tlbflush.h | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index a3f70778a325..dda693f32099 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -46,11 +46,6 @@ #define __tlbi(op, ...) __TLBI_N(op, ##__VA_ARGS__, 1, 0) -#define __tlbi_user(op, arg) do { \ - if (arm64_kernel_unmapped_at_el0()) \ - __tlbi(op, (arg) | USER_ASID_FLAG); \ -} while (0) - /* This macro creates a properly formatted VA operand for the TLBI */ #define __TLBI_VADDR(addr, asid) \ ({ \ @@ -87,6 +82,8 @@ } \ \ __tlbi(op, arg); \ + if (arm64_kernel_unmapped_at_el0()) \ + __tlbi(op, (arg) | USER_ASID_FLAG); \ } while(0) /* @@ -179,8 +176,7 @@ static inline void flush_tlb_mm(struct mm_struct *mm) unsigned long asid = __TLBI_VADDR(0, ASID(mm)); dsb(ishst); - __tlbi(aside1is, asid); - __tlbi_user(aside1is, asid); + __tlbi_level(aside1is, asid, 0); dsb(ish); } @@ -190,8 +186,7 @@ static inline void flush_tlb_page_nosync(struct vm_area_struct *vma, unsigned long addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm)); dsb(ishst); - __tlbi(vale1is, addr); - __tlbi_user(vale1is, addr); + __tlbi_level(vale1is, addr, 0); } static inline void flush_tlb_page(struct vm_area_struct *vma, @@ -231,11 +226,9 @@ static inline void __flush_tlb_range(struct vm_area_struct *vma, dsb(ishst); for (addr = start; addr < end; addr += stride) { if (last_level) { - __tlbi(vale1is, addr); - __tlbi_user(vale1is, addr); + __tlbi_level(vale1is, addr, 0); } else { - __tlbi(vae1is, addr); - __tlbi_user(vae1is, addr); + __tlbi_level(vae1is, addr, 0); } } dsb(ish); From patchwork Thu Mar 12 04:10:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenyu Ye X-Patchwork-Id: 11433193 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0470A913 for ; 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Thu, 12 Mar 2020 12:10:27 +0800 From: Zhenyu Ye To: , , , , , , , Subject: [RFC PATCH v2 2/3] arm64: tlb: use mm_struct.context.flags to indicate TTL value Date: Thu, 12 Mar 2020 12:10:17 +0800 Message-ID: <20200312041018.1927-3-yezhenyu2@huawei.com> X-Mailer: git-send-email 2.22.0.windows.1 In-Reply-To: <20200312041018.1927-1-yezhenyu2@huawei.com> References: <20200312041018.1927-1-yezhenyu2@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.173.220.25] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200311_211046_611556_2BE69877 X-CRM114-Status: GOOD ( 11.20 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.35 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, yezhenyu2@huawei.com, linux-kernel@vger.kernel.org, xiexiangyou@huawei.com, zhangshaokun@hisilicon.com, linux-mm@kvack.org, arm@kernel.org, prime.zeng@hisilicon.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Use Architecture-specific MM context to indicate the level of page table walk. This avoids lots of changes to common-interface. Signed-off-by: Zhenyu Ye --- arch/arm64/include/asm/mmu.h | 11 +++++++++++ arch/arm64/include/asm/tlbflush.h | 6 +++--- arch/arm64/kernel/process.c | 2 +- 3 files changed, 15 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h index e4d862420bb4..f86a38ab3632 100644 --- a/arch/arm64/include/asm/mmu.h +++ b/arch/arm64/include/asm/mmu.h @@ -8,6 +8,10 @@ #include #define MMCF_AARCH32 0x1 /* mm context flag for AArch32 executables */ +#define S1_PUD_LEVEL 0x10 /* mm context flag for the level of ptw */ +#define S1_PMD_LEVEL 0x20 +#define S1_PTE_LEVEL 0x30 + #define USER_ASID_BIT 48 #define USER_ASID_FLAG (UL(1) << USER_ASID_BIT) #define TTBR_ASID_MASK (UL(0xffff) << 48) @@ -19,6 +23,10 @@ typedef struct { atomic64_t id; void *vdso; + /* + * flags[3:0]: AArch32 executables + * flags[7:4]: the level of page table walk + */ unsigned long flags; } mm_context_t; @@ -29,6 +37,9 @@ typedef struct { */ #define ASID(mm) ((mm)->context.id.counter & 0xffff) +/* This macro is only used by TLBI TTL */ +#define TLBI_LEVEL(mm) ((mm)->context.flags >> 4 & 0xf) + extern bool arm64_use_ng_mappings; static inline bool arm64_kernel_unmapped_at_el0(void) diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index dda693f32099..312b9edb281b 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -186,7 +186,7 @@ static inline void flush_tlb_page_nosync(struct vm_area_struct *vma, unsigned long addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm)); dsb(ishst); - __tlbi_level(vale1is, addr, 0); + __tlbi_level(vale1is, addr, TLBI_LEVEL(vma->vm_mm)); } static inline void flush_tlb_page(struct vm_area_struct *vma, @@ -226,9 +226,9 @@ static inline void __flush_tlb_range(struct vm_area_struct *vma, dsb(ishst); for (addr = start; addr < end; addr += stride) { if (last_level) { - __tlbi_level(vale1is, addr, 0); + __tlbi_level(vale1is, addr, TLBI_LEVEL(vma->vm_mm)); } else { - __tlbi_level(vae1is, addr, 0); + __tlbi_level(vae1is, addr, TLBI_LEVEL(vma->vm_mm)); } } dsb(ish); diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index bbb0f0c145f6..bf835755d9ed 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -562,7 +562,7 @@ unsigned long arch_align_stack(unsigned long sp) */ void arch_setup_new_exec(void) { - current->mm->context.flags = is_compat_task() ? MMCF_AARCH32 : 0; + current->mm->context.flags |= is_compat_task() ? MMCF_AARCH32 : 0; ptrauth_thread_init_user(current); } From patchwork Thu Mar 12 04:10:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenyu Ye X-Patchwork-Id: 11433191 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 58AC7913 for ; Thu, 12 Mar 2020 04:11:27 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 70620206F2 for ; Thu, 12 Mar 2020 04:11:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="l+pvrkxZ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 70620206F2 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jwYlytSQ9arp7UG/p2YDPI2PTy92Q/Zq2NrbcpOMfxg=; b=l+pvrkxZCjsUYb CyF+BdgCV1UlC/1wEOaAyWUelguQVQXjwbUtJ6AOvGfuIMObiGW93CctXsHqUyqOzXjETB9nr+Jbr Uz4vc+0wWgCwSyycHJybzxaJyr6DqHDFZxgqQhj8828Eo6zM23YzVTrd/uAY44IyR323DuoIZG+HK zc+muWCJM3bez1QQ6O54pyX2QYf/YQey3LLO1eJM7A0kDxwcUs6DePucXGLv9q3p8sTlRZODslXWa Hz0tBylfsq9+qwp72XETC6UhigWjyQtNQ/vuR1sX/oLbUJkBqJOzNLXgJgBai3N8+e5ZI4VqzmY2Y 4E7E7tcU4ZzN9JXcQv1g==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jCFBq-0003ec-NC; Thu, 12 Mar 2020 04:11:22 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jCFBG-00037Z-CS for linux-arm-kernel@lists.infradead.org; Thu, 12 Mar 2020 04:10:49 +0000 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id A1E08A37C25A8E4A232F; Thu, 12 Mar 2020 12:10:36 +0800 (CST) Received: from DESKTOP-KKJBAGG.china.huawei.com (10.173.220.25) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.487.0; Thu, 12 Mar 2020 12:10:28 +0800 From: Zhenyu Ye To: , , , , , , , Subject: [RFC PATCH v2 3/3] arm64: tlb: add support for TTL in some functions Date: Thu, 12 Mar 2020 12:10:18 +0800 Message-ID: <20200312041018.1927-4-yezhenyu2@huawei.com> X-Mailer: git-send-email 2.22.0.windows.1 In-Reply-To: <20200312041018.1927-1-yezhenyu2@huawei.com> References: <20200312041018.1927-1-yezhenyu2@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.173.220.25] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200311_211046_593585_DAD6B6A1 X-CRM114-Status: UNSURE ( 9.34 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.35 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, yezhenyu2@huawei.com, linux-kernel@vger.kernel.org, xiexiangyou@huawei.com, zhangshaokun@hisilicon.com, linux-mm@kvack.org, arm@kernel.org, prime.zeng@hisilicon.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add support for TTL in some ARM64-Architecture functions. The relevant functions are: __pte_free_tlb __pmd_free_tlb __pud_free_tlb clear_flush get_clear_flush Signed-off-by: Zhenyu Ye --- arch/arm64/include/asm/tlb.h | 3 +++ arch/arm64/mm/hugetlbpage.c | 2 ++ 2 files changed, 5 insertions(+) diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h index b76df828e6b7..5ab686e300e9 100644 --- a/arch/arm64/include/asm/tlb.h +++ b/arch/arm64/include/asm/tlb.h @@ -44,6 +44,7 @@ static inline void tlb_flush(struct mmu_gather *tlb) static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, unsigned long addr) { + tlb->mm->context.flags |= S1_PTE_LEVEL; pgtable_pte_page_dtor(pte); tlb_remove_table(tlb, pte); } @@ -53,6 +54,7 @@ static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, unsigned long addr) { struct page *page = virt_to_page(pmdp); + tlb->mm->context.flags |= S1_PMD_LEVEL; pgtable_pmd_page_dtor(page); tlb_remove_table(tlb, page); @@ -63,6 +65,7 @@ static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp, unsigned long addr) { + tlb->mm->context.flags |= S1_PUD_LEVEL; tlb_remove_table(tlb, virt_to_page(pudp)); } #endif diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c index bbeb6a5a6ba6..a69248aa6e1f 100644 --- a/arch/arm64/mm/hugetlbpage.c +++ b/arch/arm64/mm/hugetlbpage.c @@ -141,6 +141,7 @@ static pte_t get_clear_flush(struct mm_struct *mm, if (valid) { struct vm_area_struct vma = TLB_FLUSH_VMA(mm, 0); + mm->context.flags |= S1_PTE_LEVEL; flush_tlb_range(&vma, saddr, addr); } return orig_pte; @@ -163,6 +164,7 @@ static void clear_flush(struct mm_struct *mm, { struct vm_area_struct vma = TLB_FLUSH_VMA(mm, 0); unsigned long i, saddr = addr; + mm->context.flags |= S1_PTE_LEVEL; for (i = 0; i < ncontig; i++, addr += pgsize, ptep++) pte_clear(mm, addr, ptep);