From patchwork Thu Mar 12 11:09:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11433905 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CBF2192A for ; Thu, 12 Mar 2020 11:09:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AD30C2073B for ; Thu, 12 Mar 2020 11:09:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="FuVfTSGp" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726567AbgCLLJP (ORCPT ); Thu, 12 Mar 2020 07:09:15 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:9062 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726000AbgCLLJO (ORCPT ); Thu, 12 Mar 2020 07:09:14 -0400 X-UUID: 3027f2d02d0a4c509e8d5d7bd20f7a89-20200312 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=jM6zMEkp2gCDGD/bAUrEXxpJslmHATovcsB4DY5GntA=; b=FuVfTSGpRVABq3Kap5fjD8XqpAu7M7oB871hwpLgUo8Q1KEQ3k3OIg9TOqIK771KgxMWSZOgG0IhsuIE1ulLDHSJUswNS7QDF73frF1pd1I2f/licprgewkCrq0b9fwnNim5hGs9eCusrUjkr7w/I9snfuxHHwqhSZKZIMc/kKU=; X-UUID: 3027f2d02d0a4c509e8d5d7bd20f7a89-20200312 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 2036524414; Thu, 12 Mar 2020 19:09:10 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 12 Mar 2020 19:06:59 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 12 Mar 2020 19:08:50 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v2 1/8] scsi: ufs: fix uninitialized tx_lanes in ufshcd_disable_tx_lcc() Date: Thu, 12 Mar 2020 19:09:01 +0800 Message-ID: <20200312110908.14895-2-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200312110908.14895-1-stanley.chu@mediatek.com> References: <20200312110908.14895-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org In ufshcd_disable_tx_lcc(), if ufshcd_dme_get() or ufshcd_dme_peer_get() get fail, uninitialized variable "tx_lanes" may be used as unexpected lane ID for DME configuration. Fix this issue by initializing "tx_lanes". Signed-off-by: Stanley Chu Reviewed-by: Asutosh Das --- drivers/scsi/ufs/ufshcd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 5698f1164a5e..314e808b0d4e 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -4315,7 +4315,7 @@ EXPORT_SYMBOL_GPL(ufshcd_hba_enable); static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer) { - int tx_lanes, i, err = 0; + int tx_lanes = 0, i, err = 0; if (!peer) ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), From patchwork Thu Mar 12 11:09:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11433899 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CF2D492A for ; Thu, 12 Mar 2020 11:09:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AFCC020674 for ; Thu, 12 Mar 2020 11:09:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="c30/kBPi" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727036AbgCLLJR (ORCPT ); Thu, 12 Mar 2020 07:09:17 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:45904 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726023AbgCLLJQ (ORCPT ); Thu, 12 Mar 2020 07:09:16 -0400 X-UUID: 3c969c59458d4164bc71bf77c893cad0-20200312 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=TJOwfXCdxtKskhQqIq5Rx4gC5ikFILpJpMDFmmmJALg=; b=c30/kBPiU2BWKTC2T7Jkwj9ptBbXPDqzgYqipBKNBue4q9KcTfTLCz0ATihLg+wv/OMlEqvdcD0vF1MCSjrlwhKIZU/rSCnf5hq50QvpjeVYd4Cx/XiRO1FZtdzOJ5Dw3hpZzYCHN7Cu31P8Mz7TGZPhKFL4K+5gb7nX8/DUii0=; X-UUID: 3c969c59458d4164bc71bf77c893cad0-20200312 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 529322242; Thu, 12 Mar 2020 19:09:11 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 12 Mar 2020 19:08:05 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 12 Mar 2020 19:08:50 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v2 2/8] scsi: ufs: remove init_prefetch_data in struct ufs_hba Date: Thu, 12 Mar 2020 19:09:02 +0800 Message-ID: <20200312110908.14895-3-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200312110908.14895-1-stanley.chu@mediatek.com> References: <20200312110908.14895-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Struct init_prefetch_data currently is used privately in ufshcd_init_icc_levels(), thus it can be removed from struct ufs_hba. Signed-off-by: Stanley Chu Reviewed-by: Asutosh Das --- drivers/scsi/ufs/ufshcd.c | 15 ++++++--------- drivers/scsi/ufs/ufshcd.h | 11 ----------- 2 files changed, 6 insertions(+), 20 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 314e808b0d4e..b4988b9ee36c 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -6501,6 +6501,7 @@ static void ufshcd_init_icc_levels(struct ufs_hba *hba) { int ret; int buff_len = hba->desc_size.pwr_desc; + u32 icc_level; u8 *desc_buf; desc_buf = kmalloc(buff_len, GFP_KERNEL); @@ -6516,21 +6517,17 @@ static void ufshcd_init_icc_levels(struct ufs_hba *hba) goto out; } - hba->init_prefetch_data.icc_level = - ufshcd_find_max_sup_active_icc_level(hba, - desc_buf, buff_len); - dev_dbg(hba->dev, "%s: setting icc_level 0x%x", - __func__, hba->init_prefetch_data.icc_level); + icc_level = + ufshcd_find_max_sup_active_icc_level(hba, desc_buf, buff_len); + dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level); ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR, - QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, - &hba->init_prefetch_data.icc_level); + QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level); if (ret) dev_err(hba->dev, "%s: Failed configuring bActiveICCLevel = %d ret = %d", - __func__, hba->init_prefetch_data.icc_level , ret); - + __func__, icc_level, ret); out: kfree(desc_buf); } diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 5c10777154fc..5cf79d2319a6 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -402,15 +402,6 @@ struct ufs_clk_scaling { bool is_suspended; }; -/** - * struct ufs_init_prefetch - contains data that is pre-fetched once during - * initialization - * @icc_level: icc level which was read during initialization - */ -struct ufs_init_prefetch { - u32 icc_level; -}; - #define UFS_ERR_REG_HIST_LENGTH 8 /** * struct ufs_err_reg_hist - keeps history of errors @@ -541,7 +532,6 @@ enum ufshcd_quirks { * @intr_mask: Interrupt Mask Bits * @ee_ctrl_mask: Exception event control mask * @is_powered: flag to check if HBA is powered - * @init_prefetch_data: data pre-fetched during initialization * @eh_work: Worker to handle UFS errors that require s/w attention * @eeh_work: Worker to handle exception events * @errors: HBA errors @@ -627,7 +617,6 @@ struct ufs_hba { u32 intr_mask; u16 ee_ctrl_mask; bool is_powered; - struct ufs_init_prefetch init_prefetch_data; /* Work Queues */ struct work_struct eh_work; From patchwork Thu Mar 12 11:09:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11433885 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D92D992A for ; Thu, 12 Mar 2020 11:09:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B1EB92071B for ; Thu, 12 Mar 2020 11:09:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="ebFetOWl" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727095AbgCLLJT (ORCPT ); Thu, 12 Mar 2020 07:09:19 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:35775 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726971AbgCLLJS (ORCPT ); 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Thu, 12 Mar 2020 19:08:50 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v2 3/8] scsi: ufs: use an enum for host capabilities Date: Thu, 12 Mar 2020 19:09:03 +0800 Message-ID: <20200312110908.14895-4-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200312110908.14895-1-stanley.chu@mediatek.com> References: <20200312110908.14895-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 1F9954EFF68B75AC86A7E02E9F2627FC51461FF97E076A047928928F4A86C0982000:8 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Use an enum to specify the host capabilities instead of #defines inside the structure definition. Signed-off-by: Stanley Chu Reviewed-by: Can Guo Reviewed-by: Asutosh Das --- drivers/scsi/ufs/ufshcd.h | 65 ++++++++++++++++++++++----------------- 1 file changed, 37 insertions(+), 28 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 5cf79d2319a6..fec004cd8054 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -501,6 +501,43 @@ enum ufshcd_quirks { UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION = 1 << 5, }; +enum ufshcd_caps { + /* Allow dynamic clk gating */ + UFSHCD_CAP_CLK_GATING = 1 << 0, + + /* Allow hiberb8 with clk gating */ + UFSHCD_CAP_HIBERN8_WITH_CLK_GATING = 1 << 1, + + /* Allow dynamic clk scaling */ + UFSHCD_CAP_CLK_SCALING = 1 << 2, + + /* Allow auto bkops to enabled during runtime suspend */ + UFSHCD_CAP_AUTO_BKOPS_SUSPEND = 1 << 3, + + /* + * This capability allows host controller driver to use the UFS HCI's + * interrupt aggregation capability. + * CAUTION: Enabling this might reduce overall UFS throughput. + */ + UFSHCD_CAP_INTR_AGGR = 1 << 4, + + /* + * This capability allows the device auto-bkops to be always enabled + * except during suspend (both runtime and suspend). + * Enabling this capability means that device will always be allowed + * to do background operation when it's active but it might degrade + * the performance of ongoing read/write operations. + */ + UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND = 1 << 5, + + /* + * This capability allows host controller driver to automatically + * enable runtime power management by itself instead of waiting + * for userspace to control the power management. + */ + UFSHCD_CAP_RPM_AUTOSUSPEND = 1 << 6, +}; + /** * struct ufs_hba - per adapter private structure * @mmio_base: UFSHCI base register address @@ -653,34 +690,6 @@ struct ufs_hba { struct ufs_clk_gating clk_gating; /* Control to enable/disable host capabilities */ u32 caps; - /* Allow dynamic clk gating */ -#define UFSHCD_CAP_CLK_GATING (1 << 0) - /* Allow hiberb8 with clk gating */ -#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1) - /* Allow dynamic clk scaling */ -#define UFSHCD_CAP_CLK_SCALING (1 << 2) - /* Allow auto bkops to enabled during runtime suspend */ -#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3) - /* - * This capability allows host controller driver to use the UFS HCI's - * interrupt aggregation capability. - * CAUTION: Enabling this might reduce overall UFS throughput. - */ -#define UFSHCD_CAP_INTR_AGGR (1 << 4) - /* - * This capability allows the device auto-bkops to be always enabled - * except during suspend (both runtime and suspend). - * Enabling this capability means that device will always be allowed - * to do background operation when it's active but it might degrade - * the performance of ongoing read/write operations. - */ -#define UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND (1 << 5) - /* - * This capability allows host controller driver to automatically - * enable runtime power management by itself instead of waiting - * for userspace to control the power management. - */ -#define UFSHCD_CAP_RPM_AUTOSUSPEND (1 << 6) struct devfreq *devfreq; struct ufs_clk_scaling clk_scaling; From patchwork Thu Mar 12 11:09:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11433895 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 064EF1668 for ; Thu, 12 Mar 2020 11:09:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DB7C620674 for ; Thu, 12 Mar 2020 11:09:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="OlTNiGFO" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727178AbgCLLJc (ORCPT ); Thu, 12 Mar 2020 07:09:32 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:9062 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726968AbgCLLJS (ORCPT ); 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Thu, 12 Mar 2020 19:08:50 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v2 4/8] scsi: ufs: introduce common delay function Date: Thu, 12 Mar 2020 19:09:04 +0800 Message-ID: <20200312110908.14895-5-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200312110908.14895-1-stanley.chu@mediatek.com> References: <20200312110908.14895-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 640FA8D674D04502A57F937DF8F04FAFA73D2CCC4DDAA72B2DC102A3490FAD1C2000:8 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Introduce common delay function to collect all delay requirements to simplify driver and take choices of udelay and usleep_range into consideration. Signed-off-by: Stanley Chu --- drivers/scsi/ufs/ufshcd.c | 27 ++++++++++++++++++--------- drivers/scsi/ufs/ufshcd.h | 1 + 2 files changed, 19 insertions(+), 9 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index b4988b9ee36c..ce65d321a73f 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -597,6 +597,18 @@ static void ufshcd_print_pwr_info(struct ufs_hba *hba) hba->pwr_info.hs_rate); } +void ufshcd_wait_us(unsigned long us, unsigned long tolerance, bool can_sleep) +{ + if (!us) + return; + + if (us < 10 || !can_sleep) + udelay(us); + else + usleep_range(us, us + tolerance); +} +EXPORT_SYMBOL_GPL(ufshcd_wait_us); + /* * ufshcd_wait_for_register - wait for register value to change * @hba - per-adapter interface @@ -620,10 +632,7 @@ int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, val = val & mask; while ((ufshcd_readl(hba, reg) & mask) != val) { - if (can_sleep) - usleep_range(interval_us, interval_us + 50); - else - udelay(interval_us); + ufshcd_wait_us(interval_us, 50, can_sleep); if (time_after(jiffies, timeout)) { if ((ufshcd_readl(hba, reg) & mask) != val) err = -ETIMEDOUT; @@ -3565,7 +3574,7 @@ static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba) } /* allow sleep for extra 50us if needed */ - usleep_range(min_sleep_time_us, min_sleep_time_us + 50); + ufshcd_wait_us(min_sleep_time_us, 50, true); } /** @@ -4289,7 +4298,7 @@ int ufshcd_hba_enable(struct ufs_hba *hba) * instruction might be read back. * This delay can be changed based on the controller. */ - usleep_range(1000, 1100); + ufshcd_wait_us(1000, 100, true); /* wait for the host controller to complete initialization */ retry = 10; @@ -4301,7 +4310,7 @@ int ufshcd_hba_enable(struct ufs_hba *hba) "Controller enable failed\n"); return -EIO; } - usleep_range(5000, 5100); + ufshcd_wait_us(5000, 100, true); } /* enable UIC related interrupts */ @@ -6224,7 +6233,7 @@ static int ufshcd_abort(struct scsi_cmnd *cmd) reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL); if (reg & (1 << tag)) { /* sleep for max. 200us to stabilize */ - usleep_range(100, 200); + ufshcd_wait_us(100, 100, true); continue; } /* command completed already */ @@ -7783,7 +7792,7 @@ static void ufshcd_vreg_set_lpm(struct ufs_hba *hba) */ if (!ufshcd_is_link_active(hba) && hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM) - usleep_range(2000, 2100); + ufshcd_wait_us(2000, 100, true); /* * If UFS device is either in UFS_Sleep turn off VCC rail to save some diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index fec004cd8054..4683e7bf6640 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -781,6 +781,7 @@ int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int); int ufshcd_make_hba_operational(struct ufs_hba *hba); void ufshcd_remove(struct ufs_hba *); int ufshcd_uic_hibern8_exit(struct ufs_hba *hba); +void ufshcd_wait_us(unsigned long us, unsigned long tolerance, bool can_sleep); int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, u32 val, unsigned long interval_us, unsigned long timeout_ms, bool can_sleep); From patchwork Thu Mar 12 11:09:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11433893 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D094513B1 for ; Thu, 12 Mar 2020 11:09:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B16CB20749 for ; Thu, 12 Mar 2020 11:09:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="oDMnyCLm" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727184AbgCLLJd (ORCPT ); Thu, 12 Mar 2020 07:09:33 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:40447 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726921AbgCLLJS (ORCPT ); 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Thu, 12 Mar 2020 19:08:50 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v2 5/8] scsi: ufs-mediatek: replace all delay places by common delay function Date: Thu, 12 Mar 2020 19:09:05 +0800 Message-ID: <20200312110908.14895-6-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200312110908.14895-1-stanley.chu@mediatek.com> References: <20200312110908.14895-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org A common delay function is introduced in UFS core driver, thus ufs-mediatek can use it to replace all delay codes. Signed-off-by: Stanley Chu --- drivers/scsi/ufs/ufs-mediatek.c | 21 +++++---------------- 1 file changed, 5 insertions(+), 16 deletions(-) diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c index 3b0e575d7460..0ff6781654fd 100644 --- a/drivers/scsi/ufs/ufs-mediatek.c +++ b/drivers/scsi/ufs/ufs-mediatek.c @@ -100,17 +100,6 @@ static int ufs_mtk_bind_mphy(struct ufs_hba *hba) return err; } -static void ufs_mtk_udelay(unsigned long us) -{ - if (!us) - return; - - if (us < 10) - udelay(us); - else - usleep_range(us, us + 10); -} - static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on) { struct ufs_mtk_host *host = ufshcd_get_variant(hba); @@ -123,7 +112,7 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on) if (on) { ufs_mtk_ref_clk_notify(on, res); - ufs_mtk_udelay(host->ref_clk_ungating_wait_us); + ufshcd_wait_us(host->ref_clk_ungating_wait_us, 10, true); ufshcd_writel(hba, REFCLK_REQUEST, REG_UFS_REFCLK_CTRL); } else { ufshcd_writel(hba, REFCLK_RELEASE, REG_UFS_REFCLK_CTRL); @@ -138,7 +127,7 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on) if (((value & REFCLK_ACK) >> 1) == (value & REFCLK_REQUEST)) goto out; - usleep_range(100, 200); + ufshcd_wait_us(100, 100, true); } while (time_before(jiffies, timeout)); dev_err(hba->dev, "missing ack of refclk req, reg: 0x%x\n", value); @@ -150,7 +139,7 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on) out: host->ref_clk_enabled = on; if (!on) { - ufs_mtk_udelay(host->ref_clk_gating_wait_us); + ufshcd_wait_us(host->ref_clk_gating_wait_us, 10, true); ufs_mtk_ref_clk_notify(on, res); } @@ -430,12 +419,12 @@ static void ufs_mtk_device_reset(struct ufs_hba *hba) * * To be on safe side, keep the reset low for at least 10us. */ - usleep_range(10, 15); + ufshcd_wait_us(10, 5, true); ufs_mtk_device_reset_ctrl(1, res); /* Some devices may need time to respond to rst_n */ - usleep_range(10000, 15000); + ufshcd_wait_us(10000, 5000, true); dev_info(hba->dev, "device reset done\n"); } From patchwork Thu Mar 12 11:09:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11433883 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C08A713B1 for ; Thu, 12 Mar 2020 11:09:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 961472067C for ; Thu, 12 Mar 2020 11:09:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="raoRhFSh" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726986AbgCLLJR (ORCPT ); Thu, 12 Mar 2020 07:09:17 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:9062 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726725AbgCLLJQ (ORCPT ); Thu, 12 Mar 2020 07:09:16 -0400 X-UUID: 42ed6ee42ad44e1aaa72c5a7344fd513-20200312 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=4SVFDx1dUwhWROvYtY0dTPYSsP2l15nHohTxw716oJc=; b=raoRhFShaI3fvFgqXGZ9zcADKs3YbDzar/bElNspPbib4UnS74pyakDo02ezSP7/ibi7pflz+/mErovvfzzHEQEsr/517N5QXjo1HbgDp6uH93UkzYAEB8CsddiLhol8i+mz5bodM9VRcj3sNpih556IY+cqN6FuQtQg5yJJ6tM=; X-UUID: 42ed6ee42ad44e1aaa72c5a7344fd513-20200312 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 119174148; Thu, 12 Mar 2020 19:09:12 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 12 Mar 2020 19:06:22 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 12 Mar 2020 19:08:51 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v2 6/8] scsi: ufs: allow customized delay for host enabling Date: Thu, 12 Mar 2020 19:09:06 +0800 Message-ID: <20200312110908.14895-7-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200312110908.14895-1-stanley.chu@mediatek.com> References: <20200312110908.14895-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 3DF717522B25820C5912D4A86210E1EA0937932E319A8C75A401C2BEAEDD37B12000:8 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Currently a 1 ms delay is applied before polling CONTROLLER_ENABLE bit. This delay may not be required or can be changed in different controllers. Make the delay as a changeable value in struct ufs_hba to allow it customized by vendors. Signed-off-by: Stanley Chu Reviewed-by: Can Guo --- drivers/scsi/ufs/ufshcd.c | 3 ++- drivers/scsi/ufs/ufshcd.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index ce65d321a73f..dcbf45d547d8 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -4298,7 +4298,7 @@ int ufshcd_hba_enable(struct ufs_hba *hba) * instruction might be read back. * This delay can be changed based on the controller. */ - ufshcd_wait_us(1000, 100, true); + ufshcd_wait_us(hba->hba_enable_delay_us, 100, true); /* wait for the host controller to complete initialization */ retry = 10; @@ -8418,6 +8418,7 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq) hba->mmio_base = mmio_base; hba->irq = irq; + hba->hba_enable_delay_us = 1000; err = ufshcd_hba_init(hba); if (err) diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 4683e7bf6640..269ddb92bb55 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -653,6 +653,7 @@ struct ufs_hba { u32 eh_flags; u32 intr_mask; u16 ee_ctrl_mask; + u16 hba_enable_delay_us; bool is_powered; /* Work Queues */ From patchwork Thu Mar 12 11:09:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11433887 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CAB9C13B1 for ; Thu, 12 Mar 2020 11:09:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ACD8E2071B for ; Thu, 12 Mar 2020 11:09:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="m1Osmp8p" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727113AbgCLLJV (ORCPT ); Thu, 12 Mar 2020 07:09:21 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:45904 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726967AbgCLLJU (ORCPT ); Thu, 12 Mar 2020 07:09:20 -0400 X-UUID: 3e4af350969a4dce9f52ac0faa8f34a5-20200312 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=ssIHMZ3gzFIIN/d3N49O20oiYNm4fTdpyf9DffWHFP8=; b=m1Osmp8pNRA8xwUUeY/Iir/EIrinE3ont40kBOC2bPxpGYRm/Jo2D+OCOuAFVA8NcyWM6C0wfb4J1BlYSjMzzso79ub/qhp8R0s9XCIYXl9K4WZ3FyVAMak7+vF97/yuj1GVb7Bvgyjv6gozRu/MGzqmtQACfX7cawwha85CGO0=; X-UUID: 3e4af350969a4dce9f52ac0faa8f34a5-20200312 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1383368862; Thu, 12 Mar 2020 19:09:12 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 12 Mar 2020 19:07:00 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 12 Mar 2020 19:08:51 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v2 7/8] scsi: ufs: make HCE polling more compact to improve initializatoin latency Date: Thu, 12 Mar 2020 19:09:07 +0800 Message-ID: <20200312110908.14895-8-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200312110908.14895-1-stanley.chu@mediatek.com> References: <20200312110908.14895-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Reduce the waiting period between each HCE (Host Controller Enable) polling from 5 ms to 1 ms. In the same time, increase the maximum polling times to make "total polling time" unchanged approximately. This change could make HCE initializatoin faster to improve latency of ufshcd initialization, error recovery, and resume behaviors. Signed-off-by: Stanley Chu --- drivers/scsi/ufs/ufshcd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index dcbf45d547d8..cd33d07c56cf 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -4301,7 +4301,7 @@ int ufshcd_hba_enable(struct ufs_hba *hba) ufshcd_wait_us(hba->hba_enable_delay_us, 100, true); /* wait for the host controller to complete initialization */ - retry = 10; + retry = 50; while (ufshcd_is_hba_active(hba)) { if (retry) { retry--; @@ -4310,7 +4310,7 @@ int ufshcd_hba_enable(struct ufs_hba *hba) "Controller enable failed\n"); return -EIO; } - ufshcd_wait_us(5000, 100, true); + ufshcd_wait_us(1000, 100, true); } /* enable UIC related interrupts */ From patchwork Thu Mar 12 11:09:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11433897 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 00E5E92A for ; Thu, 12 Mar 2020 11:09:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D614A2073B for ; Thu, 12 Mar 2020 11:09:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Se2jnFt9" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727063AbgCLLJR (ORCPT ); Thu, 12 Mar 2020 07:09:17 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:35775 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726000AbgCLLJQ (ORCPT ); Thu, 12 Mar 2020 07:09:16 -0400 X-UUID: 461e0c2315674da0a5e2500458926cc9-20200312 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Uk2XDwY8UpUa34jOh1gmZh106hPeM2dU3/2C5J19+W8=; b=Se2jnFt9fqzF3D/rREdZxA+RqLBuAY67IHthXjKeSppqy8DlUlIoXXgDjUjURek0yHbRyiKKqodwE6x8Uk77bLeJy+9wnNmvHIdZNVnE4hJnEGN9w2n6FpjZKINALhznK7perd1pp7wvSZGOphzjMqIS3jzbYI/VV1JLgCKmboI=; X-UUID: 461e0c2315674da0a5e2500458926cc9-20200312 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 112562526; Thu, 12 Mar 2020 19:09:12 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs05n1.mediatek.inc (172.21.101.15) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 12 Mar 2020 19:07:57 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 12 Mar 2020 19:08:51 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v2 8/8] scsi: ufs-mediatek: customize the delay for host enabling Date: Thu, 12 Mar 2020 19:09:08 +0800 Message-ID: <20200312110908.14895-9-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200312110908.14895-1-stanley.chu@mediatek.com> References: <20200312110908.14895-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org MediaTek platform and UFS controller can dynamically customize the delay for host enabling according to different scenarios. For example, for host initialization with low-level MPHY calibration required, longer delay shall be expected. But the delay could be removed if such MPHY calibration can be skipped, like resume flow. Signed-off-by: Stanley Chu --- arch/arm64/configs/defconfig | 1 + drivers/scsi/ufs/ufs-mediatek.c | 14 ++++++++++++++ 2 files changed, 15 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 0a8a2ad94bef..9306f658a6cd 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -235,6 +235,7 @@ CONFIG_SCSI_MPT3SAS=m CONFIG_SCSI_UFSHCD=y CONFIG_SCSI_UFSHCD_PLATFORM=y CONFIG_SCSI_UFS_QCOM=m +CONFIG_SCSI_UFS_MEDIATEK=m CONFIG_SCSI_UFS_HISI=y CONFIG_ATA=y CONFIG_SATA_AHCI=y diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c index 0ff6781654fd..6f437f0091bf 100644 --- a/drivers/scsi/ufs/ufs-mediatek.c +++ b/drivers/scsi/ufs/ufs-mediatek.c @@ -71,6 +71,19 @@ static void ufs_mtk_cfg_unipro_cg(struct ufs_hba *hba, bool enable) } } +static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba, + enum ufs_notify_change_status status) +{ + if (status == PRE_CHANGE) { + if (hba->pm_op_in_progress) + hba->hba_enable_delay_us = 0; + else + hba->hba_enable_delay_us = 100; + } + + return 0; +} + static int ufs_mtk_bind_mphy(struct ufs_hba *hba) { struct ufs_mtk_host *host = ufshcd_get_variant(hba); @@ -552,6 +565,7 @@ static struct ufs_hba_variant_ops ufs_hba_mtk_vops = { .name = "mediatek.ufshci", .init = ufs_mtk_init, .setup_clocks = ufs_mtk_setup_clocks, + .hce_enable_notify = ufs_mtk_hce_enable_notify, .link_startup_notify = ufs_mtk_link_startup_notify, .pwr_change_notify = ufs_mtk_pwr_change_notify, .apply_dev_quirks = ufs_mtk_apply_dev_quirks,