From patchwork Thu Mar 12 21:31:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jolly Shah X-Patchwork-Id: 11435499 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 587E490 for ; Thu, 12 Mar 2020 21:32:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2DB9D2071C for ; Thu, 12 Mar 2020 21:32:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=xilinx.onmicrosoft.com header.i=@xilinx.onmicrosoft.com header.b="WTy8q4M5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726554AbgCLVcK (ORCPT ); Thu, 12 Mar 2020 17:32:10 -0400 Received: from mail-co1nam11on2051.outbound.protection.outlook.com ([40.107.220.51]:23165 "EHLO NAM11-CO1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726548AbgCLVcK (ORCPT ); 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Thu, 12 Mar 2020 14:32:01 -0700 Received: from [172.19.2.91] (helo=xsjjollys50.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jCVQm-0006iZ-VK; Thu, 12 Mar 2020 14:31:53 -0700 From: Jolly Shah To: olof@lixom.net, mturquette@baylibre.com, sboyd@kernel.org, michal.simek@xilinx.com, arm@kernel.org, linux-clk@vger.kernel.org Cc: rajanv@xilinx.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rajan Vaja , Tejas Patel , Jolly Shah Subject: [PATCH v2 1/2] drivers: clk: zynqmp: Add support for custom type flags Date: Thu, 12 Mar 2020 14:31:38 -0700 Message-Id: <1584048699-24186-2-git-send-email-jolly.shah@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1584048699-24186-1-git-send-email-jolly.shah@xilinx.com> References: <1584048699-24186-1-git-send-email-jolly.shah@xilinx.com> X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(4636009)(346002)(376002)(136003)(396003)(39860400002)(199004)(26005)(7696005)(478600001)(107886003)(5660300002)(70206006)(4326008)(9786002)(8676002)(81166006)(81156014)(70586007)(36756003)(6666004)(356004)(8936002)(2906002)(54906003)(186003)(336012)(426003)(316002)(44832011)(2616005);DIR:OUT;SFP:1101;SCL:1;SRVR:BYAPR02MB5158;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;A:1; 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Signed-off-by: Rajan Vaja Signed-off-by: Tejas Patel Signed-off-by: Jolly Shah --- drivers/clk/zynqmp/clk-zynqmp.h | 1 + drivers/clk/zynqmp/clkc.c | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/drivers/clk/zynqmp/clk-zynqmp.h b/drivers/clk/zynqmp/clk-zynqmp.h index fec9a15..5beeb41 100644 --- a/drivers/clk/zynqmp/clk-zynqmp.h +++ b/drivers/clk/zynqmp/clk-zynqmp.h @@ -30,6 +30,7 @@ struct clock_topology { u32 type; u32 flag; u32 type_flag; + u8 custom_type_flag; }; struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id, diff --git a/drivers/clk/zynqmp/clkc.c b/drivers/clk/zynqmp/clkc.c index 5eed5ce..e12d01c 100644 --- a/drivers/clk/zynqmp/clkc.c +++ b/drivers/clk/zynqmp/clkc.c @@ -84,6 +84,7 @@ struct name_resp { struct topology_resp { #define CLK_TOPOLOGY_TYPE GENMASK(3, 0) +#define CLK_TOPOLOGY_CUSTOM_TYPE_FLAGS GENMASK(7, 4) #define CLK_TOPOLOGY_FLAGS GENMASK(23, 8) #define CLK_TOPOLOGY_TYPE_FLAGS GENMASK(31, 24) u32 topology[CLK_GET_TOPOLOGY_RESP_WORDS]; @@ -395,6 +396,9 @@ static int __zynqmp_clock_get_topology(struct clock_topology *topology, topology[*nnodes].type_flag = FIELD_GET(CLK_TOPOLOGY_TYPE_FLAGS, response->topology[i]); + topology[*nnodes].custom_type_flag = + FIELD_GET(CLK_TOPOLOGY_CUSTOM_TYPE_FLAGS, + response->topology[i]); (*nnodes)++; } From patchwork Thu Mar 12 21:31:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jolly Shah X-Patchwork-Id: 11435503 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EB937913 for ; Thu, 12 Mar 2020 21:32:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BF237205F4 for ; Thu, 12 Mar 2020 21:32:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=xilinx.onmicrosoft.com header.i=@xilinx.onmicrosoft.com header.b="FY0EDykj" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726491AbgCLVcP (ORCPT ); Thu, 12 Mar 2020 17:32:15 -0400 Received: from mail-eopbgr700040.outbound.protection.outlook.com ([40.107.70.40]:51040 "EHLO NAM04-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726246AbgCLVcL (ORCPT ); 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Thu, 12 Mar 2020 14:32:01 -0700 Received: from [172.19.2.91] (helo=xsjjollys50.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jCVQn-0006iZ-14; Thu, 12 Mar 2020 14:31:53 -0700 From: Jolly Shah To: olof@lixom.net, mturquette@baylibre.com, sboyd@kernel.org, michal.simek@xilinx.com, arm@kernel.org, linux-clk@vger.kernel.org Cc: rajanv@xilinx.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tejas Patel , Rajan Vaja , Jolly Shah Subject: [PATCH v2 2/2] drivers: clk: zynqmp: Update fraction clock check from custom type flags Date: Thu, 12 Mar 2020 14:31:39 -0700 Message-Id: <1584048699-24186-3-git-send-email-jolly.shah@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1584048699-24186-1-git-send-email-jolly.shah@xilinx.com> References: <1584048699-24186-1-git-send-email-jolly.shah@xilinx.com> X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(4636009)(396003)(136003)(39860400002)(376002)(346002)(199004)(356004)(9786002)(54906003)(336012)(36756003)(316002)(426003)(107886003)(186003)(2616005)(4326008)(26005)(81156014)(15650500001)(81166006)(7696005)(5660300002)(6666004)(8936002)(70586007)(8676002)(44832011)(70206006)(478600001)(2906002);DIR:OUT;SFP:1101;SCL:1;SRVR:DM6PR02MB7033;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;A:1; MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: bfd8371e-8da9-44e9-4264-08d7c6ccd10b X-MS-TrafficTypeDiagnostic: DM6PR02MB7033: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:7691; X-Forefront-PRVS: 0340850FCD X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 8+Mv1G2tLiRIyRtLaTMhxb5yrYad5tBECOSV11T4kGryS/7F/J53q9rkkHQ9zJP2asa2INkw5w6HHj8X8Wuw7VA5iVPtu+/qKTEbl/Pa7ubgEnCxDZI/WhkT8Iuos0dEHunEM2Q7NFMKbdam3nCSfr4ly2HfUtni0atfdJ3UWgA4xYFeL9b2sPegTrdWo49Qy6DiG8ySYsyeUB2BTdiMkQ4kB4vjuaMXpgCmlzA9VYdIhtAULVINOBxmcpYKOIyRd4zdub26Q/G3DndNfxocydbBj/uQZydtW3XNkCIqOERUf7qsVleg1o8oDW2t1IHgETtkU1fxMBH99wT/t9xf+tgbs0gBE935Ms+3GdTlxQ9j3FnK1VEqHCRBC+sTsO70aTFKcdvErLqkDZeQtqgAVnWHBI9QDUDtv8DBNr5QyqpDyo99vHogW8RuRhGOxtYo X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2020 21:32:07.7257 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bfd8371e-8da9-44e9-4264-08d7c6ccd10b X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR02MB7033 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Tejas Patel Older firmware version sets BIT(13) in clkflag to mark a divider as fractional divider. Updated firmware version sets BIT(4) in type flags to mark a divider as fractional divider since BIT(13) is defined as CLK_DUTY_CYCLE_PARENT in the common clk framework flags. To support both old and new firmware version, consider BIT(13) from clkflag and BIT(4) from type_flag to check if divider is fractional or not. To maintain compatibility BIT(13) of clkflag in firmware will not be used in future for any purpose and will be marked as unused. Signed-off-by: Tejas Patel Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah --- drivers/clk/zynqmp/divider.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c index 8eed715..efe2ed6 100644 --- a/drivers/clk/zynqmp/divider.c +++ b/drivers/clk/zynqmp/divider.c @@ -25,7 +25,8 @@ #define to_zynqmp_clk_divider(_hw) \ container_of(_hw, struct zynqmp_clk_divider, hw) -#define CLK_FRAC BIT(13) /* has a fractional parent */ +#define CLK_FRAC BIT(13) /* has a fractional parent */ +#define CUSTOM_FLAG_CLK_FRAC BIT(0) /* has a fractional parent in custom type flag */ /** * struct zynqmp_clk_divider - adjustable divider clock @@ -307,7 +308,8 @@ struct clk_hw *zynqmp_clk_register_divider(const char *name, init.num_parents = 1; /* struct clk_divider assignments */ - div->is_frac = !!(nodes->flag & CLK_FRAC); + div->is_frac = !!((nodes->flag & CLK_FRAC) | + (nodes->custom_type_flag & CUSTOM_FLAG_CLK_FRAC)); div->flags = nodes->type_flag; div->hw.init = &init; div->clk_id = clk_id;