From patchwork Fri Mar 13 16:29:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 11437401 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BE2501667 for ; Fri, 13 Mar 2020 16:29:40 +0000 (UTC) Received: by mail.kernel.org (Postfix) id B8C04206E7; Fri, 13 Mar 2020 16:29:40 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5562E206CD; Fri, 13 Mar 2020 16:29:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="ARMt9QUu" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5562E206CD Authentication-Results: mail.kernel.org; dmarc=pass (p=none dis=none) header.from=st.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alexandre.torgue@st.com Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 02DGJBhd022109; Fri, 13 Mar 2020 17:29:36 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=to : cc : from : subject : message-id : date : mime-version : content-type : content-transfer-encoding; s=STMicroelectronics; bh=+hCGBJ1FAH9tDrjrj9ZmFEYsxVmRQdaLVo8Pm3Dd/O0=; b=ARMt9QUuwslQe5HpL1gTeOmBH9T1B99D0O0HbkiHdKQ3kDGpoYEq2Vmk4zFBKrlWyvnK QBLaby5fm6VNQHsxgHU7UsyzC4YxLd016zvfnGg3v685Cc9HN3JguqfhiNIK9JY3KonD Z9/zmYkAsYZdVw7rbp6AiweuTrzaxAeS9L9M9Sz7+nTDA241DfbM0b1vzXDJTOig8y7i mPJMI1PXU400eSaws0nrxY+xinGNsdDeXSj0Rdr1+QmM5D93JEvZiU+U5HKsDfSqvSmD pPfl8RGTlnaTFK/0AAJE+Nv9RJMPgCp8MEC2jk0m3s/LYyuDMZQ6pE2gDqjDPEoyna0L jg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2yqt81awdv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 13 Mar 2020 17:29:36 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5A9D110002A; Fri, 13 Mar 2020 17:29:36 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 4970E2B0350; Fri, 13 Mar 2020 17:29:36 +0100 (CET) Received: from lmecxl0912.lme.st.com (10.75.127.45) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 13 Mar 2020 17:29:35 +0100 List-Id: To: Arnd Bergmann , Olof Johansson , Kevin Hilman , SoC Team , arm-soc , "linux-arm-kernel@lists.infradead.org" CC: Maxime Coquelin , Alexandre TORGUE From: Alexandre Torgue Subject: [GIT PULL] STM32 SOC changes for v5.7 #1 Message-ID: <4e427e37-99c9-239a-f3f8-a3bf50eb1eb2@st.com> Date: Fri, 13 Mar 2020 17:29:35 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 Content-Language: en-US X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG6NODE2.st.com (10.75.127.17) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-03-13_06:2020-03-12,2020-03-13 signatures=0 Hi Arnd, Olof and Kevin, Please consider this first round of STM32 SOC updates for v5.7. Regards Alex The following changes since commit bb6d3fb354c5ee8d6bde2d576eb7220ea09862b9: Linux 5.6-rc1 (2020-02-09 16:08:48 -0800) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git tags/stm32-soc-for-v5.7-1 for you to fetch changes up to 62c1594d38805938e566b059573c0b1e49da6b70: ARM: debug: stm32: add UART early console support for STM32MP1 (2020-03-13 17:05:07 +0100) ---------------------------------------------------------------- STM32 SoC updates for v5.7, round 1 Highlights: ---------- - Add early console support for all STM32 SoCs: F4/F7/H7/MP1 ---------------------------------------------------------------- Erwan Le Ray (4): ARM: debug: stm32: add UART early console configuration for STM32F4 ARM: debug: stm32: add UART early console configuration for STM32F7 ARM: debug: stm32: add UART early console support for STM32H7 ARM: debug: stm32: add UART early console support for STM32MP1 arch/arm/Kconfig.debug | 42 ++++++++++++++++++++++++++++++++++++------ arch/arm/include/debug/stm32.S | 9 ++++----- 2 files changed, 40 insertions(+), 11 deletions(-)