From patchwork Mon Mar 16 03:42:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11439611 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 26D556CA for ; Mon, 16 Mar 2020 03:42:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 04974205ED for ; Mon, 16 Mar 2020 03:42:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="T7LurlWU" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729778AbgCPDmb (ORCPT ); Sun, 15 Mar 2020 23:42:31 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:32774 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729412AbgCPDm3 (ORCPT ); Sun, 15 Mar 2020 23:42:29 -0400 X-UUID: 1dca7aa6cbe14c328b81ae2b225bc9ed-20200316 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=2n1jbN0aFTiIaktwTHSYeQIQlAsNVmZF3PeENRWqbP4=; b=T7LurlWUNSYrVWy0xBj0mcX8O2qQ1252XGyNOONChicsuu11a63PKQcSrf0XjUFYbcX5/cBEj1iWMUCHslrKfJ0LdHCWSlEvKOvTAGDWaBcFBtoithf8hI6vYaLM7AZ267/v5Wqd3Wrha8GUw5lQWpplTsFxSFZRlWMyydAPPS0=; X-UUID: 1dca7aa6cbe14c328b81ae2b225bc9ed-20200316 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 988276257; Mon, 16 Mar 2020 11:42:21 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 16 Mar 2020 11:39:27 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 16 Mar 2020 11:39:22 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v5 1/8] scsi: ufs: fix uninitialized tx_lanes in ufshcd_disable_tx_lcc() Date: Mon, 16 Mar 2020 11:42:11 +0800 Message-ID: <20200316034218.11914-2-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200316034218.11914-1-stanley.chu@mediatek.com> References: <20200316034218.11914-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 755550E47D50096B7C0B4FB718D384621AF46A383AE267A102FD8114B771EB192000:8 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org In ufshcd_disable_tx_lcc(), if ufshcd_dme_get() or ufshcd_dme_peer_get() get fail, uninitialized variable "tx_lanes" may be used as unexpected lane ID for DME configuration. Fix this issue by initializing "tx_lanes". Signed-off-by: Stanley Chu Reviewed-by: Asutosh Das Reviewed-by: Avri Altman --- drivers/scsi/ufs/ufshcd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 5698f1164a5e..314e808b0d4e 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -4315,7 +4315,7 @@ EXPORT_SYMBOL_GPL(ufshcd_hba_enable); static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer) { - int tx_lanes, i, err = 0; + int tx_lanes = 0, i, err = 0; if (!peer) ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), From patchwork Mon Mar 16 03:42:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11439627 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3BD166CA for ; Mon, 16 Mar 2020 03:42:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0FFAC20663 for ; Mon, 16 Mar 2020 03:42:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="epgJHSxv" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729701AbgCPDm2 (ORCPT ); Sun, 15 Mar 2020 23:42:28 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:9457 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729464AbgCPDm2 (ORCPT ); Sun, 15 Mar 2020 23:42:28 -0400 X-UUID: eebad8e251bb4b9085beefba94b385aa-20200316 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=ikeM6USnofcLzLgmKP7G/9OPNmeuuC9DZraNBhJ4krE=; b=epgJHSxv2b78m4xwA7dhThN/L9Vuii2BndRZnsaVw1HnUEFnxO6rm5IB6oAncTfAtBMXcycoSnCzseJzYymPjcv+9Pc0CbmKbOXi2nt96h2qP8NHTBPKEbcoOQwRb9Q8Cz1HXiJeCvl5VcdE20JhvaRSgHPPNz+/boGHjcvViBU=; X-UUID: eebad8e251bb4b9085beefba94b385aa-20200316 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 146795679; Mon, 16 Mar 2020 11:42:20 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 16 Mar 2020 11:41:13 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 16 Mar 2020 11:39:22 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v5 2/8] scsi: ufs: remove init_prefetch_data in struct ufs_hba Date: Mon, 16 Mar 2020 11:42:12 +0800 Message-ID: <20200316034218.11914-3-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200316034218.11914-1-stanley.chu@mediatek.com> References: <20200316034218.11914-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Struct init_prefetch_data currently is used privately in ufshcd_init_icc_levels(), thus it can be removed from struct ufs_hba. Signed-off-by: Stanley Chu Reviewed-by: Asutosh Das Reviewed-by: Avri Altman --- drivers/scsi/ufs/ufshcd.c | 15 ++++++--------- drivers/scsi/ufs/ufshcd.h | 11 ----------- 2 files changed, 6 insertions(+), 20 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 314e808b0d4e..b4988b9ee36c 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -6501,6 +6501,7 @@ static void ufshcd_init_icc_levels(struct ufs_hba *hba) { int ret; int buff_len = hba->desc_size.pwr_desc; + u32 icc_level; u8 *desc_buf; desc_buf = kmalloc(buff_len, GFP_KERNEL); @@ -6516,21 +6517,17 @@ static void ufshcd_init_icc_levels(struct ufs_hba *hba) goto out; } - hba->init_prefetch_data.icc_level = - ufshcd_find_max_sup_active_icc_level(hba, - desc_buf, buff_len); - dev_dbg(hba->dev, "%s: setting icc_level 0x%x", - __func__, hba->init_prefetch_data.icc_level); + icc_level = + ufshcd_find_max_sup_active_icc_level(hba, desc_buf, buff_len); + dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level); ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR, - QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, - &hba->init_prefetch_data.icc_level); + QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level); if (ret) dev_err(hba->dev, "%s: Failed configuring bActiveICCLevel = %d ret = %d", - __func__, hba->init_prefetch_data.icc_level , ret); - + __func__, icc_level, ret); out: kfree(desc_buf); } diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 5c10777154fc..5cf79d2319a6 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -402,15 +402,6 @@ struct ufs_clk_scaling { bool is_suspended; }; -/** - * struct ufs_init_prefetch - contains data that is pre-fetched once during - * initialization - * @icc_level: icc level which was read during initialization - */ -struct ufs_init_prefetch { - u32 icc_level; -}; - #define UFS_ERR_REG_HIST_LENGTH 8 /** * struct ufs_err_reg_hist - keeps history of errors @@ -541,7 +532,6 @@ enum ufshcd_quirks { * @intr_mask: Interrupt Mask Bits * @ee_ctrl_mask: Exception event control mask * @is_powered: flag to check if HBA is powered - * @init_prefetch_data: data pre-fetched during initialization * @eh_work: Worker to handle UFS errors that require s/w attention * @eeh_work: Worker to handle exception events * @errors: HBA errors @@ -627,7 +617,6 @@ struct ufs_hba { u32 intr_mask; u16 ee_ctrl_mask; bool is_powered; - struct ufs_init_prefetch init_prefetch_data; /* Work Queues */ struct work_struct eh_work; From patchwork Mon Mar 16 03:42:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11439621 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 77DCA6CA for ; Mon, 16 Mar 2020 03:42:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 55D3320663 for ; Mon, 16 Mar 2020 03:42:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="VLEej7vn" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729768AbgCPDmb (ORCPT ); Sun, 15 Mar 2020 23:42:31 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:9457 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729670AbgCPDmb (ORCPT ); Sun, 15 Mar 2020 23:42:31 -0400 X-UUID: be4a7a0fc63445498db5ba6f8e4bb29d-20200316 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=comnSPzFToao8NwdqlqhLeyaZnCDbqkqIJ5WKJCYFU0=; b=VLEej7vnKCKKfWHm3V1ElQN64LaZkfbXUJAh3aHPkELmtdosOdfyHJS8xV+Bihj7xsuUNKFhzhJh+lLJfdMg3+kya6DW4mQuBSY372qp6WhvM8iZqB2lxTYxBmR5ZEF67umVhCBLm2cXEUpK9+ipXEDKsGmkiMEGcD0cSHL0rCI=; X-UUID: be4a7a0fc63445498db5ba6f8e4bb29d-20200316 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 234091888; Mon, 16 Mar 2020 11:42:21 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 16 Mar 2020 11:40:04 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 16 Mar 2020 11:39:22 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v5 3/8] scsi: ufs: use an enum for host capabilities Date: Mon, 16 Mar 2020 11:42:13 +0800 Message-ID: <20200316034218.11914-4-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200316034218.11914-1-stanley.chu@mediatek.com> References: <20200316034218.11914-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Use an enum to specify the host capabilities instead of #defines inside the structure definition. Signed-off-by: Stanley Chu Reviewed-by: Asutosh Das Reviewed-by: Avri Altman Reviewed-by: Can Guo --- drivers/scsi/ufs/ufshcd.h | 65 ++++++++++++++++++++++----------------- 1 file changed, 37 insertions(+), 28 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 5cf79d2319a6..fec004cd8054 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -501,6 +501,43 @@ enum ufshcd_quirks { UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION = 1 << 5, }; +enum ufshcd_caps { + /* Allow dynamic clk gating */ + UFSHCD_CAP_CLK_GATING = 1 << 0, + + /* Allow hiberb8 with clk gating */ + UFSHCD_CAP_HIBERN8_WITH_CLK_GATING = 1 << 1, + + /* Allow dynamic clk scaling */ + UFSHCD_CAP_CLK_SCALING = 1 << 2, + + /* Allow auto bkops to enabled during runtime suspend */ + UFSHCD_CAP_AUTO_BKOPS_SUSPEND = 1 << 3, + + /* + * This capability allows host controller driver to use the UFS HCI's + * interrupt aggregation capability. + * CAUTION: Enabling this might reduce overall UFS throughput. + */ + UFSHCD_CAP_INTR_AGGR = 1 << 4, + + /* + * This capability allows the device auto-bkops to be always enabled + * except during suspend (both runtime and suspend). + * Enabling this capability means that device will always be allowed + * to do background operation when it's active but it might degrade + * the performance of ongoing read/write operations. + */ + UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND = 1 << 5, + + /* + * This capability allows host controller driver to automatically + * enable runtime power management by itself instead of waiting + * for userspace to control the power management. + */ + UFSHCD_CAP_RPM_AUTOSUSPEND = 1 << 6, +}; + /** * struct ufs_hba - per adapter private structure * @mmio_base: UFSHCI base register address @@ -653,34 +690,6 @@ struct ufs_hba { struct ufs_clk_gating clk_gating; /* Control to enable/disable host capabilities */ u32 caps; - /* Allow dynamic clk gating */ -#define UFSHCD_CAP_CLK_GATING (1 << 0) - /* Allow hiberb8 with clk gating */ -#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1) - /* Allow dynamic clk scaling */ -#define UFSHCD_CAP_CLK_SCALING (1 << 2) - /* Allow auto bkops to enabled during runtime suspend */ -#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3) - /* - * This capability allows host controller driver to use the UFS HCI's - * interrupt aggregation capability. - * CAUTION: Enabling this might reduce overall UFS throughput. - */ -#define UFSHCD_CAP_INTR_AGGR (1 << 4) - /* - * This capability allows the device auto-bkops to be always enabled - * except during suspend (both runtime and suspend). - * Enabling this capability means that device will always be allowed - * to do background operation when it's active but it might degrade - * the performance of ongoing read/write operations. - */ -#define UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND (1 << 5) - /* - * This capability allows host controller driver to automatically - * enable runtime power management by itself instead of waiting - * for userspace to control the power management. - */ -#define UFSHCD_CAP_RPM_AUTOSUSPEND (1 << 6) struct devfreq *devfreq; struct ufs_clk_scaling clk_scaling; From patchwork Mon Mar 16 03:42:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11439617 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E279217E6 for ; Mon, 16 Mar 2020 03:42:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C097D20663 for ; Mon, 16 Mar 2020 03:42:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="j05u419U" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729849AbgCPDmd (ORCPT ); Sun, 15 Mar 2020 23:42:33 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:32774 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729777AbgCPDmc (ORCPT ); Sun, 15 Mar 2020 23:42:32 -0400 X-UUID: 436bd37a8d07470b86ef8cfe13027a5c-20200316 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=72UBOzniyWm4y4n4LaKKa9c9MBHl4xVeqcQKuznvQB4=; b=j05u419UPzZm0RwpmJqNt2hWEx2vxWDlx93B6oJ7vAWQ3SiS4nXysrPESP1HvZOBbiMXx0xTA41vok5IHsQD2emyNcVUs+zNELP3Gub6sHPQqRLkTgAidSEpD/+LCozW1VD82s4bt1I6o2KS+uk6lhlT6TelAS9i5P5Igrmv+5A=; X-UUID: 436bd37a8d07470b86ef8cfe13027a5c-20200316 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 533770070; Mon, 16 Mar 2020 11:42:21 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 16 Mar 2020 11:39:28 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 16 Mar 2020 11:39:22 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v5 4/8] scsi: ufs: introduce common delay function Date: Mon, 16 Mar 2020 11:42:14 +0800 Message-ID: <20200316034218.11914-5-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200316034218.11914-1-stanley.chu@mediatek.com> References: <20200316034218.11914-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: E55C0BC9030F896BD24F94379537FAC0D42BD437E75CC5152EA2C60137ED5D822000:8 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Introduce common delay function to collect all delay requirements to simplify driver and take choices of udelay and usleep_range into consideration. Signed-off-by: Stanley Chu Reviewed-by: Avri Altman --- drivers/scsi/ufs/ufshcd.c | 27 ++++++++++++++++++--------- drivers/scsi/ufs/ufshcd.h | 1 + 2 files changed, 19 insertions(+), 9 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index b4988b9ee36c..ce65d321a73f 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -597,6 +597,18 @@ static void ufshcd_print_pwr_info(struct ufs_hba *hba) hba->pwr_info.hs_rate); } +void ufshcd_wait_us(unsigned long us, unsigned long tolerance, bool can_sleep) +{ + if (!us) + return; + + if (us < 10 || !can_sleep) + udelay(us); + else + usleep_range(us, us + tolerance); +} +EXPORT_SYMBOL_GPL(ufshcd_wait_us); + /* * ufshcd_wait_for_register - wait for register value to change * @hba - per-adapter interface @@ -620,10 +632,7 @@ int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, val = val & mask; while ((ufshcd_readl(hba, reg) & mask) != val) { - if (can_sleep) - usleep_range(interval_us, interval_us + 50); - else - udelay(interval_us); + ufshcd_wait_us(interval_us, 50, can_sleep); if (time_after(jiffies, timeout)) { if ((ufshcd_readl(hba, reg) & mask) != val) err = -ETIMEDOUT; @@ -3565,7 +3574,7 @@ static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba) } /* allow sleep for extra 50us if needed */ - usleep_range(min_sleep_time_us, min_sleep_time_us + 50); + ufshcd_wait_us(min_sleep_time_us, 50, true); } /** @@ -4289,7 +4298,7 @@ int ufshcd_hba_enable(struct ufs_hba *hba) * instruction might be read back. * This delay can be changed based on the controller. */ - usleep_range(1000, 1100); + ufshcd_wait_us(1000, 100, true); /* wait for the host controller to complete initialization */ retry = 10; @@ -4301,7 +4310,7 @@ int ufshcd_hba_enable(struct ufs_hba *hba) "Controller enable failed\n"); return -EIO; } - usleep_range(5000, 5100); + ufshcd_wait_us(5000, 100, true); } /* enable UIC related interrupts */ @@ -6224,7 +6233,7 @@ static int ufshcd_abort(struct scsi_cmnd *cmd) reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL); if (reg & (1 << tag)) { /* sleep for max. 200us to stabilize */ - usleep_range(100, 200); + ufshcd_wait_us(100, 100, true); continue; } /* command completed already */ @@ -7783,7 +7792,7 @@ static void ufshcd_vreg_set_lpm(struct ufs_hba *hba) */ if (!ufshcd_is_link_active(hba) && hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM) - usleep_range(2000, 2100); + ufshcd_wait_us(2000, 100, true); /* * If UFS device is either in UFS_Sleep turn off VCC rail to save some diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index fec004cd8054..4683e7bf6640 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -781,6 +781,7 @@ int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int); int ufshcd_make_hba_operational(struct ufs_hba *hba); void ufshcd_remove(struct ufs_hba *); int ufshcd_uic_hibern8_exit(struct ufs_hba *hba); +void ufshcd_wait_us(unsigned long us, unsigned long tolerance, bool can_sleep); int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, u32 val, unsigned long interval_us, unsigned long timeout_ms, bool can_sleep); From patchwork Mon Mar 16 03:42:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11439619 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0DCC76CA for ; Mon, 16 Mar 2020 03:42:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DF7D220679 for ; Mon, 16 Mar 2020 03:42:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Mr1hzWlu" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729893AbgCPDmk (ORCPT ); Sun, 15 Mar 2020 23:42:40 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:9457 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729464AbgCPDmd (ORCPT ); Sun, 15 Mar 2020 23:42:33 -0400 X-UUID: 374fa7bed0534eb2b7b4c88352a47c09-20200316 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=i5xKHRSLe6EH/Hd0CHHZQLx7IJZBnYtRiQkeI0EGKSo=; b=Mr1hzWluIDUe2cYZAvAlYhXkSdbd05nNJl8X18vrjMQwKc0uG62IXrDwLGnxU/9mg4ac15oGOHa+w/1PT0dIsqYKZDOQLYTmvdGTTFQDzrE+fgpZMd5PUzQZ4m5lkl6rEbF5ExTNKLxLHHO0heDe77ifyEKq7Rm+tJ4oOVMjXf4=; X-UUID: 374fa7bed0534eb2b7b4c88352a47c09-20200316 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1897470781; Mon, 16 Mar 2020 11:42:21 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 16 Mar 2020 11:40:05 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 16 Mar 2020 11:39:22 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v5 5/8] scsi: ufs-mediatek: replace all delay places by common delay function Date: Mon, 16 Mar 2020 11:42:15 +0800 Message-ID: <20200316034218.11914-6-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200316034218.11914-1-stanley.chu@mediatek.com> References: <20200316034218.11914-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org A common delay function is introduced in UFS core driver, thus ufs-mediatek can use it to replace all delay codes. Signed-off-by: Stanley Chu Reviewed-by: Avri Altman --- drivers/scsi/ufs/ufs-mediatek.c | 21 +++++---------------- 1 file changed, 5 insertions(+), 16 deletions(-) diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c index 3b0e575d7460..0ff6781654fd 100644 --- a/drivers/scsi/ufs/ufs-mediatek.c +++ b/drivers/scsi/ufs/ufs-mediatek.c @@ -100,17 +100,6 @@ static int ufs_mtk_bind_mphy(struct ufs_hba *hba) return err; } -static void ufs_mtk_udelay(unsigned long us) -{ - if (!us) - return; - - if (us < 10) - udelay(us); - else - usleep_range(us, us + 10); -} - static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on) { struct ufs_mtk_host *host = ufshcd_get_variant(hba); @@ -123,7 +112,7 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on) if (on) { ufs_mtk_ref_clk_notify(on, res); - ufs_mtk_udelay(host->ref_clk_ungating_wait_us); + ufshcd_wait_us(host->ref_clk_ungating_wait_us, 10, true); ufshcd_writel(hba, REFCLK_REQUEST, REG_UFS_REFCLK_CTRL); } else { ufshcd_writel(hba, REFCLK_RELEASE, REG_UFS_REFCLK_CTRL); @@ -138,7 +127,7 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on) if (((value & REFCLK_ACK) >> 1) == (value & REFCLK_REQUEST)) goto out; - usleep_range(100, 200); + ufshcd_wait_us(100, 100, true); } while (time_before(jiffies, timeout)); dev_err(hba->dev, "missing ack of refclk req, reg: 0x%x\n", value); @@ -150,7 +139,7 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on) out: host->ref_clk_enabled = on; if (!on) { - ufs_mtk_udelay(host->ref_clk_gating_wait_us); + ufshcd_wait_us(host->ref_clk_gating_wait_us, 10, true); ufs_mtk_ref_clk_notify(on, res); } @@ -430,12 +419,12 @@ static void ufs_mtk_device_reset(struct ufs_hba *hba) * * To be on safe side, keep the reset low for at least 10us. */ - usleep_range(10, 15); + ufshcd_wait_us(10, 5, true); ufs_mtk_device_reset_ctrl(1, res); /* Some devices may need time to respond to rst_n */ - usleep_range(10000, 15000); + ufshcd_wait_us(10000, 5000, true); dev_info(hba->dev, "device reset done\n"); } From patchwork Mon Mar 16 03:42:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11439631 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 36B8014DD for ; Mon, 16 Mar 2020 03:42:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 15D7E20679 for ; Mon, 16 Mar 2020 03:42:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Sfoq77Gz" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729616AbgCPDm1 (ORCPT ); Sun, 15 Mar 2020 23:42:27 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:40904 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729412AbgCPDm1 (ORCPT ); Sun, 15 Mar 2020 23:42:27 -0400 X-UUID: 79b4cfe8462b4f05a5c81c73e20df238-20200316 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=BRn9NnqZ3MzE/akuLUo0HDeyKdjugwz7nkNYDj/5mmw=; b=Sfoq77GzGA90VNjhb7lWXK/iPwbctW/hselRh+FxTUuj8tA6bHsEfsVevuS0Ll/AIaLGASNMOrIWBDHhKudFLFQQkvi1Xm3XQob53QdBpORStKENt7Z6Yv+vAPnhTteq41dddX8+ukUu0kS/dMV8tvwrQOlLz3TehBt95FZf9vA=; X-UUID: 79b4cfe8462b4f05a5c81c73e20df238-20200316 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1573393322; Mon, 16 Mar 2020 11:42:21 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs05n1.mediatek.inc (172.21.101.15) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 16 Mar 2020 11:41:03 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 16 Mar 2020 11:39:23 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v5 6/8] scsi: ufs: allow customized delay for host enabling Date: Mon, 16 Mar 2020 11:42:16 +0800 Message-ID: <20200316034218.11914-7-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200316034218.11914-1-stanley.chu@mediatek.com> References: <20200316034218.11914-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Currently a 1 ms delay is applied before polling CONTROLLER_ENABLE bit. This delay may not be required or can be changed in different controllers. Make the delay as a changeable value in struct ufs_hba to allow it customized by vendors. Signed-off-by: Stanley Chu Reviewed-by: Avri Altman Reviewed-by: Can Guo --- drivers/scsi/ufs/ufshcd.c | 3 ++- drivers/scsi/ufs/ufshcd.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index ce65d321a73f..dcbf45d547d8 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -4298,7 +4298,7 @@ int ufshcd_hba_enable(struct ufs_hba *hba) * instruction might be read back. * This delay can be changed based on the controller. */ - ufshcd_wait_us(1000, 100, true); + ufshcd_wait_us(hba->hba_enable_delay_us, 100, true); /* wait for the host controller to complete initialization */ retry = 10; @@ -8418,6 +8418,7 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq) hba->mmio_base = mmio_base; hba->irq = irq; + hba->hba_enable_delay_us = 1000; err = ufshcd_hba_init(hba); if (err) diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 4683e7bf6640..269ddb92bb55 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -653,6 +653,7 @@ struct ufs_hba { u32 eh_flags; u32 intr_mask; u16 ee_ctrl_mask; + u16 hba_enable_delay_us; bool is_powered; /* Work Queues */ From patchwork Mon Mar 16 03:42:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11439629 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1523B14DD for ; Mon, 16 Mar 2020 03:42:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E87122071B for ; Mon, 16 Mar 2020 03:42:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="nlpuXPN7" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729686AbgCPDm2 (ORCPT ); Sun, 15 Mar 2020 23:42:28 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:32774 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729423AbgCPDm2 (ORCPT ); Sun, 15 Mar 2020 23:42:28 -0400 X-UUID: e234ed76ab774b75b5c27f8f9640545d-20200316 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=7YpwD2GG32xhcNkZears5WlJqU2pNhGBUQ+n78Lc3nw=; b=nlpuXPN7dly/LYxojhCWJlS1DimwRsV5FAG/PhtwdOavf87hSYy7cN3W4VMszo3vwhRTwfc7RkYEK3+ICnrCJ2odF07m5Kx1KZPtBR8TqDszDd+r3Um7fR0HB40T6EslvmuenenMbng2g38jDdzKNh8jt2UWAYHY6HGfTP4CQ1s=; X-UUID: e234ed76ab774b75b5c27f8f9640545d-20200316 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 347351772; Mon, 16 Mar 2020 11:42:21 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 16 Mar 2020 11:40:05 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 16 Mar 2020 11:39:23 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v5 7/8] scsi: ufs: make HCE polling more compact to improve initialization latency Date: Mon, 16 Mar 2020 11:42:17 +0800 Message-ID: <20200316034218.11914-8-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200316034218.11914-1-stanley.chu@mediatek.com> References: <20200316034218.11914-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Reduce the waiting period between each HCE (Host Controller Enable) polling from 5 ms to 1 ms. In the same time, increase the maximum polling times to make "total polling time" unchanged approximately. This change could make HCE initializatoin faster to improve latency of ufshcd initialization, error recovery, and resume behaviors. Signed-off-by: Stanley Chu Reviewed-by: Avri Altman Reviewed-by: Can Guo --- drivers/scsi/ufs/ufshcd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index dcbf45d547d8..cd33d07c56cf 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -4301,7 +4301,7 @@ int ufshcd_hba_enable(struct ufs_hba *hba) ufshcd_wait_us(hba->hba_enable_delay_us, 100, true); /* wait for the host controller to complete initialization */ - retry = 10; + retry = 50; while (ufshcd_is_hba_active(hba)) { if (retry) { retry--; @@ -4310,7 +4310,7 @@ int ufshcd_hba_enable(struct ufs_hba *hba) "Controller enable failed\n"); return -EIO; } - ufshcd_wait_us(5000, 100, true); + ufshcd_wait_us(1000, 100, true); } /* enable UIC related interrupts */ From patchwork Mon Mar 16 03:42:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanley Chu X-Patchwork-Id: 11439615 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3FD2F14DD for ; Mon, 16 Mar 2020 03:42:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 154A020679 for ; Mon, 16 Mar 2020 03:42:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="JJY8MxT4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729865AbgCPDmg (ORCPT ); Sun, 15 Mar 2020 23:42:36 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:32774 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729412AbgCPDmf (ORCPT ); Sun, 15 Mar 2020 23:42:35 -0400 X-UUID: 777eed79954348c9a8423145f806e79c-20200316 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=dj5KB99V4jIFByooAmxz5JbekKkRboIPOi1U6PTrprM=; b=JJY8MxT4JGltQjMChLOgY1HfCoPlJRkTbajYNSk0qIzXa00xtXJTrzQ0DexJ/08zxMC3Mc2YYZ2WzSwc+RZyY2RzXgY7goxgsMQo1qmZIzRXXnZPCCr+IKnUTj2BR2sEwrXPFJo2gBsNZrTqM6SaNmc2po3595YCVmOEd9BrAU4=; X-UUID: 777eed79954348c9a8423145f806e79c-20200316 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 829949003; Mon, 16 Mar 2020 11:42:21 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 16 Mar 2020 11:39:28 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 16 Mar 2020 11:39:23 +0800 From: Stanley Chu To: , , , , CC: , , , , , , , , , , , , Stanley Chu Subject: [PATCH v5 8/8] scsi: ufs-mediatek: customize the delay for host enabling Date: Mon, 16 Mar 2020 11:42:18 +0800 Message-ID: <20200316034218.11914-9-stanley.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200316034218.11914-1-stanley.chu@mediatek.com> References: <20200316034218.11914-1-stanley.chu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 5ED2083DD05240E8677D8A90F8A69DF74B19B5E5DD5A4CCB8DF7B9520F7891482000:8 X-MTK: N Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org MediaTek platform and UFS controller can dynamically customize the delay for host enabling according to different scenarios. For example, if UniPro enters lower-power mode, such delay can be minimized, otherwise longer delay shall be expected. Signed-off-by: Stanley Chu Reviewed-by: Avri Altman --- drivers/scsi/ufs/ufs-mediatek.c | 43 ++++++++++++++++++++++++++------- drivers/scsi/ufs/ufs-mediatek.h | 1 + 2 files changed, 35 insertions(+), 9 deletions(-) diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c index 0ff6781654fd..c0fd7d2e4d0d 100644 --- a/drivers/scsi/ufs/ufs-mediatek.c +++ b/drivers/scsi/ufs/ufs-mediatek.c @@ -30,11 +30,6 @@ #define ufs_mtk_device_reset_ctrl(high, res) \ ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, high, res) -#define ufs_mtk_unipro_powerdown(hba, powerdown) \ - ufshcd_dme_set(hba, \ - UIC_ARG_MIB_SEL(VS_UNIPROPOWERDOWNCONTROL, 0), \ - powerdown) - static void ufs_mtk_cfg_unipro_cg(struct ufs_hba *hba, bool enable) { u32 tmp; @@ -71,6 +66,21 @@ static void ufs_mtk_cfg_unipro_cg(struct ufs_hba *hba, bool enable) } } +static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba, + enum ufs_notify_change_status status) +{ + struct ufs_mtk_host *host = ufshcd_get_variant(hba); + + if (status == PRE_CHANGE) { + if (host->unipro_lpm) + hba->hba_enable_delay_us = 0; + else + hba->hba_enable_delay_us = 600; + } + + return 0; +} + static int ufs_mtk_bind_mphy(struct ufs_hba *hba) { struct ufs_mtk_host *host = ufshcd_get_variant(hba); @@ -324,12 +334,26 @@ static int ufs_mtk_pwr_change_notify(struct ufs_hba *hba, return ret; } +static int ufs_mtk_unipro_set_pm(struct ufs_hba *hba, u32 lpm) +{ + int ret; + struct ufs_mtk_host *host = ufshcd_get_variant(hba); + + ret = ufshcd_dme_set(hba, + UIC_ARG_MIB_SEL(VS_UNIPROPOWERDOWNCONTROL, 0), + lpm); + if (!ret) + host->unipro_lpm = lpm; + + return ret; +} + static int ufs_mtk_pre_link(struct ufs_hba *hba) { int ret; u32 tmp; - ufs_mtk_unipro_powerdown(hba, 0); + ufs_mtk_unipro_set_pm(hba, 0); /* * Setting PA_Local_TX_LCC_Enable to 0 before link startup @@ -437,7 +461,7 @@ static int ufs_mtk_link_set_hpm(struct ufs_hba *hba) if (err) return err; - err = ufs_mtk_unipro_powerdown(hba, 0); + err = ufs_mtk_unipro_set_pm(hba, 0); if (err) return err; @@ -458,10 +482,10 @@ static int ufs_mtk_link_set_lpm(struct ufs_hba *hba) { int err; - err = ufs_mtk_unipro_powerdown(hba, 1); + err = ufs_mtk_unipro_set_pm(hba, 1); if (err) { /* Resume UniPro state for following error recovery */ - ufs_mtk_unipro_powerdown(hba, 0); + ufs_mtk_unipro_set_pm(hba, 0); return err; } @@ -552,6 +576,7 @@ static struct ufs_hba_variant_ops ufs_hba_mtk_vops = { .name = "mediatek.ufshci", .init = ufs_mtk_init, .setup_clocks = ufs_mtk_setup_clocks, + .hce_enable_notify = ufs_mtk_hce_enable_notify, .link_startup_notify = ufs_mtk_link_startup_notify, .pwr_change_notify = ufs_mtk_pwr_change_notify, .apply_dev_quirks = ufs_mtk_apply_dev_quirks, diff --git a/drivers/scsi/ufs/ufs-mediatek.h b/drivers/scsi/ufs/ufs-mediatek.h index 4c787b99fe41..5bbd3e9cbae2 100644 --- a/drivers/scsi/ufs/ufs-mediatek.h +++ b/drivers/scsi/ufs/ufs-mediatek.h @@ -91,6 +91,7 @@ enum { struct ufs_mtk_host { struct ufs_hba *hba; struct phy *mphy; + bool unipro_lpm; bool ref_clk_enabled; u16 ref_clk_ungating_wait_us; u16 ref_clk_gating_wait_us;