From patchwork Mon Mar 16 14:26:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 11440705 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 879391668 for ; Mon, 16 Mar 2020 16:27:52 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5D6512051A for ; Mon, 16 Mar 2020 16:27:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ufezYnnX" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5D6512051A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:42236 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDsal-0000gZ-Gp for patchwork-qemu-devel@patchwork.kernel.org; Mon, 16 Mar 2020 12:27:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48545) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDqhp-0007PI-5n for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jDqho-0000bP-3M for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:01 -0400 Received: from mail-pf1-x442.google.com ([2607:f8b0:4864:20::442]:44225) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jDqhl-0008Qg-Cq; Mon, 16 Mar 2020 10:26:57 -0400 Received: by mail-pf1-x442.google.com with SMTP id b72so10017218pfb.11; Mon, 16 Mar 2020 07:26:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=l70jAvVnYp9V72sa7a7DmNyd3hGe9AZcFFHBU2hoH0Q=; b=ufezYnnXNznbPxxeTZVCbSni/7kFFYJED4iNadNItvQSoVu9EEfMw6C2fbrFkMIt55 Mjw0i/M8JdQpa5EGF/nGOMN8jBWJhXwJRF0BA+icpZRSMhaPul8m/wZz76fyTHY0Bswm n5PIAs4FP5AirFLKfFjsaeb305ZKuDhEqZVY+wbiOd3bSm2MEg0npz1GX/tuVTaCsT5I EAvi+ttQacE4sdjSQUV0kymtJNYos/3Xg/0j8HhBoHFrYICRzsHQ2ZnXvjd3HQ0jzM8s JVKiH1OKlEMtVA+kmh59N7/cvjpa+pfCQ6CksZ64wDMaBMojdCvp4yFWQevLpOkcIKaM DR5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=l70jAvVnYp9V72sa7a7DmNyd3hGe9AZcFFHBU2hoH0Q=; b=JGjm9GM1Y/+4D5r0yHoaJE5bl03EBwlOu7PnqaUgjOoecBFovFlZ8dhE/ABEsTnnJr IGx9VqNsFyrFtSxofFhjG9uM8wdtV3EI1BD9I/dSJk/uU9V+gRSge8rhrBB5iwRFdvnX peGflE+wIZRwDH8J+SveFK+TvS7xXTINhpUCSGu7HTluU1jHFT26zILPYQEpqkUOJOIB ZqO8uHON253/0mNJa5LwOWdXdxuCJN14DQxI6ItbO0WId1CCVrFPTa7+p+edGORLNgqw jZB+8zQ5f5Flvyq3epYFbshnZ3mH97PLbg4NfiMv/8KiQKVD8GeAtXD3qpoBcaRirIkn IT+A== X-Gm-Message-State: ANhLgQ2iFpN55HeX+DMh1GBdiglv57svhSVyZjZdadXRs+3Sa/71TN/I Hfa/dCsz3KmGF4F1/kIRd5gQ/Rjl2JY= X-Google-Smtp-Source: ADFU+vu4F1j7MgA4Rl/2uRuJnOUIJvLmlt9K9G7SImGXJHslr4pbu0VQqMT2Vu7Q9aUqbcqhu4+6+Q== X-Received: by 2002:a63:ee12:: with SMTP id e18mr122859pgi.33.1584368816180; Mon, 16 Mar 2020 07:26:56 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([203.63.160.49]) by smtp.gmail.com with ESMTPSA id v1sm45564pjy.35.2020.03.16.07.26.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Mar 2020 07:26:55 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Subject: [PATCH v2 1/8] ppc/spapr: Fix FWNMI machine check failure handling Date: Tue, 17 Mar 2020 00:26:06 +1000 Message-Id: <20200316142613.121089-2-npiggin@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200316142613.121089-1-npiggin@gmail.com> References: <20200316142613.121089-1-npiggin@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aravinda Prasad , Alexey Kardashevskiy , qemu-devel@nongnu.org, Nicholas Piggin , Greg Kurz , Ganesh Goudar , David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" ppc_cpu_do_system_reset delivers a system rreset interrupt to the guest, which is certainly not what is intended here. Panic the guest like other failure cases here do. Signed-off-by: Nicholas Piggin Reviewed-by: Greg Kurz --- hw/ppc/spapr_events.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c index 2afd1844e4..11303258d4 100644 --- a/hw/ppc/spapr_events.c +++ b/hw/ppc/spapr_events.c @@ -785,7 +785,6 @@ static uint32_t spapr_mce_get_elog_type(PowerPCCPU *cpu, bool recovered, static void spapr_mce_dispatch_elog(PowerPCCPU *cpu, bool recovered) { SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); - CPUState *cs = CPU(cpu); uint64_t rtas_addr; CPUPPCState *env = &cpu->env; PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); @@ -823,8 +822,7 @@ static void spapr_mce_dispatch_elog(PowerPCCPU *cpu, bool recovered) /* get rtas addr from fdt */ rtas_addr = spapr_get_rtas_addr(); if (!rtas_addr) { - /* Unable to fetch rtas_addr. Hence reset the guest */ - ppc_cpu_do_system_reset(cs); + qemu_system_guest_panicked(NULL); g_free(ext_elog); return; } From patchwork Mon Mar 16 14:26:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 11440753 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D2130139A for ; Mon, 16 Mar 2020 16:47:55 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 922FE20679 for ; Mon, 16 Mar 2020 16:47:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="MkDNaeCo" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 922FE20679 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:42652 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDsuA-0006Ww-NM for patchwork-qemu-devel@patchwork.kernel.org; Mon, 16 Mar 2020 12:47:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48753) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDqhw-0007Sw-SV for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jDqhu-0001tg-OY for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:08 -0400 Received: from mail-pg1-x52d.google.com ([2607:f8b0:4864:20::52d]:42775) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jDqhp-0000ri-UW; Mon, 16 Mar 2020 10:27:02 -0400 Received: by mail-pg1-x52d.google.com with SMTP id h8so9851053pgs.9; Mon, 16 Mar 2020 07:27:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Y0gOmRlRRiLTnewkrQ2Ck3tr44GrH/xtrwB5IZxD7Pg=; b=MkDNaeCoX+hdW1o7vzvJ6rDoRRuphd8PQu4VWxk0MWIgert9YSDQBs/A+EB4g2FF6X +/Yl+dDryohH2q51F3sZtu5Ub2ZgFtUrdp9ep5Z6nsZv4mtvkFlnmEK68PSqQqPYU2ZF FMc1FrJdvgkpWaPyORjY+0RumzI7hpbQLWip9RtrF0yOkvdKekNMOYQafayG85XRKg5p ofWrtW8iEseoWexyDwX+2Z7umner64vhQwUtes7FY5ms50NtzYf1GebQCHmQTu+V3ST5 6LJeH8Gd7/O3V+V+CT9BuoiJ7478SDXIHHFMrpxXmwXKPcYuEOWqVgHHFVSNrTZu/VFK ucHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Y0gOmRlRRiLTnewkrQ2Ck3tr44GrH/xtrwB5IZxD7Pg=; b=XUQ3r0RplH3Je1gA1ACbsRP0oHJuacnMbDflzRZ7cBJzyyu6OpupLFlk7haZ+9ubd5 BKTvko/RE2ghtEhc+hXVkT4UmoOPKc1csuU9pyRATGjzZ8jcJXM36gW7EQeC4wWmCWSx QA1iepXZt4g+9KNQI6oeVZgyqKcedY4CrflGBHJC1HLNx/9XWnpDCBWuy9iasYptMX9m KqvXPwQDiAGY1CInRNi5HdJ3HxjPV8Y1/L/ZKZu5VcUeyTLsCXuavdVBYV2WNyDxS9hS WbrtaznXhpy5/6HnxFdI+D8LK2WDKg0vbSA7Jhx/M2WiYm0ljNGXfxUNuAqFe2LQJvo3 I+6A== X-Gm-Message-State: ANhLgQ0yavwM5ZoXYPPCHwbZRIA8VmNTZajEaVjOXBr8OuX9N5lek4Ci GzhBdhkrci/E/Uc9Ik4x5arZ3D2fZ/I= X-Google-Smtp-Source: ADFU+vtqu98F/2hxTlpe/ArXUl3QHDndf4PgLmDdz5vP0I3ttEaErBJDPUcHD91wziKFuqkW/iJmRg== X-Received: by 2002:a62:2b8a:: with SMTP id r132mr29992096pfr.56.1584368820481; Mon, 16 Mar 2020 07:27:00 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([203.63.160.49]) by smtp.gmail.com with ESMTPSA id v1sm45564pjy.35.2020.03.16.07.26.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Mar 2020 07:27:00 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Subject: [PATCH v2 2/8] ppc/spapr: Change FWNMI names Date: Tue, 17 Mar 2020 00:26:07 +1000 Message-Id: <20200316142613.121089-3-npiggin@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200316142613.121089-1-npiggin@gmail.com> References: <20200316142613.121089-1-npiggin@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::52d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aravinda Prasad , Alexey Kardashevskiy , qemu-devel@nongnu.org, Nicholas Piggin , Greg Kurz , Ganesh Goudar , David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The option is called "FWNMI", and it involves more than just machine checks, also machine checks can be delivered without the FWNMI option, so re-name various things to reflect that. Signed-off-by: Nicholas Piggin Reviewed-by: Greg Kurz Reviewed-by: Cédric Le Goater --- hw/ppc/spapr.c | 28 ++++++++++++++-------------- hw/ppc/spapr_caps.c | 14 +++++++------- hw/ppc/spapr_events.c | 14 +++++++------- hw/ppc/spapr_rtas.c | 17 +++++++++-------- include/hw/ppc/spapr.h | 27 +++++++++++++++++---------- tests/qtest/libqos/libqos-spapr.h | 2 +- 6 files changed, 55 insertions(+), 47 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index d3db3ec56e..b03b26370d 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1704,11 +1704,11 @@ static void spapr_machine_reset(MachineState *machine) spapr->cas_reboot = false; - spapr->mc_status = -1; - spapr->guest_machine_check_addr = -1; + spapr->fwnmi_machine_check_addr = -1; + spapr->fwnmi_machine_check_interlock = -1; /* Signal all vCPUs waiting on this condition */ - qemu_cond_broadcast(&spapr->mc_delivery_cond); + qemu_cond_broadcast(&spapr->fwnmi_machine_check_interlock_cond); migrate_del_blocker(spapr->fwnmi_migration_blocker); } @@ -1997,7 +1997,7 @@ static bool spapr_fwnmi_needed(void *opaque) { SpaprMachineState *spapr = (SpaprMachineState *)opaque; - return spapr->guest_machine_check_addr != -1; + return spapr->fwnmi_machine_check_addr != -1; } static int spapr_fwnmi_pre_save(void *opaque) @@ -2008,7 +2008,7 @@ static int spapr_fwnmi_pre_save(void *opaque) * Check if machine check handling is in progress and print a * warning message. */ - if (spapr->mc_status != -1) { + if (spapr->fwnmi_machine_check_interlock != -1) { warn_report("A machine check is being handled during migration. The" "handler may run and log hardware error on the destination"); } @@ -2016,15 +2016,15 @@ static int spapr_fwnmi_pre_save(void *opaque) return 0; } -static const VMStateDescription vmstate_spapr_machine_check = { - .name = "spapr_machine_check", +static const VMStateDescription vmstate_spapr_fwnmi = { + .name = "spapr_fwnmi", .version_id = 1, .minimum_version_id = 1, .needed = spapr_fwnmi_needed, .pre_save = spapr_fwnmi_pre_save, .fields = (VMStateField[]) { - VMSTATE_UINT64(guest_machine_check_addr, SpaprMachineState), - VMSTATE_INT32(mc_status, SpaprMachineState), + VMSTATE_UINT64(fwnmi_machine_check_addr, SpaprMachineState), + VMSTATE_INT32(fwnmi_machine_check_interlock, SpaprMachineState), VMSTATE_END_OF_LIST() }, }; @@ -2063,7 +2063,7 @@ static const VMStateDescription vmstate_spapr = { &vmstate_spapr_cap_large_decr, &vmstate_spapr_cap_ccf_assist, &vmstate_spapr_cap_fwnmi, - &vmstate_spapr_machine_check, + &vmstate_spapr_fwnmi, NULL } }; @@ -2884,7 +2884,7 @@ static void spapr_machine_init(MachineState *machine) spapr_create_lmb_dr_connectors(spapr); } - if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI_MCE) == SPAPR_CAP_ON) { + if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_ON) { /* Create the error string for live migration blocker */ error_setg(&spapr->fwnmi_migration_blocker, "A machine check is being handled during migration. The handler" @@ -3053,7 +3053,7 @@ static void spapr_machine_init(MachineState *machine) kvmppc_spapr_enable_inkernel_multitce(); } - qemu_cond_init(&spapr->mc_delivery_cond); + qemu_cond_init(&spapr->fwnmi_machine_check_interlock_cond); } static int spapr_kvm_type(MachineState *machine, const char *vm_type) @@ -4534,7 +4534,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data) smc->default_caps.caps[SPAPR_CAP_NESTED_KVM_HV] = SPAPR_CAP_OFF; smc->default_caps.caps[SPAPR_CAP_LARGE_DECREMENTER] = SPAPR_CAP_ON; smc->default_caps.caps[SPAPR_CAP_CCF_ASSIST] = SPAPR_CAP_ON; - smc->default_caps.caps[SPAPR_CAP_FWNMI_MCE] = SPAPR_CAP_ON; + smc->default_caps.caps[SPAPR_CAP_FWNMI] = SPAPR_CAP_ON; spapr_caps_add_properties(smc, &error_abort); smc->irq = &spapr_irq_dual; smc->dr_phb_enabled = true; @@ -4612,7 +4612,7 @@ static void spapr_machine_4_2_class_options(MachineClass *mc) spapr_machine_5_0_class_options(mc); compat_props_add(mc->compat_props, hw_compat_4_2, hw_compat_4_2_len); smc->default_caps.caps[SPAPR_CAP_CCF_ASSIST] = SPAPR_CAP_OFF; - smc->default_caps.caps[SPAPR_CAP_FWNMI_MCE] = SPAPR_CAP_OFF; + smc->default_caps.caps[SPAPR_CAP_FWNMI] = SPAPR_CAP_OFF; smc->rma_limit = 16 * GiB; mc->nvdimm_supported = false; } diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 8b27d3ac09..f626d769a0 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -509,7 +509,7 @@ static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val, } } -static void cap_fwnmi_mce_apply(SpaprMachineState *spapr, uint8_t val, +static void cap_fwnmi_apply(SpaprMachineState *spapr, uint8_t val, Error **errp) { if (!val) { @@ -626,14 +626,14 @@ SpaprCapabilityInfo capability_table[SPAPR_CAP_NUM] = { .type = "bool", .apply = cap_ccf_assist_apply, }, - [SPAPR_CAP_FWNMI_MCE] = { - .name = "fwnmi-mce", - .description = "Handle fwnmi machine check exceptions", - .index = SPAPR_CAP_FWNMI_MCE, + [SPAPR_CAP_FWNMI] = { + .name = "fwnmi", + .description = "Implements PAPR FWNMI option", + .index = SPAPR_CAP_FWNMI, .get = spapr_cap_get_bool, .set = spapr_cap_set_bool, .type = "bool", - .apply = cap_fwnmi_mce_apply, + .apply = cap_fwnmi_apply, }, }; @@ -774,7 +774,7 @@ SPAPR_CAP_MIG_STATE(hpt_maxpagesize, SPAPR_CAP_HPT_MAXPAGESIZE); SPAPR_CAP_MIG_STATE(nested_kvm_hv, SPAPR_CAP_NESTED_KVM_HV); SPAPR_CAP_MIG_STATE(large_decr, SPAPR_CAP_LARGE_DECREMENTER); SPAPR_CAP_MIG_STATE(ccf_assist, SPAPR_CAP_CCF_ASSIST); -SPAPR_CAP_MIG_STATE(fwnmi, SPAPR_CAP_FWNMI_MCE); +SPAPR_CAP_MIG_STATE(fwnmi, SPAPR_CAP_FWNMI); void spapr_caps_init(SpaprMachineState *spapr) { diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c index 11303258d4..27ba8a2c19 100644 --- a/hw/ppc/spapr_events.c +++ b/hw/ppc/spapr_events.c @@ -837,7 +837,7 @@ static void spapr_mce_dispatch_elog(PowerPCCPU *cpu, bool recovered) env->gpr[3] = rtas_addr + RTAS_ERROR_LOG_OFFSET; env->msr = msr; - env->nip = spapr->guest_machine_check_addr; + env->nip = spapr->fwnmi_machine_check_addr; g_free(ext_elog); } @@ -849,7 +849,7 @@ void spapr_mce_req_event(PowerPCCPU *cpu, bool recovered) int ret; Error *local_err = NULL; - if (spapr->guest_machine_check_addr == -1) { + if (spapr->fwnmi_machine_check_addr == -1) { /* * This implies that we have hit a machine check either when the * guest has not registered FWNMI (i.e., "ibm,nmi-register" not @@ -861,19 +861,19 @@ void spapr_mce_req_event(PowerPCCPU *cpu, bool recovered) return; } - while (spapr->mc_status != -1) { + while (spapr->fwnmi_machine_check_interlock != -1) { /* * Check whether the same CPU got machine check error * while still handling the mc error (i.e., before * that CPU called "ibm,nmi-interlock") */ - if (spapr->mc_status == cpu->vcpu_id) { + if (spapr->fwnmi_machine_check_interlock == cpu->vcpu_id) { qemu_system_guest_panicked(NULL); return; } - qemu_cond_wait_iothread(&spapr->mc_delivery_cond); + qemu_cond_wait_iothread(&spapr->fwnmi_machine_check_interlock_cond); /* Meanwhile if the system is reset, then just return */ - if (spapr->guest_machine_check_addr == -1) { + if (spapr->fwnmi_machine_check_addr == -1) { return; } } @@ -889,7 +889,7 @@ void spapr_mce_req_event(PowerPCCPU *cpu, bool recovered) warn_report("Received a fwnmi while migration was in progress"); } - spapr->mc_status = cpu->vcpu_id; + spapr->fwnmi_machine_check_interlock = cpu->vcpu_id; spapr_mce_dispatch_elog(cpu, recovered); } diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index fe83b50c66..0b8c481593 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -415,7 +415,7 @@ static void rtas_ibm_nmi_register(PowerPCCPU *cpu, { hwaddr rtas_addr; - if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI_MCE) == SPAPR_CAP_OFF) { + if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_OFF) { rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); return; } @@ -426,7 +426,8 @@ static void rtas_ibm_nmi_register(PowerPCCPU *cpu, return; } - spapr->guest_machine_check_addr = rtas_ld(args, 1); + spapr->fwnmi_machine_check_addr = rtas_ld(args, 1); + rtas_st(rets, 0, RTAS_OUT_SUCCESS); } @@ -436,18 +437,18 @@ static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu, target_ulong args, uint32_t nret, target_ulong rets) { - if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI_MCE) == SPAPR_CAP_OFF) { + if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_OFF) { rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); return; } - if (spapr->guest_machine_check_addr == -1) { + if (spapr->fwnmi_machine_check_addr == -1) { /* NMI register not called */ rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); return; } - if (spapr->mc_status != cpu->vcpu_id) { + if (spapr->fwnmi_machine_check_interlock != cpu->vcpu_id) { /* The vCPU that hit the NMI should invoke "ibm,nmi-interlock" */ rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); return; @@ -455,10 +456,10 @@ static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu, /* * vCPU issuing "ibm,nmi-interlock" is done with NMI handling, - * hence unset mc_status. + * hence unset fwnmi_machine_check_interlock. */ - spapr->mc_status = -1; - qemu_cond_signal(&spapr->mc_delivery_cond); + spapr->fwnmi_machine_check_interlock = -1; + qemu_cond_signal(&spapr->fwnmi_machine_check_interlock_cond); rtas_st(rets, 0, RTAS_OUT_SUCCESS); migrate_del_blocker(spapr->fwnmi_migration_blocker); } diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 35b489a549..64b83402cb 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -79,10 +79,10 @@ typedef enum { #define SPAPR_CAP_LARGE_DECREMENTER 0x08 /* Count Cache Flush Assist HW Instruction */ #define SPAPR_CAP_CCF_ASSIST 0x09 -/* FWNMI machine check handling */ -#define SPAPR_CAP_FWNMI_MCE 0x0A +/* Implements PAPR FWNMI option */ +#define SPAPR_CAP_FWNMI 0x0A /* Num Caps */ -#define SPAPR_CAP_NUM (SPAPR_CAP_FWNMI_MCE + 1) +#define SPAPR_CAP_NUM (SPAPR_CAP_FWNMI + 1) /* * Capability Values @@ -192,14 +192,21 @@ struct SpaprMachineState { * occurs during the unplug process. */ QTAILQ_HEAD(, SpaprDimmState) pending_dimm_unplugs; - /* State related to "ibm,nmi-register" and "ibm,nmi-interlock" calls */ - target_ulong guest_machine_check_addr; - /* - * mc_status is set to -1 if mc is not in progress, else is set to the CPU - * handling the mc. + /* State related to FWNMI option */ + + /* Machine Check Notification Routine address + * registered by "ibm,nmi-register" RTAS call. + */ + target_ulong fwnmi_machine_check_addr; + + /* Machine Check FWNMI synchronization, fwnmi_machine_check_interlock is + * set to -1 if a FWNMI machine check is not in progress, else is set to + * the CPU that was delivered the machine check, and is set back to -1 + * when that CPU makes an "ibm,nmi-interlock" RTAS call. The cond is used + * to synchronize other CPUs. */ - int mc_status; - QemuCond mc_delivery_cond; + int fwnmi_machine_check_interlock; + QemuCond fwnmi_machine_check_interlock_cond; /*< public >*/ char *kvm_type; diff --git a/tests/qtest/libqos/libqos-spapr.h b/tests/qtest/libqos/libqos-spapr.h index d9c4c22343..16174dbada 100644 --- a/tests/qtest/libqos/libqos-spapr.h +++ b/tests/qtest/libqos/libqos-spapr.h @@ -13,6 +13,6 @@ void qtest_spapr_shutdown(QOSState *qs); "cap-sbbc=broken," \ "cap-ibs=broken," \ "cap-ccf-assist=off," \ - "cap-fwnmi-mce=off" + "cap-fwnmi=off" #endif From patchwork Mon Mar 16 14:26:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 11440653 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AADAB13B1 for ; Mon, 16 Mar 2020 16:05:04 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 407102051A for ; Mon, 16 Mar 2020 16:05:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="bQhphno+" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 407102051A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:40074 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDsEg-0003M0-99 for patchwork-qemu-devel@patchwork.kernel.org; Mon, 16 Mar 2020 12:05:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48811) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDqhy-0007Th-Rw for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jDqhx-0002QJ-Lf for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:10 -0400 Received: from mail-pf1-x442.google.com ([2607:f8b0:4864:20::442]:35160) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jDqhu-0001ke-Ev; Mon, 16 Mar 2020 10:27:06 -0400 Received: by mail-pf1-x442.google.com with SMTP id u68so10036676pfb.2; Mon, 16 Mar 2020 07:27:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bDbE0pWdx402i6b4b97coyniPhlyf+H/P2krEymTHzo=; b=bQhphno+Hlq4pjljuaxdLywBWXs/8rlmt2MBj1CLSi90+BOJHhDwHF18Y/rxXAYxej w6QxaW2z0Ps3rDss0oWYkrRkzC1QHCuJ9DcWFB3CyCegef/BSG6KNtV8wZvAYfnUHZHi qVkSwyqA44nILFceOPm9LHG91o2dqDCJ2Dx0KLGo57LRi+x6kj9/5jQAk6RBWD1j5iBk Q01ylOTonjGbwYpZj4KtjFa1Lsbkk7XokSk65P25yAPUJz37ezhvyZ0Iq4GrTROl8jNm kDGy62kwUDotsRHncOkUvLcv29AZTws5kJuaW+7xCPC21wPX2PWJLTE2LaJs3ZdUt3el ou3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bDbE0pWdx402i6b4b97coyniPhlyf+H/P2krEymTHzo=; b=QlPJEWglG/653rhZQKmajp5AFJPP3vl/Adn4n1KgLGhzZryCBSmF5VVa446exfR4/U rh9U4lL8H1gJQjL3citcim3zuIP59D18PzQC23BOqIXqh9XRO0mqvztgwdAdUK8NMo29 A+iV5+zLxQcP1g32qdY9GIW2f6axey+iVTeY2iBnVG9jkjHJk/pEHDmpS40E3j4nD+tR Z4B/g4t8X26SlMNKNPtbZRVSInxy9BwSkCBemmbjY+Y4I+JlJCLcPKEW1DPcT3eeUDTn c8PvmoXrkAW0IHdrDiPqJDgF8+5gMe4vG/thlWAPdVmdq32EjGN6aUTmNN/NWTIN29xv dsXg== X-Gm-Message-State: ANhLgQ02T86Sv4U2YXdH8NfzCi36lFDjMFcPZnwTAPp8TO1zT4Oh8s7x iPl+VTWm1P/Pu3UZpgYF6FNm8Ty99zY= X-Google-Smtp-Source: ADFU+vt6Q3FCOIX+XkBV1/Lz8CiZKg5IzFJYn3PXeKhkU+1PwPCAjKbQcx3E5cWK/SwLZ2zRmO1aHg== X-Received: by 2002:a62:b604:: with SMTP id j4mr28928311pff.93.1584368825345; Mon, 16 Mar 2020 07:27:05 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([203.63.160.49]) by smtp.gmail.com with ESMTPSA id v1sm45564pjy.35.2020.03.16.07.27.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Mar 2020 07:27:04 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Subject: [PATCH v2 3/8] ppc/spapr: Add FWNMI System Reset state Date: Tue, 17 Mar 2020 00:26:08 +1000 Message-Id: <20200316142613.121089-4-npiggin@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200316142613.121089-1-npiggin@gmail.com> References: <20200316142613.121089-1-npiggin@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aravinda Prasad , Alexey Kardashevskiy , qemu-devel@nongnu.org, Nicholas Piggin , Greg Kurz , Ganesh Goudar , David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The FWNMI option must deliver system reset interrupts to their registered address, and there are a few constraints on the handler addresses specified in PAPR. Add the system reset address state and checks. Signed-off-by: Nicholas Piggin Reviewed-by: Greg Kurz Reviewed-by: Cédric Le Goater --- hw/ppc/spapr.c | 2 ++ hw/ppc/spapr_rtas.c | 14 +++++++++++++- include/hw/ppc/spapr.h | 3 ++- 3 files changed, 17 insertions(+), 2 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index b03b26370d..5f93c49706 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1704,6 +1704,7 @@ static void spapr_machine_reset(MachineState *machine) spapr->cas_reboot = false; + spapr->fwnmi_system_reset_addr = -1; spapr->fwnmi_machine_check_addr = -1; spapr->fwnmi_machine_check_interlock = -1; @@ -2023,6 +2024,7 @@ static const VMStateDescription vmstate_spapr_fwnmi = { .needed = spapr_fwnmi_needed, .pre_save = spapr_fwnmi_pre_save, .fields = (VMStateField[]) { + VMSTATE_UINT64(fwnmi_system_reset_addr, SpaprMachineState), VMSTATE_UINT64(fwnmi_machine_check_addr, SpaprMachineState), VMSTATE_INT32(fwnmi_machine_check_interlock, SpaprMachineState), VMSTATE_END_OF_LIST() diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 0b8c481593..521e6b0b72 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -414,6 +414,7 @@ static void rtas_ibm_nmi_register(PowerPCCPU *cpu, uint32_t nret, target_ulong rets) { hwaddr rtas_addr; + target_ulong sreset_addr, mce_addr; if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_OFF) { rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); @@ -426,7 +427,18 @@ static void rtas_ibm_nmi_register(PowerPCCPU *cpu, return; } - spapr->fwnmi_machine_check_addr = rtas_ld(args, 1); + sreset_addr = rtas_ld(args, 0); + mce_addr = rtas_ld(args, 1); + + /* PAPR requires these are in the first 32M of memory and within RMA */ + if (sreset_addr >= 32 * MiB || sreset_addr >= spapr->rma_size || + mce_addr >= 32 * MiB || mce_addr >= spapr->rma_size) { + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); + return; + } + + spapr->fwnmi_system_reset_addr = sreset_addr; + spapr->fwnmi_machine_check_addr = mce_addr; rtas_st(rets, 0, RTAS_OUT_SUCCESS); } diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 64b83402cb..42d64a0368 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -194,9 +194,10 @@ struct SpaprMachineState { /* State related to FWNMI option */ - /* Machine Check Notification Routine address + /* System Reset and Machine Check Notification Routine addresses * registered by "ibm,nmi-register" RTAS call. */ + target_ulong fwnmi_system_reset_addr; target_ulong fwnmi_machine_check_addr; /* Machine Check FWNMI synchronization, fwnmi_machine_check_interlock is From patchwork Mon Mar 16 14:26:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 11440709 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 27CB01874 for ; Mon, 16 Mar 2020 16:29:58 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F0A8520663 for ; Mon, 16 Mar 2020 16:29:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="a1oCZM/P" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F0A8520663 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:42274 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDscn-00045E-5D for patchwork-qemu-devel@patchwork.kernel.org; Mon, 16 Mar 2020 12:29:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48958) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDqi4-0007WM-8e for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jDqi2-0003Cg-NX for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:16 -0400 Received: from mail-pj1-x1041.google.com ([2607:f8b0:4864:20::1041]:34619) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jDqhy-0002Xu-Ui; Mon, 16 Mar 2020 10:27:11 -0400 Received: by mail-pj1-x1041.google.com with SMTP id q16so1425713pje.1; Mon, 16 Mar 2020 07:27:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pT1O+TzB8Xyv415llsLIfaB9uRO4q6lP+I0js9hZp3k=; b=a1oCZM/PDpcWxkLM7UaR/3r59DeSt0/julv/MUaUMET2XRidcHHPlpXHiOjn9lQu+a XbJVPzmmf5jCZuUgbyqoXmUVqppIl+pVUXkxIe5EDKhum9rqXwjjNTiNNWRothd3I4od zXq+vtHbyAeJHQpq7QNsZhYFXlqc7BlxYhEsC7Fs40qRqFi8WYWJd0ByaOdItUzmj0P+ 1TwGbdlea+3RFX69Y1LpAiIN6DZTJbUHhU4LoA688XLMj6UnaKroRsWmp1n6MPtbXs6a fEb2tfgPcyL5dxqd2q8XkJXNp0W4HEP1U6QUHW2nJQfK/pW6/10LU4Xqd19+oWG1uaBX 4QFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pT1O+TzB8Xyv415llsLIfaB9uRO4q6lP+I0js9hZp3k=; b=paw26PgnorZO+RYGGctFoEWZHoX8cV95VFkKPn60HD+KwQ0Zeay17sMTi034TZpxE1 PxsW5jj4lN+Sf8mBqbyxVvjSEyyt7bsRJKqHeSy13iqlc7NJOOK9X2yLLDEI5UR9+CFo sIiiMJ9ALG6zyBfWYHHgeRYKNfYQWfv1+1AhJg8rflf9Sf5ngyI8F9WFYiqC1ikneSo2 EGHcduu1A4pg28mprRill6N0MpiHs9iFdUVD3sv9IuNXzhxnpnK7Iokw1wdu8BnDZvo3 L2Eo8aAEEM/QtzcCb/fMD6jEYXbAkvir35ESSvjuKePFhlYiWhmFtXmOfKNPqAEGrsb8 Krjg== X-Gm-Message-State: ANhLgQ2rui4LyUPSaZmJ6Gk59w01K3ETYr8FmcE2BD2X2IfxqT5103gu SbwN0xRwMLugBnUVYX7WlytWVAZDM88= X-Google-Smtp-Source: ADFU+vtYdywPM9qSMPvJOOIuvDsFkQlRCgfc3nGp/aHT/pGWKMnSGtMe38th/C5EjQy2GdbUd8ew0w== X-Received: by 2002:a17:902:d705:: with SMTP id w5mr27069814ply.68.1584368829724; Mon, 16 Mar 2020 07:27:09 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([203.63.160.49]) by smtp.gmail.com with ESMTPSA id v1sm45564pjy.35.2020.03.16.07.27.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Mar 2020 07:27:09 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Subject: [PATCH v2 4/8] ppc/spapr: Fix FWNMI machine check interrupt delivery Date: Tue, 17 Mar 2020 00:26:09 +1000 Message-Id: <20200316142613.121089-5-npiggin@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200316142613.121089-1-npiggin@gmail.com> References: <20200316142613.121089-1-npiggin@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1041 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aravinda Prasad , Alexey Kardashevskiy , qemu-devel@nongnu.org, Nicholas Piggin , Greg Kurz , Ganesh Goudar , David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" FWNMI machine check delivery misses a few things that will make it fail with TCG at least (which we would like to allow in future to improve testing). It's not nice to scatter interrupt delivery logic around the tree, so move it to excp_helper.c and share code where possible. Signed-off-by: Nicholas Piggin --- hw/ppc/spapr_events.c | 24 +++---------- target/ppc/cpu.h | 1 + target/ppc/excp_helper.c | 74 ++++++++++++++++++++++++++++------------ 3 files changed, 57 insertions(+), 42 deletions(-) diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c index 27ba8a2c19..323fcef4aa 100644 --- a/hw/ppc/spapr_events.c +++ b/hw/ppc/spapr_events.c @@ -785,28 +785,13 @@ static uint32_t spapr_mce_get_elog_type(PowerPCCPU *cpu, bool recovered, static void spapr_mce_dispatch_elog(PowerPCCPU *cpu, bool recovered) { SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); - uint64_t rtas_addr; + CPUState *cs = CPU(cpu); CPUPPCState *env = &cpu->env; - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); - target_ulong msr = 0; + uint64_t rtas_addr; struct rtas_error_log log; struct mc_extended_log *ext_elog; uint32_t summary; - /* - * Properly set bits in MSR before we invoke the handler. - * SRR0/1, DAR and DSISR are properly set by KVM - */ - if (!(*pcc->interrupts_big_endian)(cpu)) { - msr |= (1ULL << MSR_LE); - } - - if (env->msr & (1ULL << MSR_SF)) { - msr |= (1ULL << MSR_SF); - } - - msr |= (1ULL << MSR_ME); - ext_elog = g_malloc0(sizeof(*ext_elog)); summary = spapr_mce_get_elog_type(cpu, recovered, ext_elog); @@ -834,12 +819,11 @@ static void spapr_mce_dispatch_elog(PowerPCCPU *cpu, bool recovered) cpu_physical_memory_write(rtas_addr + RTAS_ERROR_LOG_OFFSET + sizeof(env->gpr[3]) + sizeof(log), ext_elog, sizeof(*ext_elog)); + g_free(ext_elog); env->gpr[3] = rtas_addr + RTAS_ERROR_LOG_OFFSET; - env->msr = msr; - env->nip = spapr->fwnmi_machine_check_addr; - g_free(ext_elog); + ppc_cpu_do_fwnmi_machine_check(cs, spapr->fwnmi_machine_check_addr); } void spapr_mce_req_event(PowerPCCPU *cpu, bool recovered) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 5a55fb02bd..3953680534 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1221,6 +1221,7 @@ int ppc32_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs, int cpuid, void *opaque); #ifndef CONFIG_USER_ONLY void ppc_cpu_do_system_reset(CPUState *cs); +void ppc_cpu_do_fwnmi_machine_check(CPUState *cs, target_ulong vector); extern const VMStateDescription vmstate_ppc_cpu; #endif diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 027f54c0ed..7f2b5899d3 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -128,6 +128,37 @@ static uint64_t ppc_excp_vector_offset(CPUState *cs, int ail) return offset; } +static inline void powerpc_set_excp_state(PowerPCCPU *cpu, + target_ulong vector, target_ulong msr) +{ + CPUState *cs = CPU(cpu); + CPUPPCState *env = &cpu->env; + + /* + * We don't use hreg_store_msr here as already have treated any + * special case that could occur. Just store MSR and update hflags + * + * Note: We *MUST* not use hreg_store_msr() as-is anyway because it + * will prevent setting of the HV bit which some exceptions might need + * to do. + */ + env->msr = msr & env->msr_mask; + hreg_compute_hflags(env); + env->nip = vector; + /* Reset exception state */ + cs->exception_index = POWERPC_EXCP_NONE; + env->error_code = 0; + + /* Reset the reservation */ + env->reserve_addr = -1; + + /* + * Any interrupt is context synchronizing, check if TCG TLB needs + * a delayed flush on ppc64 + */ + check_tlb_flush(env, false); +} + /* * Note that this function should be greatly optimized when called * with a constant excp, from ppc_hw_interrupt @@ -768,29 +799,8 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) } } #endif - /* - * We don't use hreg_store_msr here as already have treated any - * special case that could occur. Just store MSR and update hflags - * - * Note: We *MUST* not use hreg_store_msr() as-is anyway because it - * will prevent setting of the HV bit which some exceptions might need - * to do. - */ - env->msr = new_msr & env->msr_mask; - hreg_compute_hflags(env); - env->nip = vector; - /* Reset exception state */ - cs->exception_index = POWERPC_EXCP_NONE; - env->error_code = 0; - /* Reset the reservation */ - env->reserve_addr = -1; - - /* - * Any interrupt is context synchronizing, check if TCG TLB needs - * a delayed flush on ppc64 - */ - check_tlb_flush(env, false); + powerpc_set_excp_state(cpu, vector, new_msr); } void ppc_cpu_do_interrupt(CPUState *cs) @@ -958,6 +968,26 @@ void ppc_cpu_do_system_reset(CPUState *cs) powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_RESET); } + +void ppc_cpu_do_fwnmi_machine_check(CPUState *cs, target_ulong vector) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); + target_ulong msr = 0; + + /* + * Set MSR and NIP for the handler, SRR0/1, DAR and DSISR have already + * been set by KVM. + */ + msr = (1ULL << MSR_ME); + msr |= env->msr & (1ULL << MSR_SF); + if (!(*pcc->interrupts_big_endian)(cpu)) { + msr |= (1ULL << MSR_LE); + } + + powerpc_set_excp_state(cpu, vector, msr); +} #endif /* !CONFIG_USER_ONLY */ bool ppc_cpu_exec_interrupt(CPUState *cs, int interrupt_request) From patchwork Mon Mar 16 14:26:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 11440725 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D560714E5 for ; Mon, 16 Mar 2020 16:36:45 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AAD20206C0 for ; Mon, 16 Mar 2020 16:36:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="qylmKxlK" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AAD20206C0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:42422 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDsjM-0004AF-TN for patchwork-qemu-devel@patchwork.kernel.org; Mon, 16 Mar 2020 12:36:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49028) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDqi6-0007Xa-UW for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jDqi5-0003hk-Ux for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:18 -0400 Received: from mail-pj1-x1044.google.com ([2607:f8b0:4864:20::1044]:51649) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jDqi2-00039i-Ur; Mon, 16 Mar 2020 10:27:15 -0400 Received: by mail-pj1-x1044.google.com with SMTP id hg10so4504244pjb.1; Mon, 16 Mar 2020 07:27:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WGscwySBJ+mmGr8x/aCZBlSdJwehrHHaibadIEnOpac=; b=qylmKxlKYVPmUd7CNMmuSDb2FENNyhCy/diuVxqFsvm5sspqnTie1L7DtgIp+xE6bG 9QYaFPl2Ao9wVa0llzunLtqRWWU9AwAC5UyMys6QHG/y0JDis7T9lRPhzGWYdtRKpC2g 8VcmIhS7V/hDoVwNhwW4bwgvXR1G/t7IpxqeYt/AbTWvfFMTPdNKA0JV5kQnrbLnZ8gX T7kNvPBPCrqM9NuUyAsQOKwh9/TZEYk1rhzqj4a431etdQG3Uhmp3FcHwZ4ebKazLtJ2 hVz9JDDT39PDkShRip3YCr0fkidWPAZxYuWBJjnjc5X+bTuTxiMn9lBrGZifa6dGwt1L KyNQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WGscwySBJ+mmGr8x/aCZBlSdJwehrHHaibadIEnOpac=; b=HqVC5zN86IHjp/WBavlQqxDUK8WakQeZp4SrxpgbCjsgKAweDi1Bt+1LNsWeKG398g nwB6OwvhoR2WCzgYlVGDlWQLSCFpYPwlTkuFn0MVqEnpWJN454o3FhNzefqqqe9PVvB9 ol7u2jQsUlTjVa1qhFb+ZwXEX0SRaw1VdFmy3pjFSS/M+6I5dL5BDYgirIeBYTBzH0pt N59ywKYkAmvLROlvQ7AiJPYtTohueCo+rzIPUHjAnBS/cQ2EI2sovcL4lZPXYixBdNGr UuS/RMC/QN1jkfy8La+F5o6zzLlpMeID6nirIvgAYzItdHnm7k/qU9IhBA8pXkQ7Tu5r p1Qw== X-Gm-Message-State: ANhLgQ071MBl/spu4plzdxETMR5gjsmeZGE477Paq1X/mvilz/jLEGaN KiX3hfblm1AZog9vacEzb/LbO1mskMA= X-Google-Smtp-Source: ADFU+vturzh+vwilJ7ryTaK4b7Oup0VEh4pR//wnrdYxQANxyIicFYAGzikRkHIydCiO1Wp6m5c+vQ== X-Received: by 2002:a17:902:b617:: with SMTP id b23mr27776794pls.285.1584368833846; Mon, 16 Mar 2020 07:27:13 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([203.63.160.49]) by smtp.gmail.com with ESMTPSA id v1sm45564pjy.35.2020.03.16.07.27.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Mar 2020 07:27:13 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Subject: [PATCH v2 5/8] ppc/spapr: Allow FWNMI on TCG Date: Tue, 17 Mar 2020 00:26:10 +1000 Message-Id: <20200316142613.121089-6-npiggin@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200316142613.121089-1-npiggin@gmail.com> References: <20200316142613.121089-1-npiggin@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1044 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aravinda Prasad , Alexey Kardashevskiy , qemu-devel@nongnu.org, Nicholas Piggin , Greg Kurz , Ganesh Goudar , David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" There should no longer be a reason to prevent TCG providing FWNMI. System Reset interrupts are generated to the guest with nmi monitor command and H_SIGNAL_SYS_RESET. Machine Checks can not be injected currently, but this could be implemented with the mce monitor cmd similarly to i386. Signed-off-by: Nicholas Piggin Reviewed-by: Cédric Le Goater Reviewed-by: Greg Kurz --- hw/ppc/spapr_caps.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index f626d769a0..679ae7959f 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -516,10 +516,7 @@ static void cap_fwnmi_apply(SpaprMachineState *spapr, uint8_t val, return; /* Disabled by default */ } - if (tcg_enabled()) { - warn_report("Firmware Assisted Non-Maskable Interrupts(FWNMI) not " - "supported in TCG"); - } else if (kvm_enabled()) { + if (kvm_enabled()) { if (kvmppc_set_fwnmi() < 0) { error_setg(errp, "Firmware Assisted Non-Maskable Interrupts(FWNMI) " "not supported by KVM"); From patchwork Mon Mar 16 14:26:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 11440711 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F0C1014E5 for ; Mon, 16 Mar 2020 16:32:50 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C5DF02071C for ; Mon, 16 Mar 2020 16:32:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="f2LmqH8G" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C5DF02071C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:42344 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDsfZ-0007Gd-UQ for patchwork-qemu-devel@patchwork.kernel.org; Mon, 16 Mar 2020 12:32:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49137) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDqiB-0007Ze-IB for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jDqiA-0004Wp-H3 for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:23 -0400 Received: from mail-pf1-x443.google.com ([2607:f8b0:4864:20::443]:46725) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jDqi7-0003xO-MN; Mon, 16 Mar 2020 10:27:19 -0400 Received: by mail-pf1-x443.google.com with SMTP id c19so10020115pfo.13; Mon, 16 Mar 2020 07:27:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xoJs9JmfNpjFP9lD5gKsVcM5Uv6sOBouIT9l/N6aKbw=; b=f2LmqH8Gfi09naAZnCcoCiAqT69lfJyqeGyfVw42FZHuUAv1C+SX/SW5gjSFWQhhFx dTvkVUpgq1ODDFCk+0u2jHLg9IX20O8n305r9HbusgE74CCekh7z4GhXjq+I/sYd8mzw B394VkBq+YKxGT/DX5ic359e/6t+OmaNCcQd9EwvbKuj6si9hcwq6xydAk1jLA9SF8rE RwM6PI++I5gF34wtHcacd/ZhleBwDFry76o0kZyzpW2bv9mVqn1IlZPYJxmCjuH4/hVg epGQ0j4ceQ4UcViy3XWSHqpOiDUXn6P+5v09bBKKF7vznBEeyhT8ovHGgGGjT7cHCskZ /2FQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xoJs9JmfNpjFP9lD5gKsVcM5Uv6sOBouIT9l/N6aKbw=; b=pigqx2hLq8SuAMaKWFWiOD2ny2Mh9kJfnqh2CHfzFRFaknOaKuaaVGR1qhu7RWkwGd QtB/gC+9mEnN+7B3qND9HcBhtjA6+IMzLkJMdXYe9efeDcG90B2h0nZTEJroZW6qfzRr sroQlH+25PblY6B9oAj/nAO0A3OEQ5m2cLS7foT/v2MhyykUuOmvREXMYvxN5OlQIVtF ReSP1VXUCRqtX3fIrlsyQjw9iInoryDTpq8nxs5k9Eam0aG0iD3jMYje4mwLflPDvwU1 3hBmGzrAuyFFTl4JWf2yxMsX+J6szIia+G4JXEnhhHdNmTJyqesVltShfmhIIzMaGRDh oIyA== X-Gm-Message-State: ANhLgQ1C+NXqijhNlJF6oPPTFR3mmbWhODAlcyOkohRE2zeCYXtixiQw Zj2lwcxywbkUmx9oykmX9SRYcdkCRUc= X-Google-Smtp-Source: ADFU+vth6saRD+39UwULMq4tukN+3zxkwyb1qLhjY9w+XT8k6AKcjosPoHiIWK6PGDu2ft3UCiyJFw== X-Received: by 2002:a63:5011:: with SMTP id e17mr139169pgb.338.1584368838557; Mon, 16 Mar 2020 07:27:18 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([203.63.160.49]) by smtp.gmail.com with ESMTPSA id v1sm45564pjy.35.2020.03.16.07.27.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Mar 2020 07:27:18 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Subject: [PATCH v2 6/8] target/ppc: allow ppc_cpu_do_system_reset to take an alternate vector Date: Tue, 17 Mar 2020 00:26:11 +1000 Message-Id: <20200316142613.121089-7-npiggin@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200316142613.121089-1-npiggin@gmail.com> References: <20200316142613.121089-1-npiggin@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aravinda Prasad , Alexey Kardashevskiy , qemu-devel@nongnu.org, Nicholas Piggin , Greg Kurz , Ganesh Goudar , David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Provide for an alternate delivery location, -1 defaults to the architected address. Signed-off-by: Nicholas Piggin Reviewed-by: Greg Kurz --- hw/ppc/spapr.c | 2 +- target/ppc/cpu.h | 2 +- target/ppc/excp_helper.c | 5 ++++- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 5f93c49706..25221d843c 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3400,7 +3400,7 @@ static void spapr_machine_finalizefn(Object *obj) void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg) { cpu_synchronize_state(cs); - ppc_cpu_do_system_reset(cs); + ppc_cpu_do_system_reset(cs, -1); } static void spapr_nmi(NMIState *n, int cpu_index, Error **errp) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 3953680534..f8c7d6f19c 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1220,7 +1220,7 @@ int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, int ppc32_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs, int cpuid, void *opaque); #ifndef CONFIG_USER_ONLY -void ppc_cpu_do_system_reset(CPUState *cs); +void ppc_cpu_do_system_reset(CPUState *cs, target_ulong vector); void ppc_cpu_do_fwnmi_machine_check(CPUState *cs, target_ulong vector); extern const VMStateDescription vmstate_ppc_cpu; #endif diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 7f2b5899d3..08bc885ca6 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -961,12 +961,15 @@ static void ppc_hw_interrupt(CPUPPCState *env) } } -void ppc_cpu_do_system_reset(CPUState *cs) +void ppc_cpu_do_system_reset(CPUState *cs, target_ulong vector) { PowerPCCPU *cpu = POWERPC_CPU(cs); CPUPPCState *env = &cpu->env; powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_RESET); + if (vector != -1) { + env->nip = vector; + } } void ppc_cpu_do_fwnmi_machine_check(CPUState *cs, target_ulong vector) From patchwork Mon Mar 16 14:26:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 11440759 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8A2B1139A for ; Mon, 16 Mar 2020 16:50:26 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5FD3F20679 for ; Mon, 16 Mar 2020 16:50:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="LVSvbXW5" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5FD3F20679 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:42692 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDswb-0001tD-Hg for patchwork-qemu-devel@patchwork.kernel.org; Mon, 16 Mar 2020 12:50:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49316) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDqiG-0007bm-J2 for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jDqiF-00055b-Ft for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:28 -0400 Received: from mail-pl1-x641.google.com ([2607:f8b0:4864:20::641]:35944) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jDqiC-0004bo-8Z; Mon, 16 Mar 2020 10:27:24 -0400 Received: by mail-pl1-x641.google.com with SMTP id g2so5584557plo.3; Mon, 16 Mar 2020 07:27:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IwXPy4HQuuWGCAq2XrwIVJ4D8opXygGPCnzLpk/UyHs=; b=LVSvbXW52IRJUcxBmV/2bU+6i04Qc564XOEHjJZlKJ5lGW4Xvy/8O8oXk9hGOcHUxB 3o26DGyfH+mO9r1KLV6Qe4sAP2zHt9zm4s9vF6jeXyADhLnWvOycBpIXlhVjoS3RQ1OL wi/3wd3gQ2oGRcVC1pkMI5Od2mvAdlCBwlEETjz14yiNdhAAt0M3LZNpirYQZ7+i35wS V1oJYggyfcLzUiQQAMIZ2jiNouUSGTMOP8lN4YLDyRt5b1ZJ6U1BMJu3RHqdyJUOQNtZ xu3p2F22QNQ2T4y8Sre/VWQgftQ7leafsCykbn/T2x305xGJjgOYxKWkITAPCDmzX/ji hg4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IwXPy4HQuuWGCAq2XrwIVJ4D8opXygGPCnzLpk/UyHs=; b=NEYrP7lgxPqNz4Bq1YExLnq2vdYSvvsTTd7eTUWyFU527dCL7L1oVxTMfgNSabhkmE EYPMP52h6flnX2rXqj55XAbrxygfdm3dotbK2J7KjEFoAtr+Bn5OVzynMgBaJP7SxaGl NcCj5y4WsBlaEUDD662I37ynXOrRzSkMRsDB4tR0OWFMYzy+mREnDsy76dkAJBszfp10 wm3fX8L/6SGu0QmEwVA33yXAmNKWI6xbesEHPch2H4+p+Kat7BvHjBGoP80TiKgVKjJ2 dIIgpsgKIx7TOsOkPur/8X0zIr/ARWFX248Hd4TLQnhmJUsza6cKo2HgHtRf4Joy0Hss ZDeg== X-Gm-Message-State: ANhLgQ30McZCUryWj87shfllUlG3VJ3MDV5ogkVPVW6lbI6MQj8DfPcP nwzyPUhdyHYlD6p1VaHas1j2oNNm4hw= X-Google-Smtp-Source: ADFU+vuWINuJLu/J78N+ZxLIWLzVNRaLPV0oVKU90irv1yMC+rhXB5bJWtehKVo2MT/CJckiHk+xuw== X-Received: by 2002:a17:902:9a48:: with SMTP id x8mr27809987plv.14.1584368843025; Mon, 16 Mar 2020 07:27:23 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([203.63.160.49]) by smtp.gmail.com with ESMTPSA id v1sm45564pjy.35.2020.03.16.07.27.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Mar 2020 07:27:22 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Subject: [PATCH v2 7/8] ppc/spapr: Implement FWNMI System Reset delivery Date: Tue, 17 Mar 2020 00:26:12 +1000 Message-Id: <20200316142613.121089-8-npiggin@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200316142613.121089-1-npiggin@gmail.com> References: <20200316142613.121089-1-npiggin@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aravinda Prasad , Alexey Kardashevskiy , qemu-devel@nongnu.org, Nicholas Piggin , Greg Kurz , Ganesh Goudar , David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" PAPR requires that if "ibm,nmi-register" succeeds, then the hypervisor delivers all system reset and machine check exceptions to the registered addresses. System Resets are delivered with registers set to the architected state, and with no interlock. Signed-off-by: Nicholas Piggin --- hw/ppc/spapr.c | 46 ++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 44 insertions(+), 2 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 25221d843c..78e649f47d 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -967,7 +967,29 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt) _FDT(fdt_setprop(fdt, rtas, "ibm,max-associativity-domains", maxdomains, sizeof(maxdomains))); - _FDT(fdt_setprop_cell(fdt, rtas, "rtas-size", RTAS_SIZE)); + /* + * FWNMI reserves RTAS_ERROR_LOG_MAX for the machine check error log, + * and 16 bytes per CPU for system reset error log plus an extra 8 bytes. + * + * The system reset requirements are driven by existing Linux and PowerVM + * implementation which (contrary to PAPR) saves r3 in the error log + * structure like machine check, so Linux expects to find the saved r3 + * value at the address in r3 upon FWNMI-enabled sreset interrupt (and + * does not look at the error value). + * + * System reset interrupts are not subject to interlock like machine + * check, so this memory area could be corrupted if the sreset is + * interrupted by a machine check (or vice versa) if it was shared. To + * prevent this, system reset uses per-CPU areas for the sreset save + * area. A system reset that interrupts a system reset handler could + * still overwrite this area, but Linux doesn't try to recover in that + * case anyway. + * + * The extra 8 bytes is required because Linux's FWNMI error log check + * is off-by-one. + */ + _FDT(fdt_setprop_cell(fdt, rtas, "rtas-size", RTAS_ERROR_LOG_MAX + + ms->smp.max_cpus * sizeof(uint64_t)*2 + sizeof(uint64_t))); _FDT(fdt_setprop_cell(fdt, rtas, "rtas-error-log-max", RTAS_ERROR_LOG_MAX)); _FDT(fdt_setprop_cell(fdt, rtas, "rtas-event-scan-rate", @@ -3399,8 +3421,28 @@ static void spapr_machine_finalizefn(Object *obj) void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg) { + SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); + cpu_synchronize_state(cs); - ppc_cpu_do_system_reset(cs, -1); + /* If FWNMI is inactive, addr will be -1, which will deliver to 0x100 */ + if (spapr->fwnmi_system_reset_addr != -1) { + uint64_t rtas_addr, addr; + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + + /* get rtas addr from fdt */ + rtas_addr = spapr_get_rtas_addr(); + if (!rtas_addr) { + qemu_system_guest_panicked(NULL); + return; + } + + addr = rtas_addr + RTAS_ERROR_LOG_MAX + cs->cpu_index * sizeof(uint64_t)*2; + stq_be_phys(&address_space_memory, addr, env->gpr[3]); + stq_be_phys(&address_space_memory, addr + sizeof(uint64_t), 0); + env->gpr[3] = addr; + } + ppc_cpu_do_system_reset(cs, spapr->fwnmi_system_reset_addr); } static void spapr_nmi(NMIState *n, int cpu_index, Error **errp) From patchwork Mon Mar 16 14:26:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 11440729 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7A99813B1 for ; Mon, 16 Mar 2020 16:38:43 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 505F220663 for ; Mon, 16 Mar 2020 16:38:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="YdpGXKpA" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 505F220663 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:42450 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDslG-0007OV-CN for patchwork-qemu-devel@patchwork.kernel.org; Mon, 16 Mar 2020 12:38:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49441) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jDqiK-0007dL-3p for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jDqiJ-0005Vy-4F for qemu-devel@nongnu.org; Mon, 16 Mar 2020 10:27:32 -0400 Received: from mail-pj1-x1043.google.com ([2607:f8b0:4864:20::1043]:35316) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jDqiG-0005AD-9b; Mon, 16 Mar 2020 10:27:28 -0400 Received: by mail-pj1-x1043.google.com with SMTP id mq3so8801312pjb.0; Mon, 16 Mar 2020 07:27:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8p47syJONdd8/zj3ZHq151z5Oq8HeNZBxFWwhkRlYos=; b=YdpGXKpA+0VYhg51FcX4vAq+oOr5b/DeAXbKc2wCNWV2lDbn6yAGotm2pUQe4gS8Cf PBS4+SZvLS9mK3mRTFUhRqLk9fK4MwdPpCu+mBhRgIi4Hl+AYZdcEZhMcH2zycFzL3mU VTB+VLIUPBywqgylfovnlLwTcCmstyFN+7WeOL827XEq623E9KUh3v83ihZ6bGc3sce0 NfYuRghm4OIu1jJwjXeDyPU2P0qEWzDnKUbv7OtdNP1Vjt7J3b4T89JjcmRC6nlJ5vOH L0YZTFu3tu0KM2wrtYrI203wDU6HHhlTFBGvOv1Md6xslRSeTXdADMaENzNpVqJy1Sjx qxpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8p47syJONdd8/zj3ZHq151z5Oq8HeNZBxFWwhkRlYos=; b=umiEVTHVCoHmS9KfE3346JQhLfL6yB7NWttwIL4Ezvn5wvwYCyJBqpqldSTU2CWk1n viAlGinSbq61X7Eca+ZzZE1AJj2yGeK1AgKJ0mvwo4/CF5YuWq5i/8GDOw4abUYh1R4e RLLDyd1Ucxpw+u5HFc4ZDVH6TD7ouwZH/1a8Pp4OuEsHI0a9DejEtm3W2nYPiFsE0U9n eTTteQV3Vbo/H/U5RP2/7H+SPwCVjfW4sd7Gu2qmzU8bQgteE3VAXr4MqWvjiL30CUSu TXBhWYNpxLpXNELmTrrSrqehlyp09m4bjVnBdVUkx90SyOjxTaqJE38xUS2JoemhYqJJ fSSg== X-Gm-Message-State: ANhLgQ1RYmzDON0ZD4B1ThG6BLuP5P3YO0edCHCVqewsBXnjk4xEDIqx wKvlfvUSvEjtCLDpzDtNu8oNRwp7+nA= X-Google-Smtp-Source: ADFU+vsNOsvEcg8XN6hd4REZRuCcn6hqW5WYnKD3laHhrTv/laLcuwweN+wtx9+h6YnnseEpNVUmCQ== X-Received: by 2002:a17:902:a588:: with SMTP id az8mr2163506plb.163.1584368847300; Mon, 16 Mar 2020 07:27:27 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([203.63.160.49]) by smtp.gmail.com with ESMTPSA id v1sm45564pjy.35.2020.03.16.07.27.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Mar 2020 07:27:26 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Subject: [PATCH v2 8/8] ppc/spapr: Ignore common "ibm, nmi-interlock" Linux bug Date: Tue, 17 Mar 2020 00:26:13 +1000 Message-Id: <20200316142613.121089-9-npiggin@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200316142613.121089-1-npiggin@gmail.com> References: <20200316142613.121089-1-npiggin@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1043 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aravinda Prasad , Alexey Kardashevskiy , qemu-devel@nongnu.org, Nicholas Piggin , Greg Kurz , Ganesh Goudar , David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Linux kernels call "ibm,nmi-interlock" in their system reset handlers contrary to PAPR. Returning an error because the CPU does not hold the interlock here causes Linux to print warning messages. PowerVM returns success in this case, so do the same for now. Signed-off-by: Nicholas Piggin --- hw/ppc/spapr_rtas.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 521e6b0b72..9fb8c8632a 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -461,8 +461,18 @@ static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu, } if (spapr->fwnmi_machine_check_interlock != cpu->vcpu_id) { - /* The vCPU that hit the NMI should invoke "ibm,nmi-interlock" */ - rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); + /* + * The vCPU that hit the NMI should invoke "ibm,nmi-interlock" + * This should be PARAM_ERROR, but Linux calls "ibm,nmi-interlock" + * for system reset interrupts, despite them not being interlocked. + * PowerVM silently ignores this and returns success here. Returning + * failure causes Linux to print the error "FWNMI: nmi-interlock + * failed: -3", although no other apparent ill effects, this is a + * regression for the user when enabling FWNMI. So for now, match + * PowerVM. When most Linux clients are fixed, this could be + * changed. + */ + rtas_st(rets, 0, RTAS_OUT_SUCCESS); return; }