From patchwork Tue Mar 17 20:50:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11443953 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0F3DB159A for ; Tue, 17 Mar 2020 20:50:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E1C2820752 for ; Tue, 17 Mar 2020 20:50:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="cSJm4OCH" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726776AbgCQUuu (ORCPT ); Tue, 17 Mar 2020 16:50:50 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:43577 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726680AbgCQUuu (ORCPT ); Tue, 17 Mar 2020 16:50:50 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 621F223E3D; Tue, 17 Mar 2020 21:50:47 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478247; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yHhnQloQUToDXGnXijKLNbDzOyKNXrK7+WubSxFsj34=; b=cSJm4OCHxSQfB3YX/PxFPSyx/Uz0UYF9kZtTPAU8l0ttDyB7LGY1VhFNo6DXRmKBOy34AQ h/PyXwOebr6/w8MwLxZzAiMLO881AAjr6KPE6IBw5tEEOBfYmPwuqC4cv8NE8GNbbFXUDo /+OZlquotM0LFYlAd31RL3wXpw2MXLM= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 01/18] include/linux/ioport.h: add helper to define REG resource constructs Date: Tue, 17 Mar 2020 21:50:00 +0100 Message-Id: <20200317205017.28280-2-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: 621F223E3D X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.496]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Similar to the existing helpers, add one for IORESOURCE_REG which comes in handy for most common resource declarations. Signed-off-by: Michael Walle --- include/linux/ioport.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/linux/ioport.h b/include/linux/ioport.h index a9b9170b5dd2..cdcceeec0f86 100644 --- a/include/linux/ioport.h +++ b/include/linux/ioport.h @@ -165,6 +165,11 @@ enum { #define DEFINE_RES_MEM(_start, _size) \ DEFINE_RES_MEM_NAMED((_start), (_size), NULL) +#define DEFINE_RES_REG_NAMED(_start, _size, _name) \ + DEFINE_RES_NAMED((_start), (_size), (_name), IORESOURCE_REG) +#define DEFINE_RES_REG(_start, _size) \ + DEFINE_RES_REG_NAMED((_start), (_size), NULL) + #define DEFINE_RES_IRQ_NAMED(_irq, _name) \ DEFINE_RES_NAMED((_irq), 1, (_name), IORESOURCE_IRQ) #define DEFINE_RES_IRQ(_irq) \ From patchwork Tue Mar 17 20:50:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11444033 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3AAE090 for ; Tue, 17 Mar 2020 20:52:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1A12620752 for ; Tue, 17 Mar 2020 20:52:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="BmHiCugH" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727082AbgCQUwE (ORCPT ); Tue, 17 Mar 2020 16:52:04 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:34185 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726767AbgCQUuv (ORCPT ); Tue, 17 Mar 2020 16:50:51 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 0EC5523E4D; Tue, 17 Mar 2020 21:50:48 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478248; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=O32DELDjRU5+PMHK61TCvsZ+IJXO1DNHAkIMR41h4Oo=; b=BmHiCugHoAJPjWdcPsqC/XucGyimUwyR7ljjoG2WIKdykksBgKQ8THpqZIbWocuQYvpvOw 55hBB22TCO4PjNoISSMzLGGrf7TkFC6xc+6Zr+M2zViunfOf0Cik6S8+mN2sdBFKfKNwab GPV93vOrnwD822EFBaNiWGtbPtzT6cA= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle , Robin Murphy Subject: [PATCH 02/18] mfd: mfd-core: Don't overwrite the dma_mask of the child device Date: Tue, 17 Mar 2020 21:50:01 +0100 Message-Id: <20200317205017.28280-3-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: 0EC5523E4D X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.549]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[23]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc,arm.com]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Commit cdfee5623290 ("driver core: initialize a default DMA mask for platform device") initialize the DMA of a platform device. But if the parent doesn't have a dma_mask set, for example if it's an I2C device, the dma_mask of the child platform device will be set to zero again. Which leads to many "DMA mask not set" warnings, if the MFD cell has the of_compatible property set. [ 1.877937] sl28cpld-pwm sl28cpld-pwm: DMA mask not set [ 1.883282] sl28cpld-pwm sl28cpld-pwm.0: DMA mask not set [ 1.888795] sl28cpld-gpio sl28cpld-gpio: DMA mask not set Thus don't overwrite the dma_mask of the children. Instead set the dma_mask of the platform device. Signed-off-by: Michael Walle Suggested-by: Robin Murphy --- drivers/mfd/mfd-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c index f5a73af60dd4..e735565969b3 100644 --- a/drivers/mfd/mfd-core.c +++ b/drivers/mfd/mfd-core.c @@ -138,7 +138,7 @@ static int mfd_add_device(struct device *parent, int id, pdev->dev.parent = parent; pdev->dev.type = &mfd_dev_type; - pdev->dev.dma_mask = parent->dma_mask; + pdev->platform_dma_mask = parent->dma_mask ? *parent->dma_mask : 0; pdev->dev.dma_parms = parent->dma_parms; pdev->dev.coherent_dma_mask = parent->coherent_dma_mask; From patchwork Tue Mar 17 20:50:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11444021 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 19E0C90 for ; Tue, 17 Mar 2020 20:51:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ED3F22075E for ; Tue, 17 Mar 2020 20:51:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="vLZj6OVl" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726916AbgCQUux (ORCPT ); Tue, 17 Mar 2020 16:50:53 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:45891 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726775AbgCQUuw (ORCPT ); Tue, 17 Mar 2020 16:50:52 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 0A64E23E4F; Tue, 17 Mar 2020 21:50:49 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478249; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=J3JWSJwRY1VsrcUPrD3u272/QamxSCbn9RXueEbf4uk=; b=vLZj6OVlT0vaDqMOUz9UOOOWDbOOw5HJF9006hPb4dBLeTin5Fn0EoR0j9hCV+th7bINCG x2SzpjlBZNM77VAM9gK6adOpSnxf77jHZyZHz5oa4Sb98N+19/xZAEmNJxD8Us33JvNodB dxL8Jo2mIWf3mrcCiyhaMnD0AjugxjQ= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 03/18] mfd: mfd-core: match device tree node against reg property Date: Tue, 17 Mar 2020 21:50:02 +0100 Message-Id: <20200317205017.28280-4-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: 0A64E23E4F X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.542]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org There might be multiple children with the device tree compatible, for example if a MFD has multiple instances of the same function. In this case only the first is matched and the other children get a wrong of_node reference. We distinguish them by looking at the reg property and match it against the mfd_cell id element if the latter is non-zero and the reg property exists in the device tree node. Signed-off-by: Michael Walle --- drivers/mfd/mfd-core.c | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c index e735565969b3..0e718e6cdbde 100644 --- a/drivers/mfd/mfd-core.c +++ b/drivers/mfd/mfd-core.c @@ -117,6 +117,7 @@ static int mfd_add_device(struct device *parent, int id, struct device_node *np = NULL; int ret = -ENOMEM; int platform_id; + u32 of_id; int r; if (id == PLATFORM_DEVID_AUTO) @@ -151,16 +152,23 @@ static int mfd_add_device(struct device *parent, int id, if (parent->of_node && cell->of_compatible) { for_each_child_of_node(parent->of_node, np) { - if (of_device_is_compatible(np, cell->of_compatible)) { - if (!of_device_is_available(np)) { - /* Ignore disabled devices error free */ - ret = 0; - goto fail_alias; - } - pdev->dev.of_node = np; - pdev->dev.fwnode = &np->fwnode; - break; + if (!of_device_is_compatible(np, cell->of_compatible)) + continue; + + /* match the reg property to the id */ + if (!of_property_read_u32(np, "reg", &of_id)) + if (cell->id && cell->id != of_id) + continue; + + if (!of_device_is_available(np)) { + /* Ignore disabled devices error free */ + ret = 0; + goto fail_alias; } + + pdev->dev.of_node = np; + pdev->dev.fwnode = &np->fwnode; + break; } } From patchwork Tue Mar 17 20:50:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11444027 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 780ED90 for ; Tue, 17 Mar 2020 20:52:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4BB6B20752 for ; Tue, 17 Mar 2020 20:52:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="jGR32Ukz" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726897AbgCQUv5 (ORCPT ); Tue, 17 Mar 2020 16:51:57 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:34939 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726856AbgCQUux (ORCPT ); Tue, 17 Mar 2020 16:50:53 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id A696D23E57; Tue, 17 Mar 2020 21:50:49 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478250; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pnvrMHq4df7PzQAC7TxqlEV1vqqRU/yK9xcpXwNVrAk=; b=jGR32UkzFLXyXtavF5314t9FNqbgpQUuNIGQd7EMFzYI52w+yrSo0qjpNZxXtFLPoqpn6f 8/qSs9/b7EE68cQvsCR9zAZvq6qXV3mbMdftT3LDRPefa3oYZ8I+2VFnIGuiUTxk34heY7 +sH/kROcX7Xm1z5qyHxJXifGrw5dVvo= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 04/18] dt-bindings: mfd: Add bindings for sl28cpld Date: Tue, 17 Mar 2020 21:50:03 +0100 Message-Id: <20200317205017.28280-5-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: A696D23E57 X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.606]; DKIM_SIGNED(0.00)[]; DBL_PROHIBIT(0.00)[0.0.0.1:email,0.0.0.0:email]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This adds device tree bindings for the board management controller found on the Kontron SMARC-sAL28 board. Signed-off-by: Michael Walle --- .../bindings/mfd/kontron,sl28cpld.yaml | 143 ++++++++++++++++++ 1 file changed, 143 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml diff --git a/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml new file mode 100644 index 000000000000..3b9cca49d2d6 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml @@ -0,0 +1,143 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/kontron,sl28cpld.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Kontron's sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + The board management controller may contain different IP blocks like + watchdog, fan monitoring, PWM controller, interrupt controller and a + GPIO controller. + +properties: + compatible: + const: kontron,sl28cpld + + reg: + description: + I2C device address. + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 1 + + interrupt-controller: true + +patternProperties: + "^gp(io|i|o)(@[0-9]+)?$": + $ref: ../gpio/kontron,sl28cpld-gpio.yaml + + "^hwmon(@[0-9]+)?$": + $ref: ../hwmon/kontron,sl28cpld-hwmon.yaml + + "^pwm(@[0-9]+)?$": + $ref: ../pwm/kontron,sl28cpld-pwm.yaml + + "^watchdog(@[0-9]+)?$": + $ref: ../watchdog/kontron,sl28cpld-wdt.yaml + +required: + - "#address-cells" + - "#size-cells" + - compatible + - reg + - "#interrupt-cells" + - interrupt-controller + +oneOf: + - required: + - interrupts + - required: + - interrupts-extended + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + sl28cpld@4a { + #address-cells = <1>; + #size-cells = <0>; + compatible = "kontron,sl28cpld"; + reg = <0x4a>; + interrupts-extended = <&gpio2 6 IRQ_TYPE_EDGE_FALLING>; + + #interrupt-cells = <2>; + interrupt-controller; + + gpio@0 { + compatible = "kontron,sl28cpld-gpio"; + reg = <0>; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio@1 { + compatible = "kontron,sl28cpld-gpio"; + reg = <1>; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpo { + compatible = "kontron,sl28cpld-gpo"; + + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "a", "b", "c"; + }; + + gpi { + compatible = "kontron,sl28cpld-gpi"; + + gpio-controller; + #gpio-cells = <2>; + }; + + hwmon { + compatible = "kontron,sl28cpld-fan"; + }; + + pwm@0 { + compatible = "kontron,sl28cpld-pwm"; + reg = <0>; + #pwm-cells = <2>; + }; + + pwm@1 { + compatible = "kontron,sl28cpld-pwm"; + reg = <1>; + #pwm-cells = <2>; + }; + + watchdog { + compatible = "kontron,sl28cpld-wdt"; + }; + }; + }; From patchwork Tue Mar 17 20:50:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11444013 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D96C790 for ; Tue, 17 Mar 2020 20:51:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ADD4120754 for ; Tue, 17 Mar 2020 20:51:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="o7pFSsqu" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726970AbgCQUuz (ORCPT ); Tue, 17 Mar 2020 16:50:55 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:58263 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726897AbgCQUuy (ORCPT ); Tue, 17 Mar 2020 16:50:54 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 7CB6C23E5E; Tue, 17 Mar 2020 21:50:50 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478251; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=y0nO69Q7JxaeYvAKKhyuVwLXm694mhiGkavva5IWoko=; b=o7pFSsquzKt29aXrpzJytIbwVRG0BCKQ6xwXnPIZ5WA8aZbpSHaSxO4kzSILVMr0tuqD68 7xb950070fepsQPXEUnSWsTqVnHNZU+gQJBEe0l27HdEjoLJFe4C/BcSWK2zA4mYbt9DeH r259fZtVOSI0JDXaCmAUgDBAtX5fG0E= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 05/18] mfd: Add support for Kontron sl28cpld management controller Date: Tue, 17 Mar 2020 21:50:04 +0100 Message-Id: <20200317205017.28280-6-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: 7CB6C23E5E X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.498]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This patch adds core support for the board management controller found on the SMARC-sAL28 board. It consists of the following functions: - watchdog - GPIO controller - PWM controller - fan sensor - interrupt controller At the moment, this controller is used on the Kontron SMARC-sAL28 board. Signed-off-by: Michael Walle --- drivers/mfd/Kconfig | 21 ++++++ drivers/mfd/Makefile | 2 + drivers/mfd/sl28cpld.c | 155 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 178 insertions(+) create mode 100644 drivers/mfd/sl28cpld.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 3c547ed575e6..01588c366476 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2059,5 +2059,26 @@ config SGI_MFD_IOC3 If you have an SGI Origin, Octane, or a PCI IOC3 card, then say Y. Otherwise say N. +config MFD_SL28CPLD + tristate "Kontron sl28 core driver" + depends on I2C=y + depends on OF + select REGMAP_I2C + select REGMAP_IRQ + select SL28CPLD_IRQ + select MFD_CORE + help + This option enables support for the board management controller + found on the Kontron sl28 CPLD. You have to select individual + functions, such as watchdog, GPIO, etc, under the corresponding menus + in order to enable them. + + Currently supported boards are: + + Kontron SMARC-sAL28 + + To compile this driver as a module, choose M here: the module will be + called sl28cpld. + endmenu endif diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index f935d10cbf0f..9bc38863b9c7 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -259,3 +259,5 @@ obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o obj-$(CONFIG_MFD_STMFX) += stmfx.o obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o + +obj-$(CONFIG_MFD_SL28CPLD) += sl28cpld.o diff --git a/drivers/mfd/sl28cpld.c b/drivers/mfd/sl28cpld.c new file mode 100644 index 000000000000..789f21f90752 --- /dev/null +++ b/drivers/mfd/sl28cpld.c @@ -0,0 +1,155 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * MFD core for the CPLD on a SMARC-sAL28 board. + * + * Copyright 2019 Kontron Europe GmbH + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SL28CPLD_VERSION 0x03 +#define SL28CPLD_WATCHDOG_BASE 0x4 +#define SL28CPLD_HWMON_FAN_BASE 0xb +#define SL28CPLD_PWM0_BASE 0xc +#define SL28CPLD_PWM1_BASE 0xe +#define SL28CPLD_GPIO0_BASE 0x10 +#define SL28CPLD_GPIO1_BASE 0x15 +#define SL28CPLD_GPO_BASE 0x1a +#define SL28CPLD_GPI_BASE 0x1b +#define SL28CPLD_INTC_BASE 0x1c + +/* all subdevices share the same IRQ */ +#define SL28CPLD_IRQ 0 + +#define SL28CPLD_MIN_REQ_VERSION 14 + +struct sl28cpld { + struct device *dev; + struct regmap *regmap; +}; + +static const struct regmap_config sl28cpld_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .reg_stride = 1, +}; + +static struct resource sl28cpld_watchdog_resources[] = { + DEFINE_RES_REG(SL28CPLD_WATCHDOG_BASE, 1), +}; + +static struct resource sl28cpld_hwmon_fan_resources[] = { + DEFINE_RES_REG(SL28CPLD_HWMON_FAN_BASE, 1), +}; + +static struct resource sl28cpld_pwm0_resources[] = { + DEFINE_RES_REG(SL28CPLD_PWM0_BASE, 1), +}; + +static struct resource sl28cpld_pwm1_resources[] = { + DEFINE_RES_REG(SL28CPLD_PWM1_BASE, 1), +}; + +static struct resource sl28cpld_gpio0_resources[] = { + DEFINE_RES_REG(SL28CPLD_GPIO0_BASE, 1), + DEFINE_RES_IRQ(SL28CPLD_IRQ), +}; + +static struct resource sl28cpld_gpio1_resources[] = { + DEFINE_RES_REG(SL28CPLD_GPIO1_BASE, 1), + DEFINE_RES_IRQ(SL28CPLD_IRQ), +}; + +static struct resource sl28cpld_gpo_resources[] = { + DEFINE_RES_REG(SL28CPLD_GPO_BASE, 1), +}; + +static struct resource sl28cpld_gpi_resources[] = { + DEFINE_RES_REG(SL28CPLD_GPI_BASE, 1), +}; + +static struct resource sl28cpld_intc_resources[] = { + DEFINE_RES_REG(SL28CPLD_INTC_BASE, 1), + DEFINE_RES_IRQ(SL28CPLD_IRQ), +}; + +static const struct mfd_cell sl28cpld_devs[] = { + OF_MFD_CELL("sl28cpld-wdt", sl28cpld_watchdog_resources, NULL, 0, 0, + "kontron,sl28cpld-wdt"), + OF_MFD_CELL("sl28cpld-fan", sl28cpld_hwmon_fan_resources, NULL, 0, 0, + "kontron,sl28cpld-fan"), + OF_MFD_CELL("sl28cpld-pwm", sl28cpld_pwm0_resources, NULL, 0, 0, + "kontron,sl28cpld-pwm"), + OF_MFD_CELL("sl28cpld-pwm", sl28cpld_pwm1_resources, NULL, 0, 1, + "kontron,sl28cpld-pwm"), + OF_MFD_CELL("sl28cpld-gpio", sl28cpld_gpio0_resources, NULL, 0, 0, + "kontron,sl28cpld-gpio"), + OF_MFD_CELL("sl28cpld-gpio", sl28cpld_gpio1_resources, NULL, 0, 1, + "kontron,sl28cpld-gpio"), + OF_MFD_CELL("sl28cpld-gpo", sl28cpld_gpo_resources, NULL, 0, 0, + "kontron,sl28cpld-gpo"), + OF_MFD_CELL("sl28cpld-gpi", sl28cpld_gpi_resources, NULL, 0, 0, + "kontron,sl28cpld-gpi"), + OF_MFD_CELL("sl28cpld-intc", sl28cpld_intc_resources, NULL, 0, 0, + "kontron,sl28cpld-intc"), +}; + +static int sl28cpld_probe(struct i2c_client *i2c) +{ + struct sl28cpld *sl28cpld; + struct device *dev = &i2c->dev; + unsigned int cpld_version; + int ret; + + sl28cpld = devm_kzalloc(dev, sizeof(*sl28cpld), GFP_KERNEL); + if (!sl28cpld) + return -ENOMEM; + + sl28cpld->regmap = devm_regmap_init_i2c(i2c, &sl28cpld_regmap_config); + if (IS_ERR(sl28cpld->regmap)) + return PTR_ERR(sl28cpld->regmap); + + ret = regmap_read(sl28cpld->regmap, SL28CPLD_VERSION, &cpld_version); + if (ret) + return ret; + + if (cpld_version < SL28CPLD_MIN_REQ_VERSION) { + dev_err(dev, "unsupported CPLD version %d\n", cpld_version); + return -ENODEV; + } + + sl28cpld->dev = dev; + i2c_set_clientdata(i2c, sl28cpld); + + dev_info(dev, "successfully probed. CPLD version %d\n", cpld_version); + + return devm_mfd_add_devices(dev, -1, sl28cpld_devs, + ARRAY_SIZE(sl28cpld_devs), NULL, + i2c->irq, NULL); +} + +static const struct of_device_id sl28cpld_of_match[] = { + { .compatible = "kontron,sl28cpld", }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_of_match); + +static struct i2c_driver sl28cpld_driver = { + .probe_new = sl28cpld_probe, + .driver = { + .name = "sl28cpld", + .of_match_table = of_match_ptr(sl28cpld_of_match), + }, +}; +module_i2c_driver(sl28cpld_driver); + +MODULE_DESCRIPTION("sl28cpld MFD Core Driver"); +MODULE_LICENSE("GPL"); From patchwork Tue Mar 17 20:50:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11444019 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E3D1B159A for ; Tue, 17 Mar 2020 20:51:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B908220752 for ; Tue, 17 Mar 2020 20:51:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="AZwtGvZy" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727036AbgCQUvt (ORCPT ); Tue, 17 Mar 2020 16:51:49 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:46681 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726388AbgCQUuy (ORCPT ); Tue, 17 Mar 2020 16:50:54 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 79A3123E61; Tue, 17 Mar 2020 21:50:51 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478252; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BvuXdtNKeJv7JIiyhJoueKUgioFsJ6ZeC4+J+Ye+SsU=; b=AZwtGvZyQfKcccy2XAEIdnZVnr5dyDBIC47GJI1XkJvZ+a1Uw1qCp9Xbmv+60m1A/87KBs oEsAXMor+jVXxmum1NfdBEGwWRukMXRFDu5BkD2cZncwPnQxPs9O78/aBINk6uvCK2dL++ Xg/+JrGMAJ78oSyV2Hv4LPQwScD5SEI= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 06/18] irqchip: add sl28cpld interrupt controller support Date: Tue, 17 Mar 2020 21:50:05 +0100 Message-Id: <20200317205017.28280-7-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: 79A3123E61 X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.504]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This patch adds support for the interrupt controller inside the sl28 CPLD management controller. Signed-off-by: Michael Walle --- drivers/irqchip/Kconfig | 3 ++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-sl28cpld.c | 92 ++++++++++++++++++++++++++++++++++ drivers/mfd/Kconfig | 4 +- 4 files changed, 98 insertions(+), 2 deletions(-) create mode 100644 drivers/irqchip/irq-sl28cpld.c diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 24fe08702ef7..3fd7415c8b55 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -246,6 +246,9 @@ config RENESAS_RZA1_IRQC Enable support for the Renesas RZ/A1 Interrupt Controller, to use up to 8 external interrupts with configurable sense select. +config SL28CPLD_INTC + bool + config ST_IRQCHIP bool select REGMAP diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index eae0d78cbf22..0f4a37782609 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -105,3 +105,4 @@ obj-$(CONFIG_MADERA_IRQ) += irq-madera.o obj-$(CONFIG_LS1X_IRQ) += irq-ls1x.o obj-$(CONFIG_TI_SCI_INTR_IRQCHIP) += irq-ti-sci-intr.o obj-$(CONFIG_TI_SCI_INTA_IRQCHIP) += irq-ti-sci-inta.o +obj-$(CONFIG_SL28CPLD_INTC) += irq-sl28cpld.o diff --git a/drivers/irqchip/irq-sl28cpld.c b/drivers/irqchip/irq-sl28cpld.c new file mode 100644 index 000000000000..fa52ed79137b --- /dev/null +++ b/drivers/irqchip/irq-sl28cpld.c @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * SMARC-sAL28 Interrupt core driver. + * + * Copyright 2019 Kontron Europe GmbH + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define INTC_IE 0 +#define INTC_IP 1 + +static const struct regmap_irq sl28cpld_irqs[] = { + REGMAP_IRQ_REG_LINE(0, 8), + REGMAP_IRQ_REG_LINE(1, 8), + REGMAP_IRQ_REG_LINE(2, 8), + REGMAP_IRQ_REG_LINE(3, 8), + REGMAP_IRQ_REG_LINE(4, 8), + REGMAP_IRQ_REG_LINE(5, 8), + REGMAP_IRQ_REG_LINE(6, 8), + REGMAP_IRQ_REG_LINE(7, 8), +}; + +struct sl28cpld_intc { + struct regmap *regmap; + struct regmap_irq_chip chip; + struct regmap_irq_chip_data *irq_data; +}; + +static int sl28cpld_intc_probe(struct platform_device *pdev) +{ + struct sl28cpld_intc *irqchip; + struct resource *res; + unsigned int irq; + int ret; + + irqchip = devm_kzalloc(&pdev->dev, sizeof(*irqchip), GFP_KERNEL); + if (!irqchip) + return -ENOMEM; + + if (!pdev->dev.parent) + return -ENODEV; + + irqchip->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!irqchip->regmap) + return -ENODEV; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (!res) + return -EINVAL; + + irqchip->chip.name = "sl28cpld-intc"; + irqchip->chip.irqs = sl28cpld_irqs; + irqchip->chip.num_irqs = ARRAY_SIZE(sl28cpld_irqs); + irqchip->chip.num_regs = 1; + irqchip->chip.status_base = res->start + INTC_IP; + irqchip->chip.mask_base = res->start + INTC_IE; + irqchip->chip.mask_invert = true, + irqchip->chip.ack_base = res->start + INTC_IP; + + ret = devm_regmap_add_irq_chip(&pdev->dev, irqchip->regmap, irq, + IRQF_SHARED | IRQF_ONESHOT, 0, + &irqchip->chip, &irqchip->irq_data); + if (ret) + return ret; + dev_info(&pdev->dev, "registered IRQ %d\n", irq); + + return 0; +} + +static struct platform_driver sl28cpld_intc_driver = { + .probe = sl28cpld_intc_probe, + .driver = { + .name = "sl28cpld-intc", + } +}; +module_platform_driver(sl28cpld_intc_driver); + +MODULE_DESCRIPTION("sl28cpld Interrupt Controller Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 01588c366476..4f741d640705 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2060,12 +2060,12 @@ config SGI_MFD_IOC3 then say Y. Otherwise say N. config MFD_SL28CPLD - tristate "Kontron sl28 core driver" + bool "Kontron sl28 core driver" depends on I2C=y depends on OF select REGMAP_I2C select REGMAP_IRQ - select SL28CPLD_IRQ + select SL28CPLD_INTC select MFD_CORE help This option enables support for the board management controller From patchwork Tue Mar 17 20:50:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11444011 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3D593159A for ; Tue, 17 Mar 2020 20:51:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1C5C620754 for ; Tue, 17 Mar 2020 20:51:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="kXyRwtVE" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726983AbgCQUvn (ORCPT ); Tue, 17 Mar 2020 16:51:43 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:59981 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726913AbgCQUuz (ORCPT ); Tue, 17 Mar 2020 16:50:55 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 23FB023E62; Tue, 17 Mar 2020 21:50:52 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478252; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Y4g351ZXp/jflpBK37qnXyNw2RDGRC4xBHLB3Avbv3U=; b=kXyRwtVEDZog2sn6iZ6Wbu9Jgt/q8UA+RLZ8ee7kCsr1LgmU9BCr4yGlXezPYx55g30LMx QsPHIIkW7eN3q9gpLkxR79uq2H4Tg6p8lU/sc0ggYA5KyU3fYPJBhZsxG6hRT4kd4vt6Et Obr+pnAqXHtf6UDkzlgf3hgSFkv7eb0= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 07/18] dt-bindings: watchdog: Add bindings for sl28cpld watchdog Date: Tue, 17 Mar 2020 21:50:06 +0100 Message-Id: <20200317205017.28280-8-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: 23FB023E62 X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.604]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This adds device tree bindings for the watchdog of the sl28cpld management controller. Signed-off-by: Michael Walle --- .../watchdog/kontron,sl28cpld-wdt.yaml | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml diff --git a/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml b/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml new file mode 100644 index 000000000000..f446372fce34 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/kontron,sl28cpld-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Watchdog driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml. + +allOf: + - $ref: watchdog.yaml# + +properties: + compatible: + const: kontron,sl28cpld-wdt + + reg: + maxItems: 1 + description: Instance number of the watchdog + +required: + - compatible + +additionalProperties: false From patchwork Tue Mar 17 20:50:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11443999 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 627AE90 for ; Tue, 17 Mar 2020 20:51:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 408A620752 for ; Tue, 17 Mar 2020 20:51:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="jsqGqW/y" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727015AbgCQUu5 (ORCPT ); Tue, 17 Mar 2020 16:50:57 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:48037 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726958AbgCQUu5 (ORCPT ); Tue, 17 Mar 2020 16:50:57 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id C5B2823E68; Tue, 17 Mar 2020 21:50:52 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478253; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VqfcYwyDQKikiyO04HE5MBT8kgxBHODa92cy3skiEn0=; b=jsqGqW/yWgCdmWAn2/TKlz1FzzlAfVx4LVerrvKmRnuMaBRtNkWsXvN+jMLUwS7Uy0U63E KDT/SvAArSsGCt3GQ8eg+1UtoXbBhMLOZp/ZERJOtvBvtcPVmKqspt34573eetvemNSl5M yIdOOByfbOZ9ZtQ1Cz5FrRF6Je+NGqc= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 08/18] watchdog: add support for sl28cpld watchdog Date: Tue, 17 Mar 2020 21:50:07 +0100 Message-Id: <20200317205017.28280-9-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: C5B2823E68 X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.507]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This adds support for the watchdog of the sl28cpld board management controller. This is part of a multi-function device driver. Signed-off-by: Michael Walle --- drivers/watchdog/Kconfig | 11 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/sl28cpld_wdt.c | 238 ++++++++++++++++++++++++++++++++ 3 files changed, 250 insertions(+) create mode 100644 drivers/watchdog/sl28cpld_wdt.c diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 9ea2b43d4b01..c78b90ccc8cf 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -340,6 +340,17 @@ config MLX_WDT To compile this driver as a module, choose M here: the module will be called mlx-wdt. +config SL28CPLD_WATCHDOG + tristate "Kontron sl28 watchdog" + depends on MFD_SL28CPLD + select WATCHDOG_CORE + help + Say Y here to include support for the watchdog timer + on the Kontron sl28 CPLD. + + To compile this driver as a module, choose M here: the + module will be called sl28cpld_wdt. + # ALPHA Architecture # ARM Architecture diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 2ee352bf3372..060e2f895fe8 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -223,3 +223,4 @@ obj-$(CONFIG_MENF21BMC_WATCHDOG) += menf21bmc_wdt.o obj-$(CONFIG_MENZ069_WATCHDOG) += menz69_wdt.o obj-$(CONFIG_RAVE_SP_WATCHDOG) += rave-sp-wdt.o obj-$(CONFIG_STPMIC1_WATCHDOG) += stpmic1_wdt.o +obj-$(CONFIG_SL28CPLD_WATCHDOG) += sl28cpld_wdt.o diff --git a/drivers/watchdog/sl28cpld_wdt.c b/drivers/watchdog/sl28cpld_wdt.c new file mode 100644 index 000000000000..5927b7ad0be4 --- /dev/null +++ b/drivers/watchdog/sl28cpld_wdt.c @@ -0,0 +1,238 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * SMARC-sAL28 Watchdog driver. + * + * Copyright 2019 Kontron Europe GmbH + */ + +#include +#include +#include +#include +#include +#include +#include + +/* + * Watchdog timer block registers. + */ +#define SL28CPLD_WDT_CTRL 0 +#define WDT_CTRL_EN BIT(0) +#define WDT_CTRL_LOCK BIT(2) +#define SL28CPLD_WDT_TIMEOUT 1 +#define SL28CPLD_WDT_KICK 2 +#define WDT_KICK_VALUE 0x6b +#define SL28CPLD_WDT_COUNT 3 + +static bool nowayout = WATCHDOG_NOWAYOUT; +module_param(nowayout, bool, 0); +MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); + +static int timeout; +module_param(timeout, int, 0); +MODULE_PARM_DESC(timeout, "Initial watchdog timeout in seconds"); + +struct sl28cpld_wdt { + struct watchdog_device wdd; + struct regmap *regmap; + u32 offset; +}; + +static int sl28cpld_wdt_ping(struct watchdog_device *wdd) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + + return regmap_write(wdt->regmap, wdt->offset + SL28CPLD_WDT_KICK, + WDT_KICK_VALUE); +} + +static int sl28cpld_wdt_start(struct watchdog_device *wdd) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + unsigned int val; + + val = WDT_CTRL_EN; + if (nowayout) + val |= WDT_CTRL_LOCK; + + return regmap_update_bits(wdt->regmap, wdt->offset + SL28CPLD_WDT_CTRL, + val, val); +} + +static int sl28cpld_wdt_stop(struct watchdog_device *wdd) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + + return regmap_update_bits(wdt->regmap, wdt->offset + SL28CPLD_WDT_CTRL, + WDT_CTRL_EN, 0); +} + +static unsigned int sl28cpld_wdt_status(struct watchdog_device *wdd) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + unsigned int status; + int ret; + + ret = regmap_read(wdt->regmap, wdt->offset + SL28CPLD_WDT_CTRL, + &status); + if (ret < 0) + return 0; + + /* is the watchdog timer running? */ + return (status & WDT_CTRL_EN) << WDOG_ACTIVE; +} + +static unsigned int sl28cpld_wdt_get_timeleft(struct watchdog_device *wdd) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + int ret; + unsigned int val; + + ret = regmap_read(wdt->regmap, wdt->offset + SL28CPLD_WDT_COUNT, &val); + if (ret < 0) + return 0; + + return val; +} + +static int sl28cpld_wdt_set_timeout(struct watchdog_device *wdd, + unsigned int timeout) +{ + int ret; + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + + ret = regmap_write(wdt->regmap, wdt->offset + SL28CPLD_WDT_TIMEOUT, + timeout); + if (ret == 0) + wdd->timeout = timeout; + + return ret; +} + +static const struct watchdog_info sl28cpld_wdt_info = { + .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, + .identity = "SMARC-sAL28 CPLD watchdog", +}; + +static struct watchdog_ops sl28cpld_wdt_ops = { + .owner = THIS_MODULE, + .start = sl28cpld_wdt_start, + .stop = sl28cpld_wdt_stop, + .status = sl28cpld_wdt_status, + .ping = sl28cpld_wdt_ping, + .set_timeout = sl28cpld_wdt_set_timeout, + .get_timeleft = sl28cpld_wdt_get_timeleft, +}; + +static int sl28cpld_wdt_locked(struct sl28cpld_wdt *wdt) +{ + unsigned int val; + int ret; + + ret = regmap_read(wdt->regmap, wdt->offset + SL28CPLD_WDT_CTRL, &val); + if (ret < 0) + return ret; + + return val & WDT_CTRL_LOCK; +} + +static int sl28cpld_wdt_probe(struct platform_device *pdev) +{ + struct sl28cpld_wdt *wdt; + struct watchdog_device *wdd; + struct resource *res; + unsigned int val; + int ret; + + wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL); + if (!wdt) + return -ENOMEM; + + if (!pdev->dev.parent) + return -ENODEV; + + wdt->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!wdt->regmap) + return -ENODEV; + + res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (res == NULL) + return -EINVAL; + wdt->offset = res->start; + + /* initialize struct watchdog_device */ + wdd = &wdt->wdd; + wdd->parent = &pdev->dev; + wdd->info = &sl28cpld_wdt_info; + wdd->ops = &sl28cpld_wdt_ops; + wdd->min_timeout = 1; + wdd->max_timeout = 255; + + watchdog_set_drvdata(wdd, wdt); + + /* if the watchdog is locked, we set nowayout to true */ + ret = sl28cpld_wdt_locked(wdt); + if (ret < 0) + return ret; + if (ret) + nowayout = true; + watchdog_set_nowayout(wdd, nowayout); + + /* + * Initial timeout value, can either be set by kernel parameter or by + * the device tree. If both are not given the current value is used. + */ + watchdog_init_timeout(wdd, timeout, &pdev->dev); + if (wdd->timeout) { + sl28cpld_wdt_set_timeout(wdd, wdd->timeout); + } else { + ret = regmap_read(wdt->regmap, + wdt->offset + SL28CPLD_WDT_TIMEOUT, &val); + if (ret < 0) + return ret; + wdd->timeout = val; + } + + ret = watchdog_register_device(wdd); + if (ret < 0) { + dev_err(&pdev->dev, "failed to register watchdog device\n"); + return ret; + } + + platform_set_drvdata(pdev, wdt); + + dev_info(&pdev->dev, "CPLD watchdog: initial timeout %d sec%s\n", + wdd->timeout, nowayout ? ", nowayout" : ""); + + return 0; +} + +static int sl28cpld_wdt_remove(struct platform_device *pdev) +{ + struct sl28cpld_wdt *wdt = platform_get_drvdata(pdev); + + watchdog_unregister_device(&wdt->wdd); + + return 0; +} + +static void sl28cpld_wdt_shutdown(struct platform_device *pdev) +{ + struct sl28cpld_wdt *wdt = platform_get_drvdata(pdev); + + sl28cpld_wdt_stop(&wdt->wdd); +} + +static struct platform_driver sl28cpld_wdt_driver = { + .probe = sl28cpld_wdt_probe, + .remove = sl28cpld_wdt_remove, + .shutdown = sl28cpld_wdt_shutdown, + .driver = { + .name = "sl28cpld-wdt", + }, +}; +module_platform_driver(sl28cpld_wdt_driver); + +MODULE_DESCRIPTION("sl28cpld Watchdog Driver"); +MODULE_LICENSE("GPL"); From patchwork Tue Mar 17 20:50:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11444007 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2F62690 for ; Tue, 17 Mar 2020 20:51:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0F9AF20770 for ; Tue, 17 Mar 2020 20:51:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="a0k60BCs" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726992AbgCQUu5 (ORCPT ); Tue, 17 Mar 2020 16:50:57 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:45799 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726775AbgCQUu5 (ORCPT ); Tue, 17 Mar 2020 16:50:57 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 7325A23E7D; Tue, 17 Mar 2020 21:50:53 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478253; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Ri3us5iowE0s8wDejqoaW6dFoX+cHKfXa0SSE9J4SjM=; b=a0k60BCs3DDsfrBJtHZ+mEZSTzSOLVTRbTlZfY+9qTP/O10CBugCYvw/EtfLK6cMXu+xZh UZ59AHE6DobWtGjCsXgFqc0BRAtErzYEhqhowlKvBm7MMXbOPxvhkwJyoXrWdmPxXcT2qi W8VhrQpB3OP0Z4YF50zHdHVPqfEB2sc= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 09/18] dt-bindings: pwm: Add bindings for sl28cpld PWM controller Date: Tue, 17 Mar 2020 21:50:08 +0100 Message-Id: <20200317205017.28280-10-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: 7325A23E7D X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.602]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This adds device tree bindings for the PWM controller of the sl28cpld management controller. Signed-off-by: Michael Walle --- .../bindings/pwm/kontron,sl28cpld-pwm.yaml | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml diff --git a/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml b/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml new file mode 100644 index 000000000000..f4640dbae692 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/kontron,sl28cpld-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PWM driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml. + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + const: kontron,sl28cpld-pwm + + reg: + maxItems: 1 + description: Instance number of the PWM controller + + "#pwm-cells": + const: 2 + +required: + - compatible + +additionalProperties: false From patchwork Tue Mar 17 20:50:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11443995 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D2175159A for ; Tue, 17 Mar 2020 20:51:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AA4002075E for ; Tue, 17 Mar 2020 20:51:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="vNXBPAAH" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727222AbgCQUvb (ORCPT ); Tue, 17 Mar 2020 16:51:31 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:40643 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726971AbgCQUu6 (ORCPT ); Tue, 17 Mar 2020 16:50:58 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 20D3323EA9; Tue, 17 Mar 2020 21:50:54 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478254; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=twd0Ppy8uMjyLaeWbisE1KI8OORpU7NS5ZQrPhswzQo=; b=vNXBPAAH1IrB2oMPSmrVTqppJ4sWHDZ3wEGTJho7rCtDSknH6elwMwiFpJ7GDwL4OHIPDG hBANb2hj37TVSfZyhO9shM0ct0BS7uXXrWdIzHJPFD+9xCaDs0ejBX5yJljtsGvchj6rnD 4+4szyk0Pn9J92ZfLEcq6jv1In4IBCw= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 10/18] pwm: add support for sl28cpld PWM controller Date: Tue, 17 Mar 2020 21:50:09 +0100 Message-Id: <20200317205017.28280-11-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: 20D3323EA9 X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.506]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This adds support for the PWM controller of the sl28cpld board management controller. This is part of a multi-function device driver. Signed-off-by: Michael Walle --- drivers/pwm/Kconfig | 10 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-sl28cpld.c | 192 +++++++++++++++++++++++++++++++++++++ 3 files changed, 203 insertions(+) create mode 100644 drivers/pwm/pwm-sl28cpld.c diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 30190beeb6e9..516d70873b4c 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -413,6 +413,16 @@ config PWM_SIFIVE To compile this driver as a module, choose M here: the module will be called pwm-sifive. +config PWM_SL28CPLD + tristate "Kontron sl28 PWM support" + depends on MFD_SL28CPLD + help + Generic PWM framework driver for board management controller + found on the Kontron sl28 CPLD. + + To compile this driver as a module, choose M here: the module + will be called pwm-sl28cpld. + config PWM_SPEAR tristate "STMicroelectronics SPEAr PWM support" depends on PLAT_SPEAR diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 9a475073dafc..2c2b569dcde9 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -40,6 +40,7 @@ obj-$(CONFIG_PWM_RENESAS_TPU) += pwm-renesas-tpu.o obj-$(CONFIG_PWM_ROCKCHIP) += pwm-rockchip.o obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o obj-$(CONFIG_PWM_SIFIVE) += pwm-sifive.o +obj-$(CONFIG_PWM_SL28CPLD) += pwm-sl28cpld.o obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o obj-$(CONFIG_PWM_SPRD) += pwm-sprd.o obj-$(CONFIG_PWM_STI) += pwm-sti.o diff --git a/drivers/pwm/pwm-sl28cpld.c b/drivers/pwm/pwm-sl28cpld.c new file mode 100644 index 000000000000..758f46898da6 --- /dev/null +++ b/drivers/pwm/pwm-sl28cpld.c @@ -0,0 +1,192 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * SMARC-sAL28 PWM driver. + * + * Copyright 2019 Kontron Europe GmbH + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * PWM timer block registers. + */ +#define SL28CPLD_PWM_CTRL 0 +#define PWM_ENABLE BIT(7) +#define PWM_MODE_250HZ 0 +#define PWM_MODE_500HZ 1 +#define PWM_MODE_1KHZ 2 +#define PWM_MODE_2KHZ 3 +#define PWM_MODE_MASK GENMASK(1, 0) +#define SL28CPLD_PWM_CYCLE 1 +#define PWM_CYCLE_MAX 0x7f + +struct sl28cpld_pwm { + struct pwm_chip pwm_chip; + struct regmap *regmap; + u32 offset; +}; + +struct sl28cpld_pwm_periods { + u8 ctrl; + unsigned long duty_cycle; +}; + +struct sl28cpld_pwm_config { + unsigned long period_ns; + u8 max_duty_cycle; +}; + +static struct sl28cpld_pwm_config sl28cpld_pwm_config[] = { + [PWM_MODE_250HZ] = { .period_ns = 4000000, .max_duty_cycle = 0x80 }, + [PWM_MODE_500HZ] = { .period_ns = 2000000, .max_duty_cycle = 0x40 }, + [PWM_MODE_1KHZ] = { .period_ns = 1000000, .max_duty_cycle = 0x20 }, + [PWM_MODE_2KHZ] = { .period_ns = 500000, .max_duty_cycle = 0x10 }, +}; + +static inline struct sl28cpld_pwm *to_sl28cpld_pwm(struct pwm_chip *chip) +{ + return container_of(chip, struct sl28cpld_pwm, pwm_chip); +} + +static void sl28cpld_pwm_get_state(struct pwm_chip *chip, + struct pwm_device *pwm, + struct pwm_state *state) +{ + struct sl28cpld_pwm *spc = to_sl28cpld_pwm(chip); + static struct sl28cpld_pwm_config *config; + unsigned int reg; + unsigned long cycle; + unsigned int mode; + + regmap_read(spc->regmap, spc->offset + SL28CPLD_PWM_CTRL, ®); + + state->enabled = reg & PWM_ENABLE; + + mode = FIELD_GET(PWM_MODE_MASK, reg); + config = &sl28cpld_pwm_config[mode]; + state->period = config->period_ns; + + regmap_read(spc->regmap, spc->offset + SL28CPLD_PWM_CYCLE, ®); + cycle = reg * config->period_ns; + state->duty_cycle = DIV_ROUND_CLOSEST_ULL(cycle, + config->max_duty_cycle); +} + +static int sl28cpld_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + const struct pwm_state *state) +{ + struct sl28cpld_pwm *spc = to_sl28cpld_pwm(chip); + struct sl28cpld_pwm_config *config; + unsigned long long cycle; + int ret; + int mode; + u8 ctrl; + + /* update config, first search best matching period */ + for (mode = 0; mode < ARRAY_SIZE(sl28cpld_pwm_config); mode++) { + config = &sl28cpld_pwm_config[mode]; + if (state->period == config->period_ns) + break; + } + + if (mode == ARRAY_SIZE(sl28cpld_pwm_config)) + return -EINVAL; + + ctrl = FIELD_PREP(PWM_MODE_MASK, mode); + if (state->enabled) + ctrl |= PWM_ENABLE; + + cycle = state->duty_cycle * config->max_duty_cycle; + do_div(cycle, state->period); + + /* + * The hardware doesn't allow to set max_duty_cycle if the + * 250Hz mode is enabled. But since this is "all-high" output + * just use the 500Hz mode with the duty cycle to max value. + */ + if (cycle == config->max_duty_cycle) { + ctrl &= ~PWM_MODE_MASK; + ctrl |= FIELD_PREP(PWM_MODE_MASK, PWM_MODE_500HZ); + cycle = PWM_CYCLE_MAX; + } + + ret = regmap_write(spc->regmap, + spc->offset + SL28CPLD_PWM_CTRL, ctrl); + if (ret) + return ret; + + return regmap_write(spc->regmap, + spc->offset + SL28CPLD_PWM_CYCLE, (u8)cycle); +} + +static const struct pwm_ops sl28cpld_pwm_ops = { + .apply = sl28cpld_pwm_apply, + .get_state = sl28cpld_pwm_get_state, + .owner = THIS_MODULE, +}; + +static int sl28cpld_pwm_probe(struct platform_device *pdev) +{ + struct sl28cpld_pwm *pwm; + struct pwm_chip *chip; + struct resource *res; + int ret; + + pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL); + if (!pwm) + return -ENOMEM; + + if (!pdev->dev.parent) + return -ENODEV; + + pwm->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!pwm->regmap) + return -ENODEV; + + res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (!res) + return -EINVAL; + pwm->offset = res->start; + + /* initialize struct gpio_chip */ + chip = &pwm->pwm_chip; + chip->dev = &pdev->dev; + chip->ops = &sl28cpld_pwm_ops; + chip->base = -1; + chip->npwm = 1; + + ret = pwmchip_add(&pwm->pwm_chip); + if (ret < 0) + return ret; + + platform_set_drvdata(pdev, pwm); + + return 0; +} + +static int sl28cpld_pwm_remove(struct platform_device *pdev) +{ + struct sl28cpld_pwm *pwm = platform_get_drvdata(pdev); + + return pwmchip_remove(&pwm->pwm_chip); +} + +static struct platform_driver sl28cpld_pwm_driver = { + .probe = sl28cpld_pwm_probe, + .remove = sl28cpld_pwm_remove, + .driver = { + .name = "sl28cpld-pwm", + }, +}; +module_platform_driver(sl28cpld_pwm_driver); + +MODULE_DESCRIPTION("sl28cpld PWM Driver"); +MODULE_LICENSE("GPL"); From patchwork Tue Mar 17 20:50:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11444005 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 063DF159A for ; Tue, 17 Mar 2020 20:51:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DABF92073E for ; Tue, 17 Mar 2020 20:51:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="NB4HqA8J" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727238AbgCQUvh (ORCPT ); Tue, 17 Mar 2020 16:51:37 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:58263 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726983AbgCQUu5 (ORCPT ); Tue, 17 Mar 2020 16:50:57 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id B660B23EB5; Tue, 17 Mar 2020 21:50:54 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478255; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=E7KYRHF8gW7SJeGi58kiJJTVc48AdiVocJvWLrXB+2c=; b=NB4HqA8JYHZaNI3x93GqOwrkjXX+JsHlDmI6nXR/8mgqGLM1gRkTAk8chQVh7yyr2dNCZ6 pMpfgfaXm3I38s68ERSkT77yUNvxec375pPCYM8oPN+NTICxyAekkG4fj8b9clvRP6/Dla vpNAHR1igbCQW4Pi8Ux9QGha+YtjtNQ= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 11/18] dt-bindings: gpio: Add bindings for sl28cpld GPIO controller Date: Tue, 17 Mar 2020 21:50:10 +0100 Message-Id: <20200317205017.28280-12-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: B660B23EB5 X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.601]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This adds device tree bindings for the GPIO controller of the sl28 board management controller. Signed-off-by: Michael Walle --- .../bindings/gpio/kontron,sl28cpld-gpio.yaml | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml diff --git a/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml b/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml new file mode 100644 index 000000000000..a6af8c4b622f --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/kontron,sl28cpld-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GPIO driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml. + +properties: + compatible: + enum: + - kontron,sl28cpld-gpio + - kontron,sl28cpld-gpi + - kontron,sl28cpld-gpo + + reg: + maxItems: 1 + description: Instance number of the GPIO controller + + "#interrupt-cells": + const: 2 + + interrupt-controller: true + + "#gpio-cells": + const: 2 + + gpio-controller: true + + gpio-line-names: + minItems: 1 + maxItems: 8 + +required: + - compatible + - "#gpio-cells" + - gpio-controller + +additionalProperties: false From patchwork Tue Mar 17 20:50:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11443981 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EBF89159A for ; Tue, 17 Mar 2020 20:51:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AE4AF2073E for ; Tue, 17 Mar 2020 20:51:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="hWvM4tP4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727070AbgCQUvC (ORCPT ); Tue, 17 Mar 2020 16:51:02 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:45523 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726897AbgCQUvA (ORCPT ); Tue, 17 Mar 2020 16:51:00 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id AC2E123EB8; Tue, 17 Mar 2020 21:50:55 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478256; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9Aga4RzofYNZyq0SiX9RxpLXl7fGWBYL+9Qsz5fx5Kg=; b=hWvM4tP4mNgN8H1MK0OAR6DXozsArqpWFRhvQhydqM4nbPES9GJRWttPt/ztfuVXgHnPgR mpTRMXCm3j90IcEd1tUONpkBrZSs4GaxX6f6O5aoHqNE1dyG3+PhA6yfA9id3UdUpQrwtS tWtlQOBrBmnxVogEdkoWkfF6qy1HBp0= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 12/18] gpio: add support for the sl28cpld GPIO controller Date: Tue, 17 Mar 2020 21:50:11 +0100 Message-Id: <20200317205017.28280-13-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: AC2E123EB8 X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.499]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This adds support for the GPIO controller of the sl28 board management controller. This driver is part of a multi-function device. Signed-off-by: Michael Walle --- drivers/gpio/Kconfig | 11 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-sl28cpld.c | 332 +++++++++++++++++++++++++++++++++++ 3 files changed, 344 insertions(+) create mode 100644 drivers/gpio/gpio-sl28cpld.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 3cbf8882a0dd..516e47017ef5 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1211,6 +1211,17 @@ config GPIO_RC5T583 This driver provides the support for driving/reading the gpio pins of RC5T583 device through standard gpio library. +config GPIO_SL28CPLD + tristate "Kontron sl28 GPIO" + depends on MFD_SL28CPLD + depends on OF_GPIO + select GPIOLIB_IRQCHIP + help + This enables support for the GPIOs found on the Kontron sl28 CPLD. + + This driver can also be built as a module. If so, the module will be + called gpio-sl28cpld. + config GPIO_STMPE bool "STMPE GPIOs" depends on MFD_STMPE diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 0b571264ddbc..0ca2d52c78e8 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -127,6 +127,7 @@ obj-$(CONFIG_GPIO_SCH311X) += gpio-sch311x.o obj-$(CONFIG_GPIO_SCH) += gpio-sch.o obj-$(CONFIG_GPIO_SIFIVE) += gpio-sifive.o obj-$(CONFIG_GPIO_SIOX) += gpio-siox.o +obj-$(CONFIG_GPIO_SL28CPLD) += gpio-sl28cpld.o obj-$(CONFIG_GPIO_SODAVILLE) += gpio-sodaville.o obj-$(CONFIG_GPIO_SPEAR_SPICS) += gpio-spear-spics.o obj-$(CONFIG_GPIO_SPRD) += gpio-sprd.o diff --git a/drivers/gpio/gpio-sl28cpld.c b/drivers/gpio/gpio-sl28cpld.c new file mode 100644 index 000000000000..94f82013882f --- /dev/null +++ b/drivers/gpio/gpio-sl28cpld.c @@ -0,0 +1,332 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * SMARC-sAL28 GPIO driver. + * + * Copyright 2019 Kontron Europe GmbH + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define GPIO_REG_DIR 0 +#define GPIO_REG_OUT 1 +#define GPIO_REG_IN 2 +#define GPIO_REG_IE 3 +#define GPIO_REG_IP 4 + +#define GPI_REG_IN 0 + +#define GPO_REG_OUT 0 + +enum sl28cpld_gpio_type { + sl28cpld_gpio, + sl28cpld_gpi, + sl28cpld_gpo, +}; + +struct sl28cpld_gpio { + struct gpio_chip gpio_chip; + struct irq_chip irq_chip; + struct regmap *regmap; + u32 offset; + struct mutex lock; + u8 ie; +}; + +static void sl28cpld_gpio_set_reg(struct gpio_chip *chip, unsigned int reg, + unsigned int offset, int value) +{ + struct sl28cpld_gpio *gpio = gpiochip_get_data(chip); + unsigned int mask = 1 << offset; + unsigned int val = value << offset; + + regmap_update_bits(gpio->regmap, gpio->offset + reg, mask, val); +} + +static void sl28cpld_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + sl28cpld_gpio_set_reg(chip, GPIO_REG_OUT, offset, value); +} + +static void sl28cpld_gpo_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + sl28cpld_gpio_set_reg(chip, GPO_REG_OUT, offset, value); +} + +static int sl28cpld_gpio_get_reg(struct gpio_chip *chip, unsigned int reg, + unsigned int offset) +{ + struct sl28cpld_gpio *gpio = gpiochip_get_data(chip); + unsigned int mask = 1 << offset; + unsigned int val; + int ret; + + ret = regmap_read(gpio->regmap, gpio->offset + reg, &val); + if (ret) + return ret; + + return (val & mask) ? 1 : 0; +} + +static int sl28cpld_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + return sl28cpld_gpio_get_reg(chip, GPIO_REG_IN, offset); +} + +static int sl28cpld_gpi_get(struct gpio_chip *chip, unsigned int offset) +{ + return sl28cpld_gpio_get_reg(chip, GPI_REG_IN, offset); +} + +static int sl28cpld_gpio_get_direction(struct gpio_chip *chip, + unsigned int offset) +{ + struct sl28cpld_gpio *gpio = gpiochip_get_data(chip); + unsigned int reg; + int ret; + + ret = regmap_read(gpio->regmap, gpio->offset + GPIO_REG_DIR, ®); + if (ret) + return ret; + + if (reg & (1 << offset)) + return GPIO_LINE_DIRECTION_OUT; + else + return GPIO_LINE_DIRECTION_IN; +} + +static int sl28cpld_gpio_set_direction(struct gpio_chip *chip, + unsigned int offset, + bool output) +{ + struct sl28cpld_gpio *gpio = gpiochip_get_data(chip); + unsigned int mask = 1 << offset; + unsigned int val = (output) ? mask : 0; + + return regmap_update_bits(gpio->regmap, gpio->offset + GPIO_REG_DIR, + mask, val); + +} + +static int sl28cpld_gpio_direction_input(struct gpio_chip *chip, + unsigned int offset) +{ + return sl28cpld_gpio_set_direction(chip, offset, false); +} + +static int sl28cpld_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int value) +{ + sl28cpld_gpio_set_reg(chip, GPIO_REG_OUT, offset, value); + return sl28cpld_gpio_set_direction(chip, offset, true); +} + +static void sl28cpld_gpio_irq_lock(struct irq_data *data) +{ + struct sl28cpld_gpio *gpio = + gpiochip_get_data(irq_data_get_irq_chip_data(data)); + + mutex_lock(&gpio->lock); +} + +static void sl28cpld_gpio_irq_sync_unlock(struct irq_data *data) +{ + struct sl28cpld_gpio *gpio = + gpiochip_get_data(irq_data_get_irq_chip_data(data)); + + regmap_write(gpio->regmap, gpio->offset + GPIO_REG_IE, gpio->ie); + mutex_unlock(&gpio->lock); +} + +static void sl28cpld_gpio_irq_disable(struct irq_data *data) +{ + struct sl28cpld_gpio *gpio = + gpiochip_get_data(irq_data_get_irq_chip_data(data)); + + if (data->hwirq >= 8) + return; + + gpio->ie &= ~(1 << data->hwirq); +} + +static void sl28cpld_gpio_irq_enable(struct irq_data *data) +{ + struct sl28cpld_gpio *gpio = + gpiochip_get_data(irq_data_get_irq_chip_data(data)); + + if (data->hwirq >= 8) + return; + + gpio->ie |= (1 << data->hwirq); +} + +static int sl28cpld_gpio_irq_set_type(struct irq_data *data, unsigned int type) +{ + /* only edge triggered interrupts on both edges are supported */ + return (type == IRQ_TYPE_EDGE_BOTH) ? 0 : -EINVAL; +} + +static irqreturn_t sl28cpld_gpio_irq_thread(int irq, void *data) +{ + struct sl28cpld_gpio *gpio = data; + unsigned int ip; + unsigned int virq; + int pin; + int ret; + + ret = regmap_read(gpio->regmap, gpio->offset + GPIO_REG_IP, &ip); + if (ret) + return IRQ_NONE; + + /* mask other pending interrupts which are not enabled */ + ip &= gpio->ie; + + /* ack the interrupts */ + regmap_write(gpio->regmap, gpio->offset + GPIO_REG_IP, ip); + + /* and handle them */ + while (ip) { + pin = __ffs(ip); + ip &= ~BIT(pin); + + virq = irq_find_mapping(gpio->gpio_chip.irq.domain, pin); + if (virq) + handle_nested_irq(virq); + } + + return IRQ_HANDLED; +} + +static int sl28_cpld_gpio_irq_init(struct platform_device *pdev, int irq) +{ + struct sl28cpld_gpio *gpio = platform_get_drvdata(pdev); + struct irq_chip *irq_chip = &gpio->irq_chip; + int ret; + + irq_chip->name = "sl28cpld-gpio-irq", + irq_chip->irq_bus_lock = sl28cpld_gpio_irq_lock, + irq_chip->irq_bus_sync_unlock = sl28cpld_gpio_irq_sync_unlock, + irq_chip->irq_disable = sl28cpld_gpio_irq_disable, + irq_chip->irq_enable = sl28cpld_gpio_irq_enable, + irq_chip->irq_set_type = sl28cpld_gpio_irq_set_type, + irq_chip->flags = IRQCHIP_SKIP_SET_WAKE, + + ret = gpiochip_irqchip_add_nested(&gpio->gpio_chip, irq_chip, 0, + handle_simple_irq, IRQ_TYPE_NONE); + if (ret) + return ret; + + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + sl28cpld_gpio_irq_thread, + IRQF_SHARED | IRQF_ONESHOT, + pdev->name, gpio); + if (ret) + return ret; + + gpiochip_set_nested_irqchip(&gpio->gpio_chip, irq_chip, irq); + + return 0; +} + +static int sl28cpld_gpio_probe(struct platform_device *pdev) +{ + enum sl28cpld_gpio_type type = + platform_get_device_id(pdev)->driver_data; + struct device_node *np = pdev->dev.of_node; + struct sl28cpld_gpio *gpio; + struct gpio_chip *chip; + struct resource *res; + bool irq_support = false; + int ret; + int irq; + + gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); + if (!gpio) + return -ENOMEM; + + if (!pdev->dev.parent) + return -ENODEV; + + gpio->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!gpio->regmap) + return -ENODEV; + + res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (!res) + return -EINVAL; + gpio->offset = res->start; + + /* initialize struct gpio_chip */ + mutex_init(&gpio->lock); + chip = &gpio->gpio_chip; + chip->parent = &pdev->dev; + chip->label = dev_name(&pdev->dev); + chip->owner = THIS_MODULE; + chip->can_sleep = true; + chip->base = -1; + chip->ngpio = 8; + + switch (type) { + case sl28cpld_gpio: + chip->get_direction = sl28cpld_gpio_get_direction; + chip->direction_input = sl28cpld_gpio_direction_input; + chip->direction_output = sl28cpld_gpio_direction_output; + chip->get = sl28cpld_gpio_get; + chip->set = sl28cpld_gpio_set; + irq_support = true; + break; + case sl28cpld_gpo: + chip->set = sl28cpld_gpo_set; + chip->get = sl28cpld_gpi_get; + break; + case sl28cpld_gpi: + chip->get = sl28cpld_gpi_get; + break; + } + + ret = devm_gpiochip_add_data(&pdev->dev, chip, gpio); + if (ret < 0) + return ret; + + platform_set_drvdata(pdev, gpio); + + if (irq_support && of_property_read_bool(np, "interrupt-controller")) { + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return ret; + + ret = sl28_cpld_gpio_irq_init(pdev, irq); + if (ret) + return ret; + } + + return 0; +} + +static const struct platform_device_id sl28cpld_gpio_id_table[] = { + {"sl28cpld-gpio", sl28cpld_gpio}, + {"sl28cpld-gpi", sl28cpld_gpi}, + {"sl28cpld-gpo", sl28cpld_gpo}, +}; +MODULE_DEVICE_TABLE(platform, sl28cpld_gpio_id_table); + +static struct platform_driver sl28cpld_gpio_driver = { + .probe = sl28cpld_gpio_probe, + .id_table = sl28cpld_gpio_id_table, + .driver = { + .name = "sl28cpld-gpio", + }, +}; +module_platform_driver(sl28cpld_gpio_driver); + +MODULE_DESCRIPTION("sl28cpld GPIO Driver"); +MODULE_LICENSE("GPL"); From patchwork Tue Mar 17 20:50:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11443977 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CE8D890 for ; Tue, 17 Mar 2020 20:51:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ADE7420752 for ; Tue, 17 Mar 2020 20:51:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="TzqZJOfX" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727091AbgCQUvD (ORCPT ); Tue, 17 Mar 2020 16:51:03 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:59981 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726991AbgCQUu7 (ORCPT ); Tue, 17 Mar 2020 16:50:59 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id B066723EBA; Tue, 17 Mar 2020 21:50:56 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478257; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xUrOba6StDm3aBi/b0DHSFTYlxtTMjAy6r5a+2We48s=; b=TzqZJOfXt0BB6yw47KewAKoyuni3WRkjG5pKFlgZeS2uCZOxoq5HxKMtCcDnG010uoGA3i CvGNKsZ/6+K4pcXHBdUi5hMlbWCdcPxdrVvshiemLF0ep6eergWwbMisE1Q0qyzFhyrY1b 5KoG7DNelj/Z23WK66myrtQ/XB7Nsao= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 13/18] dt-bindings: hwmon: Add bindings for sl28cpld hardware monitoring Date: Tue, 17 Mar 2020 21:50:12 +0100 Message-Id: <20200317205017.28280-14-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: B066723EBA X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.603]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This adds device tree bindings for the hardware monitoring controller of the sl28cpld board management controller. At the moment there is only one flavor, namely the fan supervisor. Signed-off-by: Michael Walle --- .../hwmon/kontron,sl28cpld-hwmon.yaml | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml diff --git a/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml new file mode 100644 index 000000000000..b3f90d51e2e5 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/kontron,sl28cpld-hwmon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hardware monitoring driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml. + +properties: + compatible: + enum: + - kontron,sl28cpld-fan + + reg: + maxItems: 1 + description: Instance number of the monitoring controller + +required: + - compatible + +additionalProperties: false From patchwork Tue Mar 17 20:50:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11443979 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 38C4B90 for ; Tue, 17 Mar 2020 20:51:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0E72E20738 for ; Tue, 17 Mar 2020 20:51:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="I6UjhQhZ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727085AbgCQUvC (ORCPT ); Tue, 17 Mar 2020 16:51:02 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:45799 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727024AbgCQUvA (ORCPT ); Tue, 17 Mar 2020 16:51:00 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 62F3223EBD; Tue, 17 Mar 2020 21:50:57 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478257; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zlwQG40HXo3uxJm205guu0CxzwK9j2kdb75+DBg3bTQ=; b=I6UjhQhZqOzU05rPmxVgLrd/u00H32IfIOxfsncPXBN9b6qDGtTCnBgt1dktAK5pSNCBty TZ8g10VYatTrHIHBHa9JtvpihBm/xFcmiQitS+yJsV3hCFsWczfqazQ9WRtKJmpmXHVYeW vc1D5H+yCTtLJGaUX6k+UegVoi+mLaY= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 14/18] hwmon: add support for the sl28cpld hardware monitoring controller Date: Tue, 17 Mar 2020 21:50:13 +0100 Message-Id: <20200317205017.28280-15-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: 62F3223EBD X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.511]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This adds support for the hardware monitoring controller of the sl28cpld board management controller. This driver is part of a multi-function device. Signed-off-by: Michael Walle --- drivers/hwmon/Kconfig | 10 +++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sl28cpld-hwmon.c | 146 +++++++++++++++++++++++++++++++++ 3 files changed, 157 insertions(+) create mode 100644 drivers/hwmon/sl28cpld-hwmon.c diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 05a30832c6ba..c98716f78cfa 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1412,6 +1412,16 @@ config SENSORS_RASPBERRYPI_HWMON This driver can also be built as a module. If so, the module will be called raspberrypi-hwmon. +config SENSORS_SL28CPLD + tristate "Kontron's SMARC-sAL28 hardware monitoring driver" + depends on MFD_SL28CPLD + help + If you say yes here you get support for a fan connected to the + input of the SMARC connector of Kontron's SMARC-sAL28 module. + + This driver can also be built as a module. If so, the module + will be called sl28cpld-hwmon. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TEST diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index b0b9c8e57176..dfb0f8cda2dd 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -155,6 +155,7 @@ obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.o +obj-$(CONFIG_SENSORS_SL28CPLD) += sl28cpld-hwmon.o obj-$(CONFIG_SENSORS_SHT15) += sht15.o obj-$(CONFIG_SENSORS_SHT21) += sht21.o obj-$(CONFIG_SENSORS_SHT3x) += sht3x.o diff --git a/drivers/hwmon/sl28cpld-hwmon.c b/drivers/hwmon/sl28cpld-hwmon.c new file mode 100644 index 000000000000..7ac42bb0a48c --- /dev/null +++ b/drivers/hwmon/sl28cpld-hwmon.c @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * SMARC-sAL28 fan hardware monitoring driver. + * + * Copyright 2019 Kontron Europe GmbH + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define FAN_INPUT 0 +#define FAN_SCALE_X8 BIT(7) +#define FAN_VALUE_MASK GENMASK(6, 0) + +struct sl28cpld_hwmon { + struct regmap *regmap; + u32 offset; +}; + +static umode_t sl28cpld_hwmon_is_visible(const void *data, + enum hwmon_sensor_types type, + u32 attr, int channel) +{ + return 0444; +} + +static int sl28cpld_hwmon_read(struct device *dev, + enum hwmon_sensor_types type, u32 attr, + int channel, long *input) +{ + struct sl28cpld_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int value; + int ret; + + switch (attr) { + case hwmon_fan_input: + ret = regmap_read(hwmon->regmap, hwmon->offset + FAN_INPUT, + &value); + if (ret) + return ret; + /* + * The register has a 7 bit value and 1 bit which indicates the + * scale. If the MSB is set, then the lower 7 bit has to be + * multiplied by 8, to get the correct reading. + */ + if (value & FAN_SCALE_X8) + value = FIELD_GET(FAN_VALUE_MASK, value) << 3; + + /* + * The counter period is 1000ms and the sysfs specification + * says we should asssume 2 pulses per revolution. + */ + value *= 60 / 2; + + break; + default: + return -EOPNOTSUPP; + } + + *input = value; + return 0; +} + +static const u32 sl28cpld_hwmon_fan_config[] = { + HWMON_F_INPUT, + 0 +}; + +static const struct hwmon_channel_info sl28cpld_hwmon_fan = { + .type = hwmon_fan, + .config = sl28cpld_hwmon_fan_config, +}; + +static const struct hwmon_channel_info *sl28cpld_hwmon_info[] = { + &sl28cpld_hwmon_fan, + NULL +}; + +static const struct hwmon_ops sl28cpld_hwmon_ops = { + .is_visible = sl28cpld_hwmon_is_visible, + .read = sl28cpld_hwmon_read, +}; + +static const struct hwmon_chip_info sl28cpld_hwmon_chip_info = { + .ops = &sl28cpld_hwmon_ops, + .info = sl28cpld_hwmon_info, +}; + +static int sl28cpld_hwmon_probe(struct platform_device *pdev) +{ + struct device *hwmon_dev; + struct sl28cpld_hwmon *hwmon; + struct resource *res; + + hwmon = devm_kzalloc(&pdev->dev, sizeof(*hwmon), GFP_KERNEL); + if (!hwmon) + return -ENOMEM; + + if (!pdev->dev.parent) + return -ENODEV; + + hwmon->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!hwmon->regmap) + return -ENODEV; + + res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (!res) + return -EINVAL; + hwmon->offset = res->start; + + hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev, + "sl28cpld_hwmon", + hwmon, + &sl28cpld_hwmon_chip_info, + NULL); + if (IS_ERR(hwmon_dev)) { + dev_err(&pdev->dev, "failed to register as hwmon device"); + return PTR_ERR(hwmon_dev); + } + + return 0; +} + +static const struct platform_device_id sl28cpld_hwmon_id_table[] = { + {"sl28cpld-fan", 0}, +}; +MODULE_DEVICE_TABLE(platform, sl28cpld_hwmon_id_table); + +static struct platform_driver sl28cpld_hwmon_driver = { + .probe = sl28cpld_hwmon_probe, + .id_table = sl28cpld_hwmon_id_table, + .driver = { + .name = "sl28cpld-hwmon", + }, +}; +module_platform_driver(sl28cpld_hwmon_driver); + +MODULE_DESCRIPTION("sl28cpld Hardware Monitoring Driver"); +MODULE_LICENSE("GPL"); From patchwork Tue Mar 17 20:50:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11443989 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4F7D690 for ; Tue, 17 Mar 2020 20:51:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2F14920714 for ; Tue, 17 Mar 2020 20:51:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="egL2A+Pg" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726783AbgCQUvY (ORCPT ); Tue, 17 Mar 2020 16:51:24 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:48037 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726775AbgCQUvB (ORCPT ); Tue, 17 Mar 2020 16:51:01 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 0DFD923EBF; Tue, 17 Mar 2020 21:50:58 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478258; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+G7vUjbmTazNXUrtIDpEU68/rynsZSVyeFNhDxngbaM=; b=egL2A+PgoEq2UZlAMM2P3gmxox6gy/yFn6GJcH6Hyady8qfUajWfrVlImZ0vGz4rArmfnp mEvhyjPiYMYMPAJM36x2H+UU5bmi+86/F/U+uAI3XazJGK3DOaNQB/4VCgxMsYCxnno21N sXCEFsWikytembgW7cV5nlq3wlUr57A= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 15/18] arm64: dts: freescale: sl28: enable sl28cpld Date: Tue, 17 Mar 2020 21:50:14 +0100 Message-Id: <20200317205017.28280-16-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: 0DFD923EBF X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.563]; DKIM_SIGNED(0.00)[]; DBL_PROHIBIT(0.00)[0.0.0.0:email,0.0.0.1:email,0.0.0.50:email]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Add the board management controller node. Signed-off-by: Michael Walle --- .../freescale/fsl-ls1028a-kontron-sl28.dts | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts index 1648a04ea79f..b74d9ac0c388 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts @@ -8,6 +8,7 @@ /dts-v1/; #include "fsl-ls1028a.dtsi" +#include / { model = "Kontron SMARC-sAL28"; @@ -165,6 +166,92 @@ reg = <0x32>; }; + sl28cpld: sl28cpld@4a { + #address-cells = <1>; + #size-cells = <0>; + compatible = "kontron,sl28cpld"; + reg = <0x4a>; + interrupts-extended = <&gpio2 6 IRQ_TYPE_EDGE_FALLING>; + + interrupt-controller; + #interrupt-cells = <2>; + + cpld_gpio0: gpio@0 { + compatible = "kontron,sl28cpld-gpio"; + reg = <0>; + + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "GPIO0_CAM0_PWR_N", "GPIO1_CAM1_PWR_N", + "GPIO2_CAM0_RST_N", "GPIO3_CAM1_RST_N", + "GPIO4_HDA_RST_N", "GPIO5_PWM_OUT", + "GPIO6_TACHIN", "GPIO7"; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + cpld_gpio1: gpio@1 { + compatible = "kontron,sl28cpld-gpio"; + reg = <1>; + + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "GPIO8", "GPIO9", "GPIO10", "GPIO11", + "", "", "", ""; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + cpld_gpo: gpo { + compatible = "kontron,sl28cpld-gpo"; + + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "LCD0 voltage enable", + "LCD0 backlight enable", + "eMMC reset", "LVDS bridge reset", + "LVDS bridge power-down", + "SDIO power enable", + "", ""; + }; + + cpld_gpi: gpi { + compatible = "kontron,sl28cpld-gpi"; + + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "Power button", "Force recovery", "Sleep", + "Battery low", "Lid state", "Charging", + "Charger present", ""; + }; + + hwmon { + compatible = "kontron,sl28cpld-fan"; + }; + + pwm0: pwm@0 { + #pwm-cells = <2>; + compatible = "kontron,sl28cpld-pwm"; + reg = <0>; + }; + + pwm1: pwm@1 { + #pwm-cells = <2>; + compatible = "kontron,sl28cpld-pwm"; + reg = <1>; + }; + + watchdog { + compatible = "kontron,sl28cpld-wdt"; + }; + }; + eeprom@50 { compatible = "atmel,24c32"; reg = <0x50>; From patchwork Tue Mar 17 20:50:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11443987 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8991B1874 for ; Tue, 17 Mar 2020 20:51:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6855C20738 for ; Tue, 17 Mar 2020 20:51:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="RmRSryiD" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727049AbgCQUvY (ORCPT ); Tue, 17 Mar 2020 16:51:24 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:58263 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727050AbgCQUvB (ORCPT ); Tue, 17 Mar 2020 16:51:01 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id D3EC623EC0; Tue, 17 Mar 2020 21:50:58 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478259; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NUw0gx6+My8N/12AqVTkfCdlDH/GWGQWdSq0OF6q+Z4=; b=RmRSryiD7nyUD8UE2wAKcFtIWF5WUpVw4WFwcZflNUSJFGu8RliszA0kcspDjBcJAoyYV3 yBSD/Y0nrG4L1i+PHAHy/fIEOxtY6+kq+RJTQRTroJqw1v6r0KIFCBejV1acMU2Xl1QysL /d5nAGhfW0fZrM+yCEQigBnbwgLFTkg= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 16/18] arm64: dts: freescale: sl28: map GPIOs to input events Date: Tue, 17 Mar 2020 21:50:15 +0100 Message-Id: <20200317205017.28280-17-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: D3EC623EC0 X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.541]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Now that we have support for GPIO lines of the SMARC connector, map the sleep, power and lid switch signals to the corresponding keys using the gpio-keys and gpio-keys-polled drivers. The power and sleep signals have dedicated interrupts, thus we use these ones. The lid switch is just mapped to a GPIO input and needs polling. Signed-off-by: Michael Walle --- .../freescale/fsl-ls1028a-kontron-sl28.dts | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts index b74d9ac0c388..f92a2b1b6628 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts @@ -9,6 +9,8 @@ /dts-v1/; #include "fsl-ls1028a.dtsi" #include +#include +#include / { model = "Kontron SMARC-sAL28"; @@ -22,6 +24,36 @@ spi1 = &dspi2; }; + buttons0 { + compatible = "gpio-keys"; + + power-button { + interrupts-extended = <&sl28cpld + 4 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + label = "Power"; + }; + + sleep-button { + interrupts-extended = <&sl28cpld + 5 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + label = "Sleep"; + }; + }; + + buttons1 { + compatible = "gpio-keys-polled"; + poll-interval = <200>; + + lid-switch { + linux,input-type = ; + linux,code = ; + gpios = <&cpld_gpi 4 GPIO_ACTIVE_LOW>; + label = "Lid"; + }; + }; + chosen { stdout-path = "serial0:115200n8"; }; From patchwork Tue Mar 17 20:50:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11443973 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 883BB90 for ; Tue, 17 Mar 2020 20:51:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 67D2D20757 for ; Tue, 17 Mar 2020 20:51:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="W/xx59Eq" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727114AbgCQUvE (ORCPT ); Tue, 17 Mar 2020 16:51:04 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:42177 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726958AbgCQUvD (ORCPT ); Tue, 17 Mar 2020 16:51:03 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 778A223EC2; Tue, 17 Mar 2020 21:50:59 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478259; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FEFHFIMJWfw1b5h2UikI3VWi/Se8syLTpHGjAqXEjxw=; b=W/xx59EqowcJaM5zDZqDbsYGs0J6Sb0FGG3HsIWHti81UDmiSfvcxz/JkeBge3oa1W2KNF i6tHeTyg56CijHUPKMCOoI9R3EoLTHpZ/c5Psb2tbIxwwfyaiR4sIbKBMAu8XruRxbtNDe kv/eWhdiQydgK7hVmsThH/fF5yKX69g= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 17/18] arm64: dts: freescale: sl28: enable LED support Date: Tue, 17 Mar 2020 21:50:16 +0100 Message-Id: <20200317205017.28280-18-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: 778A223EC2 X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.555]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Now that we have support for GPIO lines of the SMARC connector, enable LED support on the KBox A-230-LS. There are two LEDs without fixed functions, one is yellow and one is green. Unfortunately, it is just one multi-color LED, thus while it is possible to enable both at the same time it is hard to tell the difference between "yellow only" and "yellow and green". Signed-off-by: Michael Walle --- .../fsl-ls1028a-kontron-kbox-a-230-ls.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dts index 4b4cc6a1573d..d4ca12b140b4 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dts @@ -16,6 +16,20 @@ model = "Kontron KBox A-230-LS"; compatible = "kontron,kbox-a-230-ls", "kontron,sl28-var4", "kontron,sl28", "fsl,ls1028a"; + + leds { + compatible = "gpio-leds"; + + user_yellow { + label = "s1914:yellow:user"; + gpios = <&cpld_gpio0 0 0>; + }; + + user_green { + label = "s1914:green:user"; + gpios = <&cpld_gpio1 3 0>; + }; + }; }; &enetc_mdio_pf3 { From patchwork Tue Mar 17 20:50:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11443971 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CEB9090 for ; Tue, 17 Mar 2020 20:51:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ADE9020752 for ; Tue, 17 Mar 2020 20:51:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="GoSAhAhK" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727128AbgCQUvF (ORCPT ); Tue, 17 Mar 2020 16:51:05 -0400 Received: from ssl.serverraum.org ([176.9.125.105]:37775 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727065AbgCQUvD (ORCPT ); Tue, 17 Mar 2020 16:51:03 -0400 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 2025123EC4; Tue, 17 Mar 2020 21:51:00 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1584478260; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=W2NICvToJ5VxP77+c9lfy+Eo5/BPC2qjYzOe6PwS1TY=; b=GoSAhAhKPygog86zCvdX/KIK15Bpoy1qgBcBDCsnwFSc7ORr1Qn7y51e3qM1MuUEA4A1Yz ow/+sDOVf5eZWxHpwLhcV/yApcTgnKAUeaiwF8YsW5Hw5tSiw6AuTVBbbYfE2mz5tw1FGW FVz/hz9mwVYd+m3lrRPAK59AYAojuwc= From: Michael Walle To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Jean Delvare , Guenter Roeck , Lee Jones , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Michael Walle Subject: [PATCH 18/18] arm64: dts: freescale: sl28: enable fan support Date: Tue, 17 Mar 2020 21:50:17 +0100 Message-Id: <20200317205017.28280-19-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317205017.28280-1-michael@walle.cc> References: <20200317205017.28280-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Spam-Level: ****** X-Rspamd-Server: web X-Spam-Status: Yes, score=6.40 X-Spam-Score: 6.40 X-Rspamd-Queue-Id: 2025123EC4 X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_SPAM(0.00)[0.572]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[22]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:31334, ipnet:2a02:810c:8000::/33, country:DE]; FREEMAIL_CC(0.00)[linaro.org,baylibre.com,kernel.org,suse.com,roeck-us.net,gmail.com,pengutronix.de,linux-watchdog.org,nxp.com,linutronix.de,lakedaemon.net,walle.cc]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: linux-hwmon-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Add a pwm-fan mapped to the PWM channel 0 which is connected to the fan connector of the carrier. Signed-off-by: Michael Walle --- .../dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts index 0973a6a45217..016b6ae5826b 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts @@ -15,6 +15,15 @@ compatible = "kontron,sl28-var3-ads2", "kontron,sl28-var3", "kontron,sl28", "fsl,ls1028a"; + pwm-fan { + compatible = "pwm-fan"; + cooling-min-state = <0>; + cooling-max-state = <3>; + #cooling-cells = <2>; + pwms = <&pwm0 0 4000000>; + cooling-levels = <1 128 192 255>; + }; + sound { #address-cells = <1>; #size-cells = <0>;