From patchwork Thu Mar 19 05:38:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11446493 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BAE6A1874 for ; Thu, 19 Mar 2020 05:40:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9B54F2072D for ; Thu, 19 Mar 2020 05:40:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="FFUErapf" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727045AbgCSFko (ORCPT ); Thu, 19 Mar 2020 01:40:44 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:33502 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727016AbgCSFkn (ORCPT ); Thu, 19 Mar 2020 01:40:43 -0400 Received: by mail-pg1-f193.google.com with SMTP id d17so66831pgo.0 for ; Wed, 18 Mar 2020 22:40:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VjRbI/Qcy2ZipTYHWuUTokoOEV5DVKKVy86kR+PhWiE=; b=FFUErapf5Y2xQAQXCjZUnjfCRN0y0A0wXHXw/sJjUknTYFS2v99P/qu6S388LrmOBm WLQv+cq5ggJaBRDLDscsPzceMAR4Ms8QpkQ2bX8IBLhuFHBxHfIPq1m2LbgMU4MM1by+ NUPMaf8roA6uBTCE3QIQs1E4S6LoODWGK7/yl06GM+eQ75gKvAWjElYhZ6WYdomNYDxg XJHKMLQDANCKHRwGmr6mUwcaTQOpMDyIggWwmZmDx0Mesp/M8ucO9QmwOTm3oG8IUdxT C+bR2+rPRQYoK3OofEwW0JSBzL1nrf90wfYGe3UDT2fWVttqFZcBgDkUAYwdb++3iwVJ 9JXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VjRbI/Qcy2ZipTYHWuUTokoOEV5DVKKVy86kR+PhWiE=; b=jFtNqV1C49sfLQ+iKZYxc+UigeMibiABj15FgTBzLnby9QnpNu97XCNJY3EvFad/kI /ZiCT/qriWel28fhjPH9ZUFCVliYvGAvXU7nL3Pj4zah1MZ3JRzD4hrcLwe+a2T6Cs8d U9Nve7890sBI6kaFHO/pu28HW3FfcksFhUeHsuaI2ix6ZYGNBumBEXfS85hH83aro9L1 JiofiXMPpjbZe/I7HnNs0iMEr4Zzzv9ezl3vUkUipGnUmGxoBJLlsz2CgMpN0Dd7+tQo UM2+zMtVsBcIrpOTyJt48qHMVGw37Z6Tcs3v0xEJrTuTxpHdMHxEAggg4LdMHX0gaff8 QarA== X-Gm-Message-State: ANhLgQ3t43quXCXcX1FDQ7KNJ+ChYcBpluyYGfJu4Bf9KbUn63nHdX9T RAkEcbvN06PL6AVyKUdbV7UWMA== X-Google-Smtp-Source: ADFU+vvvpauezbIT9XfVdGer93wUikobvBaeW9uRALrfaX66+M/F4eSbIFlcahvLdahCTb5waovbRA== X-Received: by 2002:aa7:8ec1:: with SMTP id b1mr2136428pfr.125.1584596442589; Wed, 18 Mar 2020 22:40:42 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id l125sm229126pgl.57.2020.03.18.22.40.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Mar 2020 22:40:41 -0700 (PDT) From: Bjorn Andersson To: Michael Turquette , Stephen Boyd Cc: Andy Gross , Rob Herring , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Clark Subject: [PATCH 1/4] clk: qcom: gdsc: Handle GDSC regulator supplies Date: Wed, 18 Mar 2020 22:38:59 -0700 Message-Id: <20200319053902.3415984-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200319053902.3415984-1-bjorn.andersson@linaro.org> References: <20200319053902.3415984-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Certain GDSCs, such as the GPU_GX on MSM8996, requires that the upstream regulator supply is powered in order to be turned on. It's not guaranteed that the bootloader will leave these supplies on and the driver core will attempt to enable any GDSCs before allowing the individual drivers to probe defer on the PMIC regulator driver not yet being present. So the gdsc driver needs to be made aware of supplying regulators and probe defer on their absence, and it needs to enable and disable the regulator accordingly. Voltage adjustments of the supplying regulator are deferred to the client drivers themselves. Signed-off-by: Bjorn Andersson --- drivers/clk/qcom/gdsc.c | 24 ++++++++++++++++++++++++ drivers/clk/qcom/gdsc.h | 4 ++++ 2 files changed, 28 insertions(+) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index a250f59708d8..3528789cc9d0 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -13,6 +13,7 @@ #include #include #include +#include #include "gdsc.h" #define PWR_ON_MASK BIT(31) @@ -112,6 +113,12 @@ static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status) int ret; u32 val = (status == GDSC_ON) ? 0 : SW_COLLAPSE_MASK; + if (status == GDSC_ON && sc->rsupply) { + ret = regulator_enable(sc->rsupply); + if (ret < 0) + return ret; + } + ret = regmap_update_bits(sc->regmap, sc->gdscr, SW_COLLAPSE_MASK, val); if (ret) return ret; @@ -143,6 +150,13 @@ static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status) ret = gdsc_poll_status(sc, status); WARN(ret, "%s status stuck at 'o%s'", sc->pd.name, status ? "ff" : "n"); + + if (!ret && status == GDSC_OFF && sc->rsupply) { + ret = regulator_disable(sc->rsupply); + if (ret < 0) + return ret; + } + return ret; } @@ -371,6 +385,16 @@ int gdsc_register(struct gdsc_desc *desc, if (!data->domains) return -ENOMEM; + /* Resolve any regulator supplies */ + for (i = 0; i < num; i++) { + if (!scs[i] || !scs[i]->supply) + continue; + + scs[i]->rsupply = devm_regulator_get(dev, scs[i]->supply); + if (IS_ERR(scs[i]->rsupply)) + return PTR_ERR(scs[i]->rsupply); + } + data->num_domains = num; for (i = 0; i < num; i++) { if (!scs[i]) diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h index 64cdc8cf0d4d..c36fc26dcdff 100644 --- a/drivers/clk/qcom/gdsc.h +++ b/drivers/clk/qcom/gdsc.h @@ -10,6 +10,7 @@ #include struct regmap; +struct regulator; struct reset_controller_dev; /** @@ -52,6 +53,9 @@ struct gdsc { struct reset_controller_dev *rcdev; unsigned int *resets; unsigned int reset_count; + + const char *supply; + struct regulator *rsupply; }; struct gdsc_desc { From patchwork Thu Mar 19 05:39:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11446487 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BA7A71667 for ; Thu, 19 Mar 2020 05:40:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9ABE02072D for ; Thu, 19 Mar 2020 05:40:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="RvT93Q2H" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725945AbgCSFkp (ORCPT ); Thu, 19 Mar 2020 01:40:45 -0400 Received: from mail-pl1-f193.google.com ([209.85.214.193]:41143 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727060AbgCSFkp (ORCPT ); Thu, 19 Mar 2020 01:40:45 -0400 Received: by mail-pl1-f193.google.com with SMTP id t16so562625plr.8 for ; Wed, 18 Mar 2020 22:40:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cyCIYRiG58oI2Jq7ZJtWmwccOTnDPz2E+ahBUJwhepg=; b=RvT93Q2HIVa2wQjAavOrQcjjvBzoTD2d/Vi0v4ILPVwAzX0dg8fy+LstszJeJ9LYsG h9Urt8EI4rk4+e+JOpzUihNvclfFm64LFGjzHeJcniNPXN0peBt+C/ibQMaALx8sQD57 3PRx+NHS2yn3f097HiMTm8+qbDWAyTyHFLatvInITefZQ3pMOrsrYk7Oj++eHChUG5tD +KN0ICuFOTKxbEUJIGQmAsNH6J0MBbMjRdAXsvjYCye+2g0ymTjeM3oqw6cXinUmNni3 Nma7XDkNIdwNBj70L4W7Ro3j8nxaMs8rq2kOlT0ehEWqTQhq8eelvuXlDq1su585cyIo cXHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cyCIYRiG58oI2Jq7ZJtWmwccOTnDPz2E+ahBUJwhepg=; b=B6PmOG/FM1dkyj/au5sCjFnnkfGDyYU5HS7uXk5a6iKcxksOoWL3osp0q1p9NXvS2f Byz59z2mqFI5NyfYgPi+SGsOuCyaBin5OCpikw9snP4sfQdhAY7uD2QCgmmwlPxPKLis iYCi89j5vg0tRfK9FSPpvWCC2JS0xHuKQM5y3rUvfnF1SozkCNpc0xWxkBPcgFSRCMJQ QFQF/mtFjigf8wVuFCtbCUj7MonGdecdBa/0hWet0tN1eKRZS1PSDmbs5Zm3Ju2wcBUU tE84FEpNIYtWP3OFtktzMQ/THgNvPgA9QDqQgHb0Ce1MvoLg3sg1SobjGajnZCTFGgsg rvnA== X-Gm-Message-State: ANhLgQ2q9Cc1UW/MUC+BI8vuNqkCZoKU5XKvr32UthW2QBF6UIWyYr+d +ASH/54iqK3tt/MaSv8QK6wBVw== X-Google-Smtp-Source: ADFU+vsVQv/9+mfD/f1ED3jkHlTd7vOGHMk8SR9Qw3XEQH2G5U8b3qmKmp8Edz2JQuozbGE0tbBmxg== X-Received: by 2002:a17:90a:2663:: with SMTP id l90mr1852159pje.188.1584596443916; Wed, 18 Mar 2020 22:40:43 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id l125sm229126pgl.57.2020.03.18.22.40.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Mar 2020 22:40:43 -0700 (PDT) From: Bjorn Andersson To: Michael Turquette , Stephen Boyd , Rob Herring Cc: Andy Gross , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Clark Subject: [PATCH 2/4] clk: qcom: mmcc-msm8996: Properly describe GPU_GX gdsc Date: Wed, 18 Mar 2020 22:39:00 -0700 Message-Id: <20200319053902.3415984-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200319053902.3415984-1-bjorn.andersson@linaro.org> References: <20200319053902.3415984-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The GPU_GX GDSC depends on both GPU GDSC being enabled and that the VDD_GX rail is powered, so update the description of the node to cover these requirements. Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/clock/qcom,mmcc.yaml | 4 ++++ drivers/clk/qcom/mmcc-msm8996.c | 2 ++ 2 files changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml index 85518494ce43..65d9aa790581 100644 --- a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml @@ -67,6 +67,10 @@ properties: description: Protected clock specifier list as per common clock binding + vdd_gfx-supply: + description: + Regulator supply for the GPU_GX GDSC + required: - compatible - reg diff --git a/drivers/clk/qcom/mmcc-msm8996.c b/drivers/clk/qcom/mmcc-msm8996.c index 6c7592ddf8bb..fd43a35db13b 100644 --- a/drivers/clk/qcom/mmcc-msm8996.c +++ b/drivers/clk/qcom/mmcc-msm8996.c @@ -3064,7 +3064,9 @@ static struct gdsc gpu_gx_gdsc = { .name = "gpu_gx", }, .pwrsts = PWRSTS_OFF_ON, + .parent = &gpu_gdsc.pd, .flags = CLAMP_IO, + .supply = "vdd_gfx", }; static struct clk_regmap *mmcc_msm8996_clocks[] = { From patchwork Thu Mar 19 05:39:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11446497 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7B2961667 for ; Thu, 19 Mar 2020 05:40:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5AE0D20753 for ; Thu, 19 Mar 2020 05:40:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="X53gtvJL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727178AbgCSFkw (ORCPT ); Thu, 19 Mar 2020 01:40:52 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:45036 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727150AbgCSFkv (ORCPT ); Thu, 19 Mar 2020 01:40:51 -0400 Received: by mail-pl1-f194.google.com with SMTP id h11so558287plr.11 for ; Wed, 18 Mar 2020 22:40:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DwffIuMpvk4MGqf+N9hfygy8Mho+4EUVsVCSokGeAQw=; b=X53gtvJLmWBUrskrgljJXYHsNsA8qA7LLIjZjGx/ddYmqslDXrqXaEZJCj2qZWkTb9 CpypERtzO85ih/v5b6/6ZC+0zhqOSCD3I9UNaFZiwwIdNffhPq1cAT7nPidTHZOMyHKT WM7vJFaWjdnwV/0PgMs89NSnqn/Jb5jiSe9inOaXf80SsfP/kDso2RyiF+HHEoCEm1k7 ywpPjIP4fMNCeiBWJ1u/C4foUCnOjKSO4XcU9u4WqY+Y2Pfc6N7BOI9koVnOVy6c0yEq wCrkeqOSVgWTtRJMziShLlsQbPuoqXSdmizzw/+wlhCC3V4VRNKB0QM1E4o9O/6tLw8K V5MQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DwffIuMpvk4MGqf+N9hfygy8Mho+4EUVsVCSokGeAQw=; b=J1c+lS29zfYhzruj2Uz4RGzWn6yd1Vr99ICcX2oO1ejDdEXbxLP8WydOu9/q6l9i3G ql//F36RE5lKolRnpCeuC9C5hHKcKfXlQrtx2xiCNWaZTw1OO8BF9VXSaHzkzv3pcnAs WJunLDvf8MPWUZtl5i3OIQs/c9M07PM+5VgWPZeaClpxrA+xTUTLHhGeA1WnaSjjFWoq uWjDp0pQE1SSZqHYm3Adxc+Sfbx56PVczx5IEzTO04yu7azu7uxCill15AXbWttRdzqT Dq655LM/tuEOXlXzpP8psZzrk0wbzFB8eNTglNVzOjqDmQ/DDVh90phuJQR5euSrSGnB qD0Q== X-Gm-Message-State: ANhLgQ2erx4ZEtYyTTxg//N5xPexQbkKTAYt9ZUOobmsSIsMLKnb7fqs 6jeaHHvkLpx+VIaxBBK5GD6xDQ== X-Google-Smtp-Source: ADFU+vu9i8jbX+n972WNpB0F25HnwNcSfJC5HNFNCANPQazM0JhMj0i565gk6eYk+vMAwS88xlSXpQ== X-Received: by 2002:a17:90a:1954:: with SMTP id 20mr2110292pjh.106.1584596445739; Wed, 18 Mar 2020 22:40:45 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id l125sm229126pgl.57.2020.03.18.22.40.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Mar 2020 22:40:44 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Rob Herring Cc: Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Clark Subject: [PATCH 3/4] arm64: dts: qcom: db820c: Add s2 regulator in pmi8994 Date: Wed, 18 Mar 2020 22:39:01 -0700 Message-Id: <20200319053902.3415984-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200319053902.3415984-1-bjorn.andersson@linaro.org> References: <20200319053902.3415984-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rajendra Nayak Add the SPMI regulator node in the PMI8994, use it to give us VDD_GX at a fixed max nominal voltage for the db820c and specify this as supply for the MMSS GPU_GX GDSC. With the introduction of CPR support the range for VDD_GX should be expanded. Signed-off-by: Rajendra Nayak [bjorn: Split between pmi8994 and db820c, changed voltage, rewrote commit message] Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/qcom/pmi8994.dtsi | 6 ++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi index 4692b7ad16b7..075cebaec3f3 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi @@ -251,6 +251,10 @@ &mdss { status = "okay"; }; +&mmcc { + vdd_gfx-supply = <&vdd_gfx>; +}; + &msmgpio { gpio-line-names = "[SPI0_DOUT]", /* GPIO_0, BLSP1_SPI_MOSI, LSEC pin 14 */ @@ -688,6 +692,16 @@ pinconf { }; }; + +&pmi8994_spmi_regulators { + vdd_gfx: s2@1700 { + reg = <0x1700 0x100>; + regulator-name = "VDD_GFX"; + regulator-min-microvolt = <980000>; + regulator-max-microvolt = <980000>; + }; +}; + &rpm_requests { pm8994-regulators { compatible = "qcom,rpm-pm8994-regulators"; diff --git a/arch/arm64/boot/dts/qcom/pmi8994.dtsi b/arch/arm64/boot/dts/qcom/pmi8994.dtsi index 21e05215abe4..e5ed28ab9b2d 100644 --- a/arch/arm64/boot/dts/qcom/pmi8994.dtsi +++ b/arch/arm64/boot/dts/qcom/pmi8994.dtsi @@ -26,5 +26,11 @@ pmic@3 { reg = <0x3 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + + pmi8994_spmi_regulators: regulators { + compatible = "qcom,pmi8994-regulators"; + #address-cells = <1>; + #size-cells = <1>; + }; }; }; From patchwork Thu Mar 19 05:39:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 11446503 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3C8741667 for ; Thu, 19 Mar 2020 05:41:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1BC1D20757 for ; Thu, 19 Mar 2020 05:41:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="GNA5dhAf" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727194AbgCSFk5 (ORCPT ); Thu, 19 Mar 2020 01:40:57 -0400 Received: from mail-pl1-f196.google.com ([209.85.214.196]:37927 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727136AbgCSFku (ORCPT ); Thu, 19 Mar 2020 01:40:50 -0400 Received: by mail-pl1-f196.google.com with SMTP id w3so570610plz.5 for ; Wed, 18 Mar 2020 22:40:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Z/69m7Zf+ruag16yCUxMLHHMI4Yg4kUCSYDk0zKgyCg=; b=GNA5dhAfvYYpetATfgKyqLZz5xlqU1swtnZ8dzTWy+4qldc1xRRbyXZak0HEBTVC9d Jrg18WL4KAFFq2QXJ3vjKAGQceRb/D6/f4UfoBnqwJuPD6vjnWCLEAEgSod9vHxQX+ej BDIFlrEBBqvgkoxy7lAdszwi6BFG3XySWcWss0gnwUUd/h/Qubwa+ORCnV0/Ib6kBol+ fT1t1to1sBkgDvDUMTaiZ6+nxhevdSVkkIy8YmE9K+gLRLnZMnWOW4g1B8kl2bfEGH7G m1mrtPFlotMHwVAHSswInC3EoDzYxrkyaHseIgZBkpXvDTfh5DzDlbFaQ9omhU8wXQTi 1hag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Z/69m7Zf+ruag16yCUxMLHHMI4Yg4kUCSYDk0zKgyCg=; b=eblh2dmgZzn2j/HHjHuBj4eUTjP0ltcr4OTKaU1PsCA6pFBN/qFuTRW7FOwaZ5o1ny gJheJPW7FxDjuiFcN12N2hw1YzSqACmtvyBSR16cIeYrw1e0PeznFRQo90kZ1A1KgODv 260BiBl9g5mLjB4ZUaxLNjppX9awyGcJIT7gTDrWfcrYHu+BXoyphst+zo/slI4BgxZc Ol4grPum3WBMqPocIgopvGyiNghVp4Ib5oUzuvNBMxPb+5c7hF3yIRO5CThZ+xSMWM7i ctfao8/1eOVqfTbEh0BS6nMJfCnFxaADhl8WdA7jqkaNOGD4uu//RJALPKFERMVtGnc5 AdPQ== X-Gm-Message-State: ANhLgQ1EsvtVHQu9HN1dt993LqeYg29XaZpM55OBBL3Tm9W5Ope389fM JI8lses1D2hzQPy2EUYdJ0QijA== X-Google-Smtp-Source: ADFU+vsRf2sDvae95TJ6VcZ7xmIYGkaloU4QXsDM6UWMf7v+/ukUDbAHYC3DGNVQzt1wESDRV1ejsA== X-Received: by 2002:a17:90a:e505:: with SMTP id t5mr1967909pjy.101.1584596448549; Wed, 18 Mar 2020 22:40:48 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id l125sm229126pgl.57.2020.03.18.22.40.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Mar 2020 22:40:47 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Rob Herring Cc: Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Clark Subject: [PATCH 4/4] arm64: dts: qcom: msm8996: Make GPU node control GPU_GX GDSC Date: Wed, 18 Mar 2020 22:39:02 -0700 Message-Id: <20200319053902.3415984-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200319053902.3415984-1-bjorn.andersson@linaro.org> References: <20200319053902.3415984-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Presumably the GPU node needs to control both the GPU and GPU GX power domains, but given that GPU GX now depends on the GPU GDSC both can effectively be controlled by controlling GPU GX. So use this instead. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 14827adebd94..f29f45e9737b 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -639,7 +639,7 @@ gpu@b00000 { "mem", "mem_iface"; - power-domains = <&mmcc GPU_GDSC>; + power-domains = <&mmcc GPU_GX_GDSC>; iommus = <&adreno_smmu 0>; nvmem-cells = <&gpu_speed_bin>;