From patchwork Wed Mar 25 06:34:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 11457035 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0723613A4 for ; Wed, 25 Mar 2020 06:35:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D612B20789 for ; Wed, 25 Mar 2020 06:35:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ti42rp27" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726139AbgCYGfH (ORCPT ); Wed, 25 Mar 2020 02:35:07 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:34173 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727174AbgCYGfG (ORCPT ); Wed, 25 Mar 2020 02:35:06 -0400 Received: by mail-pf1-f195.google.com with SMTP id 23so577746pfj.1 for ; Tue, 24 Mar 2020 23:35:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=siPGNDe+AxSm5pKa/Er1n8oaxWLKO8D7N1OvXW7uO3Y=; b=ti42rp27v40CkiayUlokdDmBdSqvmyT2qfiSyfhGv4MdnJXxjQuSV1o5bNlrjvbK5N YxAGlcWm2ZnCzGiVmLqBbM++fTanIs1+jQQQPD6p4EgVL/RocrWKeWqNyFI4TW7k8z8L dSJrJ3j25FPhQZtIU6+Zhf7l02SG0IHDE4B+oaamj1ZXveCxgrk9nKAnckGiWA5H3wms gjjGLtMztVC5W4HuxjYGegw00mREWMavEkOcDzdZwXd++1Pn+hJww3w0ffPYD3ABS+zL eEf7gld8nKhNlwH97u5IcTk9MxM6dR6wBvCFRFWlXReyzS8Qxot5WE5/7StUa8yDPwoi Rgyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=siPGNDe+AxSm5pKa/Er1n8oaxWLKO8D7N1OvXW7uO3Y=; b=lIealnhlsY8CGNS0LRkiq/Lk6ULeq0NODF9MZywVfe1QVaCOv7AJaMULCbJtyuVREP zXT44oqnTkaEUEcnXZqb9tyf0lQJQMt5bwU8b5nNheLvL5Gd4imQTRKoa9V76zVAlWrr NjIUc66yrtOzrjl8UoViZAuKTOdYvWQT2u6D1xhPoOQOqe2uSE04lQ/NVoKrC4neEE0v +gQ2LGb1tp7V5t7svwBSbcKkvbcw51Fdls986H76Y3C4pfgHsqr+I2UQdV8hVwbPHROr EJu2TtED/WnaPVGnBTJj9Kgp6oQCfzz4Y4v4NmR1KVDAhBqllOE/iToc9xNrTZHJxOF5 bOag== X-Gm-Message-State: ANhLgQ2tOpbj5KsTlWjPKjfMBwllBuNgqatr/hQ80UgoJxRcaqzbFMQo U7Uo4DMKwgNeO3K3NLjLWzR6xA== X-Google-Smtp-Source: ADFU+vuSlF1tCz/0gmNbN3lD4lor8uE7Ghbaw8r1wnCZY9m1lBu2LVeaoo33nM5iHrT/K9MmyeZGiA== X-Received: by 2002:a62:648f:: with SMTP id y137mr1832185pfb.199.1585118104267; Tue, 24 Mar 2020 23:35:04 -0700 (PDT) Received: from localhost ([103.195.202.71]) by smtp.gmail.com with ESMTPSA id 8sm17839049pfv.65.2020.03.24.23.35.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Mar 2020 23:35:03 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, swboyd@chromium.org, mka@chromium.org, daniel.lezcano@linaro.org, Amit Kucheria , Zhang Rui Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 1/3] dt-bindings: thermal: Add yaml bindings for thermal sensors Date: Wed, 25 Mar 2020 12:04:52 +0530 Message-Id: <93466e6c031c0084de09bd6b448556a6c5080880.1585117436.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org As part of moving the thermal bindings to YAML, split it up into 3 bindings: thermal sensors, cooling devices and thermal zones. The property #thermal-sensor-cells is required in each device that acts as a thermal sensor. It is used to uniquely identify the instance of the thermal sensor inside the system. Signed-off-by: Amit Kucheria Reviewed-by: Rob Herring --- .../bindings/thermal/thermal-sensor.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/thermal-sensor.yaml diff --git a/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml b/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml new file mode 100644 index 000000000000..920ee7667591 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0) +# Copyright 2020 Linaro Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/thermal-sensor.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Thermal sensor binding + +maintainers: + - Amit Kucheria + +description: | + Thermal management is achieved in devicetree by describing the sensor hardware + and the software abstraction of thermal zones required to take appropriate + action to mitigate thermal overloads. + + The following node types are used to completely describe a thermal management + system in devicetree: + - thermal-sensor: device that measures temperature, has SoC-specific bindings + - cooling-device: device used to dissipate heat either passively or artively + - thermal-zones: a container of the following node types used to describe all + thermal data for the platform + + This binding describes the thermal-sensor. + + Thermal sensor devices provide temperature sensing capabilities on thermal + zones. Typical devices are I2C ADC converters and bandgaps. Thermal sensor + devices may control one or more internal sensors. + +properties: + "#thermal-sensor-cells": + description: + Used to uniquely identify a thermal sensor instance within an IC. Will be + 0 on sensor nodes with only a single sensor and at least 1 on nodes + containing several internal sensors. + enum: [0, 1] + +examples: + - | + #include + + // Example 1: SDM845 TSENS + soc: soc@0 { + #address-cells = <2>; + #size-cells = <2>; + + /* ... */ + + tsens0: thermal-sensor@c263000 { + compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; + reg = <0 0x0c263000 0 0x1ff>, /* TM */ + <0 0x0c222000 0 0x1ff>; /* SROT */ + #qcom,sensors = <13>; + interrupts = , + ; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + + tsens1: thermal-sensor@c265000 { + compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; + reg = <0 0x0c265000 0 0x1ff>, /* TM */ + <0 0x0c223000 0 0x1ff>; /* SROT */ + #qcom,sensors = <8>; + interrupts = , + ; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + }; +... From patchwork Wed Mar 25 06:34:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 11457039 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6FE741392 for ; Wed, 25 Mar 2020 06:35:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4630020774 for ; Wed, 25 Mar 2020 06:35:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="XrvKWaKg" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727297AbgCYGfL (ORCPT ); Wed, 25 Mar 2020 02:35:11 -0400 Received: from mail-pj1-f45.google.com ([209.85.216.45]:34000 "EHLO mail-pj1-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727253AbgCYGfK (ORCPT ); Wed, 25 Mar 2020 02:35:10 -0400 Received: by mail-pj1-f45.google.com with SMTP id q16so2008419pje.1 for ; Tue, 24 Mar 2020 23:35:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cUTwMh8vYUOuCdm83Oh+4utbVCeDW5nkMaz7OgaXqiA=; b=XrvKWaKgVCjcVg5NxnjxhOOyGfckchfa6NdqKzjA2rQWga/RhL7RsqYLXjVCBK3dXz R3aHEFbgCCB5aZMJtL2ZjF2y/cbS/E3QZrYYS3IlkwHH88GwZwY6Dtx3nbZGHAMu3w1Y 2xzpbyFQawY5lWyXn5ifN6COr5on0z8xol5EULoxlKcYPRZIstapvHdcP4w/GBqOdgp4 20aam8ZYfZvdLtjRJ+tlWRglRNm8Db21+MVaL0hvS+CHLB9B00Z9SYuje2ltTwrE5fmm 0gIAbEIk+BPLY3AlQb8PKoQ9bpPo4/SZrVYWUpNmoNg3agpT149ugTSU3gl34O9ZzXba 0oZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cUTwMh8vYUOuCdm83Oh+4utbVCeDW5nkMaz7OgaXqiA=; b=JsXB3MTE7BIahJlkkx3MCydo07lBHjuW3TQMbUCVWXrxeNLJ9/YFymfqxJVzUgHYHk vpK0aboeKOkJd4ss31tBKj8NAwUa+AlQvHDBPrrmZGcF8juPEk8XRbmC6/YKjcuKWjMw bD55ySYsCp13oc595vLTT5YrSD74j7UbRACCS7Vkk8ae7QkO6Pxx4CfmINRIaTOuJUjj oU67R37dscE0NonEMMNBenS/LHoVoHUgVrDMyFm5V8sVmZoGVZkEgIy+NPE0POGUNWav JYrZTJoGecK0OqridnKpH3cpleXZFn9XccZTQrC4mlCMcpCiwsqEfgJ+1dyWW4pYAoef o8qQ== X-Gm-Message-State: ANhLgQ00zUBvylGGQfm9gHzf/P2NAxncmfjXKRL4zOR/684uIjSe7tFx y5oJV4PITdO2d6Q+XMLZmlGT2A== X-Google-Smtp-Source: ADFU+vtb+J/TrZsEUd5QefQwVFupYMYwifUcaKKcGzNOC7HnfUEWePW5ryi03PucfxeLC9xr0dR2Fw== X-Received: by 2002:a17:90a:da03:: with SMTP id e3mr1960501pjv.57.1585118108692; Tue, 24 Mar 2020 23:35:08 -0700 (PDT) Received: from localhost ([103.195.202.71]) by smtp.gmail.com with ESMTPSA id mn18sm3822619pjb.13.2020.03.24.23.35.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Mar 2020 23:35:07 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, swboyd@chromium.org, mka@chromium.org, daniel.lezcano@linaro.org, Amit Kucheria , Zhang Rui Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 2/3] dt-bindings: thermal: Add yaml bindings for thermal cooling-devices Date: Wed, 25 Mar 2020 12:04:53 +0530 Message-Id: <1ee4240e29edefc36b5d410d4792971c2bb4c5d5.1585117436.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org As part of moving the thermal bindings to YAML, split it up into 3 bindings: thermal sensors, cooling devices and thermal zones. The property #cooling-cells is required in each device that acts as a cooling device - whether active or passive. So any device that can throttle its performance to passively reduce heat dissipation (e.g. cpus, gpus) and any device that can actively dissipate heat at different levels (e.g. fans) will contain this property. Signed-off-by: Amit Kucheria Reviewed-by: Rob Herring --- .../thermal/thermal-cooling-devices.yaml | 116 ++++++++++++++++++ 1 file changed, 116 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml diff --git a/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml b/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml new file mode 100644 index 000000000000..b5599f7859f8 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: (GPL-2.0) +# Copyright 2020 Linaro Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/thermal-cooling-devices.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Thermal cooling device binding + +maintainers: + - Amit Kucheria + +description: | + Thermal management is achieved in devicetree by describing the sensor hardware + and the software abstraction of cooling devices and thermal zones required to + take appropriate action to mitigate thermal overload. + + The following node types are used to completely describe a thermal management + system in devicetree: + - thermal-sensor: device that measures temperature, has SoC-specific bindings + - cooling-device: device used to dissipate heat either passively or artively + - thermal-zones: a container of the following node types used to describe all + thermal data for the platform + + This binding describes the cooling devices. + + There are essentially two ways to provide control on power dissipation: + - Passive cooling: by means of regulating device performance. A typical + passive cooling mechanism is a CPU that has dynamic voltage and frequency + scaling (DVFS), and uses lower frequencies as cooling states. + - Active cooling: by means of activating devices in order to remove the + dissipated heat, e.g. regulating fan speeds. + + Any cooling device has a range of cooling states (i.e. different levels of + heat dissipation). They also have a way to determine the state of cooling in + which the device is. For example, a fan's cooling states correspond to the + different fan speeds possible. Cooling states are referred to by single + unsigned integers, where larger numbers mean greater heat dissipation. The + precise set of cooling states associated with a device should be defined in + a particular device's binding. + +select: true + +properties: + "#cooling-cells": + description: + Must be 2, in order to specify minimum and maximum cooling state used in + the cooling-maps reference. The first cell is the minimum cooling state + and the second cell is the maximum cooling state requested. + const: 2 + +examples: + - | + #include + #include + + // Example 1: Cpufreq cooling device on CPU0 + cpus { + #address-cells = <2>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "qcom,kryo385"; + reg = <0x0 0x0>; + enable-method = "psci"; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 + &LITTLE_CPU_SLEEP_1 + &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <607>; + dynamic-power-coefficient = <100>; + qcom,freq-domain = <&cpufreq_hw 0>; + #cooling-cells = <2>; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + compatible = "cache"; + next-level-cache = <&L3_0>; + L3_0: l3-cache { + compatible = "cache"; + }; + }; + }; + + /* ... */ + + }; + + /* ... */ + + thermal-zones { + cpu0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 1>; + + trips { + cpu0_alert0: trip-point0 { + temperature = <90000>; + hysteresis = <2000>; + type = "passive"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu0_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + /* ... */ + }; +... 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The thermal-zone binding is a software abstraction to capture the properties of each zone - how often they should be checked, the temperature thresholds (trips) at which mitigation actions need to be taken and the level of mitigation needed at those thresholds. Signed-off-by: Amit Kucheria Reviewed-by: Rob Herring --- Changes since v2: - Addressed review comment from Rob - Added required properties for thermal-zones node - Added select: true to thermal-cooling-devices.yaml - Fixed up example to pass dt_binding_check .../bindings/thermal/thermal-zones.yaml | 324 ++++++++++++++++++ 1 file changed, 324 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/thermal-zones.yaml diff --git a/Documentation/devicetree/bindings/thermal/thermal-zones.yaml b/Documentation/devicetree/bindings/thermal/thermal-zones.yaml new file mode 100644 index 000000000000..5632304dcf62 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/thermal-zones.yaml @@ -0,0 +1,324 @@ +# SPDX-License-Identifier: (GPL-2.0) +# Copyright 2020 Linaro Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/thermal-zones.yaml# +$schema: http://devicetree.org/meta-schemas/base.yaml# + +title: Thermal zone binding + +maintainers: + - Amit Kucheria + +description: | + Thermal management is achieved in devicetree by describing the sensor hardware + and the software abstraction of cooling devices and thermal zones required to + take appropriate action to mitigate thermal overloads. + + The following node types are used to completely describe a thermal management + system in devicetree: + - thermal-sensor: device that measures temperature, has SoC-specific bindings + - cooling-device: device used to dissipate heat either passively or actively + - thermal-zones: a container of the following node types used to describe all + thermal data for the platform + + This binding describes the thermal-zones. + + The polling-delay properties of a thermal-zone are bound to the maximum dT/dt + (temperature derivative over time) in two situations for a thermal zone: + 1. when passive cooling is activated (polling-delay-passive) + 2. when the zone just needs to be monitored (polling-delay) or when + active cooling is activated. + + The maximum dT/dt is highly bound to hardware power consumption and + dissipation capability. The delays should be chosen to account for said + max dT/dt, such that a device does not cross several trip boundaries + unexpectedly between polls. Choosing the right polling delays shall avoid + having the device in temperature ranges that may damage the silicon structures + and reduce silicon lifetime. + +properties: + $nodename: + const: thermal-zones + description: + A /thermal-zones node is required in order to use the thermal framework to + manage input from the various thermal zones in the system in order to + mitigate thermal overload conditions. It does not represent a real device + in the system, but acts as a container to link thermal sensor devices, + platform-data regarding temperature thresholds and the mitigation actions + to take when the temperature crosses those thresholds. + +patternProperties: + "^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$": + type: object + description: + Each thermal zone node contains information about how frequently it + must be checked, the sensor responsible for reporting temperature for + this zone, one sub-node containing the various trip points for this + zone and one sub-node containing all the zone cooling-maps. + + properties: + polling-delay: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The maximum number of milliseconds to wait between polls when + checking this thermal zone. Setting this to 0 disables the polling + timers setup by the thermal framework and assumes that the thermal + sensors in this zone support interrupts. + + polling-delay-passive: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The maximum number of milliseconds to wait between polls when + checking this thermal zone while doing passive cooling. Setting + this to 0 disables the polling timers setup by the thermal + framework and assumes that the thermal sensors in this zone + support interrupts. + + thermal-sensors: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A list of thermal sensor phandles and sensor specifiers used to + monitor this thermal zone. + + trips: + type: object + description: + This node describes a set of points in the temperature domain at + which the thermal framework needs to takes action. The actions to + be taken are defined in another node called cooling-maps. + + patternProperties: + "^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$": + type: object + + properties: + temperature: + $ref: /schemas/types.yaml#/definitions/int32 + minimum: -273000 + maximum: 200000 + description: + An integer expressing the trip temperature in millicelsius. + + hysteresis: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + An unsigned integer expressing the hysteresis delta with + respect to the trip temperature property above, also in + millicelsius. + + type: + $ref: /schemas/types.yaml#/definitions/string + enum: + - active # enable active cooling e.g. fans + - passive # enable passive cooling e.g. throttling cpu + - hot # send notification to driver + - critical # send notification to driver, trigger shutdown + description: | + There are four valid trip types: active, passive, hot, + critical. + + The critical trip type is used to set the maximum + temperature threshold above which the HW becomes + unstable and underlying firmware might even trigger a + reboot. Hitting the critical threshold triggers a system + shutdown. + + The hot trip type can be used to send a notification to + the thermal driver (if a .notify callback is registered). + The action to be taken is left to the driver. + + The passive trip type can be used to slow down HW e.g. run + the CPU, GPU, bus at a lower frequency. + + The active trip type can be used to control other HW to + help in cooling e.g. fans can be sped up or slowed down + + required: + - temperature + - hysteresis + - type + additionalProperties: false + + additionalProperties: false + + cooling-maps: + type: object + description: + This node describes the action to be taken when a thermal zone + crosses one of the temperature thresholds described in the trips + node. The action takes the form of a mapping relation between a + trip and the target cooling device state. + + patternProperties: + "^map[-a-zA-Z0-9]*$": + type: object + + properties: + trip: + $ref: /schemas/types.yaml#/definitions/phandle + description: + A phandle of a trip point node within this thermal zone. + + cooling-device: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A list of cooling device phandles along with the minimum + and maximum cooling state specifiers for each cooling + device. Using the THERMAL_NO_LIMIT (-1UL) constant in the + cooling-device phandle limit specifier lets the framework + use the minimum and maximum cooling state for that cooling + device automatically. + + contribution: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 100 + description: + The contribution of the cooling devices at the trip + temperature, both referenced in this map, to this thermal + zone as a percentage. + + required: + - trip + - cooling-device + additionalProperties: false + + required: + - polling-delay + - polling-delay-passive + - thermal-sensors + - trips + additionalProperties: false + +examples: + - | + #include + #include + + // Example 1: SDM845 TSENS + soc: soc@0 { + #address-cells = <2>; + #size-cells = <2>; + + /* ... */ + + tsens0: thermal-sensor@c263000 { + compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; + reg = <0 0x0c263000 0 0x1ff>, /* TM */ + <0 0x0c222000 0 0x1ff>; /* SROT */ + #qcom,sensors = <13>; + interrupts = , + ; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + + tsens1: thermal-sensor@c265000 { + compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; + reg = <0 0x0c265000 0 0x1ff>, /* TM */ + <0 0x0c223000 0 0x1ff>; /* SROT */ + #qcom,sensors = <8>; + interrupts = , + ; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + }; + + /* ... */ + + thermal-zones { + cpu0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 1>; + + trips { + cpu0_alert0: trip-point0 { + temperature = <90000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu0_alert1: trip-point1 { + temperature = <95000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu0_crit: cpu_crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu0_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&CPU1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&CPU2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&CPU3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + + map1 { + trip = <&cpu0_alert1>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&CPU1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&CPU2 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&CPU3 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + + /* ... */ + + cluster0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 5>; + + trips { + cluster0_alert0: trip-point0 { + temperature = <90000>; + hysteresis = <2000>; + type = "hot"; + }; + cluster0_crit: cluster0_crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + /* ... */ + + gpu-top-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 11>; + + trips { + gpu1_alert0: trip-point0 { + temperature = <90000>; + hysteresis = <2000>; + type = "hot"; + }; + }; + }; + }; +...