From patchwork Thu Mar 26 16:38:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 11460617 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 26EC781 for ; Thu, 26 Mar 2020 16:38:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 106C52078E for ; Thu, 26 Mar 2020 16:38:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728590AbgCZQiP (ORCPT ); Thu, 26 Mar 2020 12:38:15 -0400 Received: from michel.telenet-ops.be ([195.130.137.88]:37044 "EHLO michel.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728579AbgCZQiN (ORCPT ); Thu, 26 Mar 2020 12:38:13 -0400 Received: from ramsan ([84.195.182.253]) by michel.telenet-ops.be with bizsmtp id K4eA2200V5USYZQ064eAGv; Thu, 26 Mar 2020 17:38:11 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1jHVWE-0002rE-S2; Thu, 26 Mar 2020 17:38:10 +0100 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1jHVWE-00064k-QN; Thu, 26 Mar 2020 17:38:10 +0100 From: Geert Uytterhoeven To: Greg Kroah-Hartman , Rob Herring Cc: Yoshihiro Shimoda , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 1/2] dt-bindings: usb: generic-ehci: Document power-domains property Date: Thu, 26 Mar 2020 17:38:05 +0100 Message-Id: <20200326163807.23216-2-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200326163807.23216-1-geert+renesas@glider.be> References: <20200326163807.23216-1-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org It is quite common for a generic EHCI block to be embedded in an SoC in its own power domain. Hence allow the DTS writer to describe the controller's position in the power hierarchy, by documenting the optional presence of a "power-domains" property. This gets rid of "make dtbs_check" warnings like: arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dt.yaml: usb@ee080100: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/usb/generic-ehci.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml index 10edd05872ea2537..848eea59bc0030e7 100644 --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml @@ -36,6 +36,9 @@ properties: - if a USB DRD channel: first clock should be host and second one should be peripheral + power-domains: + maxItems: 1 + big-endian: $ref: /schemas/types.yaml#/definitions/flag description: From patchwork Thu Mar 26 16:38:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 11460619 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6F28E17D4 for ; Thu, 26 Mar 2020 16:38:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4FF0220B80 for ; Thu, 26 Mar 2020 16:38:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728571AbgCZQiP (ORCPT ); Thu, 26 Mar 2020 12:38:15 -0400 Received: from michel.telenet-ops.be ([195.130.137.88]:37036 "EHLO michel.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728601AbgCZQiN (ORCPT ); Thu, 26 Mar 2020 12:38:13 -0400 Received: from ramsan ([84.195.182.253]) by michel.telenet-ops.be with bizsmtp id K4eA2200W5USYZQ064eAGw; Thu, 26 Mar 2020 17:38:11 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1jHVWE-0002rH-TB; Thu, 26 Mar 2020 17:38:10 +0100 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1jHVWE-00064m-S1; Thu, 26 Mar 2020 17:38:10 +0100 From: Geert Uytterhoeven To: Greg Kroah-Hartman , Rob Herring Cc: Yoshihiro Shimoda , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 2/2] dt-bindings: usb: generic-ohci: Document power-domains property Date: Thu, 26 Mar 2020 17:38:06 +0100 Message-Id: <20200326163807.23216-3-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200326163807.23216-1-geert+renesas@glider.be> References: <20200326163807.23216-1-geert+renesas@glider.be> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org It is quite common for a generic OHCI block to be embedded in an SoC in its own power domain. Hence allow the DTS writer to describe the controller's position in the power hierarchy, by documenting the optional presence of a "power-domains" property. This gets rid of "make dtbs_check" warnings like: arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dt.yaml: usb@ee080000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/usb/generic-ohci.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml index bcffec1f1341e502..d7efddf27b22e264 100644 --- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml @@ -36,6 +36,9 @@ properties: - if a USB DRD channel: first clock should be host and second one should be peripheral + power-domains: + maxItems: 1 + big-endian: $ref: /schemas/types.yaml#/definitions/flag description: