From patchwork Fri Mar 27 05:23:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vipin Anand X-Patchwork-Id: 11461643 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 889BF6CA for ; Fri, 27 Mar 2020 05:25:31 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 717A520714 for ; Fri, 27 Mar 2020 05:25:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 717A520714 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 63ED16E979; Fri, 27 Mar 2020 05:25:29 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5A9E86E038 for ; Fri, 27 Mar 2020 05:25:21 +0000 (UTC) IronPort-SDR: p3FFC8NzQRFgoOmQUN4Lvp5IA2R/4leQcSC6//xZ4A5RnCEG+gbReAAMADB20OyX8NoEZjUkng ppPHsY1I+NJg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Mar 2020 22:25:21 -0700 IronPort-SDR: q3UJT2db9AsLuL8OgXW+OqHDcq9KhDaiTSm64dNkAngDsJ3UUCUqu3vkb/0OmHZdiBhf6hpT2p QrvEZ//HNkBw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,311,1580803200"; d="scan'208";a="394268138" Received: from vipinana-nuc7i7bnh.iind.intel.com ([10.66.179.10]) by orsmga004.jf.intel.com with ESMTP; 26 Mar 2020 22:25:20 -0700 From: Vipin Anand To: intel-gfx@lists.freedesktop.org Date: Fri, 27 Mar 2020 10:53:51 +0530 Message-Id: <20200327052357.22269-2-vipin.anand@intel.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200327052357.22269-1-vipin.anand@intel.com> References: <20200327052357.22269-1-vipin.anand@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/7] drm/i915/display: Add HDR Capability detection for LSPCON X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Uma Shankar LSPCON firmware exposes HDR capability through LPCON_CAPABILITIES DPCD register. LSPCON implementations capable of supporting HDR set HDR_CAPABILITY bit in LSPCON_CAPABILITIES to 1. This patch reads the same, detects the HDR capability and adds this to intel_lspcon struct. Signed-off-by: Uma Shankar --- .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_lspcon.c | 32 +++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 888ea8a170d1..2f281da6d253 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1333,6 +1333,7 @@ struct intel_lspcon { bool active; enum drm_lspcon_mode mode; enum lspcon_vendor vendor; + bool hdr_supported; }; struct intel_digital_port { diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c index d807c5648c87..2e41ae483a23 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.c +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c @@ -35,6 +35,8 @@ #define LSPCON_VENDOR_PARADE_OUI 0x001CF8 #define LSPCON_VENDOR_MCA_OUI 0x0060AD +#define DPCD_MCA_LSPCON_HDR_STATUS 0x70003 + /* AUX addresses to write MCA AVI IF */ #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0 #define LSPCON_MCA_AVI_IF_CTRL 0x5DF @@ -104,6 +106,31 @@ static bool lspcon_detect_vendor(struct intel_lspcon *lspcon) return true; } +static bool lspcon_detect_hdr_capability(struct intel_lspcon *lspcon) +{ + struct intel_dp *dp = lspcon_to_intel_dp(lspcon); + u8 hdr_caps; + int ret; + + /* Enable HDR for MCA based LSPCON devices */ + if (lspcon->vendor == LSPCON_VENDOR_MCA) + ret = drm_dp_dpcd_read(&dp->aux, DPCD_MCA_LSPCON_HDR_STATUS, + &hdr_caps, 1); + else + return false; + + if (ret < 0) { + DRM_DEBUG_KMS("hdr capability detection failed\n"); + lspcon->hdr_supported = false; + return false; + } else if (hdr_caps & 0x1) { + DRM_DEBUG_KMS("lspcon capable of HDR\n"); + lspcon->hdr_supported = true; + } + + return true; +} + static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon *lspcon) { enum drm_lspcon_mode current_mode; @@ -581,6 +608,11 @@ bool lspcon_init(struct intel_digital_port *intel_dig_port) return false; } + if (!lspcon_detect_hdr_capability(lspcon)) { + DRM_ERROR("LSPCON hdr detection failed\n"); + return false; + } + connector->ycbcr_420_allowed = true; lspcon->active = true; DRM_DEBUG_KMS("Success: LSPCON init\n"); From patchwork Fri Mar 27 05:23:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vipin Anand X-Patchwork-Id: 11461641 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 66BA314B4 for ; Fri, 27 Mar 2020 05:25:30 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4F5A020714 for ; Fri, 27 Mar 2020 05:25:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4F5A020714 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2CD216E978; Fri, 27 Mar 2020 05:25:29 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id E1A2C6E32D for ; Fri, 27 Mar 2020 05:25:22 +0000 (UTC) IronPort-SDR: bL1pvDd2T3XBTyQGzm+OadbL31QAGKQFOZb3pbsdV5BwVv5U4FcCx+8UNSNUYAL5Rt8LY0FrEp e4Yd4rxYHChg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Mar 2020 22:25:22 -0700 IronPort-SDR: MCVeQX1fTKpqlk2dihiY6ZrmW5W+iaSYJuUVIJPQXTCfSJuKPT8XSxM3FTT5yhStu7SBjCZ2k1 gpvFVVTXElrA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,311,1580803200"; d="scan'208";a="394268139" Received: from vipinana-nuc7i7bnh.iind.intel.com ([10.66.179.10]) by orsmga004.jf.intel.com with ESMTP; 26 Mar 2020 22:25:21 -0700 From: Vipin Anand To: intel-gfx@lists.freedesktop.org Date: Fri, 27 Mar 2020 10:53:52 +0530 Message-Id: <20200327052357.22269-3-vipin.anand@intel.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200327052357.22269-1-vipin.anand@intel.com> References: <20200327052357.22269-1-vipin.anand@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/7] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Uma Shankar Gen9 hardware supports HDMI2.0 through LSPCON chips. Extending HDR support for MCA LSPCON based GEN9 devices. SOC will drive LSPCON as DP and send HDR metadata as standard DP SDP packets. LSPCON will be set to operate in PCON mode, will receive the metadata and create Dynamic Range and Mastering Infoframe (DRM packets) and send it to HDR capable HDMI sink devices. v2: Re-used hsw infoframe write implementation for HDR metadata for LSPCON as per Ville's suggestion. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_hdmi.c | 10 ++++++ drivers/gpu/drm/i915/display/intel_lspcon.c | 35 +++++++++++++++------ drivers/gpu/drm/i915/display/intel_lspcon.h | 5 ++- 3 files changed, 39 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 93ac0f296852..9ae2f88cc925 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -577,6 +577,16 @@ static u32 hsw_infoframes_enabled(struct intel_encoder *encoder, return val & mask; } +void lspcon_drm_write_infoframe(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + unsigned int type, + const void *frame, ssize_t len) +{ + DRM_DEBUG_KMS("Update HDR metadata for lspcon\n"); + /* It uses the legacy hsw implementation for the same */ + hsw_write_infoframe(encoder, crtc_state, type, frame, len); +} + static const u8 infoframe_type_to_idx[] = { HDMI_PACKET_TYPE_GENERAL_CONTROL, HDMI_PACKET_TYPE_GAMUT_METADATA, diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c index 2e41ae483a23..c5ddabf903d6 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.c +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c @@ -460,27 +460,42 @@ void lspcon_write_infoframe(struct intel_encoder *encoder, unsigned int type, const void *frame, ssize_t len) { - bool ret; + bool ret = true; struct intel_dp *intel_dp = enc_to_intel_dp(encoder); struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder); /* LSPCON only needs AVI IF */ - if (type != HDMI_INFOFRAME_TYPE_AVI) + if (!(type == HDMI_INFOFRAME_TYPE_AVI || + type == HDMI_PACKET_TYPE_GAMUT_METADATA)) return; - if (lspcon->vendor == LSPCON_VENDOR_MCA) - ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux, - frame, len); - else - ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux, - frame, len); + /* + * Supporting HDR on MCA LSPCON + * Todo: Add support for Parade later + */ + if (type == HDMI_PACKET_TYPE_GAMUT_METADATA && + lspcon->vendor != LSPCON_VENDOR_MCA) + return; + + if (lspcon->vendor == LSPCON_VENDOR_MCA) { + if (type == HDMI_INFOFRAME_TYPE_AVI) + ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux, + frame, len); + else if (type == HDMI_PACKET_TYPE_GAMUT_METADATA) + lspcon_drm_write_infoframe(encoder, crtc_state, + HDMI_PACKET_TYPE_GAMUT_METADATA, + frame, VIDEO_DIP_DATA_SIZE); + } else { + ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux, frame, + len); + } if (!ret) { - DRM_ERROR("Failed to write AVI infoframes\n"); + DRM_ERROR("Failed to write infoframes\n"); return; } - DRM_DEBUG_DRIVER("AVI infoframes updated successfully\n"); + DRM_DEBUG_DRIVER("Infoframes updated successfully\n"); } void lspcon_read_infoframe(struct intel_encoder *encoder, diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h index 37cfddf8a9c5..b2051f236223 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.h +++ b/drivers/gpu/drm/i915/display/intel_lspcon.h @@ -34,5 +34,8 @@ u32 lspcon_infoframes_enabled(struct intel_encoder *encoder, const struct intel_crtc_state *pipe_config); void lspcon_ycbcr420_config(struct drm_connector *connector, struct intel_crtc_state *crtc_state); - +void lspcon_drm_write_infoframe(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + unsigned int type, + const void *frame, ssize_t len); #endif /* __INTEL_LSPCON_H__ */ From patchwork Fri Mar 27 05:23:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vipin Anand X-Patchwork-Id: 11461637 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1F34B6CA for ; Fri, 27 Mar 2020 05:25:27 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0839220714 for ; Fri, 27 Mar 2020 05:25:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0839220714 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7B5F36E32D; Fri, 27 Mar 2020 05:25:25 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8DFC36E32D for ; Fri, 27 Mar 2020 05:25:23 +0000 (UTC) IronPort-SDR: EfWGgM1hJF2O/xhQMXAxucInbePMecGQVJPRo3k3MJ9XPWkAf5t/LiOKT1aEefUO0WgzN7KdEE TX/flGEwPEaQ== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Mar 2020 22:25:23 -0700 IronPort-SDR: sg5qaRmZhBpFQ0wibGrAVOKLywRe0BDrojcnz87729T/VHjkZGw1wzqh9vdQOVVRp9X/n0zEBP 9tvSDafXV5yA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,311,1580803200"; d="scan'208";a="394268141" Received: from vipinana-nuc7i7bnh.iind.intel.com ([10.66.179.10]) by orsmga004.jf.intel.com with ESMTP; 26 Mar 2020 22:25:22 -0700 From: Vipin Anand To: intel-gfx@lists.freedesktop.org Date: Fri, 27 Mar 2020 10:53:53 +0530 Message-Id: <20200327052357.22269-4-vipin.anand@intel.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200327052357.22269-1-vipin.anand@intel.com> References: <20200327052357.22269-1-vipin.anand@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/7] drm/i915/display: Attach HDR property for capable Gen9 devices X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Uma Shankar Attach HDR property for Gen9 devices with MCA LSPCON chips. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_lspcon.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c index c5ddabf903d6..4d8027493f2c 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.c +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c @@ -628,6 +628,11 @@ bool lspcon_init(struct intel_digital_port *intel_dig_port) return false; } + if (lspcon->vendor == LSPCON_VENDOR_MCA && lspcon->hdr_supported) + drm_object_attach_property(&connector->base, + connector->dev->mode_config.hdr_output_metadata_property, + 0); + connector->ycbcr_420_allowed = true; lspcon->active = true; DRM_DEBUG_KMS("Success: LSPCON init\n"); From patchwork Fri Mar 27 05:23:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vipin Anand X-Patchwork-Id: 11461649 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E41986CA for ; Fri, 27 Mar 2020 05:25:39 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CCB4E20716 for ; Fri, 27 Mar 2020 05:25:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CCB4E20716 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 57A8D6E97C; Fri, 27 Mar 2020 05:25:39 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8D7BC6E32D for ; Fri, 27 Mar 2020 05:25:24 +0000 (UTC) IronPort-SDR: 2qKDdR8vs1/ciExbshi4Qu3NJtJfkTUKeyX2h8LbaL12zuMY67niiQN4p67c4pJfh357g843Sb 7cKQgXOq/1LQ== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Mar 2020 22:25:24 -0700 IronPort-SDR: RqwbBK+ev44BmrxywEFPQ8kNV9/JWcD+MJEVi5wGuqUgxK30eFW/dySgY3cPLKklM27MSUxa/J jsipyhlQ/vgQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,311,1580803200"; d="scan'208";a="394268155" Received: from vipinana-nuc7i7bnh.iind.intel.com ([10.66.179.10]) by orsmga004.jf.intel.com with ESMTP; 26 Mar 2020 22:25:23 -0700 From: Vipin Anand To: intel-gfx@lists.freedesktop.org Date: Fri, 27 Mar 2020 10:53:54 +0530 Message-Id: <20200327052357.22269-5-vipin.anand@intel.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200327052357.22269-1-vipin.anand@intel.com> References: <20200327052357.22269-1-vipin.anand@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 4/7] drm/i915/display: Set HDR Infoframe for HDR capable LSPCON devices X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Uma Shankar Send Dynamic Range and Mastering Infoframe (DRM for HDR metadata) as SDP packet to LSPCON following the DP spec. LSPCON receives the same and sends it to HDMI sink. v2: Suppressed some warnings. No functional change. Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic_state_helper.c | 1 + drivers/gpu/drm/drm_atomic_uapi.c | 1 + drivers/gpu/drm/i915/display/intel_lspcon.h | 1 + include/drm/drm_connector.h | 1 + 4 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c index 7cf3cf936547..7cf98c06f424 100644 --- a/drivers/gpu/drm/drm_atomic_state_helper.c +++ b/drivers/gpu/drm/drm_atomic_state_helper.c @@ -468,6 +468,7 @@ __drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector, if (state->hdr_output_metadata) drm_property_blob_get(state->hdr_output_metadata); + state->hdr_metadata_changed = false; /* Don't copy over a writeback job, they are used only once */ state->writeback_job = NULL; diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index a1e5e262bae2..4c520e0b9872 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -734,6 +734,7 @@ static int drm_atomic_connector_set_property(struct drm_connector *connector, val, sizeof(struct hdr_output_metadata), -1, &replaced); + state->hdr_metadata_changed |= replaced; return ret; } else if (property == config->aspect_ratio_property) { state->picture_aspect_ratio = val; diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h index b2051f236223..bc34124f532e 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.h +++ b/drivers/gpu/drm/i915/display/intel_lspcon.h @@ -38,4 +38,5 @@ void lspcon_drm_write_infoframe(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, unsigned int type, const void *frame, ssize_t len); + #endif /* __INTEL_LSPCON_H__ */ diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index 221910948b37..28df268aa1a7 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -661,6 +661,7 @@ struct drm_connector_state { * DRM blob property for HDR output metadata */ struct drm_property_blob *hdr_output_metadata; + u8 hdr_metadata_changed : 1; }; /** From patchwork Fri Mar 27 05:23:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vipin Anand X-Patchwork-Id: 11461645 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4E0F26CA for ; Fri, 27 Mar 2020 05:25:37 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 32E1820716 for ; Fri, 27 Mar 2020 05:25:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 32E1820716 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C71E96E97B; Fri, 27 Mar 2020 05:25:36 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 89D536E369 for ; Fri, 27 Mar 2020 05:25:25 +0000 (UTC) IronPort-SDR: gKtawoHY2XMqxdssf1rGz+BjDwefbYVq7vPWCGw2Ss6NdAvHgrxOVefmD97JeVmCMj4cj8Wbcp XQBVB6DRrwjg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Mar 2020 22:25:25 -0700 IronPort-SDR: En1RCCs4mD3MUgTEjMEV9ygg2kejm2HIVvVGS1c/5E0VBAHEUwzt5bBeQ8FTHmCC3q75vM/aPe a0P+5BKMz0Bg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,311,1580803200"; d="scan'208";a="394268157" Received: from vipinana-nuc7i7bnh.iind.intel.com ([10.66.179.10]) by orsmga004.jf.intel.com with ESMTP; 26 Mar 2020 22:25:24 -0700 From: Vipin Anand To: intel-gfx@lists.freedesktop.org Date: Fri, 27 Mar 2020 10:53:55 +0530 Message-Id: <20200327052357.22269-6-vipin.anand@intel.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200327052357.22269-1-vipin.anand@intel.com> References: <20200327052357.22269-1-vipin.anand@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 5/7] drm/i915/display: Enable BT2020 for HDR on LSPCON devices X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Uma Shankar Enable Colorspace as BT2020 if driving HDR content.Sending Colorimetry data for HDR using AVI infoframe. LSPCON firmware expects this and though SOC drives DP, for HDMI panel AVI infoframe is sent to the LSPCON device which transfers the same to HDMI sink. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_lspcon.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c index 4d8027493f2c..5cede4f07f22 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.c +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c @@ -506,6 +506,11 @@ void lspcon_read_infoframe(struct intel_encoder *encoder, /* FIXME implement this */ } +/* HDMI HDR Colorspace Spec Definitions */ +#define NORMAL_COLORIMETRY_MASK 0x3 +#define EXTENDED_COLORIMETRY_MASK 0x7 +#define HDMI_COLORIMETRY_BT2020_YCC ((3 << 0) | (6 << 2) | (0 << 5)) + void lspcon_set_infoframes(struct intel_encoder *encoder, bool enable, const struct intel_crtc_state *crtc_state, @@ -550,6 +555,19 @@ void lspcon_set_infoframes(struct intel_encoder *encoder, HDMI_QUANTIZATION_RANGE_LIMITED : HDMI_QUANTIZATION_RANGE_FULL); + /* + * Set BT2020 colorspace if driving HDR data + * ToDo: Make this generic and expose all colorspaces for lspcon + */ + if (lspcon->active && conn_state->hdr_metadata_changed) { + frame.avi.colorimetry = + HDMI_COLORIMETRY_BT2020_YCC & + NORMAL_COLORIMETRY_MASK; + frame.avi.extended_colorimetry = + (HDMI_COLORIMETRY_BT2020_YCC >> 2) & + EXTENDED_COLORIMETRY_MASK; + } + ret = hdmi_infoframe_pack(&frame, buf, sizeof(buf)); if (ret < 0) { DRM_ERROR("Failed to pack AVI IF\n"); From patchwork Fri Mar 27 05:23:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vipin Anand X-Patchwork-Id: 11461639 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EF8F714B4 for ; Fri, 27 Mar 2020 05:25:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D863D20714 for ; Fri, 27 Mar 2020 05:25:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D863D20714 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1E9B36E369; Fri, 27 Mar 2020 05:25:28 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 895F46E369 for ; Fri, 27 Mar 2020 05:25:26 +0000 (UTC) IronPort-SDR: 0sfCXlGFC7VoRdNqFv9rwAb8KRiihWLyraCj5K1xWrxjHL/9dTRDVgN48ZqyMULrIhKniYpe2M +s7dZj2cYuNQ== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Mar 2020 22:25:26 -0700 IronPort-SDR: 3EZU4iVb03TNJYy7BHvz0iAkeXjauujfChFEwWj76FuRT7uzn1koT/+4ANWJwnO8+TXHIWT92y lCE/xmOESJ9Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,311,1580803200"; d="scan'208";a="394268159" Received: from vipinana-nuc7i7bnh.iind.intel.com ([10.66.179.10]) by orsmga004.jf.intel.com with ESMTP; 26 Mar 2020 22:25:25 -0700 From: Vipin Anand To: intel-gfx@lists.freedesktop.org Date: Fri, 27 Mar 2020 10:53:56 +0530 Message-Id: <20200327052357.22269-7-vipin.anand@intel.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200327052357.22269-1-vipin.anand@intel.com> References: <20200327052357.22269-1-vipin.anand@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 6/7] drm/i915/display: Reduce blanking to support 4k60@10bpp for LSPCON X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Uma Shankar Blanking needs to be reduced to incorporate DP and HDMI timing/link bandwidth limitations for CEA modes (4k@60 at 10 bpp). DP can drive 17.28Gbs while 4k modes (VIC97 etc) at 10 bpp required 17.8 Gbps. This will cause mode to blank out. Reduced Htotal by shortening the back porch and front porch within permissible limits. v2: This is marked as Not for merge and the responsibilty to program these custom timings will be on userspace. This patch is just for reference purposes. This is based on Ville's recommendation. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_dp.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index c7424e2a04a3..3ab1fadb2ea3 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -616,9 +616,11 @@ intel_dp_mode_valid(struct drm_connector *connector, { struct intel_dp *intel_dp = intel_attached_dp(to_intel_connector(connector)); struct intel_connector *intel_connector = to_intel_connector(connector); + struct intel_encoder *intel_encoder = intel_attached_encoder(intel_connector); struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode; struct drm_i915_private *dev_priv = to_i915(connector->dev); int target_clock = mode->clock; + struct intel_lspcon *lspcon = enc_to_intel_lspcon(intel_encoder); int max_rate, mode_rate, max_lanes, max_link_clock; int max_dotclk; u16 dsc_max_output_bpp = 0; @@ -638,6 +640,20 @@ intel_dp_mode_valid(struct drm_connector *connector, target_clock = fixed_mode->clock; } + /* + * Reducing Blanking to incorporate DP and HDMI timing/link bandwidth + * limitations for CEA modes (4k@60 at 10 bpp). DP can drive 17.28Gbs + * while 4k modes (VIC97 etc) at 10 bpp required 17.8 Gbps. This will + * cause mode to blank out. Reduced Htotal by shortening the back porch + * and front porch within permissible limits. + */ + if (lspcon->active && lspcon->hdr_supported && + mode->clock > 570000) { + mode->clock = 570000; + mode->htotal -= 180; + mode->hsync_start -= 72; + mode->hsync_end -= 72; + } max_link_clock = intel_dp_max_link_rate(intel_dp); max_lanes = intel_dp_max_lane_count(intel_dp); From patchwork Fri Mar 27 05:23:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vipin Anand X-Patchwork-Id: 11461647 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EE95B17EA for ; Fri, 27 Mar 2020 05:25:37 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D717520716 for ; Fri, 27 Mar 2020 05:25:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D717520716 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 39A0C6E97D; Fri, 27 Mar 2020 05:25:37 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id B79056E369 for ; Fri, 27 Mar 2020 05:25:27 +0000 (UTC) IronPort-SDR: vyqtvZ68czdcmDrMxhc6cd0zPnN4IaDboWnpnoBL5CxXcRkWM1y2TBSXplsmvRc1a30ks7upQE En+A1hCmK8IA== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Mar 2020 22:25:27 -0700 IronPort-SDR: 1qiReknH6mH7HakrOXgpK7avbaJaTg7eNedyH1ve03DmUm5Yo+kDDuMC2R1yDMe3lHxwZyGyQf LTKpNYLMzqJA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,311,1580803200"; d="scan'208";a="394268161" Received: from vipinana-nuc7i7bnh.iind.intel.com ([10.66.179.10]) by orsmga004.jf.intel.com with ESMTP; 26 Mar 2020 22:25:26 -0700 From: Vipin Anand To: intel-gfx@lists.freedesktop.org Date: Fri, 27 Mar 2020 10:53:57 +0530 Message-Id: <20200327052357.22269-8-vipin.anand@intel.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200327052357.22269-1-vipin.anand@intel.com> References: <20200327052357.22269-1-vipin.anand@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 7/7] drm:i915:display: add checks for Gen9 devices with hdr capability X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" this patch adds hdr capabilities checks for Gen9 devices with lspcon support. Signed-off-by: Vipin Anand --- drivers/gpu/drm/i915/display/intel_hdmi.c | 17 +++++++++++++---- drivers/gpu/drm/i915/display/intel_lspcon.c | 9 +++++++-- 2 files changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 9ae2f88cc925..70d0d76ed606 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -833,9 +833,12 @@ intel_hdmi_compute_drm_infoframe(struct intel_encoder *encoder, { struct hdmi_drm_infoframe *frame = &crtc_state->infoframes.drm.drm; struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); int ret; - if (!(INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))) + if (!(INTEL_GEN(dev_priv) >= 10 || + (((INTEL_GEN(dev_priv) >= 9)) && + intel_dig_port->lspcon.active))) return true; if (!crtc_state->has_infoframe) @@ -2102,9 +2105,12 @@ static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder) struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); const struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[encoder->port]; + struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); int max_tmds_clock; - if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 10 || + (((INTEL_GEN(dev_priv) >= 9)) && + intel_dig_port->lspcon.active)) max_tmds_clock = 594000; else if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv)) max_tmds_clock = 300000; @@ -2423,6 +2429,7 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder, struct intel_digital_connector_state *intel_conn_state = to_intel_digital_connector_state(conn_state); bool force_dvi = intel_conn_state->force_audio == HDMI_AUDIO_OFF_DVI; + struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); int ret; if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) @@ -2469,7 +2476,8 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder, pipe_config->lane_count = 4; if (scdc->scrambling.supported && (INTEL_GEN(dev_priv) >= 10 || - IS_GEMINILAKE(dev_priv))) { + (((INTEL_GEN(dev_priv) >= 9)) && + intel_dig_port->lspcon.active))) { if (scdc->scrambling.low_rates) pipe_config->hdmi_scrambling = true; @@ -3171,7 +3179,8 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port, connector->doublescan_allowed = 0; connector->stereo_allowed = 1; - if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) + if (INTEL_GEN(dev_priv) >= 10 || + (((INTEL_GEN(dev_priv) >= 9)) && intel_dig_port->lspcon.active)) connector->ycbcr_420_allowed = true; intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port); diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c index 5cede4f07f22..be074acd74f3 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.c +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c @@ -116,6 +116,8 @@ static bool lspcon_detect_hdr_capability(struct intel_lspcon *lspcon) if (lspcon->vendor == LSPCON_VENDOR_MCA) ret = drm_dp_dpcd_read(&dp->aux, DPCD_MCA_LSPCON_HDR_STATUS, &hdr_caps, 1); + else if (lspcon->vendor == LSPCON_VENDOR_PARADE) + return true; else return false; @@ -474,7 +476,8 @@ void lspcon_write_infoframe(struct intel_encoder *encoder, * Todo: Add support for Parade later */ if (type == HDMI_PACKET_TYPE_GAMUT_METADATA && - lspcon->vendor != LSPCON_VENDOR_MCA) + (lspcon->vendor != LSPCON_VENDOR_MCA || + lspcon->vendor != LSPCON_VENDOR_PARADE)) return; if (lspcon->vendor == LSPCON_VENDOR_MCA) { @@ -646,7 +649,9 @@ bool lspcon_init(struct intel_digital_port *intel_dig_port) return false; } - if (lspcon->vendor == LSPCON_VENDOR_MCA && lspcon->hdr_supported) + if ((lspcon->vendor == LSPCON_VENDOR_MCA || + lspcon->vendor == LSPCON_VENDOR_PARADE) && + lspcon->hdr_supported) drm_object_attach_property(&connector->base, connector->dev->mode_config.hdr_output_metadata_property, 0);