From patchwork Fri Mar 27 11:01:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: afzal mohammed X-Patchwork-Id: 11462197 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9AC7F6CA for ; Fri, 27 Mar 2020 11:01:39 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 8B57F206F6; Fri, 27 Mar 2020 11:01:39 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pg1-f195.google.com (mail-pg1-f195.google.com [209.85.215.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5ADA0206F1 for ; Fri, 27 Mar 2020 11:01:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="sYy2gI8R" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5ADA0206F1 Authentication-Results: mail.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=afzal.mohd.ma@gmail.com Received: by mail-pg1-f195.google.com with SMTP id u12so4403550pgb.10 for ; Fri, 27 Mar 2020 04:01:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:subject:message-id:mime-version:content-disposition :user-agent; bh=AWVtoETgAVqrBwwemz3d1U+W/Ev8VGD4RmzGJfY3tjg=; b=sYy2gI8RF0mChWNZxuhQ8OAgvXw0lx75jAc/OWj3CAhRU2j8jWCKyVBzUBVswCdRaa rYVCD28Lr49S6GVcZVUYKW8Z1wnBL+I8DQUD4zFoNAApTG2N7YSsHkttboHYwY1JsXg0 k6bDoHeeMR2u8Sl+YElREI8xlikUiddKx2t2ymkGbu/vxI1ch+nlchyX9Hru3OcD0UyX o1KqAEl8MSQ0LkoA7zGKnafZOLo7A54E74dfDyNT0J7h7pDInxVj9KHr37qZLPPiZp7B PX/bs/ut07BuqahcD7L9QogHDKNvSTUvdPAvTV3g34KbMRGSJkHG8Dcj6bFlkGEeFAfm q3Nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:subject:message-id:mime-version :content-disposition:user-agent; bh=AWVtoETgAVqrBwwemz3d1U+W/Ev8VGD4RmzGJfY3tjg=; b=QZhwte+xzmVtOO7f+rsC3FKc4/cybxlIUtDEAWgOfNV5Mwd8ZNu3skshv/x+Lj4ZjQ Ap+NSYxjoSyWpv6VqDbrhgNKm3OkgkJNrux8lFIMBzNJGKGiC0ykJozREM+d9Im6DYR+ zI3X2q2D9D/qFMAkjYxJknODDrmPQpVRc8VVjKTlvD2SCvfsSVq5kIPeUyHSd0dPHXs/ IZXqk9cFJ3LzIx/uRhjyl7+NiY8iOU06J36lzFQpEgLtJfKa09C/k5O9kJaj+BEaXt7u GVPVZ9PW/fw85yHPlzEwTqD4GMRy030xCDzE9KtbaSXBKTda1m4P1DvPHvuVirC1Bpy6 JTsg== X-Gm-Message-State: ANhLgQ39cOz22rm4MB7BW3/UE7o8ZNP4VqDOEP/Pcx3Z4Yf/bklh0e63 mkFx0gjBUXIYi37MhtTdqwuAdFd7 X-Google-Smtp-Source: ADFU+vvgkGpqhlpv09A1k7mCZv+ULfJRjoTxjO+knlrGptqHzEro0WGt0RH61o3Cd4KGWTeGU3bldQ== X-Received: by 2002:a62:1e84:: with SMTP id e126mr13275565pfe.315.1585306897531; Fri, 27 Mar 2020 04:01:37 -0700 (PDT) Received: from localhost ([183.82.181.40]) by smtp.gmail.com with ESMTPSA id 8sm2936167pfy.130.2020.03.27.04.01.36 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Mar 2020 04:01:36 -0700 (PDT) Date: Fri, 27 Mar 2020 16:31:34 +0530 From: afzal mohammed List-Id: To: soc@kernel.org Subject: [afzal.mohd.ma@gmail.com: [PATCH v3] ARM: ep93xx: Replace setup_irq() by request_irq()] Message-ID: <20200327110134.GA8207@afzalpc> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.9.3 (2018-01-21) ----- Forwarded message from afzal mohammed ----- Date: Sun, 1 Mar 2020 17:51:12 +0530 From: afzal mohammed To: Viresh Kumar , Hartley Sweeten , Alexander Sverdlin , Russell King , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: afzal mohammed Subject: [PATCH v3] ARM: ep93xx: Replace setup_irq() by request_irq() X-Mailer: git-send-email 2.18.0 request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed --- Hi sub-arch maintainers, If the patch is okay, please take it thr' your tree. Regards afzal v3: * Split out from series, also create subarch level patch as Thomas suggested to take it thr' respective maintainers * Modify string displayed in case of error as suggested by Thomas * Re-arrange code as required to improve readability * Remove irrelevant parts from commit message & improve v2: * Replace pr_err("request_irq() on %s failed" by pr_err("%s: request_irq() failed" * Commit message massage arch/arm/mach-ep93xx/timer-ep93xx.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-ep93xx/timer-ep93xx.c b/arch/arm/mach-ep93xx/timer-ep93xx.c index de998830f534..dd4b164d1831 100644 --- a/arch/arm/mach-ep93xx/timer-ep93xx.c +++ b/arch/arm/mach-ep93xx/timer-ep93xx.c @@ -117,15 +117,11 @@ static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static struct irqaction ep93xx_timer_irq = { - .name = "ep93xx timer", - .flags = IRQF_TIMER | IRQF_IRQPOLL, - .handler = ep93xx_timer_interrupt, - .dev_id = &ep93xx_clockevent, -}; - void __init ep93xx_timer_init(void) { + int irq = IRQ_EP93XX_TIMER3; + unsigned long flags = IRQF_TIMER | IRQF_IRQPOLL; + /* Enable and register clocksource and sched_clock on timer 4 */ writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE, EP93XX_TIMER4_VALUE_HIGH); @@ -136,7 +132,9 @@ void __init ep93xx_timer_init(void) EP93XX_TIMER4_RATE); /* Set up clockevent on timer 3 */ - setup_irq(IRQ_EP93XX_TIMER3, &ep93xx_timer_irq); + if (request_irq(irq, ep93xx_timer_interrupt, flags, "ep93xx timer", + &ep93xx_clockevent)) + pr_err("Failed to request irq %d (ep93xx timer)\n", irq); clockevents_config_and_register(&ep93xx_clockevent, EP93XX_TIMER123_RATE, 1,