From patchwork Fri Mar 27 11:02:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: afzal mohammed X-Patchwork-Id: 11462205 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BE30692A for ; Fri, 27 Mar 2020 11:03:01 +0000 (UTC) Received: by mail.kernel.org (Postfix) id B8A9F206F6; Fri, 27 Mar 2020 11:03:01 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pf1-f194.google.com (mail-pf1-f194.google.com [209.85.210.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 97271206F1 for ; Fri, 27 Mar 2020 11:03:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="qStb6aAR" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 97271206F1 Authentication-Results: mail.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=afzal.mohd.ma@gmail.com Received: by mail-pf1-f194.google.com with SMTP id c21so3688293pfo.5 for ; Fri, 27 Mar 2020 04:03:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:subject:message-id:mime-version:content-disposition :user-agent; bh=zh59UWlQXopERczWbtZHmsqHKHrSMVlTPJcC4CjvVqM=; b=qStb6aAREni21+h6PGlZL4z0OPR/ydzjwjVzkBGeWGn3bVYb83724a3ngwhLPWCgIk dWofZK8nPkXPpsC4cTe84XIBu+uGlxorUCxRYHBkD22Hssdnw45JmBx53dqwnWNSSW3U RGpxSkN8BCp16QG3p6B4wzHNCE2OgiaJiXaK7zUi8KeOlGgW03qgP/HH+267yzsO1CjU 3dVerSmefEhXRQCeL8DgQgAUuode7ctxsQBM+ETlI3j4vShpLcoo94h1UsKvVg4teFDE qWw6QHbaG7fhsY1XLaJXAoLd1eIUCy0g5qBagOrH7OM+WGa35L54oLSA/sR/XqaZORm1 dBgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:subject:message-id:mime-version :content-disposition:user-agent; bh=zh59UWlQXopERczWbtZHmsqHKHrSMVlTPJcC4CjvVqM=; b=Aj6Iib4pGeg1yZYFjmBzMeLWz6UTIO6fVXlXr2u8+lbqlKfdjVqFePP59rDk5+lXNe 8j7PgZZFwT3J56UPf43/JUSy5z72BhzH3tkXpRM+eS3tgtLIxZyYvdp3fCF4ZGPhyWRn IcnWmTGtPxfEdp5IsTa+BuFWNx0rbV0QSgKGKbLCVtTfbbLmgDpbkASUeLcpJo+6POt0 ah+uZDDaf4T6yd4ASCK7YEuvTty8ELTIr02/OZdrVxmYWeSweWmUKiW7T93GBhemiZHu ezS3jGxrjN5H4V6wR05Nk2GZUU6gNBV06ZGovBWWz73wQSjqkzUJxS/7EN4b3kXGiNd/ Xu5Q== X-Gm-Message-State: ANhLgQ0gGPs6cWB49ukqgfLvqL+P6pgtj0VG9XLpVUxtekIzw57fvgrL Q4Co1B35Te71e8RnWVZyQdXhyZzs X-Google-Smtp-Source: ADFU+vud8fIoVdnqEPuCL0r5NnLahd0jAY+qdJ1XBRuFyGel38hkb9InUfhDpS4Tz5ZayyCKD7ICgg== X-Received: by 2002:aa7:81d6:: with SMTP id c22mr13907246pfn.147.1585306980833; Fri, 27 Mar 2020 04:03:00 -0700 (PDT) Received: from localhost ([183.82.181.40]) by smtp.gmail.com with ESMTPSA id w27sm3834792pfq.211.2020.03.27.04.03.00 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Mar 2020 04:03:00 -0700 (PDT) Date: Fri, 27 Mar 2020 16:32:58 +0530 From: afzal mohammed List-Id: To: soc@kernel.org Subject: [afzal.mohd.ma@gmail.com: [PATCH v3] ARM: iop32x: replace setup_irq() by request_irq()] Message-ID: <20200327110258.GE8207@afzalpc> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.9.3 (2018-01-21) ----- Forwarded message from afzal mohammed ----- Date: Sun, 1 Mar 2020 17:52:20 +0530 From: afzal mohammed To: Viresh Kumar , Russell King , Arnd Bergmann , Thomas Gleixner , Greg Kroah-Hartman , Allison Randal , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: afzal mohammed Subject: [PATCH v3] ARM: iop32x: replace setup_irq() by request_irq() X-Mailer: git-send-email 2.18.0 request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed --- Hi sub-arch maintainers, If the patch is okay, please take it thr' your tree. Regards afzal v3: * Split out from series, also split out from ARM patch to subarch level as Thomas suggested to take it thr' respective maintainers * Modify string displayed in case of error as suggested by Thomas * Re-arrange code as required to improve readability * Remove irrelevant parts from commit message & improve v2: * Replace pr_err("request_irq() on %s failed" by pr_err("%s: request_irq() failed" * Commit message massage arch/arm/mach-iop32x/time.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-iop32x/time.c b/arch/arm/mach-iop32x/time.c index 18a4df5c1baa..ae533b66fefd 100644 --- a/arch/arm/mach-iop32x/time.c +++ b/arch/arm/mach-iop32x/time.c @@ -137,13 +137,6 @@ iop_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static struct irqaction iop_timer_irq = { - .name = "IOP Timer Tick", - .handler = iop_timer_interrupt, - .flags = IRQF_TIMER | IRQF_IRQPOLL, - .dev_id = &iop_clockevent, -}; - static unsigned long iop_tick_rate; unsigned long get_iop_tick_rate(void) { @@ -154,6 +147,7 @@ EXPORT_SYMBOL(get_iop_tick_rate); void __init iop_init_time(unsigned long tick_rate) { u32 timer_ctl; + int irq = IRQ_IOP32X_TIMER0; sched_clock_register(iop_read_sched_clock, 32, tick_rate); @@ -168,7 +162,9 @@ void __init iop_init_time(unsigned long tick_rate) */ write_tmr0(timer_ctl & ~IOP_TMR_EN); write_tisr(1); - setup_irq(IRQ_IOP32X_TIMER0, &iop_timer_irq); + if (request_irq(irq, iop_timer_interrupt, IRQF_TIMER | IRQF_IRQPOLL, + "IOP Timer Tick", &iop_clockevent)) + pr_err("Failed to request irq() %d (IOP Timer Tick)\n", irq); iop_clockevent.cpumask = cpumask_of(0); clockevents_config_and_register(&iop_clockevent, tick_rate, 0xf, 0xfffffffe);