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Mon, 30 Mar 2020 22:44:12 -0700 (PDT) Received: from localhost ([45.127.44.10]) by smtp.gmail.com with ESMTPSA id w27sm11527583pfq.211.2020.03.30.22.44.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Mar 2020 22:44:11 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, sibis@codeaurora.org, swboyd@chromium.org, dianders@chromium.org, Rajendra Nayak , Taniya Das Cc: Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v2 1/2] dt-bindings: arm: cpus: Add kryo468 compatible Date: Tue, 31 Mar 2020 11:14:06 +0530 Message-Id: <18123f08bf1e60f6f7356c53f355884883b0897f.1585633235.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Kryo468 is found in sc7180, so add it to the list of cpu compatibles Fixes: 90db71e480708 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc") Signed-off-by: Amit Kucheria Reviewed-by: Stephen Boyd Reviewed-by: Rajendra Nayak Acked-by: Rob Herring --- Changes since v1: - Added fixes tag - Added acks Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 0d5b61056b106..4cece4c27b73a 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -156,6 +156,7 @@ properties: - qcom,krait - qcom,kryo - qcom,kryo385 + - qcom,kryo468 - qcom,kryo485 - qcom,scorpion From patchwork Tue Mar 31 05:44:07 2020 Content-Type: text/plain; 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Mon, 30 Mar 2020 22:44:17 -0700 (PDT) Received: from localhost ([45.127.44.10]) by smtp.gmail.com with ESMTPSA id z12sm12026239pfj.144.2020.03.30.22.44.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Mar 2020 22:44:16 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, sibis@codeaurora.org, swboyd@chromium.org, dianders@chromium.org, Rajendra Nayak , Taniya Das , Andy Gross Cc: devicetree@vger.kernel.org Subject: [PATCH v2 2/2] arm64: dts: qcom: sc7180: Fix cpu compatible Date: Tue, 31 Mar 2020 11:14:07 +0530 Message-Id: X-Mailer: git-send-email 2.20.1 In-Reply-To: <18123f08bf1e60f6f7356c53f355884883b0897f.1585633235.git.amit.kucheria@linaro.org> References: <18123f08bf1e60f6f7356c53f355884883b0897f.1585633235.git.amit.kucheria@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org "arm,armv8" compatible should only be used for software models. Replace it with the real cpu type. Fixes: 90db71e480708 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc") Signed-off-by: Amit Kucheria Reviewed-by: Stephen Boyd Reviewed-by: Rajendra Nayak --- Changes since v1: - Added fixes tag - Added acks arch/arm64/boot/dts/qcom/sc7180.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 8011c5fe2a31a..a01dfefd90bea 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -83,7 +83,7 @@ CPU0: cpu@0 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x0>; enable-method = "psci"; next-level-cache = <&L2_0>; @@ -100,7 +100,7 @@ CPU1: cpu@100 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x100>; enable-method = "psci"; next-level-cache = <&L2_100>; @@ -114,7 +114,7 @@ CPU2: cpu@200 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x200>; enable-method = "psci"; next-level-cache = <&L2_200>; @@ -128,7 +128,7 @@ CPU3: cpu@300 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x300>; enable-method = "psci"; next-level-cache = <&L2_300>; @@ -142,7 +142,7 @@ CPU4: cpu@400 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x400>; enable-method = "psci"; next-level-cache = <&L2_400>; @@ -156,7 +156,7 @@ CPU5: cpu@500 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x500>; enable-method = "psci"; next-level-cache = <&L2_500>; @@ -170,7 +170,7 @@ CPU6: cpu@600 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x600>; enable-method = "psci"; next-level-cache = <&L2_600>; @@ -184,7 +184,7 @@ CPU7: cpu@700 { device_type = "cpu"; - compatible = "arm,armv8"; + compatible = "qcom,kryo468"; reg = <0x0 0x700>; enable-method = "psci"; next-level-cache = <&L2_700>;