From patchwork Thu Apr 2 11:54:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= X-Patchwork-Id: 11470573 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1A84C14DD for ; Thu, 2 Apr 2020 11:55:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E008F20757 for ; Thu, 2 Apr 2020 11:55:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=rere.qmqm.pl header.i=@rere.qmqm.pl header.b="LkH/JJNw" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388164AbgDBLy7 (ORCPT ); Thu, 2 Apr 2020 07:54:59 -0400 Received: from rere.qmqm.pl ([91.227.64.183]:53370 "EHLO rere.qmqm.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388036AbgDBLy4 (ORCPT ); Thu, 2 Apr 2020 07:54:56 -0400 Received: from remote.user (localhost [127.0.0.1]) by rere.qmqm.pl (Postfix) with ESMTPSA id 48tM1q2kCPzHd; Thu, 2 Apr 2020 13:54:55 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=rere.qmqm.pl; s=1; t=1585828495; bh=1uCh1WDcEq7ykZh83IGYF9lRjbZGbC9UBX1/WwembVU=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=LkH/JJNwkiGvEKfhcKQ7pBaFC/o9ZRHOB3W8piHiJ89mdz60D3bMGYEd6gSV1s/2i Tzfuw2tG4HmgdWqKvl7goizWrQrLzrqfvpbV620+HGtJDFsshUabhsgziWlcXO2qEr vbFFy5IjUaVFV7OkXJmVPYVjuF69INx+Hg0PUxvA7HznNloxcjd9LJ5N7gfMFZhtkU iGb9ZbzA5OCYJsfgc7zoJjToofTs0gMrxdehjB5IzviherTlbz6HtPdNdk1lEvaRWc M3c55IoazFXZ2XVY1IKdYa0aKTMkXBhYkht1ZvY45mU502TSlWwxH07Wzzl5UbDyMZ qJL/YpwI5BPDA== X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.102.2 at mail Date: Thu, 02 Apr 2020 13:54:55 +0200 Message-Id: <23c3fe72b0ff0eabdbf3a45023a76da1b18a7e90.1585827904.git.mirq-linux@rere.qmqm.pl> In-Reply-To: References: From: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= Subject: [PATCH 1/7] mmc: sdhci: fix base clock usage in preset value MIME-Version: 1.0 To: Adrian Hunter , Ulf Hansson , Kevin Liu , Michal Simek , Suneel Garapati Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Fixed commit added an unnecessary read of CLOCK_CONTROL. The value read is overwritten for programmable clock preset, but is carried over for divided clock preset. This can confuse sdhci_enable_clk() if the register has enable bits set for some reason at time time of clock calculation. value to be ORed with enable flags. Remove the read. Fixes: 52983382c74f ("mmc: sdhci: enhance preset value function") Signed-off-by: Michał Mirosław Acked-by: Al Cooper On Thu, Apr 16, 2020 at 4:27 Acked-by: Al Cooper Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 3f716466fcfd..9aa3af5826df 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1765,7 +1765,6 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, if (host->preset_enabled) { u16 pre_val; - clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); pre_val = sdhci_get_preset_value(host); div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val); if (host->clk_mul && From patchwork Thu Apr 2 11:54:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= X-Patchwork-Id: 11470563 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AA05B159A for ; Thu, 2 Apr 2020 11:54:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 87DA02078B for ; Thu, 2 Apr 2020 11:54:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=rere.qmqm.pl header.i=@rere.qmqm.pl header.b="b8lt+tkv" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388156AbgDBLy6 (ORCPT ); Thu, 2 Apr 2020 07:54:58 -0400 Received: from rere.qmqm.pl ([91.227.64.183]:25271 "EHLO rere.qmqm.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387988AbgDBLy6 (ORCPT ); Thu, 2 Apr 2020 07:54:58 -0400 Received: from remote.user (localhost [127.0.0.1]) by rere.qmqm.pl (Postfix) with ESMTPSA id 48tM1q4wR6zpX; Thu, 2 Apr 2020 13:54:55 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=rere.qmqm.pl; s=1; t=1585828495; bh=8B8kq1VKlq4SBlVvHVGlJ4PmNNXHAOiZiONRej4jb3Q=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=b8lt+tkv83BaIkNxaetnNQ/mWk/8T1qO+TUUTGQ4cnIm4LiojnPSQHA3MgzCWutjG 8X0yB0A2q68LALhJk7w5VWP5QZAE7gVC3UGNmAW4+6iKoCsXBqZm1Yrqiu1Ls4C4rK NXTZhExHIWOE9jy6FBe7m+nPd8JxDX8GlhoEj43ioxAhxuaQ3qC62ZIeQoE3nXaCMa RFMUTmYmVmxkABz3xLbbupYzVu/oAZ1A3Vvomcio5YdCqHk2a6+7WtpKwsSZ/wUqRK QRydDwJJ0daSGRI0faDXj5tQaflQ2nKPPESe0bIVUSeI79jZJj4VXlxUYCJTVhyFwD oBBAy1kIEKaWA== X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.102.2 at mail Date: Thu, 02 Apr 2020 13:54:55 +0200 Message-Id: <0077b8bc2a4da024a3b985dd622674ebebe5b71b.1585827904.git.mirq-linux@rere.qmqm.pl> In-Reply-To: References: From: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= Subject: [PATCH 2/7] mmc: sdhci: fix programmable clock config from preset value MIME-Version: 1.0 To: Adrian Hunter , Kevin Liu , Michal Simek , Suneel Garapati , Ulf Hansson Cc: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org When host controller uses programmable clock presets but doesn't advertise programmable clock support, we can only guess what frequency it generates. Let's at least return correct SDHCI_PROG_CLOCK_MODE bit value in this case. Fixes: 52983382c74f ("mmc: sdhci: enhance preset value function") Signed-off-by: Michał Mirosław --- drivers/mmc/host/sdhci.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 9aa3af5826df..b2dc4f1cfa5c 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1767,11 +1767,10 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, pre_val = sdhci_get_preset_value(host); div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val); - if (host->clk_mul && - (pre_val & SDHCI_PRESET_CLKGEN_SEL)) { + if (pre_val & SDHCI_PRESET_CLKGEN_SEL) { clk = SDHCI_PROG_CLOCK_MODE; real_div = div + 1; - clk_mul = host->clk_mul; + clk_mul = host->clk_mul ?: 1; } else { real_div = max_t(int, 1, div << 1); } From patchwork Thu Apr 2 11:54:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= X-Patchwork-Id: 11470575 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F3A95159A for ; Thu, 2 Apr 2020 11:55:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C84D820757 for ; Thu, 2 Apr 2020 11:55:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=rere.qmqm.pl header.i=@rere.qmqm.pl header.b="oZTOjt/q" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388234AbgDBLzS (ORCPT ); Thu, 2 Apr 2020 07:55:18 -0400 Received: from rere.qmqm.pl ([91.227.64.183]:2730 "EHLO rere.qmqm.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387722AbgDBLy6 (ORCPT ); Thu, 2 Apr 2020 07:54:58 -0400 Received: from remote.user (localhost [127.0.0.1]) by rere.qmqm.pl (Postfix) with ESMTPSA id 48tM1r1CxvzqB; Thu, 2 Apr 2020 13:54:56 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=rere.qmqm.pl; s=1; t=1585828496; bh=+s4mWBHcT/yU7fnAxvETRm8Us7IU85To0TkAkXM8nKo=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=oZTOjt/qsWu+92DRj2VN61RxUCSurDrb27f7n19fTpulzeiwKEQQUZwANbvN8m0Hq WKZ3s2NpA6asVVTQT3uU61K/T5xZRrSCE0w3Q30O+1wDMTkFl9yHT/PLhYPeXuv25E mqcrITJ/EUOpMWwphdW0iJQlei8G/EpBH0+ZF/rh7pcRXI+STS+TZA+x7jTAIoU9Q/ q9CMu4bg+juzXqv6Ol0dR0PakA6Jyd3IRRlahx6saQfvVlMqduo2JtzY+UfezcuIbv Dij8fIa9BYAkroQkj3bkyoIcwYGn+8uLo40tAIjbU608NxsUftCP794mkwERgnLbIe fnFz5QXJu5f2Q== X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.102.2 at mail Date: Thu, 02 Apr 2020 13:54:55 +0200 Message-Id: In-Reply-To: References: From: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= Subject: [PATCH 3/7] mmc: sdhci: fix SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN MIME-Version: 1.0 To: Suneel Garapati , Adrian Hunter , Kevin Liu , Michal Simek , Ulf Hansson Cc: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Fix returned clock rate for SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN case. Signed-off-by: Michał Mirosław Cc: stable@kernel.vger.org Fixes: d1955c3a9a1d ("mmc: sdhci: add quirk SDHCI_QUIRK_CLOCK_DIV_ZERO_BROKEN") --- drivers/mmc/host/sdhci.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index b2dc4f1cfa5c..a043bf5e3565 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1807,9 +1807,12 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, if (!host->clk_mul || switch_base_clk) { /* Version 3.00 divisors must be a multiple of 2. */ - if (host->max_clk <= clock) + if (host->max_clk <= clock) { div = 1; - else { + if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN) + && host->max_clk <= 25000000) + div = 2; + } else { for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) { if ((host->max_clk / div) <= clock) @@ -1818,9 +1821,6 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, } real_div = div; div >>= 1; - if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN) - && !div && host->max_clk <= 25000000) - div = 1; } } else { /* Version 2.00 divisors must be a power of 2. */ From patchwork Thu Apr 2 11:54:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= X-Patchwork-Id: 11470571 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D7B52159A for ; Thu, 2 Apr 2020 11:55:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B691121707 for ; Thu, 2 Apr 2020 11:55:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=rere.qmqm.pl header.i=@rere.qmqm.pl header.b="PWyfGkYN" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388175AbgDBLy7 (ORCPT ); Thu, 2 Apr 2020 07:54:59 -0400 Received: from rere.qmqm.pl ([91.227.64.183]:59778 "EHLO rere.qmqm.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388154AbgDBLy7 (ORCPT ); Thu, 2 Apr 2020 07:54:59 -0400 Received: from remote.user (localhost [127.0.0.1]) by rere.qmqm.pl (Postfix) with ESMTPSA id 48tM1r4wP3zwy; Thu, 2 Apr 2020 13:54:56 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=rere.qmqm.pl; s=1; t=1585828496; bh=w9lqLlJJ6XJvsSd0hc1eF6HC5pdJ5YRJaBkIo26sigY=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=PWyfGkYNRr4N0Y5lOGgGjsFgSBRyoc+aLbRXWxRSwy0sPpZ8G9UoUnN3OqT5n3jNc 8txyg0ATQrXD3htPqOnwp1mdqFtu7prKp10nPdR+7D6GEq+GrLm4S6KAs2PoqPR9jp QQC51qH8vj0pg0Rf4eYiNjsR1xpf9d4BYFNsl4X7F1+9YutJWBKJ1zvcs+VWhpadfQ S/N4A38fzQHNZpcedANbD/FFr6Rk5kSVDUoadXOFCRSNBNkZ0GJ/OmGfvN0n5aQfOO 5Dq7wk7J7871Rktm1iFF9KTuNT7v6SzHhvHfGxRyWPGLI9+Od06zOTnhzy5y6EdVoJ HV+cajuQpA/0Q== X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.102.2 at mail Date: Thu, 02 Apr 2020 13:54:56 +0200 Message-Id: <637b9bea4c28a0eeacf754d2930596b8e6673808.1585827904.git.mirq-linux@rere.qmqm.pl> In-Reply-To: References: From: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= Subject: [PATCH 4/7] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit MIME-Version: 1.0 To: Michal Simek , Adrian Hunter , Kevin Liu , Suneel Garapati , Ulf Hansson Cc: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Move clock frequency limit for SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN where it belongs. Signed-off-by: Michał Mirosław --- drivers/mmc/host/sdhci-of-arasan.c | 7 ++++--- drivers/mmc/host/sdhci.c | 3 +-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index d4905c106c06..5e3b9131a631 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -339,7 +339,6 @@ static const struct sdhci_pltfm_data sdhci_arasan_pdata = { .ops = &sdhci_arasan_ops, .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN | SDHCI_QUIRK2_STOP_WITH_TC, }; @@ -410,8 +409,7 @@ static const struct sdhci_ops sdhci_arasan_cqe_ops = { static const struct sdhci_pltfm_data sdhci_arasan_cqe_pdata = { .ops = &sdhci_arasan_cqe_ops, .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, - .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN, + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, }; static struct sdhci_arasan_of_data sdhci_arasan_rk3399_data = { @@ -1155,6 +1153,9 @@ static int sdhci_arasan_add_host(struct sdhci_arasan_data *sdhci_arasan) bool dma64; int ret; + if (sdhci_pltfm_clk_get_max_clock(host) <= 25000000) + host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN; + if (!sdhci_arasan->has_cqe) return sdhci_add_host(host); diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index a043bf5e3565..ed88ac4e4cf3 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1809,8 +1809,7 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, /* Version 3.00 divisors must be a multiple of 2. */ if (host->max_clk <= clock) { div = 1; - if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN) - && host->max_clk <= 25000000) + if (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN) div = 2; } else { for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; From patchwork Thu Apr 2 11:54:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= X-Patchwork-Id: 11470565 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3AAE6159A for ; Thu, 2 Apr 2020 11:55:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1A4AB2078B for ; Thu, 2 Apr 2020 11:55:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=rere.qmqm.pl header.i=@rere.qmqm.pl header.b="aY/JFc37" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388185AbgDBLzA (ORCPT ); Thu, 2 Apr 2020 07:55:00 -0400 Received: from rere.qmqm.pl ([91.227.64.183]:58487 "EHLO rere.qmqm.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388155AbgDBLy7 (ORCPT ); Thu, 2 Apr 2020 07:54:59 -0400 Received: from remote.user (localhost [127.0.0.1]) by rere.qmqm.pl (Postfix) with ESMTPSA id 48tM1s43sBz1qr; Thu, 2 Apr 2020 13:54:57 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=rere.qmqm.pl; s=1; t=1585828497; bh=YCRJD8BehMcOPBVe27CPoZJLMWHOv11vvbz+rZe5/fM=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=aY/JFc37M16HcekIU0+WP8YP3yWfM6vPDyROsIM3QArVRkm2yl9Nc1erTvAxG2LZR BO7V1pjvglCQBBNpwWV9x56m/KTBbtsMd3uf4f8O9brOnYlw6LJg90lHuGNO2LdfFC 20QPtlKBVbF771UpvO511f3wYTYYvacNcVPg22Cj68hVOYuFkoTu7Y/bdP3yTqgStL vYv9D4rs4UmFjTeo2lS7enkt4nW2m7BeowUr5lZEGq7tajt2cN1IuwVKxVZdidAhez pi2G6h9PxsCj/E4dQt9321yo24BRaUiKq0b8mWgeErBR53QdarTUA8ScLd2GamsTFP IiRZGDpMlbjcg== X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.102.2 at mail Date: Thu, 02 Apr 2020 13:54:57 +0200 Message-Id: <1a7f7f0941314da66acda3c60f44b3d2417133e6.1585827904.git.mirq-linux@rere.qmqm.pl> In-Reply-To: References: From: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= Subject: [PATCH 5/7] mmc: sdhci: simplify clock frequency calculation MIME-Version: 1.0 To: Adrian Hunter , Kevin Liu , Michal Simek , Suneel Garapati , Ulf Hansson Cc: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Make clock frequency calculations simpler by replacing loops with divide-and-clamp. Signed-off-by: Michał Mirosław Reported-by: kbuild test robot --- drivers/mmc/host/sdhci.c | 56 +++++++++++++++++++--------------------- drivers/mmc/host/sdhci.h | 4 +-- 2 files changed, 29 insertions(+), 31 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index ed88ac4e4cf3..d750c0997c3f 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1756,10 +1756,13 @@ static u16 sdhci_get_preset_value(struct sdhci_host *host) u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, unsigned int *actual_clock) { - int div = 0; /* Initialized for compiler warning */ + unsigned int div = 0; /* Initialized for compiler warning */ int real_div = div, clk_mul = 1; u16 clk = 0; - bool switch_base_clk = false; + bool use_base_clk; + + if (clock == 0) + unreachable(); if (host->version >= SDHCI_SPEC_300) { if (host->preset_enabled) { @@ -1781,13 +1784,12 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, * Check if the Host Controller supports Programmable Clock * Mode. */ - if (host->clk_mul) { - for (div = 1; div <= 1024; div++) { - if ((host->max_clk * host->clk_mul / div) - <= clock) - break; - } - if ((host->max_clk * host->clk_mul / div) <= clock) { + use_base_clk = !host->clk_mul; + + if (!use_base_clk) { + div = DIV_ROUND_UP(host->max_clk * host->clk_mul, clock); + + if (div <= SDHCI_MAX_DIV_SPEC_300 / 2 + 1) { /* * Set Programmable Clock Mode in the Clock * Control register. @@ -1798,35 +1800,31 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, div--; } else { /* - * Divisor can be too small to reach clock - * speed requirement. Then use the base clock. + * Divisor is too big for requested clock rate. + * Use the base clock, then. */ - switch_base_clk = true; + use_base_clk = true; } } - if (!host->clk_mul || switch_base_clk) { - /* Version 3.00 divisors must be a multiple of 2. */ - if (host->max_clk <= clock) { - div = 1; - if (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN) - div = 2; - } else { - for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; - div += 2) { - if ((host->max_clk / div) <= clock) - break; - } + if (use_base_clk) { + /* Version 3.00 divisors must be 1 or a multiple of 2. */ + div = DIV_ROUND_UP(host->max_clk, clock); + if (div > 1) { + div = min(div, SDHCI_MAX_DIV_SPEC_300); + div = round_up(div, 2); } - real_div = div; div >>= 1; + if (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN) + div += !div; + + real_div = div * 2 + !div; } } else { /* Version 2.00 divisors must be a power of 2. */ - for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) { - if ((host->max_clk / div) <= clock) - break; - } + div = DIV_ROUND_UP(host->max_clk, clock); + div = min(div, SDHCI_MAX_DIV_SPEC_200); + div = roundup_pow_of_two(div); real_div = div; div >>= 1; } diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 79dffbb731d3..ea8aabb3bf16 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -290,8 +290,8 @@ * End of controller registers. */ -#define SDHCI_MAX_DIV_SPEC_200 256 -#define SDHCI_MAX_DIV_SPEC_300 2046 +#define SDHCI_MAX_DIV_SPEC_200 256u +#define SDHCI_MAX_DIV_SPEC_300 2046u /* * Host SDMA buffer boundary. Valid values from 4K to 512K in powers of 2. From patchwork Thu Apr 2 11:54:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= X-Patchwork-Id: 11470567 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7D54214DD for ; Thu, 2 Apr 2020 11:55:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5B95C20757 for ; Thu, 2 Apr 2020 11:55:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=rere.qmqm.pl header.i=@rere.qmqm.pl header.b="C+WkvBCK" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388036AbgDBLzB (ORCPT ); Thu, 2 Apr 2020 07:55:01 -0400 Received: from rere.qmqm.pl ([91.227.64.183]:48099 "EHLO rere.qmqm.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388165AbgDBLzA (ORCPT ); Thu, 2 Apr 2020 07:55:00 -0400 Received: from remote.user (localhost [127.0.0.1]) by rere.qmqm.pl (Postfix) with ESMTPSA id 48tM1t2z6bz1vW; Thu, 2 Apr 2020 13:54:58 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=rere.qmqm.pl; s=1; t=1585828498; bh=khf7zih+kXw+JC1hB17Cn0g0Tar7KZrUWoe09zQ0hQw=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=C+WkvBCKaqWfzIaomFriw/wvD9tPTswt4XO10Lg+uREhGNmhIGLRBoC2u10s8HNZx 7ZYE+NpVTsROje2/vjSuflaCd1HFnK2LBoBM+DSFYO+o5pYbGLRWIStxfxSBlTdufS PuFKnRTYkJB9md9+GIfHPALQHhf86WlNud0wrO9iGMIPWQ8ClYQvcS8AdOvB58kp+U qz2nJTCnkqySWQDJ1UjOnSuo6E03ukm5mLQtLvuUAK6wALSZGYKMPT0A2FTO5XiTfZ c8uw+TDenDm7P+NcnK/QsYjRLn9CzblXbfOjchxgrsXGagtK2Qeh/jB44SWLDLPZXs MAer15BmyFWPw== X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.102.2 at mail Date: Thu, 02 Apr 2020 13:54:57 +0200 Message-Id: In-Reply-To: References: From: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= Subject: [PATCH 6/7] mmc: sdhci: squash v2/v3+ clock calculation differences MIME-Version: 1.0 To: Adrian Hunter , Kevin Liu , Michal Simek , Suneel Garapati , Ulf Hansson Cc: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org SDHCI V2 differs from base-clock-V3+ only in allowed divisor values. Remove the duplicate version of code. We can see now, that 'real_div' can't be zero. Signed-off-by: Michał Mirosław --- drivers/mmc/host/sdhci.c | 106 ++++++++++++++++++--------------------- 1 file changed, 49 insertions(+), 57 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index d750c0997c3f..01fd897f8f3c 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1756,82 +1756,74 @@ static u16 sdhci_get_preset_value(struct sdhci_host *host) u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, unsigned int *actual_clock) { - unsigned int div = 0; /* Initialized for compiler warning */ - int real_div = div, clk_mul = 1; + unsigned int div, real_div, clk_mul = 1; u16 clk = 0; - bool use_base_clk; if (clock == 0) unreachable(); - if (host->version >= SDHCI_SPEC_300) { - if (host->preset_enabled) { - u16 pre_val; - - pre_val = sdhci_get_preset_value(host); - div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val); - if (pre_val & SDHCI_PRESET_CLKGEN_SEL) { - clk = SDHCI_PROG_CLOCK_MODE; - real_div = div + 1; - clk_mul = host->clk_mul ?: 1; - } else { - real_div = max_t(int, 1, div << 1); - } + if (host->preset_enabled) { + /* Only version 3.00+ can have preset_enabled */ + u16 pre_val; + + pre_val = sdhci_get_preset_value(host); + div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val); + if (pre_val & SDHCI_PRESET_CLKGEN_SEL) { + clk = SDHCI_PROG_CLOCK_MODE; + real_div = div + 1; + clk_mul = host->clk_mul ?: 1; + } else { + real_div = max_t(int, 1, div << 1); + } + + goto clock_set; + } + + /* + * Check if the Host Controller supports Programmable Clock + * Mode. + */ + if (host->version >= SDHCI_SPEC_300 && host->clk_mul) { + div = DIV_ROUND_UP(host->max_clk * host->clk_mul, clock); + + if (div <= SDHCI_MAX_DIV_SPEC_300 / 2 + 1) { + /* + * Set Programmable Clock Mode in the Clock + * Control register. + */ + clk = SDHCI_PROG_CLOCK_MODE; + real_div = div; + clk_mul = host->clk_mul; + div--; + goto clock_set; } /* - * Check if the Host Controller supports Programmable Clock - * Mode. + * Divisor is too big for requested clock rate. + * Fall back to the base clock, then. */ - use_base_clk = !host->clk_mul; + } - if (!use_base_clk) { - div = DIV_ROUND_UP(host->max_clk * host->clk_mul, clock); + div = DIV_ROUND_UP(host->max_clk, clock); - if (div <= SDHCI_MAX_DIV_SPEC_300 / 2 + 1) { - /* - * Set Programmable Clock Mode in the Clock - * Control register. - */ - clk = SDHCI_PROG_CLOCK_MODE; - real_div = div; - clk_mul = host->clk_mul; - div--; - } else { - /* - * Divisor is too big for requested clock rate. - * Use the base clock, then. - */ - use_base_clk = true; - } - } + if (div == 1 && (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)) + div = 2; - if (use_base_clk) { - /* Version 3.00 divisors must be 1 or a multiple of 2. */ - div = DIV_ROUND_UP(host->max_clk, clock); - if (div > 1) { - div = min(div, SDHCI_MAX_DIV_SPEC_300); - div = round_up(div, 2); - } - div >>= 1; - if (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN) - div += !div; - - real_div = div * 2 + !div; - } + if (host->version >= SDHCI_SPEC_300) { + /* Version 3.00 divisors must be a multiple of 2. */ + div = min(div, SDHCI_MAX_DIV_SPEC_300); + div = DIV_ROUND_UP(div, 2); } else { /* Version 2.00 divisors must be a power of 2. */ - div = DIV_ROUND_UP(host->max_clk, clock); div = min(div, SDHCI_MAX_DIV_SPEC_200); - div = roundup_pow_of_two(div); - real_div = div; - div >>= 1; + div = roundup_pow_of_two(div) / 2; } + real_div = div * 2 + !div; + clock_set: - if (real_div) - *actual_clock = (host->max_clk * clk_mul) / real_div; + *actual_clock = (host->max_clk * clk_mul) / real_div; clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) << SDHCI_DIVIDER_HI_SHIFT; From patchwork Thu Apr 2 11:54:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= X-Patchwork-Id: 11470569 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A9776159A for ; Thu, 2 Apr 2020 11:55:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 86A6D20757 for ; Thu, 2 Apr 2020 11:55:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=rere.qmqm.pl header.i=@rere.qmqm.pl header.b="aVyemHYt" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388222AbgDBLzK (ORCPT ); Thu, 2 Apr 2020 07:55:10 -0400 Received: from rere.qmqm.pl ([91.227.64.183]:23679 "EHLO rere.qmqm.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387988AbgDBLzB (ORCPT ); Thu, 2 Apr 2020 07:55:01 -0400 Received: from remote.user (localhost [127.0.0.1]) by rere.qmqm.pl (Postfix) with ESMTPSA id 48tM1t51G6z1vh; Thu, 2 Apr 2020 13:54:58 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=rere.qmqm.pl; s=1; t=1585828498; bh=MhmlsMfvkZ/jxtgV76LjVAGMwapDNRZk0vRzuKiw1Lc=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=aVyemHYt6ay7agExHU3z9CkG0HakP+LveeeQ+IG1ZvMTlyzZqkIhv7c721tw57yao C79ZYKUO9tWADfUSB/PdMFT5W1Cke1hdD2R/4gKWnFXWzmmi5s60mYPHC8Cdf4Bnn2 YztGPrmF6kJxEc2/8ZANqeINlERfScGMa0CUenLO1v/xeNT1ThZfEGsZHn+EZTummg F1lr7SnqP9hvhmRO1zBZ9ui3MrlkKYqTLG3lmwtG+n7jc5f1sOR3uZyUv1e4r+4k96 cuR+Mc3kRBFq3NllsQyLk/fE2WeJ3gEKAytF5mECqiHk0WNr+0xApblKxQbO9z47jG 3+81UyfnQrOPg== X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.102.2 at mail Date: Thu, 02 Apr 2020 13:54:58 +0200 Message-Id: <84482c3f74fae701f8366bea681fc799918b1ab8.1585827904.git.mirq-linux@rere.qmqm.pl> In-Reply-To: References: From: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= Subject: [PATCH 7/7] mmc: sdhci: respect non-zero div quirk in programmable clock mode MIME-Version: 1.0 To: Adrian Hunter , Kevin Liu , Michal Simek , Suneel Garapati , Ulf Hansson Cc: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Make SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN respected also in programmable clock mode. Signed-off-by: Michał Mirosław Reported-by: kbuild test robot --- drivers/mmc/host/sdhci.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 01fd897f8f3c..df80f39c570b 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1807,9 +1807,6 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, div = DIV_ROUND_UP(host->max_clk, clock); - if (div == 1 && (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)) - div = 2; - if (host->version >= SDHCI_SPEC_300) { /* Version 3.00 divisors must be a multiple of 2. */ div = min(div, SDHCI_MAX_DIV_SPEC_300); @@ -1823,6 +1820,12 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, real_div = div * 2 + !div; clock_set: + if (!div && (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)) { + /* for div == 1, clock rate is divided by 2 in both modes */ + div = 1; + real_div = 2; + } + *actual_clock = (host->max_clk * clk_mul) / real_div; clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)