From patchwork Fri Apr 3 13:27:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lars-Peter Clausen X-Patchwork-Id: 11472673 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ABDEE1874 for ; Fri, 3 Apr 2020 13:27:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7FAD52082F for ; Fri, 3 Apr 2020 13:27:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=metafoo.de header.i=@metafoo.de header.b="FHY4MvB6" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390573AbgDCN1Y (ORCPT ); Fri, 3 Apr 2020 09:27:24 -0400 Received: from www381.your-server.de ([78.46.137.84]:34596 "EHLO www381.your-server.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726087AbgDCN1Y (ORCPT ); Fri, 3 Apr 2020 09:27:24 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=metafoo.de; s=default2002; h=Content-Transfer-Encoding:MIME-Version:Message-Id:Date: Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=mKLtDFlWzGTg0/5VkHR2G7E5TZJyHDnYIgUzIEAvaIY=; b=FHY4MvB6vAfvskY7KhCSWF4sf2 Ygm5ir+iCki35fy/UjRlTFnILMIlLJHtpIYd6lDy8XoX0Sq0d3YEhFmXcP5icyEC3+bt5d288W8wM KJ/0gCrRaxemSjJh7AlFnsV+dLYZaPLPlS7ViXE1+QdCoR0WvTGYQDjx7vJkYBwC1uKI2KrgTlv49 iwxOQl5xNkfi1dTqD0s4bU9nnVZ2VRmgNlpw7F4foBjpMlt3Y2O9y9999DSpT1zmZLe/hH+7dG7s1 t46eM7yOzysOgGifYIz5Z9GuFc4o481X+VH27CPsxIonvr/9l/T9ACwLlmGO2Vi0heVMX1WfGrYHo SQSr9j4w==; Received: from sslproxy02.your-server.de ([78.47.166.47]) by www381.your-server.de with esmtpsa (TLSv1.2:DHE-RSA-AES256-GCM-SHA384:256) (Exim 4.89_1) (envelope-from ) id 1jKMLx-0004Em-NG; Fri, 03 Apr 2020 15:27:22 +0200 Received: from [82.135.69.229] (helo=lars-desktop.fritz.box) by sslproxy02.your-server.de with esmtpsa (TLSv1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1jKMLx-000CaC-Ek; Fri, 03 Apr 2020 15:27:21 +0200 From: Lars-Peter Clausen To: Jonathan Cameron Cc: Hartmut Knaack , Peter Meerwald-Stadler , linux-iio@vger.kernel.org, Lars-Peter Clausen Subject: [PATCH 1/5] iio: xilinx-xadc: Fix ADC-B powerdown Date: Fri, 3 Apr 2020 15:27:13 +0200 Message-Id: <20200403132717.24682-1-lars@metafoo.de> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-Authenticated-Sender: lars@metafoo.de X-Virus-Scanned: Clear (ClamAV 0.102.2/25770/Thu Apr 2 14:58:54 2020) Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The check for shutting down the second ADC is inverted. This causes it to be powered down when it should be enabled. As a result channels that are supposed to be handled by the second ADC return invalid conversion results. Signed-off-by: Lars-Peter Clausen --- drivers/iio/adc/xilinx-xadc-core.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c index 2d6505a66511..4fcf1729341f 100644 --- a/drivers/iio/adc/xilinx-xadc-core.c +++ b/drivers/iio/adc/xilinx-xadc-core.c @@ -722,13 +722,14 @@ static int xadc_power_adc_b(struct xadc *xadc, unsigned int seq_mode) { uint16_t val; + /* Powerdown the ADC-B when it is not needed. */ switch (seq_mode) { case XADC_CONF1_SEQ_SIMULTANEOUS: case XADC_CONF1_SEQ_INDEPENDENT: - val = XADC_CONF2_PD_ADC_B; + val = 0; break; default: - val = 0; + val = XADC_CONF2_PD_ADC_B; break; } From patchwork Fri Apr 3 13:27:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lars-Peter Clausen X-Patchwork-Id: 11472669 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4B27A15AB for ; Fri, 3 Apr 2020 13:27:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 292832078C for ; Fri, 3 Apr 2020 13:27:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=metafoo.de header.i=@metafoo.de header.b="XWRHd4eF" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728069AbgDCN1X (ORCPT ); Fri, 3 Apr 2020 09:27:23 -0400 Received: from www381.your-server.de ([78.46.137.84]:34592 "EHLO www381.your-server.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727927AbgDCN1X (ORCPT ); Fri, 3 Apr 2020 09:27:23 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=metafoo.de; s=default2002; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=1IrQdbu7tyYdSKK050q5g4YMCe3FnKIuycTwbg8brX0=; b=XWRHd4eFei1Aak4xapT1DpFhDf SGOY4M8H23myvNEfuUGMCPa3AB6x2UL6M475ouMCeZDyMRe58EhYW0eUpszmRRUdTGcWNAKFsPxX4 4ptSRSU96NflOadmRFX6afVhiun73UKYP8sYGFb92xUExla6V4CPTwLIBNtjh3xIj8BQ89xKzf02y nV6lWgMgGJQCRnrRjZ53QLJH8pBCXBYju/1UYZx3ClcdiFdZAKFM3SmE2O9KGxIte8PhvgdIu6aQy ATX/es1aypKjqSmUX+h4N9L8QnmQA2aoqJT8IMnoNjtNpzeSgbYbZXfUbo0WuyoWK71TNQVBfKfUK Gx4lGPCg==; Received: from sslproxy02.your-server.de ([78.47.166.47]) by www381.your-server.de with esmtpsa (TLSv1.2:DHE-RSA-AES256-GCM-SHA384:256) (Exim 4.89_1) (envelope-from ) id 1jKMLy-0004En-7a; Fri, 03 Apr 2020 15:27:22 +0200 Received: from [82.135.69.229] (helo=lars-desktop.fritz.box) by sslproxy02.your-server.de with esmtpsa (TLSv1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1jKMLx-000CaC-UX; Fri, 03 Apr 2020 15:27:22 +0200 From: Lars-Peter Clausen To: Jonathan Cameron Cc: Hartmut Knaack , Peter Meerwald-Stadler , linux-iio@vger.kernel.org, Lars-Peter Clausen Subject: [PATCH 2/5] iio: xilinx-xadc: Fix clearing interrupt when enabling trigger Date: Fri, 3 Apr 2020 15:27:14 +0200 Message-Id: <20200403132717.24682-2-lars@metafoo.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200403132717.24682-1-lars@metafoo.de> References: <20200403132717.24682-1-lars@metafoo.de> MIME-Version: 1.0 X-Authenticated-Sender: lars@metafoo.de X-Virus-Scanned: Clear (ClamAV 0.102.2/25770/Thu Apr 2 14:58:54 2020) Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org When enabling the trigger and unmasking the end-of-sequence (EOS) interrupt the EOS interrupt should be cleared from the status register. Otherwise it is possible that it was still set from a previous capture. If that is the case the interrupt would fire immediately even though no conversion has been done yet and stale data is being read from the device. The old code only clears the interrupt if the interrupt was previously unmasked. Which does not make much sense since the interrupt is always masked at this point and in addition masking the interrupt does not clear the interrupt from the status register. So the clearing needs to be done unconditionally. Signed-off-by: Lars-Peter Clausen --- drivers/iio/adc/xilinx-xadc-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c index 4fcf1729341f..04a2a609ced4 100644 --- a/drivers/iio/adc/xilinx-xadc-core.c +++ b/drivers/iio/adc/xilinx-xadc-core.c @@ -674,7 +674,7 @@ static int xadc_trigger_set_state(struct iio_trigger *trigger, bool state) spin_lock_irqsave(&xadc->lock, flags); xadc_read_reg(xadc, XADC_AXI_REG_IPIER, &val); - xadc_write_reg(xadc, XADC_AXI_REG_IPISR, val & XADC_AXI_INT_EOS); + xadc_write_reg(xadc, XADC_AXI_REG_IPISR, XADC_AXI_INT_EOS); if (state) val |= XADC_AXI_INT_EOS; else From patchwork Fri Apr 3 13:27:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lars-Peter Clausen X-Patchwork-Id: 11472671 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 75FA51805 for ; Fri, 3 Apr 2020 13:27:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 543992078C for ; Fri, 3 Apr 2020 13:27:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=metafoo.de header.i=@metafoo.de header.b="lPWdrJdB" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728173AbgDCN1X (ORCPT ); Fri, 3 Apr 2020 09:27:23 -0400 Received: from www381.your-server.de ([78.46.137.84]:34604 "EHLO www381.your-server.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727989AbgDCN1X (ORCPT ); Fri, 3 Apr 2020 09:27:23 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=metafoo.de; s=default2002; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=5LIMNj7aL7Luva0dPbsX5fUhHcBa+AmvTONQjXkj9uI=; b=lPWdrJdBr2t87+TDH9Fi7uXDtF AKm5k2DDVSKZeNhaYuiDl4+2KeX/42TqsHfHlBvJWImr+orFHPuCzWbuSNkUJT6fxiI3toUFmtic0 FUJiDpYK67DZzl+DlAHmiX5xaSllVSRA5QWrBYFn/Y6gTkww+zUbVLdMg2GaxUomHV8m5/MVYzTSq D9mM9cx2fvUINmm8faUn1fcJbbKECKUvbFWBHBLpQcpJqsU9FPqVYJXAJ1a29KEC05bBhJ8AiudnT 4G4NQmlgp8P7WD/w40JDSGFnFAwDk5ywo0u8wE7jDX2O94TQm0ggpzb3SDKH1W++F+FNPhngcI4Cp /+I/cQsQ==; Received: from sslproxy02.your-server.de ([78.47.166.47]) by www381.your-server.de with esmtpsa (TLSv1.2:DHE-RSA-AES256-GCM-SHA384:256) (Exim 4.89_1) (envelope-from ) id 1jKMLy-0004F6-Md; Fri, 03 Apr 2020 15:27:22 +0200 Received: from [82.135.69.229] (helo=lars-desktop.fritz.box) by sslproxy02.your-server.de with esmtpsa (TLSv1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1jKMLy-000CaC-Ds; Fri, 03 Apr 2020 15:27:22 +0200 From: Lars-Peter Clausen To: Jonathan Cameron Cc: Hartmut Knaack , Peter Meerwald-Stadler , linux-iio@vger.kernel.org, Lars-Peter Clausen Subject: [PATCH 3/5] iio: xilinx-xadc: Fix sequencer configuration for aux channels in simultaneous mode Date: Fri, 3 Apr 2020 15:27:15 +0200 Message-Id: <20200403132717.24682-3-lars@metafoo.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200403132717.24682-1-lars@metafoo.de> References: <20200403132717.24682-1-lars@metafoo.de> MIME-Version: 1.0 X-Authenticated-Sender: lars@metafoo.de X-Virus-Scanned: Clear (ClamAV 0.102.2/25770/Thu Apr 2 14:58:54 2020) Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The XADC has two internal ADCs. Depending on the mode it is operating in either one or both of them are used. The device manual calls this continuous (one ADC) and simultaneous (both ADCs) mode. The meaning of the sequencing register for the aux channels changes depending on the mode. In continuous mode each bit corresponds to one of the 16 aux channels. And the single ADC will convert them one by one in order. In simultaneous mode the aux channels are split into two groups the first 8 channels are assigned to the first ADC and the other 8 channels to the second ADC. The upper 8 bits of the sequencing register are unused and the lower 8 bits control both ADCs. This means a bit needs to be set if either the corresponding channel from the first group or the second group (or both) are set. Currently the driver does not have the special handling required for simultaneous mode. Add it. Signed-off-by: Lars-Peter Clausen --- drivers/iio/adc/xilinx-xadc-core.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c index 04a2a609ced4..4acababda4d5 100644 --- a/drivers/iio/adc/xilinx-xadc-core.c +++ b/drivers/iio/adc/xilinx-xadc-core.c @@ -798,6 +798,16 @@ static int xadc_preenable(struct iio_dev *indio_dev) if (ret) goto err; + /* + * In simultaneous mode the upper and lower aux channels are samples at + * the same time. In this mode the upper 8 bits in the sequencer + * register are don't care and the lower 8 bits control two channels + * each. As such we must set the bit if either the channel in the lower + * group or the upper group is enabled. + */ + if (seq_mode == XADC_CONF1_SEQ_SIMULTANEOUS) + scan_mask = ((scan_mask >> 8) | scan_mask) & 0xff0000; + ret = xadc_write_adc_reg(xadc, XADC_REG_SEQ(1), scan_mask >> 16); if (ret) goto err; From patchwork Fri Apr 3 13:27:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lars-Peter Clausen X-Patchwork-Id: 11472677 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 254E419A1 for ; Fri, 3 Apr 2020 13:27:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0385520857 for ; Fri, 3 Apr 2020 13:27:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=metafoo.de header.i=@metafoo.de header.b="L0cZ1VU0" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727989AbgDCN1Z (ORCPT ); Fri, 3 Apr 2020 09:27:25 -0400 Received: from www381.your-server.de ([78.46.137.84]:34636 "EHLO www381.your-server.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727927AbgDCN1Z (ORCPT ); Fri, 3 Apr 2020 09:27:25 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=metafoo.de; s=default2002; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=YGLAT1V3R5awmVZU2D7CZNoyaL0BdkYe3NWzEAyoBjA=; b=L0cZ1VU079bXNKjCmvKyWz8CJ7 h4Ph9Px09ZXoPca26i2E5gd1ch7/fClSFbB7i25L7/TMSBcJ/pHmWyIJUeyGLZav+LEesflnB5rOx krra2rPtragIKYbwJqQR6aM0eIuRS1rQhHhAz66JXZYZ5CCCthg5rhRmnZeHBqhb1/yOntYJNr9Vc WiDbxnBuieujxdGyq81a0YXfYbbYkXA1fq3biwMi3g6MvlJiaU0OKgKn8j/vCXzmLGN8CFjwdQCDf sUYbLFtx0vH9QPjc5ceJu3ToA7PsJ94tYAs1HX0XC+SLO+NI4Qm4Vd3+fiVz0OAhgWsoIjCwe+BiU h7oIkeeQ==; Received: from sslproxy02.your-server.de ([78.47.166.47]) by www381.your-server.de with esmtpsa (TLSv1.2:DHE-RSA-AES256-GCM-SHA384:256) (Exim 4.89_1) (envelope-from ) id 1jKMLz-0004FN-5I; Fri, 03 Apr 2020 15:27:23 +0200 Received: from [82.135.69.229] (helo=lars-desktop.fritz.box) by sslproxy02.your-server.de with esmtpsa (TLSv1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1jKMLy-000CaC-RV; Fri, 03 Apr 2020 15:27:22 +0200 From: Lars-Peter Clausen To: Jonathan Cameron Cc: Hartmut Knaack , Peter Meerwald-Stadler , linux-iio@vger.kernel.org, Lars-Peter Clausen Subject: [PATCH 4/5] iio: xilinx-xadc: Make sure not exceed maximum samplerate Date: Fri, 3 Apr 2020 15:27:16 +0200 Message-Id: <20200403132717.24682-4-lars@metafoo.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200403132717.24682-1-lars@metafoo.de> References: <20200403132717.24682-1-lars@metafoo.de> MIME-Version: 1.0 X-Authenticated-Sender: lars@metafoo.de X-Virus-Scanned: Clear (ClamAV 0.102.2/25770/Thu Apr 2 14:58:54 2020) Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The XADC supports a samplerate of up to 1MSPS. Unfortunately the hardware does not have a FIFO, which means it generates an interrupt for each conversion sequence. At one 1MSPS this creates an interrupt storm that causes the system to soft-lock. For this reason the driver limits the maximum samplerate to 150kSPS. Currently this check is only done when setting a new samplerate. But it is also possible that the initial samplerate configured in the FPGA bitstream exceeds the limit. In this case when starting to capture data without first changing the samplerate the system can overload. To prevent this check the currently configured samplerate in the probe function and reduce it to the maximum if necessary. Signed-off-by: Lars-Peter Clausen --- drivers/iio/adc/xilinx-xadc-core.c | 78 +++++++++++++++++++++++------- 1 file changed, 60 insertions(+), 18 deletions(-) diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c index 4acababda4d5..c724b8788007 100644 --- a/drivers/iio/adc/xilinx-xadc-core.c +++ b/drivers/iio/adc/xilinx-xadc-core.c @@ -102,6 +102,16 @@ static const unsigned int XADC_ZYNQ_UNMASK_TIMEOUT = 500; #define XADC_FLAGS_BUFFERED BIT(0) +/* + * The XADC hardware supports a samplerate of up to 1MSPS. Unfortunately it does + * not have a hardware FIFO. Which means an interrupt is generated for each + * conversion sequence. At 1MSPS sample rate the CPU in ZYNQ7000 is completely + * overloaded by the interrupts that it soft-lockups. For this reason the driver + * limits the maximum samplerate 150kSPS. At this rate the CPU is fairly busy, + * but still responsive. + */ +#define XADC_MAX_SAMPLERATE 150000 + static void xadc_write_reg(struct xadc *xadc, unsigned int reg, uint32_t val) { @@ -834,11 +844,27 @@ static const struct iio_buffer_setup_ops xadc_buffer_ops = { .postdisable = &xadc_postdisable, }; +static int xadc_read_samplerate(struct xadc *xadc) +{ + unsigned int div; + uint16_t val16; + int ret; + + ret = xadc_read_adc_reg(xadc, XADC_REG_CONF2, &val16); + if (ret) + return ret; + + div = (val16 & XADC_CONF2_DIV_MASK) >> XADC_CONF2_DIV_OFFSET; + if (div < 2) + div = 2; + + return xadc_get_dclk_rate(xadc) / div / 26; +} + static int xadc_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long info) { struct xadc *xadc = iio_priv(indio_dev); - unsigned int div; uint16_t val16; int ret; @@ -891,41 +917,31 @@ static int xadc_read_raw(struct iio_dev *indio_dev, *val = -((273150 << 12) / 503975); return IIO_VAL_INT; case IIO_CHAN_INFO_SAMP_FREQ: - ret = xadc_read_adc_reg(xadc, XADC_REG_CONF2, &val16); - if (ret) + ret = xadc_read_samplerate(xadc); + if (ret < 0) return ret; - div = (val16 & XADC_CONF2_DIV_MASK) >> XADC_CONF2_DIV_OFFSET; - if (div < 2) - div = 2; - - *val = xadc_get_dclk_rate(xadc) / div / 26; - + *val = ret; return IIO_VAL_INT; default: return -EINVAL; } } -static int xadc_write_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, int val, int val2, long info) +static int xadc_write_samplerate(struct xadc *xadc, int val) { - struct xadc *xadc = iio_priv(indio_dev); unsigned long clk_rate = xadc_get_dclk_rate(xadc); unsigned int div; if (!clk_rate) return -EINVAL; - if (info != IIO_CHAN_INFO_SAMP_FREQ) - return -EINVAL; - if (val <= 0) return -EINVAL; /* Max. 150 kSPS */ - if (val > 150000) - val = 150000; + if (val > XADC_MAX_SAMPLERATE) + val = XADC_MAX_SAMPLERATE; val *= 26; @@ -938,7 +954,7 @@ static int xadc_write_raw(struct iio_dev *indio_dev, * limit. */ div = clk_rate / val; - if (clk_rate / div / 26 > 150000) + if (clk_rate / div / 26 > XADC_MAX_SAMPLERATE) div++; if (div < 2) div = 2; @@ -949,6 +965,17 @@ static int xadc_write_raw(struct iio_dev *indio_dev, div << XADC_CONF2_DIV_OFFSET); } +static int xadc_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int val, int val2, long info) +{ + struct xadc *xadc = iio_priv(indio_dev); + + if (info != IIO_CHAN_INFO_SAMP_FREQ) + return -EINVAL; + + return xadc_write_samplerate(xadc, val); +} + static const struct iio_event_spec xadc_temp_events[] = { { .type = IIO_EV_TYPE_THRESH, @@ -1234,6 +1261,21 @@ static int xadc_probe(struct platform_device *pdev) if (ret) goto err_free_samplerate_trigger; + /* + * Make sure not to exceed the maximum samplerate since otherwise the + * resulting interrupt storm will soft-lock the system. + */ + if (xadc->ops->flags & XADC_FLAGS_BUFFERED) { + ret = xadc_read_samplerate(xadc); + if (ret < 0) + goto err_free_samplerate_trigger; + if (ret > XADC_MAX_SAMPLERATE) { + ret = xadc_write_samplerate(xadc, XADC_MAX_SAMPLERATE); + if (ret < 0) + goto err_free_samplerate_trigger; + } + } + ret = request_irq(xadc->irq, xadc->ops->interrupt_handler, 0, dev_name(&pdev->dev), indio_dev); if (ret) From patchwork Fri Apr 3 13:27:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lars-Peter Clausen X-Patchwork-Id: 11472675 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E104617EA for ; Fri, 3 Apr 2020 13:27:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B51932078C for ; Fri, 3 Apr 2020 13:27:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=metafoo.de header.i=@metafoo.de header.b="AAGNkgaV" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726087AbgDCN1Y (ORCPT ); Fri, 3 Apr 2020 09:27:24 -0400 Received: from www381.your-server.de ([78.46.137.84]:34650 "EHLO www381.your-server.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727989AbgDCN1Y (ORCPT ); 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Fri, 03 Apr 2020 15:27:23 +0200 Received: from [82.135.69.229] (helo=lars-desktop.fritz.box) by sslproxy02.your-server.de with esmtpsa (TLSv1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1jKMLz-000CaC-9X; Fri, 03 Apr 2020 15:27:23 +0200 From: Lars-Peter Clausen To: Jonathan Cameron Cc: Hartmut Knaack , Peter Meerwald-Stadler , linux-iio@vger.kernel.org, Lars-Peter Clausen Subject: [PATCH 5/5] iio: xilinx-xadc: Fix typo Date: Fri, 3 Apr 2020 15:27:17 +0200 Message-Id: <20200403132717.24682-5-lars@metafoo.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200403132717.24682-1-lars@metafoo.de> References: <20200403132717.24682-1-lars@metafoo.de> MIME-Version: 1.0 X-Authenticated-Sender: lars@metafoo.de X-Virus-Scanned: Clear (ClamAV 0.102.2/25770/Thu Apr 2 14:58:54 2020) Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Fix a typo. 'at the a time' -> 'at a time'. Signed-off-by: Lars-Peter Clausen --- drivers/iio/adc/xilinx-xadc-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c index c724b8788007..d7fecab9252e 100644 --- a/drivers/iio/adc/xilinx-xadc-core.c +++ b/drivers/iio/adc/xilinx-xadc-core.c @@ -663,7 +663,7 @@ static int xadc_trigger_set_state(struct iio_trigger *trigger, bool state) mutex_lock(&xadc->mutex); if (state) { - /* Only one of the two triggers can be active at the a time. */ + /* Only one of the two triggers can be active at a time. */ if (xadc->trigger != NULL) { ret = -EBUSY; goto err_out;