From patchwork Fri Oct 5 15:02:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Morse X-Patchwork-Id: 10628279 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1DEBA112B for ; Fri, 5 Oct 2018 15:06:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0A451294EE for ; Fri, 5 Oct 2018 15:06:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F1B3929560; Fri, 5 Oct 2018 15:05:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7AF412955D for ; Fri, 5 Oct 2018 15:05:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tmZU8h60kRi3PlqcPX+7Kt+Pymi/sc35vMI38kkme08=; b=MaWzkoW76CbEzQ QFj+PeBv6i3LkAJ37nhqgsou3pDZPMXLsmvo1Z4KtHS9oPu0X0SCkB7DwXJ/fTWJQTbK6lziXYc7z j6tUo6pHdATaQvcAUu9ACSCl1OP0EyCpyJ3/kCufUEOiX1y4MhbHpoiMQ3dpc3YilEp1YFdK5cKfO Z68o/njDAVkCmsduNxb8cpVU1dzdqpQ1YZMbfgDwvIbFRNMT58JvhGZxDAIBGS9qiSyncwuD4v05s NLlFOMQsxlvEKrAWXwo3MvdojAXknfR6nIbzp0YJ6BL3CTeG5vBM3znc5bCPzlie7U+r4O8bb5eIj r6sKmPM5ay7ozc1oex8Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g8Rfl-00058H-Tx; Fri, 05 Oct 2018 15:05:45 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g8Rd3-0002nj-9w for linux-arm-kernel@lists.infradead.org; Fri, 05 Oct 2018 15:03:38 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AC50CED1; Fri, 5 Oct 2018 08:02:50 -0700 (PDT) Received: from melchizedek.Emea.Arm.com (melchizedek.emea.arm.com [10.4.12.81]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8611F3F5D3; Fri, 5 Oct 2018 08:02:48 -0700 (PDT) From: James Morse To: linux-acpi@vger.kernel.org Subject: [RFC PATCH 1/2] ACPI / processor: Add helper to convert acpi_id to a phys_cpuid Date: Fri, 5 Oct 2018 16:02:34 +0100 Message-Id: <20181005150235.13846-2-james.morse@arm.com> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20181005150235.13846-1-james.morse@arm.com> References: <20181005150235.13846-1-james.morse@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181005_080257_384875_AC2BD8B3 X-CRM114-Status: GOOD ( 14.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vijaya Kumar K , Lorenzo Pieralisi , Jeffrey Hugo , Sudeep Holla , Jeremy Linton , Tomasz Nowicki , James Morse , Richard Ruigrok , Hanjun Guo , Xiongfeng Wang , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The PPTT parsing code only has access to an acpi_id, we need a hardware property, preferably the corresponding phys_cpuid_t. acpi_get_cpuid() requires us to have the acpi_handle, which would imply we already have the acpi_device or acpi_processor structure. This call is useful when the CPU may not have been mapped, e.g. when walking the namespace. The PPTT is parsed after CPUs have been discovered and mapped, add a helper to walk the possible CPUs and test whether the acpi_processor matches our acpi_id. Signed-off-by: James Morse --- I'm not entirely sure what 'mapping processors' is about, so may have the wrong end of the stick here. --- drivers/acpi/processor_core.c | 16 ++++++++++++++++ include/acpi/processor.h | 1 + 2 files changed, 17 insertions(+) diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c index 8c0a54d50d0e..333547bf7845 100644 --- a/drivers/acpi/processor_core.c +++ b/drivers/acpi/processor_core.c @@ -9,7 +9,9 @@ * Yinghai Lu * Jiang Liu */ +#include #include +#include #include #include @@ -263,6 +265,20 @@ int acpi_get_cpuid(acpi_handle handle, int type, u32 acpi_id) } EXPORT_SYMBOL_GPL(acpi_get_cpuid); +phys_cpuid_t acpi_id_to_phys_cpuid(u32 acpi_id) +{ + int cpu; + struct acpi_processor *pr; + + for_each_possible_cpu(cpu) { + pr = per_cpu(processors, cpu); + if (pr && pr->acpi_id == acpi_id) + return pr->phys_id; + } + + return PHYS_CPUID_INVALID; +} + #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC static int get_ioapic_id(struct acpi_subtable_header *entry, u32 gsi_base, u64 *phys_addr, int *ioapic_id) diff --git a/include/acpi/processor.h b/include/acpi/processor.h index 1194a4c78d55..9235b41a9d52 100644 --- a/include/acpi/processor.h +++ b/include/acpi/processor.h @@ -333,6 +333,7 @@ phys_cpuid_t acpi_get_phys_id(acpi_handle, int type, u32 acpi_id); phys_cpuid_t acpi_map_madt_entry(u32 acpi_id); int acpi_map_cpuid(phys_cpuid_t phys_id, u32 acpi_id); int acpi_get_cpuid(acpi_handle, int type, u32 acpi_id); +phys_cpuid_t acpi_id_to_phys_cpuid(u32 acpi_id); #ifdef CONFIG_ACPI_CPPC_LIB extern int acpi_cppc_processor_probe(struct acpi_processor *pr); From patchwork Fri Oct 5 15:02:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Morse X-Patchwork-Id: 10628275 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EAA1A112B for ; Fri, 5 Oct 2018 15:03:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D2FCC26490 for ; Fri, 5 Oct 2018 15:03:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C40CF285A1; Fri, 5 Oct 2018 15:03:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4891026490 for ; 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Received: from foss.arm.com ([217.140.101.70]) by merlin.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g8RdD-0004aU-3Q for linux-arm-kernel@lists.infradead.org; Fri, 05 Oct 2018 15:03:08 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F07E115AD; Fri, 5 Oct 2018 08:02:53 -0700 (PDT) Received: from melchizedek.Emea.Arm.com (melchizedek.emea.arm.com [10.4.12.81]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CA7AB3F5D3; Fri, 5 Oct 2018 08:02:51 -0700 (PDT) From: James Morse To: linux-acpi@vger.kernel.org Subject: [RFC PATCH 2/2] ACPI / PPTT: cacheinfo: Label caches based on fw_token Date: Fri, 5 Oct 2018 16:02:35 +0100 Message-Id: <20181005150235.13846-3-james.morse@arm.com> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20181005150235.13846-1-james.morse@arm.com> References: <20181005150235.13846-1-james.morse@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181005_110307_292245_77434DE5 X-CRM114-Status: GOOD ( 19.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vijaya Kumar K , Lorenzo Pieralisi , Jeffrey Hugo , Sudeep Holla , Jeremy Linton , Tomasz Nowicki , James Morse , Richard Ruigrok , Hanjun Guo , Xiongfeng Wang , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The resctrl ABI requires caches to have a unique id. This number must be unique across all caches at this level, but doesn't need to be contiguous. (there may be gaps, it may not start at 0). See Documentation/x86/intel_rdt_ui.txt::Cache IDs We want a value that is the same over reboots, and should be the same on identical hardware, even if the PPTT is generated in a different order. The hardware doesn't give us any indication of which caches are shared, so this information must come from firmware tables. Starting with a cacheinfo's fw_token, we walk the table to find all CPUs that share this cpu_node (and thus cache), and take the lowest physical id to use as the id for the cache. On arm64 this value corresponds to the MPIDR. This is only done for unified caches, as instruction/data caches would generate the same id using this scheme. Signed-off-by: James Morse --- arch/arm64/include/asm/acpi.h | 6 +++ drivers/acpi/pptt.c | 81 +++++++++++++++++++++++++++++++++++ 2 files changed, 87 insertions(+) diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index 709208dfdc8b..16b9b3d771a8 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -53,6 +53,12 @@ static inline void __iomem *acpi_os_ioremap(acpi_physical_address phys, typedef u64 phys_cpuid_t; #define PHYS_CPUID_INVALID INVALID_HWID +/* Shift the relevant bits out of u64 phys_cpuid_t into a u32 */ +#define ARCH_PHYSID_TO_U32(x) (u32)(MPIDR_AFFINITY_LEVEL(x, 0) |\ + MPIDR_AFFINITY_LEVEL(x, 1) << MPIDR_LEVEL_BITS |\ + MPIDR_AFFINITY_LEVEL(x, 2) << 2*MPIDR_LEVEL_BITS|\ + MPIDR_AFFINITY_LEVEL(x, 3) << 3*MPIDR_LEVEL_BITS) + #define acpi_strict 1 /* No out-of-spec workarounds on ARM64 */ extern int acpi_disabled; extern int acpi_noirq; diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c index d1e26cb599bf..9478f8c28158 100644 --- a/drivers/acpi/pptt.c +++ b/drivers/acpi/pptt.c @@ -341,6 +341,84 @@ static struct acpi_pptt_cache *acpi_find_cache_node(struct acpi_table_header *ta /* total number of attributes checked by the properties code */ #define PPTT_CHECKED_ATTRIBUTES 4 +/** + * acpi_pptt_min_physid_from_cpu_node() - Recursivly find @min_physid for all + * leaf CPUs below @cpu_node. + * @table_hdr: Pointer to the head of the PPTT table + * @cpu_node: The point in the toplogy to start the walk + * @min_physid: The min_physid to update with leaf CPUs. + */ +void acpi_pptt_min_physid_from_cpu_node(struct acpi_table_header *table_hdr, + struct acpi_pptt_processor *cpu_node, + phys_cpuid_t *min_physid) +{ + bool leaf = true; + u32 acpi_processor_id; + phys_cpuid_t cpu_node_phys_id; + struct acpi_subtable_header *iter; + struct acpi_pptt_processor *iter_node; + u32 target_node = ACPI_PTR_DIFF(cpu_node, table_hdr); + u32 proc_sz = sizeof(struct acpi_pptt_processor *); + unsigned long table_end = (unsigned long)table_hdr + table_hdr->length; + + /* + * Walk the PPTT, looking for nodes that reference cpu_node + * as parent. + */ + iter = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr, + sizeof(struct acpi_table_pptt)); + + while ((unsigned long)iter + proc_sz < table_end) { + iter_node = (struct acpi_pptt_processor *)iter; + + if (iter->type == ACPI_PPTT_TYPE_PROCESSOR && + iter_node->parent == target_node) { + leaf = false; + acpi_pptt_min_physid_from_cpu_node(table_hdr, iter_node, + min_physid); + } + + if (iter->length == 0) + return; + iter = ACPI_ADD_PTR(struct acpi_subtable_header, iter, + iter->length); + } + + if (leaf && cpu_node->flags & ACPI_PPTT_ACPI_PROCESSOR_ID_VALID) { + acpi_processor_id = cpu_node->acpi_processor_id; + cpu_node_phys_id = acpi_id_to_phys_cpuid(acpi_processor_id); + *min_physid = min(*min_physid, cpu_node_phys_id); + } +} + +static void acpi_pptt_label_cache(struct cacheinfo *this_leaf) +{ + acpi_status status; + struct acpi_table_header *table; + struct acpi_pptt_processor *cpu_node; + phys_cpuid_t min_physid = PHYS_CPUID_INVALID; + + /* Affinity based IDs for non-unified caches would not be unique */ + if (this_leaf->type != CACHE_TYPE_UNIFIED) + return; + + if (!this_leaf->fw_token) + return; + cpu_node = this_leaf->fw_token; + + status = acpi_get_table(ACPI_SIG_PPTT, 0, &table); + if (ACPI_FAILURE(status)) + return; + + acpi_pptt_min_physid_from_cpu_node(table, cpu_node, &min_physid); + acpi_put_table(table); + + WARN_ON_ONCE(min_physid == PHYS_CPUID_INVALID); + + this_leaf->id = ARCH_PHYSID_TO_U32(min_physid); + this_leaf->attributes |= CACHE_ID; +} + /** * update_cache_properties() - Update cacheinfo for the given processor * @this_leaf: Kernel cache info structure being updated @@ -408,6 +486,9 @@ static void update_cache_properties(struct cacheinfo *this_leaf, if (this_leaf->type == CACHE_TYPE_NOCACHE && valid_flags == PPTT_CHECKED_ATTRIBUTES) this_leaf->type = CACHE_TYPE_UNIFIED; + + /* Now that the type is known, try and generate an id. */ + acpi_pptt_label_cache(this_leaf); } static void cache_setup_acpi_cpu(struct acpi_table_header *table,