From patchwork Fri Oct 5 20:56:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thor Thayer X-Patchwork-Id: 10628723 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 01EA91515 for ; Fri, 5 Oct 2018 20:55:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E450329BEE for ; Fri, 5 Oct 2018 20:55:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D860429C09; Fri, 5 Oct 2018 20:55:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 73CA329BEE for ; Fri, 5 Oct 2018 20:55:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729009AbeJFDz5 (ORCPT ); Fri, 5 Oct 2018 23:55:57 -0400 Received: from mga06.intel.com ([134.134.136.31]:1454 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728139AbeJFDz4 (ORCPT ); Fri, 5 Oct 2018 23:55:56 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Oct 2018 13:55:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,346,1534834800"; d="scan'208";a="263254396" Received: from tthayer-hp-z620.an.intel.com ([10.122.105.132]) by orsmga005.jf.intel.com with ESMTP; 05 Oct 2018 13:55:28 -0700 From: thor.thayer@linux.intel.com To: dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, will.deacon@arm.com, robin.murphy@arm.com, joro@8bytes.org, aisheng.dong@nxp.com, sboyd@kernel.org Cc: vivek.gautam@codeaurora.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, Thor Thayer Subject: [PATCHv4 1/2] arm64: dts: stratix10: Add Stratix10 SMMU support Date: Fri, 5 Oct 2018 15:56:59 -0500 Message-Id: <1538773020-27784-2-git-send-email-thor.thayer@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538773020-27784-1-git-send-email-thor.thayer@linux.intel.com> References: <1538773020-27784-1-git-send-email-thor.thayer@linux.intel.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thor Thayer Add SMMU support to the Stratix10 Device Tree which includes adding the SMMU node and adding IOMMU stream ids to the SMMU peripherals. Signed-off-by: Thor Thayer --- v4 Add clock-name since clk_bulk_get() needs name for clock. v3 Remove bindings changes since not adding new structure. Remove new compatible string - use default "arm,mmu-500" v2 Add bindings changes and compatible string for SOCFPGA. --- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 29 +++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index d033da401c26..f58f7601ab88 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -137,6 +137,7 @@ reset-names = "stmmaceth", "stmmaceth-ocp"; clocks = <&clkmgr STRATIX10_EMAC0_CLK>; clock-names = "stmmaceth"; + iommus = <&smmu 1>; status = "disabled"; }; @@ -150,6 +151,7 @@ reset-names = "stmmaceth", "stmmaceth-ocp"; clocks = <&clkmgr STRATIX10_EMAC1_CLK>; clock-names = "stmmaceth"; + iommus = <&smmu 2>; status = "disabled"; }; @@ -163,6 +165,7 @@ reset-names = "stmmaceth", "stmmaceth-ocp"; clocks = <&clkmgr STRATIX10_EMAC2_CLK>; clock-names = "stmmaceth"; + iommus = <&smmu 3>; status = "disabled"; }; @@ -273,6 +276,7 @@ clocks = <&clkmgr STRATIX10_L4_MP_CLK>, <&clkmgr STRATIX10_SDMMC_CLK>; clock-names = "biu", "ciu"; + iommus = <&smmu 5>; status = "disabled"; }; @@ -307,6 +311,29 @@ altr,modrst-offset = <0x20>; }; + smmu: iommu@fa000000 { + compatible = "arm,mmu-500", "arm,smmu-v2"; + reg = <0xfa000000 0x40000>; + #global-interrupts = <2>; + #iommu-cells = <1>; + clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>; + clock-names = "iommu"; + interrupt-parent = <&intc>; + interrupts = <0 128 4>, /* Global Secure Fault */ + <0 129 4>, /* Global Non-secure Fault */ + /* Non-secure Context Interrupts (32) */ + <0 138 4>, <0 139 4>, <0 140 4>, <0 141 4>, + <0 142 4>, <0 143 4>, <0 144 4>, <0 145 4>, + <0 146 4>, <0 147 4>, <0 148 4>, <0 149 4>, + <0 150 4>, <0 151 4>, <0 152 4>, <0 153 4>, + <0 154 4>, <0 155 4>, <0 156 4>, <0 157 4>, + <0 158 4>, <0 159 4>, <0 160 4>, <0 161 4>, + <0 162 4>, <0 163 4>, <0 164 4>, <0 165 4>, + <0 166 4>, <0 167 4>, <0 168 4>, <0 169 4>; + stream-match-mask = <0x7ff0>; + status = "disabled"; + }; + spi0: spi@ffda4000 { compatible = "snps,dw-apb-ssi"; #address-cells = <1>; @@ -416,6 +443,7 @@ resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>; reset-names = "dwc2", "dwc2-ecc"; clocks = <&clkmgr STRATIX10_USB_CLK>; + iommus = <&smmu 6>; status = "disabled"; }; @@ -428,6 +456,7 @@ resets = <&rst USB1_RESET>, <&rst USB1_OCP_RESET>; reset-names = "dwc2", "dwc2-ecc"; clocks = <&clkmgr STRATIX10_USB_CLK>; + iommus = <&smmu 7>; status = "disabled"; }; From patchwork Fri Oct 5 20:57:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thor Thayer X-Patchwork-Id: 10628725 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AFCC01515 for ; Fri, 5 Oct 2018 20:55:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9CC9129BF7 for ; Fri, 5 Oct 2018 20:55:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9070B29C0B; Fri, 5 Oct 2018 20:55:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 81DC829BF7 for ; Fri, 5 Oct 2018 20:55:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729195AbeJFD4P (ORCPT ); Fri, 5 Oct 2018 23:56:15 -0400 Received: from mga18.intel.com ([134.134.136.126]:24959 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728341AbeJFD4P (ORCPT ); Fri, 5 Oct 2018 23:56:15 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Oct 2018 13:55:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,346,1534834800"; d="scan'208";a="263254409" Received: from tthayer-hp-z620.an.intel.com ([10.122.105.132]) by orsmga005.jf.intel.com with ESMTP; 05 Oct 2018 13:55:30 -0700 From: thor.thayer@linux.intel.com To: dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, will.deacon@arm.com, robin.murphy@arm.com, joro@8bytes.org, aisheng.dong@nxp.com, sboyd@kernel.org Cc: vivek.gautam@codeaurora.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, Thor Thayer Subject: [PATCHv4 2/2] iommu/arm-smmu: Get clock config from device tree Date: Fri, 5 Oct 2018 15:57:00 -0500 Message-Id: <1538773020-27784-3-git-send-email-thor.thayer@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538773020-27784-1-git-send-email-thor.thayer@linux.intel.com> References: <1538773020-27784-1-git-send-email-thor.thayer@linux.intel.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thor Thayer Currently the clocks are specified in a structure as well as in the device tree. Since all the information about clocks can be pulled from the device tree, parse the device tree for the clock information if specified. This patch is dependent upon the following patch series that adds clocks to the driver. "[v16,0/5] iommu/arm-smmu: Add runtime pm/sleep support" https://patchwork.kernel.org/cover/10581891/ particularly this patch which adds the clocks: "[v16,1/5] iommu/arm-smmu: Add pm_runtime/sleep ops" https://patchwork.kernel.org/patch/10581899/ Request testing on different platforms for verification. This patch was tested on a Stratix10 SOCFPGA. Signed-off-by: Thor Thayer --- v4 Change dependency on pending patch series that adds clocks. Add code for parsing device tree for the clocks. v3 Change dependency on device tree bulk clock patches. v2 Add structure for SOCFPGA and add dependency on clock patch. --- drivers/iommu/arm-smmu.c | 30 +++++++++++++++++++++++++++--- 1 file changed, 27 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index d315ca637097..3dd10663b09c 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -44,6 +44,7 @@ #include #include #include +#include #include #include #include @@ -2139,6 +2140,7 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev, const struct arm_smmu_match_data *data; struct device *dev = &pdev->dev; bool legacy_binding; + const char **parent_names; if (of_property_read_u32(dev->of_node, "#global-interrupts", &smmu->num_global_irqs)) { @@ -2149,9 +2151,25 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev, data = of_device_get_match_data(dev); smmu->version = data->version; smmu->model = data->model; - smmu->num_clks = data->num_clks; - - arm_smmu_fill_clk_data(smmu, data->clks); + smmu->num_clks = of_clk_get_parent_count(dev->of_node); + /* check to see if clocks were specified in DT */ + if (smmu->num_clks) { + unsigned int i; + + parent_names = kmalloc_array(smmu->num_clks, + sizeof(*parent_names), + GFP_KERNEL); + if (!parent_names) + goto fail_clk_name; + + for (i = 0; i < smmu->num_clks; i++) { + if (of_property_read_string_index(dev->of_node, + "clock-names", i, + &parent_names[i])) + goto fail_clk_name; + } + arm_smmu_fill_clk_data(smmu, parent_names); + } parse_driver_options(smmu); @@ -2171,6 +2189,12 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev, smmu->features |= ARM_SMMU_FEAT_COHERENT_WALK; return 0; + +fail_clk_name: + kfree(parent_names); + /* clock-names required for clocks in devm_clk_bulk_get() */ + dev_err(dev, "Error: clock-name required in device tree\n"); + return -ENOMEM; } static void arm_smmu_bus_init(void)