From patchwork Sat Oct 6 07:28:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 10629215 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 631DD933 for ; Sat, 6 Oct 2018 07:29:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3FD5429545 for ; Sat, 6 Oct 2018 07:29:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 33B4D29551; Sat, 6 Oct 2018 07:29:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id EB0F429545 for ; Sat, 6 Oct 2018 07:29:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=RRjUjuUm41NMCxX4yc0KqjbpQX0ga5ec1tgvjmjOYGA=; b=FP7MXRgyUJ4Gk4 xdMMQYdJn7BZz3kOLie2+BCV/NKoaDy0JkH7LHKsbti8HMMX3BTBE4/4VCTfzZt0i81HwcBv0FWRq MK+sHMRdLwuElM9a74dFF0l0HJsrPvNEUJTmh8BZxegjWNA0GcBdDhqtj2gTkJMXF44P51lpHW9/Q o23+8v4Q5xlL5XzQcKyqCMQg6SbZ+3W8DmSkbApRcr7cFLyzZbMRRNTtx3CfZem7P1q6wWL0hE7N8 Iyuc1FoXpkCXDHMwUNs7AYAgoQBN1BxelGz0QVKgKIIpIIdeipTg2PnyOhQqLgaplOyCLcgVF2Lia jreTosFD4wqGeeFyH4Yg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g8h1D-0008By-V4; Sat, 06 Oct 2018 07:28:55 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1g8h19-0008Aq-Bq for linux-arm-kernel@lists.infradead.org; Sat, 06 Oct 2018 07:28:52 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id w967SNG2029126; Sat, 6 Oct 2018 02:28:23 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1538810903; bh=Q5QrwgguIRoNzmwtHN64jFoD2WrYsTOZoVlTXvAtYt8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ZvewPSce93W/W5C6EhsdDDD9HYr3dIf617EA4aUw4x2yxhy7Z/roqg1Nd3RUlKEFy 7B4vC1aTJaVFhNp23X2uo+t2ywTau0ORIBJB81cjVZVj89eqrNQAfktkrovQ9Qe/jL cpmiwn+Dt78GE+e1B31jyKG8AKer6SoqOqXU4qiQ= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w967SNPv013729; Sat, 6 Oct 2018 02:28:23 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Sat, 6 Oct 2018 02:28:23 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Sat, 6 Oct 2018 02:28:23 -0500 Received: from uda0131933.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w967SFuD016164; Sat, 6 Oct 2018 02:28:19 -0500 From: Lokesh Vutla To: Nishanth Menon , Tero Kristo , , , Subject: [PATCH 1/2] dt-bindings: irqchip: Introduce TISCI Interrupt router bindings Date: Sat, 6 Oct 2018 12:58:11 +0530 Message-ID: <20181006072812.15814-2-lokeshvutla@ti.com> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20181006072812.15814-1-lokeshvutla@ti.com> References: <20181006072812.15814-1-lokeshvutla@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181006_002851_479969_80471614 X-CRM114-Status: GOOD ( 18.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Device Tree Mailing List , Lokesh Vutla , Sekhar Nori , linux-kernel@vger.kernel.org, Rob Herring , Santosh Shilimkar , Linux ARM Mailing List Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add the DT binding documentation for Interrupt router driver. Signed-off-by: Lokesh Vutla --- .../interrupt-controller/ti,sci-intr.txt | 83 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 84 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt new file mode 100644 index 000000000000..681ca53cc5fb --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt @@ -0,0 +1,83 @@ +Texas Instruments K3 Interrupt Router +===================================== + +The Interrupt Router (INTR) module provides a mechanism to mux M +interrupt inputs to N interrupt outputs, where all M inputs are selectable +to be driven per N output. There is one register per output (MUXCNTL_N) that +controls the selection. + + + Interrupt Router + +----------------------+ + | Inputs Outputs | + +-------+ | +------+ | + | GPIO |----------->| | irq0 | | Host IRQ + +-------+ | +------+ | controller + | . +-----+ | +-------+ + +-------+ | . | 0 | |----->| GIC | + | INTA |----------->| . +-----+ | +-------+ + +-------+ | . . | + | +------+ . | + | | irqM | +-----+ | + | +------+ | N | | + | +-----+ | + +----------------------+ + +Configuration of these MUXCNTL_N registers is done by a system controller +(like the Device Memory and Security Controller on K3 AM654 SoC). System +controller will keep track of the used and unused registers within the Router. +Driver should request the system controller to get the range of GIC IRQs +assigned to the requesting hosts. It is the drivers responsibility to keep +track of GIC IRQs. + +Communication between the host processor running an OS and the system +controller happens through a protocol called TI System Control Interface +(TISCI protocol). For more details refer: +Documentation/devicetree/bindings/arm/keystone/ti,sci.txt + +TISCI Interrupt Router Node: +---------------------------- +- compatible: Must be "ti,sci-intr". +- interrupt-controller: Identifies the node as an interrupt controller +- #interrupt-cells: Specifies the number of cells needed to encode an + interrupt source. The value should be 3. + First cell should contain the TISCI device ID of source + Second cell should contain the interrupt source offset + within the device + Third cell specifies the trigger type as defined + in interrupts.txt in this directory. +- interrupt-parent: phandle of irq parent for TISCI intr. The parent must + use the same interrupt-cells format as GIC. +- ti,sci: Phandle to TI-SCI compatible System controller node. +- ti,sci-dst-id: TISCI device ID of the destination IRQ controller. +- ti,sci-rm-range-girq: Tuple corresponding to unique TISCI resource type that + defines the dst host irq ranges assigned to this + interrupt router from this host context. + Tuple should be of format . + +Example: +-------- +The following example demonstrates both interrupt router node and the consumer +node(main gpio) on the AM654 SoC: + +main_intr: interrupt-controller@1 { + compatible = "ti,sci-intr"; + interrupt-controller; + interrupt-parent = <&gic>; + #interrupt-cells = <3>; + ti,sci = <&dmsc>; + ti,sci-dst-id = <56>; + ti,sci-rm-range-girq = <0xb 0x1>; +}; + +main_gpio0: main_gpio0@600000 { + ... + interrupt-parent = <&main_intr>; + interrupts = <57 256 IRQ_TYPE_EDGE_RISING>, + <57 257 IRQ_TYPE_EDGE_RISING>, + <57 258 IRQ_TYPE_EDGE_RISING>, + <57 259 IRQ_TYPE_EDGE_RISING>, + <57 260 IRQ_TYPE_EDGE_RISING>, + <57 261 IRQ_TYPE_EDGE_RISING>; + ... +}; diff --git a/MAINTAINERS b/MAINTAINERS index 29c08106bd22..a23778b68d74 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14625,6 +14625,7 @@ F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt F: Documentation/devicetree/bindings/clock/ti,sci-clk.txt F: drivers/clk/keystone/sci-clk.c F: drivers/reset/reset-ti-sci.c +F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt THANKO'S RAREMONO AM/FM/SW RADIO RECEIVER USB DRIVER M: Hans Verkuil From patchwork Sat Oct 6 07:28:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 10629221 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D47DA13BB for ; Sat, 6 Oct 2018 07:30:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BB4012954B for ; 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Sat, 6 Oct 2018 02:28:23 -0500 From: Lokesh Vutla To: Nishanth Menon , Tero Kristo , , , Subject: [PATCH 2/2] irqchip: ti-sci-intr: Add support for Interrupt Router driver Date: Sat, 6 Oct 2018 12:58:12 +0530 Message-ID: <20181006072812.15814-3-lokeshvutla@ti.com> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20181006072812.15814-1-lokeshvutla@ti.com> References: <20181006072812.15814-1-lokeshvutla@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181006_002852_339364_EA569BA2 X-CRM114-Status: GOOD ( 25.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Device Tree Mailing List , Lokesh Vutla , Sekhar Nori , linux-kernel@vger.kernel.org, Rob Herring , Santosh Shilimkar , Linux ARM Mailing List Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Texas Instruments' K3 generation SoCs has an IP Interrupt Router that does allows for multiplexing of input interrupts to host interrupt controller. Interrupt Router inputs are either from a peripheral or from an Interrupt Aggregator which is another interrupt controller. Configuration of the interrupt router registers can only be done by a system co-processor and the driver needs to send a message to this co processor over TISCI protocol. Add support for Interrupt Router driver over TISCI protocol. Signed-off-by: Lokesh Vutla --- MAINTAINERS | 1 + drivers/irqchip/Kconfig | 11 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-ti-sci-intr.c | 325 ++++++++++++++++++++++++++++++ 4 files changed, 338 insertions(+) create mode 100644 drivers/irqchip/irq-ti-sci-intr.c diff --git a/MAINTAINERS b/MAINTAINERS index a23778b68d74..cf3c834f8cee 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14626,6 +14626,7 @@ F: Documentation/devicetree/bindings/clock/ti,sci-clk.txt F: drivers/clk/keystone/sci-clk.c F: drivers/reset/reset-ti-sci.c F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt +F: drivers/irqchip/irq-ti-sci-intr.c THANKO'S RAREMONO AM/FM/SW RADIO RECEIVER USB DRIVER M: Hans Verkuil diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 96451b581452..9a965fe22043 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -374,6 +374,17 @@ config QCOM_PDC Power Domain Controller driver to manage and configure wakeup IRQs for Qualcomm Technologies Inc (QTI) mobile chips. +config TI_SCI_INTR_IRQCHIP + tristate "TISCI based Interrupt Router irqchip driver" + depends on TI_SCI_PROTOCOL && ARCH_K3 + select IRQ_DOMAIN + select IRQ_DOMAIN_HIERARCHY + help + This enables the irqchip driver support for K3 Interrupt router + over TI System Control Interface available on some new TI's SoCs. + If you wish to use interrupt router irq resources managed by the + TI System Controller, say Y here. Otherwise, say N. + endmenu config SIFIVE_PLIC diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index b822199445ff..44bf65606d60 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -89,3 +89,4 @@ obj-$(CONFIG_GOLDFISH_PIC) += irq-goldfish-pic.o obj-$(CONFIG_NDS32) += irq-ativic32.o obj-$(CONFIG_QCOM_PDC) += qcom-pdc.o obj-$(CONFIG_SIFIVE_PLIC) += irq-sifive-plic.o +obj-$(CONFIG_TI_SCI_INTR_IRQCHIP) += irq-ti-sci-intr.o diff --git a/drivers/irqchip/irq-ti-sci-intr.c b/drivers/irqchip/irq-ti-sci-intr.c new file mode 100644 index 000000000000..f04fe6da1b09 --- /dev/null +++ b/drivers/irqchip/irq-ti-sci-intr.c @@ -0,0 +1,325 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Texas Instruments' K3 Interrupt Router irqchip driver + * + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Lokesh Vutla + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define TI_SCI_DEV_ID_MASK 0xffff +#define TI_SCI_DEV_ID_SHIFT 16 +#define TI_SCI_IRQ_ID_MASK 0xffff +#define TI_SCI_IRQ_ID_SHIFT 0 +#define TI_SCI_IS_EVENT_IRQ BIT(31) + +#define HWIRQ_TO_DEVID(HWIRQ) (((HWIRQ) >> (TI_SCI_DEV_ID_SHIFT)) & \ + (TI_SCI_DEV_ID_MASK)) +#define HWIRQ_TO_IRQID(HWIRQ) ((HWIRQ) & (TI_SCI_IRQ_ID_MASK)) + +/** + * struct ti_sci_intr_irq_domain - Structure representing a TISCI based + * Interrupt Router IRQ domain. + * @sci: Pointer to TISCI handle + * @dst_irq: TISCI resource pointer representing destination irq controller. + * @dst_id: TISCI device ID of the destination irq controller. + */ +struct ti_sci_intr_irq_domain { + const struct ti_sci_handle *sci; + struct ti_sci_resource *dst_irq; + u16 dst_id; +}; + +/** + * struct ti_sci_intr_irq_desc - Description of an Interrupt Router IRQ + * @src_id: TISCI device ID of the IRQ source + * @src_index: IRQ source index within the device. + * @dst_irq: Destination host IRQ. + */ +struct ti_sci_intr_irq_desc { + u16 src_id; + u16 src_index; + u16 dst_irq; +}; + +static struct irq_chip ti_sci_intr_irq_chip = { + .name = "INTR", + .irq_eoi = irq_chip_eoi_parent, + .irq_mask = irq_chip_mask_parent, + .irq_unmask = irq_chip_unmask_parent, + .irq_retrigger = irq_chip_retrigger_hierarchy, + .irq_set_type = irq_chip_set_type_parent, + .irq_set_affinity = irq_chip_set_affinity_parent, +}; + +/** + * ti_sci_intr_irq_domain_translate() - Retrieve hwirq and type from + * IRQ firmware specific handler. + * @domain: Pointer to IRQ domain + * @fwspec: Pointer to IRQ specific firmware structure + * @hwirq: IRQ number identified by hardware + * @type: IRQ type + * + * Return 0 if all went ok else appropriate error. + */ +static int ti_sci_intr_irq_domain_translate(struct irq_domain *domain, + struct irq_fwspec *fwspec, + unsigned long *hwirq, + unsigned int *type) +{ + if (is_of_node(fwspec->fwnode)) { + if (fwspec->param_count != 3) + return -EINVAL; + + *hwirq = ((fwspec->param[0] & TI_SCI_DEV_ID_MASK) << + TI_SCI_DEV_ID_SHIFT) | + (fwspec->param[1] & TI_SCI_IRQ_ID_MASK); + *type = fwspec->param[2]; + + return 0; + } + + return -EINVAL; +} + +static inline void ti_sci_intr_delete_desc(struct ti_sci_intr_irq_domain *intr, + struct ti_sci_intr_irq_desc *desc) +{ + intr->sci->ops.rm_irq_ops.free_direct_irq(intr->sci, desc->src_id, + desc->src_index, + intr->dst_id, desc->dst_irq); + pr_debug("%s: IRQ deleted from src = %d, src_index = %d, to dst = %d, dst_irq = %d\n", + __func__, desc->src_id, desc->src_index, intr->dst_id, + desc->dst_irq); +} + +/** + * ti_sci_intr_irq_domain_free() - Free the specified IRQs from the domain. + * @domain: Domain to which the irqs belong + * @virq: Linux virtual IRQ to be freed. + * @nr_irqs: Number of continuous irqs to be freed + */ +static void ti_sci_intr_irq_domain_free(struct irq_domain *domain, + unsigned int virq, unsigned int nr_irqs) +{ + struct ti_sci_intr_irq_domain *intr = domain->host_data; + struct ti_sci_intr_irq_desc *desc; + struct irq_data *data; + int i; + + intr = domain->host_data; + + for (i = 0; i < nr_irqs; i++) { + data = irq_domain_get_irq_data(domain, virq + i); + + desc = irq_data_get_irq_chip_data(data); + + ti_sci_intr_delete_desc(intr, desc); + irq_domain_free_irqs_parent(domain, virq, 1); + irq_domain_reset_irq_data(data); + ti_sci_release_resource(intr->dst_irq, desc->dst_irq); + kfree(desc); + } +} + +/** + * allocate_gic_irq() - Allocate GIC specific IRQ + * @domain: Point to the interrupt router IRQ domain + * @dev: TISCI device IRQ generating the IRQ + * @irq: IRQ offset within the device + * @flags: Corresponding flags to the IRQ + * + * Returns pointer to irq descriptor if all went well else appropriate + * error pointer. + */ +static struct ti_sci_intr_irq_desc *allocate_gic_irq(struct irq_domain *domain, + unsigned int virq, + u16 dev, u16 irq, + u32 flags) +{ + struct ti_sci_intr_irq_domain *intr = domain->host_data; + struct ti_sci_intr_irq_desc *desc; + struct irq_fwspec fwspec; + int err; + + if (!irq_domain_get_of_node(domain->parent)) + return ERR_PTR(-EINVAL); + + desc = kzalloc(sizeof(*desc), GFP_KERNEL); + if (!desc) + return ERR_PTR(-ENOMEM); + + desc->src_id = dev; + desc->src_index = irq; + desc->dst_irq = ti_sci_get_free_resource(intr->dst_irq); + + fwspec.fwnode = domain->parent->fwnode; + fwspec.param_count = 3; + fwspec.param[0] = 0; /* SPI */ + fwspec.param[1] = desc->dst_irq - 32; /* SPI offset */ + fwspec.param[2] = flags & IRQ_TYPE_SENSE_MASK; + + err = irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); + if (err) + goto err_irqs; + + pr_debug("%s: IRQ requested from src = %d, src_index = %d, to dst = %d, dst_irq = %d\n", + __func__, desc->src_id, desc->src_index, intr->dst_id, + desc->dst_irq); + + err = intr->sci->ops.rm_irq_ops.set_direct_irq(intr->sci, desc->src_id, + desc->src_index, + intr->dst_id, + desc->dst_irq); + if (err) { + pr_err("%s: IRQ allocation failed from src = %d, src_index = %d to dst_id = %d, dst_irq = %d", + __func__, desc->src_id, desc->src_index, intr->dst_id, + desc->dst_irq); + goto err_msg; + } + + return desc; + +err_msg: + irq_domain_free_irqs_parent(domain, virq, 1); +err_irqs: + ti_sci_release_resource(intr->dst_irq, desc->dst_irq); + kfree(desc); + return ERR_PTR(err); +} + +/** + * ti_sci_intr_irq_domain_alloc() - Allocate Interrupt router IRQs + * @domain: Point to the interrupt router IRQ domain + * @virq: Corresponding Linux virtual IRQ number + * @nr_irqs: Continuous irqs to be allocated + * @data: Pointer to firmware specifier + * + * Return 0 if all went well else appropriate error value. + */ +static int ti_sci_intr_irq_domain_alloc(struct irq_domain *domain, + unsigned int virq, unsigned int nr_irqs, + void *data) +{ + struct irq_fwspec *fwspec = data; + struct ti_sci_intr_irq_desc *desc; + unsigned long hwirq; + u16 src_id, src_index; + int i, err; + u32 type; + + err = ti_sci_intr_irq_domain_translate(domain, fwspec, &hwirq, &type); + if (err) + return err; + + src_id = HWIRQ_TO_DEVID(hwirq); + src_index = HWIRQ_TO_IRQID(hwirq); + + for (i = 0; i < nr_irqs; i++) { + desc = allocate_gic_irq(domain, virq + i, src_id, src_index + i, + type); + if (IS_ERR(desc)) + /* ToDO: Clean already allocated IRQs */ + return PTR_ERR(desc); + + err = irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, + &ti_sci_intr_irq_chip, + desc); + if (err) + return err; + } + + return 0; +} + +static const struct irq_domain_ops ti_sci_intr_irq_domain_ops = { + .alloc = ti_sci_intr_irq_domain_alloc, + .free = ti_sci_intr_irq_domain_free, + .translate = ti_sci_intr_irq_domain_translate, +}; + +static int ti_sci_intr_irq_domain_probe(struct platform_device *pdev) +{ + struct irq_domain *parent_domain, *domain; + struct ti_sci_intr_irq_domain *intr; + struct device_node *parent_node; + struct device *dev = &pdev->dev; + int ret; + + parent_node = of_irq_find_parent(dev_of_node(dev)); + if (!parent_node) { + dev_err(dev, "Failed to get IRQ parent node\n"); + return -ENODEV; + } + + parent_domain = irq_find_host(parent_node); + if (!parent_domain) { + dev_err(dev, "Failed to find IRQ parent domain\n"); + return -ENODEV; + } + + intr = devm_kzalloc(dev, sizeof(*intr), GFP_KERNEL); + if (!intr) + return -ENOMEM; + + intr->sci = devm_ti_sci_get_by_phandle(dev, "ti,sci"); + if (IS_ERR(intr->sci)) { + ret = PTR_ERR(intr->sci); + if (ret != -EPROBE_DEFER) + dev_err(dev, "ti,sci read fail %d\n", ret); + intr->sci = NULL; + return ret; + } + + intr->dst_irq = devm_ti_sci_get_of_resource(intr->sci, dev, + "ti,sci-rm-range-girq"); + if (IS_ERR(intr->dst_irq)) { + dev_err(dev, "Destination irq resource allocation failed\n"); + return PTR_ERR(intr->dst_irq); + } + + ret = of_property_read_u32(dev_of_node(dev), "ti,sci-dst-id", + (u32 *)&intr->dst_id); + if (ret) { + dev_err(dev, "missing 'ti,sci-dst-id' property\n"); + return -EINVAL; + } + + domain = irq_domain_add_hierarchy(parent_domain, 0, 0, dev_of_node(dev), + &ti_sci_intr_irq_domain_ops, intr); + if (!domain) { + dev_err(dev, "Failed to allocate IRQ domain\n"); + return -ENOMEM; + } + + return 0; +} + +static const struct of_device_id ti_sci_intr_irq_domain_of_match[] = { + { .compatible = "ti,sci-intr", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, ti_sci_intr_irq_domain_of_match); + +static struct platform_driver ti_sci_intr_irq_domain_driver = { + .probe = ti_sci_intr_irq_domain_probe, + .driver = { + .name = "ti-sci-intr", + .of_match_table = ti_sci_intr_irq_domain_of_match, + }, +}; +module_platform_driver(ti_sci_intr_irq_domain_driver); + +MODULE_AUTHOR("Lokesh Vutla "); +MODULE_DESCRIPTION("K3 Interrupt Router driver over TI SCI protocol"); +MODULE_LICENSE("GPL v2");