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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id l12sm3587374qke.89.2020.05.01.14.45.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 May 2020 14:45:04 -0700 (PDT) From: Alex Elder To: robh+dt@kernel.org, bjorn.andersson@linaro.org, agross@kernel.org Cc: evgreen@chromium.org.net, subashab@codeaurora.org, cpratapa@codeaurora.org, davem@davemloft.net, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] dt-bindings: net: add IPA iommus property Date: Fri, 1 May 2020 16:45:00 -0500 Message-Id: <20200501214500.31433-1-elder@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The IPA accesses "IMEM" and main system memory through an SMMU, so its DT node requires an iommus property to define range of stream IDs it uses. Signed-off-by: Alex Elder --- Documentation/devicetree/bindings/net/qcom,ipa.yaml | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml index 140f15245654..7b749fc04c32 100644 --- a/Documentation/devicetree/bindings/net/qcom,ipa.yaml +++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml @@ -20,7 +20,10 @@ description: The GSI is an integral part of the IPA, but it is logically isolated and has a distinct interrupt and a separately-defined address space. - See also soc/qcom/qcom,smp2p.txt and interconnect/interconnect.txt. + See also soc/qcom/qcom,smp2p.txt and interconnect/interconnect.txt. See + iommu/iommu.txt and iommu/arm,smmu.yaml for more information about SMMU + bindings. + - | -------- --------- @@ -54,6 +57,9 @@ properties: - const: ipa-shared - const: gsi + iommus: + maxItems: 1 + clocks: maxItems: 1 @@ -126,6 +132,7 @@ properties: required: - compatible + - iommus - reg - clocks - interrupts @@ -164,6 +171,7 @@ examples: modem-init; modem-remoteproc = <&mss_pil>; + iommus = <&apps_smmu 0x720 0x3>; reg = <0 0x1e40000 0 0x7000>, <0 0x1e47000 0 0x2000>, <0 0x1e04000 0 0x2c000>;