From patchwork Mon Oct 8 18:06:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leonard Crestez X-Patchwork-Id: 10631163 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 69EAD112B for ; Mon, 8 Oct 2018 18:06:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6074828F70 for ; Mon, 8 Oct 2018 18:06:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 54436299A4; Mon, 8 Oct 2018 18:06:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0B2FE28F70 for ; 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Mon, 8 Oct 2018 18:06:19 +0000 Received: from AM0PR04MB4290.eurprd04.prod.outlook.com ([fe80::3836:6416:4ebd:34ef]) by AM0PR04MB4290.eurprd04.prod.outlook.com ([fe80::3836:6416:4ebd:34ef%3]) with mapi id 15.20.1207.024; Mon, 8 Oct 2018 18:06:19 +0000 From: Leonard Crestez To: Shawn Guo , Lucas Stach , Richard Zhu CC: Lorenzo Pieralisi , Fabio Estevam , Stefan Agner , Marek Vasut , Ulf Hansson , Rob Herring , Mark Rutland , "linux-pm@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-pci@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , dl-linux-imx , "kernel@pengutronix.de" , "linux-kernel@vger.kernel.org" Subject: [PATCH v2 1/4] soc: imx: gpc: Increase GPC_CLK_MAX to 7 Thread-Topic: [PATCH v2 1/4] soc: imx: gpc: Increase GPC_CLK_MAX to 7 Thread-Index: AQHUXzGdTEA4i3oy80C5E2NGCyQNsg== Date: Mon, 8 Oct 2018 18:06:19 +0000 Message-ID: References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [95.76.156.53] x-mailer: git-send-email 2.17.1 x-clientproxiedby: AM6PR0102CA0011.eurprd01.prod.exchangelabs.com (2603:10a6:209:14::24) To AM0PR04MB4290.eurprd04.prod.outlook.com (2603:10a6:208:67::17) authentication-results: spf=none (sender IP is ) smtp.mailfrom=leonard.crestez@nxp.com; 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Signed-off-by: Leonard Crestez --- drivers/soc/imx/gpc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index aa3729ecaa9e..7d14a4b4e82a 100644 --- a/drivers/soc/imx/gpc.c +++ b/drivers/soc/imx/gpc.c @@ -33,11 +33,11 @@ #define GPC_PGC_DISP_SR 0x24c #define GPU_VPU_PUP_REQ BIT(1) #define GPU_VPU_PDN_REQ BIT(0) -#define GPC_CLK_MAX 6 +#define GPC_CLK_MAX 7 #define PGC_DOMAIN_FLAG_NO_PD BIT(0) struct imx_pm_domain { struct generic_pm_domain base; From patchwork Mon Oct 8 18:06:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leonard Crestez X-Patchwork-Id: 10631157 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5EB761867 for ; Mon, 8 Oct 2018 18:06:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5453828F70 for ; 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This was not required until now because the power-domain of the PCIE block (DISPLAY) was always on. Signed-off-by: Leonard Crestez Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index f37494d5a7be..d514c1f2365f 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -39,11 +39,13 @@ Optional properties: host. Additional required properties for imx6sx-pcie: - clock names: Must include the following additional entries: - "pcie_inbound_axi" -- power-domains: Must be set to a phandle pointing to the PCIE_PHY power domain +- power-domains: Must be set to phandles pointing to the DISPLAY and + PCIE_PHY power domains +- power-domain-names: Must be "pcie", "pcie_phy" Additional required properties for imx7d-pcie: - power-domains: Must be set to a phandle pointing to PCIE_PHY power domain - resets: Must contain phandles to PCIe-related reset lines exposed by SRC IP block From patchwork Mon Oct 8 18:06:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leonard Crestez X-Patchwork-Id: 10631151 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 20B5814BD for ; Mon, 8 Oct 2018 18:06:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1588328F70 for ; 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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: WFrNgwPoI5ToMbtWFIJkh0VvRXf0lkK+Xc/bU43rActH30b3kLPqFGc6oM82yozyoHCXw8J/gA0l2gglSUTFTKy4gSiQAfLgYj2dmqHNZVXbqXgHdJiIvYyE+mSqibZUQapvuaitc9zVoWQEUtYwsEl9SDRdYQ6EyoVM+amM7zfaCZ1cx1XjPPCoLn9nkd0grLL0aJshz5iBAQkDQ/UWSbOBCC1H1DPsbFDwsrnvLHOQ/p6afNKXFS+1cNtrHCAoNY4Zgkr0CKUTP9rfJ/x5txjrgsDLaceH7L1c4S39pIWL/9QPxdF7O2C0m75reY8hXNkAqC9BTqDrUuuLAomlEn1fh+8A5QZqZcvuowXZ4WI= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 19faf96a-684d-4e03-68fb-08d62d48c0c9 X-MS-Exchange-CrossTenant-originalarrivaltime: 08 Oct 2018 18:06:21.8176 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB5172 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On some chips the PCIE and PCIE_PHY blocks are in separate power domains which can be power-gated independently. The pci driver needs to handle this by keeping both domain active. This is intended for imx6sx where PCIE is in DISPLAY and PCIE_PHY in it's own domain. Defining the DISPLAY domain requires a way for pcie to keep it active or it will break when displays are off. The power-domains on imx6sx are meant to look like this: power-domains = <&pd_disp>, <&pd_pci>; power-domain-names = "pcie", "pcie_phy"; Signed-off-by: Leonard Crestez Reviewed-by: Ulf Hansson Acked-by: Lorenzo Pieralisi --- drivers/pci/controller/dwc/pci-imx6.c | 48 +++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 6171171db1fc..a482f86b02e6 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -25,10 +25,12 @@ #include #include #include #include #include +#include +#include #include "pcie-designware.h" #define to_imx6_pcie(x) dev_get_drvdata((x)->dev) @@ -57,10 +59,15 @@ struct imx6_pcie { u32 tx_deemph_gen2_6db; u32 tx_swing_full; u32 tx_swing_low; int link_gen; struct regulator *vpcie; + + /* power domain for pcie */ + struct device *pd_pcie; + /* power domain for pcie phy */ + struct device *pd_pcie_phy; }; /* Parameters for the waiting for PCIe PHY PLL to lock on i.MX7 */ #define PHY_PLL_LOCK_WAIT_MAX_RETRIES 2000 #define PHY_PLL_LOCK_WAIT_USLEEP_MIN 50 @@ -290,10 +297,47 @@ static int imx6q_pcie_abort_handler(unsigned long addr, } return 1; } +static int imx6_pcie_attach_pd(struct device *dev) +{ + struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); + struct device_link *link; + + /* Do nothing when in a single power domain */ + if (dev->pm_domain) + return 0; + + imx6_pcie->pd_pcie = dev_pm_domain_attach_by_name(dev, "pcie"); + if (IS_ERR(imx6_pcie->pd_pcie)) + return PTR_ERR(imx6_pcie->pd_pcie); + link = device_link_add(dev, imx6_pcie->pd_pcie, + DL_FLAG_STATELESS | + DL_FLAG_PM_RUNTIME | + DL_FLAG_RPM_ACTIVE); + if (IS_ERR(link)) { + dev_err(dev, "Failed to add device_link to pcie pd: %ld\n", PTR_ERR(link)); + return PTR_ERR(link); + } + + imx6_pcie->pd_pcie_phy = dev_pm_domain_attach_by_name(dev, "pcie_phy"); + if (IS_ERR(imx6_pcie->pd_pcie_phy)) + return PTR_ERR(imx6_pcie->pd_pcie_phy); + + device_link_add(dev, imx6_pcie->pd_pcie_phy, + DL_FLAG_STATELESS | + DL_FLAG_PM_RUNTIME | + DL_FLAG_RPM_ACTIVE); + if (IS_ERR(link)) { + dev_err(dev, "Failed to add device_link to pcie_phy pd: %ld\n", PTR_ERR(link)); + return PTR_ERR(link); + } + + return 0; +} + static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) { struct device *dev = imx6_pcie->pci->dev; switch (imx6_pcie->variant) { @@ -1013,10 +1057,14 @@ static int imx6_pcie_probe(struct platform_device *pdev) imx6_pcie->vpcie = NULL; } platform_set_drvdata(pdev, imx6_pcie); + ret = imx6_pcie_attach_pd(dev); + if (ret) + return ret; + ret = imx6_add_pcie_port(imx6_pcie, pdev); if (ret < 0) return ret; return 0; From patchwork Mon Oct 8 18:06:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leonard Crestez X-Patchwork-Id: 10631159 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0781A112B for ; Mon, 8 Oct 2018 18:06:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F0FF328F70 for ; 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a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=jU4sh9p0QI3JnHWKdhC4KTppA+o50FhN3OVg8t8iO44=; b=Nlkk7pW8wgUxlnl92IcBX4zeFf9K1D9pzUUY8SAtjBbUU6HIc3BGKeM63/F0VFZ5IHtDeIy5kPo/e+SQ9a4O5nEnpKpMqR+twlBvjCm9xwgwL0B0K63aw2kSScmUa2MUZkti6R8yeH4JmEPVtWGQ6kydKfhgSnbCuJm3J94kfDM= Received: from AM0PR04MB4290.eurprd04.prod.outlook.com (52.134.126.145) by AM0PR04MB5172.eurprd04.prod.outlook.com (20.177.42.13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1185.22; Mon, 8 Oct 2018 18:06:23 +0000 Received: from AM0PR04MB4290.eurprd04.prod.outlook.com ([fe80::3836:6416:4ebd:34ef]) by AM0PR04MB4290.eurprd04.prod.outlook.com ([fe80::3836:6416:4ebd:34ef%3]) with mapi id 15.20.1207.024; Mon, 8 Oct 2018 18:06:23 +0000 From: Leonard Crestez To: Shawn Guo , Lucas Stach , Richard Zhu CC: Lorenzo Pieralisi , Fabio Estevam , Stefan Agner , Marek Vasut , Ulf Hansson , Rob Herring , Mark Rutland , "linux-pm@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-pci@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , dl-linux-imx , "kernel@pengutronix.de" , "linux-kernel@vger.kernel.org" Subject: [PATCH v2 4/4] ARM: dts: imx6sx: Add DISPLAY power domain support Thread-Topic: [PATCH v2 4/4] ARM: dts: imx6sx: Add DISPLAY power domain support Thread-Index: AQHUXzGf8guh/Nb5iEavRi81Wh8wzA== Date: Mon, 8 Oct 2018 18:06:23 +0000 Message-ID: References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [95.76.156.53] x-mailer: git-send-email 2.17.1 x-clientproxiedby: AM6PR0102CA0011.eurprd01.prod.exchangelabs.com (2603:10a6:209:14::24) To AM0PR04MB4290.eurprd04.prod.outlook.com (2603:10a6:208:67::17) authentication-results: spf=none (sender IP is ) smtp.mailfrom=leonard.crestez@nxp.com; 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This makes it always on. From reference manual in section "10.4.1.4.1 Power Distribution": "Display domain - The DISPLAY domain contains GIS, CSI, PXP, LCDIF, PCIe, DCIC, and LDB. It is supplied by internal regulator." The current pd_pcie is actually only for PCIE_PHY, the PCIE ip block is actually inside the DISPLAY domain. Handle this by adding the pcie node in both power domains. Signed-off-by: Leonard Crestez --- arch/arm/boot/dts/imx6sx.dtsi | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 95a3c1cb877d..b7f815d82d1b 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -778,10 +778,22 @@ #power-domain-cells = <0>; power-supply = <®_soc>; clocks = <&clks IMX6SX_CLK_GPU>; }; + pd_disp: power-domain@2 { + reg = <2>; + #power-domain-cells = <0>; + clocks = <&clks IMX6SX_CLK_PXP_AXI>, + <&clks IMX6SX_CLK_DISPLAY_AXI>, + <&clks IMX6SX_CLK_LCDIF1_PIX>, + <&clks IMX6SX_CLK_LCDIF_APB>, + <&clks IMX6SX_CLK_LCDIF2_PIX>, + <&clks IMX6SX_CLK_CSI>, + <&clks IMX6SX_CLK_VADC>; + }; + pd_pci: power-domain@3 { reg = <3>; #power-domain-cells = <0>; power-supply = <®_pcie>; }; @@ -1196,10 +1208,11 @@ reg = <0x02218000 0x4000>; interrupts = ; clocks = <&clks IMX6SX_CLK_PXP_AXI>, <&clks IMX6SX_CLK_DISPLAY_AXI>; clock-names = "pxp-axi", "disp-axi"; + power-domains = <&pd_disp>; status = "disabled"; }; csi2: csi@221c000 { reg = <0x0221c000 0x4000>; @@ -1217,10 +1230,11 @@ interrupts = ; clocks = <&clks IMX6SX_CLK_LCDIF1_PIX>, <&clks IMX6SX_CLK_LCDIF_APB>, <&clks IMX6SX_CLK_DISPLAY_AXI>; clock-names = "pix", "axi", "disp_axi"; + power-domains = <&pd_disp>; status = "disabled"; }; lcdif2: lcdif@2224000 { compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif"; @@ -1228,19 +1242,21 @@ interrupts = ; clocks = <&clks IMX6SX_CLK_LCDIF2_PIX>, <&clks IMX6SX_CLK_LCDIF_APB>, <&clks IMX6SX_CLK_DISPLAY_AXI>; clock-names = "pix", "axi", "disp_axi"; + power-domains = <&pd_disp>; status = "disabled"; }; vadc: vadc@2228000 { reg = <0x02228000 0x4000>, <0x0222c000 0x4000>; reg-names = "vadc-vafe", "vadc-vdec"; clocks = <&clks IMX6SX_CLK_VADC>, <&clks IMX6SX_CLK_CSI>; clock-names = "vadc", "csi"; + power-domains = <&pd_disp>; status = "disabled"; }; }; adc1: adc@2280000 { @@ -1361,10 +1377,11 @@ clocks = <&clks IMX6SX_CLK_PCIE_AXI>, <&clks IMX6SX_CLK_LVDS1_OUT>, <&clks IMX6SX_CLK_PCIE_REF_125M>, <&clks IMX6SX_CLK_DISPLAY_AXI>; clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi"; - power-domains = <&pd_pci>; + power-domains = <&pd_disp>, <&pd_pci>; + power-domain-names = "pcie", "pcie_phy"; status = "disabled"; }; }; };