From patchwork Tue Oct 9 01:02:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Wanpeng Li X-Patchwork-Id: 10631739 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7E62314DB for ; Tue, 9 Oct 2018 01:02:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6EF0229CEA for ; Tue, 9 Oct 2018 01:02:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6079F29DE4; Tue, 9 Oct 2018 01:02:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1294E29CEA for ; Tue, 9 Oct 2018 01:02:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725947AbeJIIQg (ORCPT ); Tue, 9 Oct 2018 04:16:36 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:33925 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725794AbeJIIQf (ORCPT ); Tue, 9 Oct 2018 04:16:35 -0400 Received: by mail-pl1-f195.google.com with SMTP id f18-v6so10809528plr.1; Mon, 08 Oct 2018 18:02:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=dO0hGKlvzsvqDv1Q00o82/brddTfpWNNmVp2naSRJHM=; b=A+bjHuvxVyBlxkIRgbr/mxe8GjuzQ7s6IEBPN27uFnpWXIGXwvF8UYvgYUAZ4Z7eeZ u4pKVJnzL0ivyvyrL/ISSr/RniLu2pwWm917xv0nR76ojaM4guK3xoJA5ysh6T0/iA3Z kgpoq3I9b+VQso59FfxLTLNQKbr4pGc0L3BTXW3Mp6gLa+TN/MZOvOOfIc+/9N1SKKyP eAo6+TG4mBksSs4hhBJQiGuv79Yic5FNkvFChaRv3ytvTz9SI0cYVFF4PF/xUDDH5prs 00hY405D5jheskNwmUfziCOo6gkeCdvKZUbA5KfFrEFrQ+CqbzXfkiCe2+Mdq0Mvzq6M u9eQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=dO0hGKlvzsvqDv1Q00o82/brddTfpWNNmVp2naSRJHM=; b=ZSX+Jf931IGaOgb3m75Sy0Cf4O++H3IcPw9QzLPMMJzxN5MX1cDmFTSyUhmvtMysQs qWSpzsY2YdV6gC9G1Mpq6cCXEu5NxEoyyxPW4I4TR+lihioNWPtWfIlYOX3aC7+1Aa+Y OlR9BfoA82YQM3GJ4k130NjrLp1BaZFxolhrH9cr/kSIBgcYEgDpg173DJDE/iFQVo3P jK2N5MZhkn6FNYB/EQn3RDKi/95NmwOTYtU+pREhPmezr/b+mNn4hlGoyBRv47sBDHlk ZKfCGkoNRb+pm/wuF3V5pkIZBR+c6PajN/Lf5skNSgaElYzK1Hd97Kz3jj19Qdhrx25H 1QsA== X-Gm-Message-State: ABuFfogEXpbFFEFu/oSM6Rg91lCkmjvrH+KixY+Ze+hV1x27XCz7qLlM q1EQtV/T4tSa14WkNQ4A+Yt3YFNj X-Google-Smtp-Source: ACcGV60gfByK5H6hKhDG0jaEFAWhcX/EpUnW1QUA4tye4uXa3BvHtVCVVqZk2io3QPzs7NnGYREYVg== X-Received: by 2002:a17:902:8eca:: with SMTP id x10-v6mr26289430plo.336.1539046933601; Mon, 08 Oct 2018 18:02:13 -0700 (PDT) Received: from localhost.localdomain ([203.205.141.123]) by smtp.googlemail.com with ESMTPSA id y24-v6sm8980168pfn.123.2018.10.08.18.02.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 Oct 2018 18:02:13 -0700 (PDT) From: Wanpeng Li X-Google-Original-From: Wanpeng Li To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: Paolo Bonzini , =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= , Liran Alon Subject: [PATCH v2] KVM: LAPIC: Tune lapic_timer_advance_ns automatically Date: Tue, 9 Oct 2018 09:02:08 +0800 Message-Id: <1539046928-18600-1-git-send-email-wanpengli@tencent.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Wanpeng Li In cloud environment, lapic_timer_advance_ns is needed to be tuned for every CPU generations, and every host kernel versions(the kvm-unit-tests/tscdeadline_latency.flat is 5700 cycles for upstream kernel and 9600 cycles for our 3.10 product kernel, both preemption_timer=N, Skylake server). This patch adds the capability to automatically tune lapic_timer_advance_ns step by step, the initial value is 1000ns as 'commit d0659d946be0 ("KVM: x86: add option to advance tscdeadline hrtimer expiration")' recommended, it will be reduced when it is too early, and increased when it is too late. The guest_tsc and tsc_deadline are hard to equal, so we assume we are done when the delta is within a small scope e.g. 100 cycles. This patch reduces latency (kvm-unit-tests/tscdeadline_latency, busy waits, preemption_timer enabled) from ~2600 cyles to ~1200 cyles on our Skylake server. Cc: Paolo Bonzini Cc: Radim Krčmář Cc: Liran Alon Signed-off-by: Wanpeng Li --- v1 -> v2: * converts between guest TSC units to host nanoseconds correctly * put hard-coded numbers to #define arch/x86/kvm/lapic.c | 25 ++++++++++++++++++++++++- arch/x86/kvm/x86.c | 2 +- 2 files changed, 25 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index fbb0e6d..197cf5d 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -70,6 +70,11 @@ #define APIC_BROADCAST 0xFF #define X2APIC_BROADCAST 0xFFFFFFFFul +static bool lapic_timer_advance_adjust_done = false; +#define LAPIC_TIMER_ADVANCE_ADJUST_DONE 100 +/* step-by-step approximation to mitigate fluctuation */ +#define LAPIC_TIMER_ADVANCE_ADJUST_STEP 8 + static inline int apic_test_vector(int vec, void *bitmap) { return test_bit(VEC_POS(vec), (bitmap) + REG_POS(vec)); @@ -1472,7 +1477,7 @@ static bool lapic_timer_int_injected(struct kvm_vcpu *vcpu) void wait_lapic_expire(struct kvm_vcpu *vcpu) { struct kvm_lapic *apic = vcpu->arch.apic; - u64 guest_tsc, tsc_deadline; + u64 guest_tsc, tsc_deadline, ns; if (!lapic_in_kernel(vcpu)) return; @@ -1492,6 +1497,24 @@ void wait_lapic_expire(struct kvm_vcpu *vcpu) if (guest_tsc < tsc_deadline) __delay(min(tsc_deadline - guest_tsc, nsec_to_cycles(vcpu, lapic_timer_advance_ns))); + + if (!lapic_timer_advance_adjust_done) { + /* too early */ + if (guest_tsc < tsc_deadline) { + ns = (tsc_deadline - guest_tsc) * 1000000ULL; + do_div(ns, vcpu->arch.virtual_tsc_khz); + lapic_timer_advance_ns -= min((unsigned int)ns, + lapic_timer_advance_ns / LAPIC_TIMER_ADVANCE_ADJUST_STEP); + } else { + /* too late */ + ns = (guest_tsc - tsc_deadline) * 1000000ULL; + do_div(ns, vcpu->arch.virtual_tsc_khz); + lapic_timer_advance_ns += min((unsigned int)ns, + lapic_timer_advance_ns / LAPIC_TIMER_ADVANCE_ADJUST_STEP); + } + if (abs(guest_tsc - tsc_deadline) < LAPIC_TIMER_ADVANCE_ADJUST_DONE) + lapic_timer_advance_adjust_done = true; + } } static void start_sw_tscdeadline(struct kvm_lapic *apic) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index ca71773..1f3f955 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -136,7 +136,7 @@ static u32 __read_mostly tsc_tolerance_ppm = 250; module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR); /* lapic timer advance (tscdeadline mode only) in nanoseconds */ -unsigned int __read_mostly lapic_timer_advance_ns = 0; +unsigned int __read_mostly lapic_timer_advance_ns = 1000; module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR); EXPORT_SYMBOL_GPL(lapic_timer_advance_ns);