From patchwork Fri May 8 20:41:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Semwal X-Patchwork-Id: 11537557 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B191081 for ; Fri, 8 May 2020 20:42:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 99C4524958 for ; Fri, 8 May 2020 20:42:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="DpwtSGfU" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727819AbgEHUmo (ORCPT ); Fri, 8 May 2020 16:42:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727820AbgEHUmo (ORCPT ); Fri, 8 May 2020 16:42:44 -0400 Received: from mail-pj1-x1043.google.com (mail-pj1-x1043.google.com [IPv6:2607:f8b0:4864:20::1043]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 25405C05BD43 for ; Fri, 8 May 2020 13:42:44 -0700 (PDT) Received: by mail-pj1-x1043.google.com with SMTP id a5so4828361pjh.2 for ; Fri, 08 May 2020 13:42:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=v/kJOzHQVNztoa88Zqa893txGdJr3NbK0Uy6cZ9N+p4=; b=DpwtSGfUSL9CaKsXqVEz6+TLkdcWRpU57TbJQD2eIMJuVeMUFx37rOlwnIXKjG0zg1 +T9J0pJVRIGiPFPXLEG2zpm4A7vsYF252Wlid8+YjZBVRvYfbOs2dz7Qpb/m5iRtWtlK VvZG3TgTNpJq7gSlWQlFU0fi8IsfhcBGaKSY0ikVodZYDbeUbOJinlO3Y+N2eR4u2ISv +SlnwR1RvQ+7JDhuoTMdWxwG2DJuiimRfvT8+B8F2ZnkmQKYNDLRpSXcAAWBJ5R5EMd5 z/M2wfmFJT4uyoxKQwU6JiCkKwCF0XQPOUaRuzoK+hO9E2951WDCcYkuMAbpCZrpyWQW devQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=v/kJOzHQVNztoa88Zqa893txGdJr3NbK0Uy6cZ9N+p4=; b=XPTHafncL3KRIm1AfIsmBdZ0/aHr5BPC7nhajY3qFb/5X9sd6gFMk4R71VTMvjZFFe z9FUJali2D7HhBWSnAhgLqRINx0/Jv5EPVaCj9vGTl0g8PuL7GAGqnGe73xdo1f+3Aiv bp/BfRkJpw13bmuF6HWneKNy2I6c5i0YAajh5WkrqzORTtHlWCXCpaZvqORa/9uuc1JN 1KzmFG0EekzGGIM6EA1wXvx6z4W81azo4WIPjgOWMh+pb5Ba+NOVGXZFPjSHyEQV3H8s I/QmO4fLos7S1peMBugDNHohtm2rW7SIwT5io0tpWD1LNk/xejhwF+meMUx7hMV0hiDg VLSQ== X-Gm-Message-State: AGi0Pub+VFSJMA1V5vr0e8CE+LUz7cQPKKqCuDcgxqRa3OIci1Mxg2cz O7DfMO9fWBLYizoWgsEggGKR7w== X-Google-Smtp-Source: APiQypJAb3f+QC64YiN7o7OeDguzr0+81s7Vq9M944QMiAehMTcBe6OBqfD9/1Clsaudgtub5c7lTA== X-Received: by 2002:a17:90b:8c8:: with SMTP id ds8mr7896979pjb.164.1588970563609; Fri, 08 May 2020 13:42:43 -0700 (PDT) Received: from nagraj.local ([49.206.21.239]) by smtp.gmail.com with ESMTPSA id h191sm2670720pfe.44.2020.05.08.13.42.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2020 13:42:43 -0700 (PDT) From: Sumit Semwal To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org Cc: nishakumari@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kgunda@codeaurora.org, rnayak@codeaurora.org, Sumit Semwal Subject: [v2 1/4] dt-bindings: regulator: Add labibb regulator Date: Sat, 9 May 2020 02:11:57 +0530 Message-Id: <20200508204200.13481-2-sumit.semwal@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200508204200.13481-1-sumit.semwal@linaro.org> References: <20200508204200.13481-1-sumit.semwal@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Nisha Kumari Adding the devicetree binding for labibb regulator. Signed-off-by: Nisha Kumari Signed-off-by: Sumit Semwal --- v2: updated for better compatible string and names. --- .../regulator/qcom-labibb-regulator.txt | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.txt diff --git a/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.txt new file mode 100644 index 000000000000..6e639d69f780 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.txt @@ -0,0 +1,47 @@ +Qualcomm's LAB(LCD AMOLED Boost)/IBB(Inverting Buck Boost) Regulator + +LAB can be used as a positive boost power supply and IBB can be used as a negative +boost power supply for display panels. Currently implemented for pmi8998. + +Main node required properties: + +- compatible: Must be: + "qcom,pmi8998-lab-ibb" +- #address-cells: Must be 1 +- #size-cells: Must be 0 + +LAB subnode required properties: + +- interrupts: Specify the interrupts as per the interrupt + encoding. +- interrupt-names: Interrupt names to match up 1-to-1 with + the interrupts specified in 'interrupts' + property. + +IBB subnode required properties: + +- interrupts: Specify the interrupts as per the interrupt + encoding. +- interrupt-names: Interrupt names to match up 1-to-1 with + the interrupts specified in 'interrupts' + property. + +Example: + pmi8998_lsid1: pmic@3 { + labibb { + compatible = "qcom,pmi8998-lab-ibb"; + #address-cells = <1>; + #size-cells = <0>; + + lab: lab { + interrupts = <0x3 0xde 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "lab-sc-err"; + }; + + ibb: ibb { + interrupts = <0x3 0xdc 0x2 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "ibb-sc-err"; + }; + + }; + }; From patchwork Fri May 8 20:41:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Semwal X-Patchwork-Id: 11537559 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C3F3181 for ; Fri, 8 May 2020 20:42:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A8B3724953 for ; Fri, 8 May 2020 20:42:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="IXun7LEV" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727893AbgEHUmu (ORCPT ); Fri, 8 May 2020 16:42:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49948 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727869AbgEHUmt (ORCPT ); Fri, 8 May 2020 16:42:49 -0400 Received: from mail-pl1-x641.google.com (mail-pl1-x641.google.com [IPv6:2607:f8b0:4864:20::641]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 15D8EC05BD09 for ; Fri, 8 May 2020 13:42:48 -0700 (PDT) Received: by mail-pl1-x641.google.com with SMTP id u10so1243677pls.8 for ; Fri, 08 May 2020 13:42:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=36T3AexsEvJt3RwH4PGXPZ6diqwO7avxWsaGFQ+MiUU=; b=IXun7LEV/KCObJbWlEipA5gWF/0RqU589NAogylgVxXAo9uExeDt7/ZMkcO+JF1EhY Ax7UAeqHqJRKkZFSfRJb1fSbhmNQiB+CDeUK4s2UKs0/3PmMBP418rUEQayAGhavtfdH UYV8mI7q5MgdZ/Esq5XSgiMZmil3I0hJ1RCIuS59eQlpxDlC6ln0I6Xoo29Fo1C8HYxT NwxS9v7R2jII7pSapPQxYkCr+alc++pNSgwwYLDlGqEFcixdfY6Fc2druoUHBvauYnZp ANEIscVwq7ygyLO6RDQ0JKXlauzrw2Buq1bqzKjr937GQ2AU3s/6KxawREQh3Ty0Rr6Q 6u2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=36T3AexsEvJt3RwH4PGXPZ6diqwO7avxWsaGFQ+MiUU=; b=eewxUVzyca0RJBJdkIYP8kEWvwOdhS8WAc5NBZ2Q2h4lmEzjfemHLj+XDOdmJGDdHy k90Ha8BGay8cI4G5yfQN9d/jwPUX6NS3let6uEK6nJj+8uo1mpdSfHbn+CcLIiIdcU9U K7/H5mMiQR6EOgLxz5rbqAdtOgUEAorKJecsx4P/mQX4jtmdGbqxBhaR8YqZYGdbBwOM gRWgYlEUoqpDhDrkeHLqvLmRsJiawb4o2q9P9yHjx6ZR0NJjYXD0yUb0OLn4YJmTw/YE n39tsg0+gEjFJzlIVUAGDyMw/rTi5Xm1ZKShF9OWyGAuVhs2r/uX4rtm6BE8eTlZ31OS oQzQ== X-Gm-Message-State: AGi0PuYq601yGNyS38gUmamFIyIOMhdRUR1sURJIheRIRLFZNRbdEuzW Ml75cgCPsBS/EY0rYFSgUNLfDg== X-Google-Smtp-Source: APiQypLPsB4dZpyQcDbE16I1dJ9tOnKU2QRZoZ5LoQLGaOOTYPDgmkFUqpg2GkLCM+yuGukSbDFJQw== X-Received: by 2002:a17:902:598e:: with SMTP id p14mr4314155pli.30.1588970567490; Fri, 08 May 2020 13:42:47 -0700 (PDT) Received: from nagraj.local ([49.206.21.239]) by smtp.gmail.com with ESMTPSA id h191sm2670720pfe.44.2020.05.08.13.42.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2020 13:42:46 -0700 (PDT) From: Sumit Semwal To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org Cc: nishakumari@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kgunda@codeaurora.org, rnayak@codeaurora.org, Sumit Semwal Subject: [v2 2/4] arm64: dts: qcom: pmi8998: Add nodes for LAB and IBB regulators Date: Sat, 9 May 2020 02:11:58 +0530 Message-Id: <20200508204200.13481-3-sumit.semwal@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200508204200.13481-1-sumit.semwal@linaro.org> References: <20200508204200.13481-1-sumit.semwal@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Nisha Kumari This patch adds devicetree nodes for LAB and IBB regulators. Signed-off-by: Nisha Kumari Signed-off-by: Sumit Semwal --- v2: [sumits]: updated for better compatible string and names --- arch/arm64/boot/dts/qcom/pmi8998.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pmi8998.dtsi b/arch/arm64/boot/dts/qcom/pmi8998.dtsi index 23f9146a161e..72dc5f0db3ca 100644 --- a/arch/arm64/boot/dts/qcom/pmi8998.dtsi +++ b/arch/arm64/boot/dts/qcom/pmi8998.dtsi @@ -25,5 +25,21 @@ pmi8998_lsid1: pmic@3 { reg = <0x3 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + + labibb: labibb { + compatible = "qcom,pmi8998-lab-ibb"; + #address-cells = <1>; + #size-cells = <0>; + + ibb: ibb { + interrupts = <0x3 0xdc 0x2 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "ibb-sc-err"; + }; + + lab: lab { + interrupts = <0x3 0xde 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "lab-sc-err"; + }; + }; }; }; From patchwork Fri May 8 20:41:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Semwal X-Patchwork-Id: 11537561 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BE2AA81 for ; Fri, 8 May 2020 20:42:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9BCEC218AC for ; Fri, 8 May 2020 20:42:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="nsg+fNO+" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727898AbgEHUmw (ORCPT ); Fri, 8 May 2020 16:42:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727869AbgEHUmw (ORCPT ); Fri, 8 May 2020 16:42:52 -0400 Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13BF1C05BD09 for ; Fri, 8 May 2020 13:42:52 -0700 (PDT) Received: by mail-pf1-x444.google.com with SMTP id p25so1536105pfn.11 for ; Fri, 08 May 2020 13:42:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SVjbZlHrSVv9m2cwhBcBLc6LEjcvRx6+IGpIi6KYIyE=; b=nsg+fNO+AZ1XW5nJWEXP8JVFjWOy9vRiTFuxosPSb58u/uwHDH4Ep55V5j2iNPFVx/ CYEpALPa7q+EGRgoAobwFDNpj/Fk+RVaocf8579+b1dj3DOFbBixyfcZz7gdkpVq78RC DRZa79VoCPcsD3aYFNwfmCyvcvQlaXtIltFy03n5iKNhKhiCYPDorQXHjQ42ijROgCxR Qnfmy64wnaVUFTV9LhAyhWIM5UK9WHfExO6CogxJrNgavMerAcTYQXHEB9VJlZTsR3J1 CVCcNhnTApiOAk2yNb3TIfm4VNa+qScfC279+0SoF+sq/LqIaZPf+pS3EJRsQ6u7KfW+ 86Bw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SVjbZlHrSVv9m2cwhBcBLc6LEjcvRx6+IGpIi6KYIyE=; b=D084D3SR8Zvzwe7Bxu99uXvSyTkr0F133Ks9ILpTFpK+/hkwbFVbra8CeqoEjZ0/Zd oolhPWjxzPFlKej3bNTv9Vu2UWlwPst15sP+2qHigx/QliscAvjlZLSmaNgMPJZ1wUfj aS9zVau81Jbz9hQkw4wCAyPNtp1L3fz81BcKWiyOwIEd+P652+yzbyT7m7/M+Abc82Js nr520e190LMkZ37wMLli2cIz+5SlnX3oU1cysEnK/2fXmcpZVzBK065tOSlaQwV0IVQb tisEzmSlQSq4Wp87LGtkXfPXKO602XCIBnSjjP6/2qDhqgpY6XhU1oDdvozIFasYROz2 wpHg== X-Gm-Message-State: AGi0PuYkqkS1qSMXV7BL1qROTMtV1rWfzmyT4SHiD831gUauhqa9tXEa cu/SwTmel1BAPCER9Lb3irPOMA== X-Google-Smtp-Source: APiQypKRiZiS4d2dDsEoLlGqOHsfzXEJEctb3Zb7RvUKglVOqO9hrCuwwLZAF3uJ6DOWLSOn5m/sfQ== X-Received: by 2002:a63:3c4b:: with SMTP id i11mr3548334pgn.179.1588970571453; Fri, 08 May 2020 13:42:51 -0700 (PDT) Received: from nagraj.local ([49.206.21.239]) by smtp.gmail.com with ESMTPSA id h191sm2670720pfe.44.2020.05.08.13.42.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2020 13:42:50 -0700 (PDT) From: Sumit Semwal To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org Cc: nishakumari@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kgunda@codeaurora.org, rnayak@codeaurora.org, Sumit Semwal Subject: [v2 3/4] regulator: qcom: Add labibb driver Date: Sat, 9 May 2020 02:11:59 +0530 Message-Id: <20200508204200.13481-4-sumit.semwal@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200508204200.13481-1-sumit.semwal@linaro.org> References: <20200508204200.13481-1-sumit.semwal@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Nisha Kumari Qualcomm platforms have LAB(LCD AMOLED Boost)/IBB(Inverting Buck Boost) Regulators, labibb for short, which are used as power supply for LCD Mode displays. This patch adds labibb regulator driver for pmi8998 pmic, found on SDM845 platforms. Signed-off-by: Nisha Kumari Signed-off-by: Sumit Semwal --- v2: sumits: reworked the driver for more common code, and addressed review comments from v1. This includes merging regulator_ops into one, and allowing for future labibb variations. --- drivers/regulator/Kconfig | 10 + drivers/regulator/Makefile | 1 + drivers/regulator/qcom-labibb-regulator.c | 288 ++++++++++++++++++++++ 3 files changed, 299 insertions(+) create mode 100644 drivers/regulator/qcom-labibb-regulator.c diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index f4b72cb098ef..58704a9fd05d 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -1167,5 +1167,15 @@ config REGULATOR_WM8994 This driver provides support for the voltage regulators on the WM8994 CODEC. +config REGULATOR_QCOM_LABIBB + tristate "QCOM LAB/IBB regulator support" + depends on SPMI || COMPILE_TEST + help + This driver supports Qualcomm's LAB/IBB regulators present on the + Qualcomm's PMIC chip pmi8998. QCOM LAB and IBB are SPMI + based PMIC implementations. LAB can be used as positive + boost regulator and IBB can be used as a negative boost regulator + for LCD display panel. + endif diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 6610ee001d9a..5b313786c0e8 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -87,6 +87,7 @@ obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o obj-$(CONFIG_REGULATOR_MT6380) += mt6380-regulator.o obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o +obj-$(CONFIG_REGULATOR_QCOM_LABIBB) += qcom-labibb-regulator.o obj-$(CONFIG_REGULATOR_QCOM_RPM) += qcom_rpm-regulator.o obj-$(CONFIG_REGULATOR_QCOM_RPMH) += qcom-rpmh-regulator.o obj-$(CONFIG_REGULATOR_QCOM_SMD_RPM) += qcom_smd-regulator.o diff --git a/drivers/regulator/qcom-labibb-regulator.c b/drivers/regulator/qcom-labibb-regulator.c new file mode 100644 index 000000000000..a9dc7c060375 --- /dev/null +++ b/drivers/regulator/qcom-labibb-regulator.c @@ -0,0 +1,288 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2019, The Linux Foundation. All rights reserved. + +#include +#include +#include +#include +#include +#include +#include +#include + +#define REG_PERPH_TYPE 0x04 +#define QCOM_LAB_TYPE 0x24 +#define QCOM_IBB_TYPE 0x20 + +#define REG_LABIBB_STATUS1 0x08 +#define REG_LABIBB_ENABLE_CTL 0x46 +#define LABIBB_STATUS1_VREG_OK_BIT BIT(7) +#define LABIBB_CONTROL_ENABLE BIT(7) + +#define LAB_ENABLE_CTL_MASK BIT(7) +#define IBB_ENABLE_CTL_MASK (BIT(7) | BIT(6)) + +#define POWER_DELAY 8000 + +struct labibb_regulator { + struct regulator_desc desc; + struct device *dev; + struct regmap *regmap; + struct regulator_dev *rdev; + u16 base; + u8 type; +}; + +struct qcom_labibb { + struct device *dev; + struct regmap *regmap; + struct labibb_regulator lab; + struct labibb_regulator ibb; +}; + +struct labibb_regulator_data { + u16 base; + const char *name; + const char *irq_name; + u8 type; +}; + +static int qcom_labibb_regulator_is_enabled(struct regulator_dev *rdev) +{ + int ret; + u8 val; + struct labibb_regulator *reg = rdev_get_drvdata(rdev); + + ret = regmap_bulk_read(reg->regmap, reg->base + + REG_LABIBB_STATUS1, &val, 1); + if (ret < 0) { + dev_err(reg->dev, "Read register failed ret = %d\n", ret); + return ret; + } + + if (val & LABIBB_STATUS1_VREG_OK_BIT) + return 1; + else + return 0; +} + +static int _check_enabled_with_retries(struct regulator_dev *rdev, + int retries, int enabled) +{ + int ret; + struct labibb_regulator *reg = rdev_get_drvdata(rdev); + + while (retries--) { + /* Wait for a small period before checking REG_LABIBB_STATUS1 */ + usleep_range(POWER_DELAY, POWER_DELAY + 200); + + ret = qcom_labibb_regulator_is_enabled(rdev); + + if (ret < 0) { + dev_err(reg->dev, "Can't read %s regulator status\n", + reg->desc.name); + return ret; + } + + if (ret == enabled) + return ret; + + } + + return -EINVAL; +} + +static int qcom_labibb_regulator_enable(struct regulator_dev *rdev) +{ + int ret, retries = 10; + struct labibb_regulator *reg = rdev_get_drvdata(rdev); + + ret = regulator_enable_regmap(rdev); + + if (ret < 0) { + dev_err(reg->dev, "Write failed: enable %s regulator\n", + reg->desc.name); + return ret; + } + + ret = _check_enabled_with_retries(rdev, retries, 1); + if (ret < 0) { + dev_err(reg->dev, "retries exhausted: enable %s regulator\n", + reg->desc.name); + return ret; + } + + if (ret) + return 0; + + + dev_err(reg->dev, "Can't enable %s\n", reg->desc.name); + return -EINVAL; +} + +static int qcom_labibb_regulator_disable(struct regulator_dev *rdev) +{ + int ret, retries = 2; + struct labibb_regulator *reg = rdev_get_drvdata(rdev); + + ret = regulator_disable_regmap(rdev); + + if (ret < 0) { + dev_err(reg->dev, "Write failed: disable %s regulator\n", + reg->desc.name); + return ret; + } + + ret = _check_enabled_with_retries(rdev, retries, 0); + if (ret < 0) { + dev_err(reg->dev, "retries exhausted: disable %s regulator\n", + reg->desc.name); + return ret; + } + + if (!ret) + return 0; + + dev_err(reg->dev, "Can't disable %s\n", reg->desc.name); + return -EINVAL; +} + +static struct regulator_ops qcom_labibb_ops = { + .enable = qcom_labibb_regulator_enable, + .disable = qcom_labibb_regulator_disable, + .is_enabled = qcom_labibb_regulator_is_enabled, +}; + +static int register_labibb_regulator(struct qcom_labibb *labibb, + const struct labibb_regulator_data *reg_data, + struct device_node *of_node) +{ + int ret; + struct labibb_regulator *reg; + struct regulator_config cfg = {}; + + if (reg_data->type == QCOM_LAB_TYPE) { + reg = &labibb->lab; + reg->desc.enable_mask = LAB_ENABLE_CTL_MASK; + } else { + reg = &labibb->ibb; + reg->desc.enable_mask = IBB_ENABLE_CTL_MASK; + } + + reg->dev = labibb->dev; + reg->base = reg_data->base; + reg->type = reg_data->type; + reg->regmap = labibb->regmap; + reg->desc.enable_reg = reg->base + REG_LABIBB_ENABLE_CTL; + reg->desc.enable_val = LABIBB_CONTROL_ENABLE; + reg->desc.of_match = reg_data->name; + reg->desc.name = reg_data->name; + reg->desc.owner = THIS_MODULE; + reg->desc.type = REGULATOR_VOLTAGE; + reg->desc.ops = &qcom_labibb_ops; + + cfg.dev = labibb->dev; + cfg.driver_data = reg; + cfg.regmap = labibb->regmap; + cfg.of_node = of_node; + + reg->rdev = devm_regulator_register(labibb->dev, ®->desc, + &cfg); + if (IS_ERR(reg->rdev)) { + ret = PTR_ERR(reg->rdev); + dev_err(labibb->dev, + "unable to register %s regulator\n", reg_data->name); + return ret; + } + return 0; +} + +static const struct labibb_regulator_data pmi8998_labibb_data[] = { + {0xde00, "lab", "lab-sc-err", QCOM_LAB_TYPE}, + {0xdc00, "ibb", "ibb-sc-err", QCOM_IBB_TYPE}, + { }, +}; + +static const struct of_device_id qcom_labibb_match[] = { + { .compatible = "qcom,pmi8998-lab-ibb", .data = &pmi8998_labibb_data}, + { }, +}; +MODULE_DEVICE_TABLE(of, qcom_labibb_match); + +static int qcom_labibb_regulator_probe(struct platform_device *pdev) +{ + struct qcom_labibb *labibb; + struct device_node *child; + const struct of_device_id *match; + const struct labibb_regulator_data *reg; + u8 type; + int ret; + + labibb = devm_kzalloc(&pdev->dev, sizeof(*labibb), GFP_KERNEL); + if (!labibb) + return -ENOMEM; + + labibb->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!labibb->regmap) { + dev_err(&pdev->dev, "Couldn't get parent's regmap\n"); + return -ENODEV; + } + + labibb->dev = &pdev->dev; + + match = of_match_device(qcom_labibb_match, &pdev->dev); + if (!match) + return -ENODEV; + + for (reg = match->data; reg->name; reg++) { + child = of_get_child_by_name(pdev->dev.of_node, reg->name); + + /* TODO: This validates if the type of regulator is indeed + * what's mentioned in DT. + * I'm not sure if this is needed, but we'll keep it for now. + */ + ret = regmap_bulk_read(labibb->regmap, + reg->base + REG_PERPH_TYPE, + &type, 1); + if (ret < 0) { + dev_err(labibb->dev, + "Peripheral type read failed ret=%d\n", + ret); + return -EINVAL; + } + + if ((type != QCOM_LAB_TYPE) && (type != QCOM_IBB_TYPE)) { + dev_err(labibb->dev, + "qcom_labibb: unknown peripheral type\n"); + return -EINVAL; + } else if (type != reg->type) { + dev_err(labibb->dev, + "qcom_labibb: type read %x doesn't match DT %x\n", + type, reg->type); + return -EINVAL; + } + + ret = register_labibb_regulator(labibb, reg, child); + if (ret < 0) { + dev_err(&pdev->dev, + "qcom_labibb: error registering %s regulator: %d\n", + child->full_name, ret); + return ret; + } + } + + dev_set_drvdata(&pdev->dev, labibb); + return 0; +} + +static struct platform_driver qcom_labibb_regulator_driver = { + .driver = { + .name = "qcom-lab-ibb-regulator", + .of_match_table = qcom_labibb_match, + }, + .probe = qcom_labibb_regulator_probe, +}; +module_platform_driver(qcom_labibb_regulator_driver); + +MODULE_DESCRIPTION("Qualcomm labibb driver"); +MODULE_LICENSE("GPL v2"); From patchwork Fri May 8 20:42:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Semwal X-Patchwork-Id: 11537563 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D4A4181 for ; Fri, 8 May 2020 20:42:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B71462496B for ; Fri, 8 May 2020 20:42:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="jvPyzxVG" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727922AbgEHUm4 (ORCPT ); Fri, 8 May 2020 16:42:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727912AbgEHUmz (ORCPT ); Fri, 8 May 2020 16:42:55 -0400 Received: from mail-pl1-x644.google.com (mail-pl1-x644.google.com [IPv6:2607:f8b0:4864:20::644]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D8D64C05BD43 for ; Fri, 8 May 2020 13:42:55 -0700 (PDT) Received: by mail-pl1-x644.google.com with SMTP id m7so1248303plt.5 for ; Fri, 08 May 2020 13:42:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DBvISRtpj6ZqDP4JNGI7EM2+JDDMjKa0Ql2Nl6B4K8c=; b=jvPyzxVGco9HTkHQkxsTY3p+qIGeyEvgudaaAcCJFYldGgN96fd6jlMbM+k3MIO6sP GTDlp98gYKOoOkFPYRyoOPG+cZduT4/VcGbvP6/oRRnh78tssG8N0uqPdhOCF0a0TBMq xLs9F1CqmUh15ju+uyC4griAqlcVk6bns23fk/6Hr15MYzdNJpLtmz6kz2t95lEXU4d/ lwKjN7pMYujqMl/hg0Wsn4+ZtfeaHvc8Qz4AXckC6sT+TOAJILMg6ATBWr+4T/VtDiud gYu0yx8sSQqlMrITsgpKoeJyQ8l4BBIUS7A8e+4VwDOlytZQ7ZTETNNZlb9nAWEH7z/w Vm8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DBvISRtpj6ZqDP4JNGI7EM2+JDDMjKa0Ql2Nl6B4K8c=; b=Fu6mkOjVQbhUeb5//qhQ+xgaSk5z3fcoQnE2yLkBc2yXqPh7GKhu0o5v3K1vkfV8Qb +tMMAYzuKUqTtMi/+2fCU9vO2B5PpN0jx2EK1UJyJYnyxefN2yuk3QTpLiS7LN96AuB2 UsQJ5L9PW1Aacjvc+bKbq4gtFf+y7vvmdRk+iJXxyQEUzX1hFlV86fjPc3CaBAo1tmyL 9FDwQpbq48/efE3A4SVpeptvHpJZ7rHMTCcFl6N0cRJFvGOfeJF8VDZR3bqnPlGB60lc HIMN88hAuPEidJAwpEhApYn2H4I740UQlha+p7rnpNNriyqoCaGh29r5j6ePwFwxKuWa dSlA== X-Gm-Message-State: AGi0PuZVa4zR4vr4qj8viZtht/mD7dMdnr+He+jgxbUTCc0ZiGsTUwWx IDj2PvoV4PTJs/698B8drG6w6Q== X-Google-Smtp-Source: APiQypLV5wFjcNDBDTnRo4F/SCWSkSNmFNrTDkI8vtbYEwihD8GVHkCxIzqXEOFp/ECNQVc0NaxUnA== X-Received: by 2002:a17:90a:d703:: with SMTP id y3mr7955493pju.75.1588970575321; Fri, 08 May 2020 13:42:55 -0700 (PDT) Received: from nagraj.local ([49.206.21.239]) by smtp.gmail.com with ESMTPSA id h191sm2670720pfe.44.2020.05.08.13.42.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2020 13:42:54 -0700 (PDT) From: Sumit Semwal To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org Cc: nishakumari@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kgunda@codeaurora.org, rnayak@codeaurora.org, Sumit Semwal Subject: [v2 4/4] regulator: qcom: labibb: Add SC interrupt handling Date: Sat, 9 May 2020 02:12:00 +0530 Message-Id: <20200508204200.13481-5-sumit.semwal@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200508204200.13481-1-sumit.semwal@linaro.org> References: <20200508204200.13481-1-sumit.semwal@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Nisha Kumari Add Short circuit interrupt handling and recovery for the lab and ibb regulators on qcom platforms. The client panel drivers need to register for REGULATOR_EVENT_OVER_CURRENT notification which will be triggered on short circuit. They should try to enable the regulator once, and if it doesn't get enabled, handle shutting down the panel accordingly. Signed-off-by: Nisha Kumari Signed-off-by: Sumit Semwal --- v2: sumits: reworked handling to user regmap_read_poll_timeout, and handle it per-regulator instead of clearing both lab and ibb errors on either irq triggering. Also added REGULATOR_EVENT_OVER_CURRENT handling and notification to clients. --- drivers/regulator/qcom-labibb-regulator.c | 103 +++++++++++++++++++++- 1 file changed, 100 insertions(+), 3 deletions(-) diff --git a/drivers/regulator/qcom-labibb-regulator.c b/drivers/regulator/qcom-labibb-regulator.c index a9dc7c060375..3539631c9f96 100644 --- a/drivers/regulator/qcom-labibb-regulator.c +++ b/drivers/regulator/qcom-labibb-regulator.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2019, The Linux Foundation. All rights reserved. +#include #include #include #include @@ -18,11 +19,15 @@ #define REG_LABIBB_ENABLE_CTL 0x46 #define LABIBB_STATUS1_VREG_OK_BIT BIT(7) #define LABIBB_CONTROL_ENABLE BIT(7) +#define LABIBB_STATUS1_SC_DETECT_BIT BIT(6) #define LAB_ENABLE_CTL_MASK BIT(7) #define IBB_ENABLE_CTL_MASK (BIT(7) | BIT(6)) #define POWER_DELAY 8000 +#define POLLING_SCP_DONE_INTERVAL_US 5000 +#define POLLING_SCP_TIMEOUT 16000 + struct labibb_regulator { struct regulator_desc desc; @@ -30,6 +35,8 @@ struct labibb_regulator { struct regmap *regmap; struct regulator_dev *rdev; u16 base; + int sc_irq; + int vreg_enabled; u8 type; }; @@ -112,9 +119,10 @@ static int qcom_labibb_regulator_enable(struct regulator_dev *rdev) return ret; } - if (ret) + if (ret) { + reg->vreg_enabled = 1; return 0; - + } dev_err(reg->dev, "Can't enable %s\n", reg->desc.name); return -EINVAL; @@ -140,8 +148,10 @@ static int qcom_labibb_regulator_disable(struct regulator_dev *rdev) return ret; } - if (!ret) + if (!ret) { + reg->vreg_enabled = 0; return 0; + } dev_err(reg->dev, "Can't disable %s\n", reg->desc.name); return -EINVAL; @@ -153,6 +163,70 @@ static struct regulator_ops qcom_labibb_ops = { .is_enabled = qcom_labibb_regulator_is_enabled, }; + +static irqreturn_t labibb_sc_err_handler(int irq, void *_reg) +{ + int ret, count; + u16 reg; + u8 sc_err_mask; + unsigned int val; + struct labibb_regulator *labibb_reg = (struct labibb_regulator *)_reg; + bool in_sc_err, reg_en, scp_done = false; + + if (irq == labibb_reg->sc_irq) + reg = labibb_reg->base + REG_LABIBB_STATUS1; + else + return IRQ_HANDLED; + + sc_err_mask = LABIBB_STATUS1_SC_DETECT_BIT; + + ret = regmap_bulk_read(labibb_reg->regmap, reg, &val, 1); + if (ret < 0) { + dev_err(labibb_reg->dev, "Read failed, ret=%d\n", ret); + return IRQ_HANDLED; + } + dev_dbg(labibb_reg->dev, "%s SC error triggered! STATUS1 = %d\n", + labibb_reg->desc.name, val); + + in_sc_err = !!(val & sc_err_mask); + + /* + * The SC(short circuit) fault would trigger PBS(Portable Batch + * System) to disable regulators for protection. This would + * cause the SC_DETECT status being cleared so that it's not + * able to get the SC fault status. + * Check if the regulator is enabled in the driver but + * disabled in hardware, this means a SC fault had happened + * and SCP handling is completed by PBS. + */ + if (!in_sc_err) { + + reg = labibb_reg->base + REG_LABIBB_ENABLE_CTL; + + ret = regmap_read_poll_timeout(labibb_reg->regmap, + reg, val, + !(val & LABIBB_CONTROL_ENABLE), + POLLING_SCP_DONE_INTERVAL_US, + POLLING_SCP_TIMEOUT); + + if (!ret && labibb_reg->vreg_enabled) { + dev_dbg(labibb_reg->dev, + "%s has been disabled by SCP\n", + labibb_reg->desc.name); + scp_done = true; + } + } + + if (in_sc_err || scp_done) { + regulator_lock(labibb_reg->rdev); + regulator_notifier_call_chain(labibb_reg->rdev, + REGULATOR_EVENT_OVER_CURRENT, + NULL); + regulator_unlock(labibb_reg->rdev); + } + return IRQ_HANDLED; +} + static int register_labibb_regulator(struct qcom_labibb *labibb, const struct labibb_regulator_data *reg_data, struct device_node *of_node) @@ -181,6 +255,29 @@ static int register_labibb_regulator(struct qcom_labibb *labibb, reg->desc.type = REGULATOR_VOLTAGE; reg->desc.ops = &qcom_labibb_ops; + reg->sc_irq = -EINVAL; + ret = of_irq_get_byname(of_node, reg_data->irq_name); + if (ret < 0) + dev_dbg(labibb->dev, + "Unable to get %s, ret = %d\n", + reg_data->irq_name, ret); + else + reg->sc_irq = ret; + + if (reg->sc_irq > 0) { + ret = devm_request_threaded_irq(labibb->dev, + reg->sc_irq, + NULL, labibb_sc_err_handler, + IRQF_ONESHOT | + IRQF_TRIGGER_RISING, + reg_data->irq_name, labibb); + if (ret) { + dev_err(labibb->dev, "Failed to register '%s' irq ret=%d\n", + reg_data->irq_name, ret); + return ret; + } + } + cfg.dev = labibb->dev; cfg.driver_data = reg; cfg.regmap = labibb->regmap;