From patchwork Tue Oct 9 15:41:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yishai Hadas X-Patchwork-Id: 10632895 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D02CC112B for ; Tue, 9 Oct 2018 15:42:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CB7372902C for ; Tue, 9 Oct 2018 15:42:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BEB6A29062; Tue, 9 Oct 2018 15:42:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6908C2902C for ; Tue, 9 Oct 2018 15:42:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726476AbeJIXAF (ORCPT ); Tue, 9 Oct 2018 19:00:05 -0400 Received: from mail-il-dmz.mellanox.com ([193.47.165.129]:58863 "EHLO mellanox.co.il" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726393AbeJIXAF (ORCPT ); Tue, 9 Oct 2018 19:00:05 -0400 Received: from Internal Mail-Server by MTLPINE1 (envelope-from yishaih@mellanox.com) with ESMTPS (AES256-SHA encrypted); 9 Oct 2018 17:46:41 +0200 Received: from vnc17.mtl.labs.mlnx (vnc17.mtl.labs.mlnx [10.7.2.17]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id w99Ffqxs015330; Tue, 9 Oct 2018 18:41:52 +0300 Received: from vnc17.mtl.labs.mlnx (vnc17.mtl.labs.mlnx [127.0.0.1]) by vnc17.mtl.labs.mlnx (8.13.8/8.13.8) with ESMTP id w99Ffq49011442; Tue, 9 Oct 2018 18:41:52 +0300 Received: (from yishaih@localhost) by vnc17.mtl.labs.mlnx (8.13.8/8.13.8/Submit) id w99FfqNE011441; Tue, 9 Oct 2018 18:41:52 +0300 From: Yishai Hadas To: linux-rdma@vger.kernel.org Cc: yishaih@mellanox.com, markb@mellanox.com, jgg@mellanox.com, majd@mellanox.com Subject: [PATCH rdma-core 1/3] Update kernel headers Date: Tue, 9 Oct 2018 18:41:33 +0300 Message-Id: <1539099695-11323-2-git-send-email-yishaih@mellanox.com> X-Mailer: git-send-email 1.8.2.3 In-Reply-To: <1539099695-11323-1-git-send-email-yishaih@mellanox.com> References: <1539099695-11323-1-git-send-email-yishaih@mellanox.com> Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To commit 7f72052cb48e ("IB/mlx5: Expose RAW QP device handles to user space") Signed-off-by: Yishai Hadas --- kernel-headers/rdma/ib_user_verbs.h | 20 +++++++++++++++++++- kernel-headers/rdma/mlx5-abi.h | 15 +++++++++++++++ 2 files changed, 34 insertions(+), 1 deletion(-) diff --git a/kernel-headers/rdma/ib_user_verbs.h b/kernel-headers/rdma/ib_user_verbs.h index 25a1676..1254b51 100644 --- a/kernel-headers/rdma/ib_user_verbs.h +++ b/kernel-headers/rdma/ib_user_verbs.h @@ -763,10 +763,28 @@ struct ib_uverbs_sge { __u32 lkey; }; +enum ib_uverbs_wr_opcode { + IB_UVERBS_WR_RDMA_WRITE = 0, + IB_UVERBS_WR_RDMA_WRITE_WITH_IMM = 1, + IB_UVERBS_WR_SEND = 2, + IB_UVERBS_WR_SEND_WITH_IMM = 3, + IB_UVERBS_WR_RDMA_READ = 4, + IB_UVERBS_WR_ATOMIC_CMP_AND_SWP = 5, + IB_UVERBS_WR_ATOMIC_FETCH_AND_ADD = 6, + IB_UVERBS_WR_LOCAL_INV = 7, + IB_UVERBS_WR_BIND_MW = 8, + IB_UVERBS_WR_SEND_WITH_INV = 9, + IB_UVERBS_WR_TSO = 10, + IB_UVERBS_WR_RDMA_READ_WITH_INV = 11, + IB_UVERBS_WR_MASKED_ATOMIC_CMP_AND_SWP = 12, + IB_UVERBS_WR_MASKED_ATOMIC_FETCH_AND_ADD = 13, + /* Review enum ib_wr_opcode before modifying this */ +}; + struct ib_uverbs_send_wr { __aligned_u64 wr_id; __u32 num_sge; - __u32 opcode; + __u32 opcode; /* see enum ib_uverbs_wr_opcode */ __u32 send_flags; union { __be32 imm_data; diff --git a/kernel-headers/rdma/mlx5-abi.h b/kernel-headers/rdma/mlx5-abi.h index addbb9c..6056625 100644 --- a/kernel-headers/rdma/mlx5-abi.h +++ b/kernel-headers/rdma/mlx5-abi.h @@ -45,6 +45,8 @@ enum { MLX5_QP_FLAG_BFREG_INDEX = 1 << 3, MLX5_QP_FLAG_TYPE_DCT = 1 << 4, MLX5_QP_FLAG_TYPE_DCI = 1 << 5, + MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC = 1 << 6, + MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC = 1 << 7, }; enum { @@ -349,9 +351,22 @@ struct mlx5_ib_create_qp_rss { __u32 flags; }; +enum mlx5_ib_create_qp_resp_mask { + MLX5_IB_CREATE_QP_RESP_MASK_TIRN = 1UL << 0, + MLX5_IB_CREATE_QP_RESP_MASK_TISN = 1UL << 1, + MLX5_IB_CREATE_QP_RESP_MASK_RQN = 1UL << 2, + MLX5_IB_CREATE_QP_RESP_MASK_SQN = 1UL << 3, +}; + struct mlx5_ib_create_qp_resp { __u32 bfreg_index; __u32 reserved; + __u32 comp_mask; + __u32 tirn; + __u32 tisn; + __u32 rqn; + __u32 sqn; + __u32 reserved1; }; struct mlx5_ib_alloc_mw { From patchwork Tue Oct 9 15:41:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yishai Hadas X-Patchwork-Id: 10632899 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C737614DB for ; Tue, 9 Oct 2018 15:42:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C39312902C for ; Tue, 9 Oct 2018 15:42:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B7E2D29062; Tue, 9 Oct 2018 15:42:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3A9AD2903D for ; Tue, 9 Oct 2018 15:42:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726434AbeJIXAG (ORCPT ); Tue, 9 Oct 2018 19:00:06 -0400 Received: from mail-il-dmz.mellanox.com ([193.47.165.129]:58870 "EHLO mellanox.co.il" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726415AbeJIXAG (ORCPT ); Tue, 9 Oct 2018 19:00:06 -0400 Received: from Internal Mail-Server by MTLPINE1 (envelope-from yishaih@mellanox.com) with ESMTPS (AES256-SHA encrypted); 9 Oct 2018 17:46:41 +0200 Received: from vnc17.mtl.labs.mlnx (vnc17.mtl.labs.mlnx [10.7.2.17]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id w99FfqVe015333; Tue, 9 Oct 2018 18:41:52 +0300 Received: from vnc17.mtl.labs.mlnx (vnc17.mtl.labs.mlnx [127.0.0.1]) by vnc17.mtl.labs.mlnx (8.13.8/8.13.8) with ESMTP id w99Ffq72011446; Tue, 9 Oct 2018 18:41:52 +0300 Received: (from yishaih@localhost) by vnc17.mtl.labs.mlnx (8.13.8/8.13.8/Submit) id w99FfqQc011445; Tue, 9 Oct 2018 18:41:52 +0300 From: Yishai Hadas To: linux-rdma@vger.kernel.org Cc: yishaih@mellanox.com, markb@mellanox.com, jgg@mellanox.com, majd@mellanox.com Subject: [PATCH rdma-core 2/3] mlx5: Add loopback flags to QP creation Date: Tue, 9 Oct 2018 18:41:34 +0300 Message-Id: <1539099695-11323-3-git-send-email-yishaih@mellanox.com> X-Mailer: git-send-email 1.8.2.3 In-Reply-To: <1539099695-11323-1-git-send-email-yishaih@mellanox.com> References: <1539099695-11323-1-git-send-email-yishaih@mellanox.com> Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Mark Bloch Introduce two new QP create dv flags: MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_UC MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_MC By default, self-loopback traffic is blocked. Meaning, an IBV_QPT_RAW_PACKET qp type, will not receive traffic generated (post_sent) by similar QP's sharing the same ibv_context. These new flags can be used at creation time of an IBV_QPT_RAW_PACKET QP type in order to allow QP's on the same ibv_context to receive self-loopback traffic (unicast and multicast). Signed-off-by: Mark Bloch Signed-off-by: Yishai Hadas --- providers/mlx5/man/CMakeLists.txt | 1 + providers/mlx5/man/mlx5dv_create_qp.3.md | 98 ++++++++++++++++++++++++++++++++ providers/mlx5/mlx5dv.h | 2 + providers/mlx5/verbs.c | 27 +++++++-- 4 files changed, 124 insertions(+), 4 deletions(-) create mode 100644 providers/mlx5/man/mlx5dv_create_qp.3.md diff --git a/providers/mlx5/man/CMakeLists.txt b/providers/mlx5/man/CMakeLists.txt index 5765691..e8405a2 100644 --- a/providers/mlx5/man/CMakeLists.txt +++ b/providers/mlx5/man/CMakeLists.txt @@ -3,6 +3,7 @@ rdma_man_pages( mlx5dv_create_flow_action_modify_header.3.md mlx5dv_create_flow_action_packet_reformat.3.md mlx5dv_create_flow_matcher.3.md + mlx5dv_create_qp.3.md mlx5dv_flow_action_esp.3.md mlx5dv_get_clock_info.3 mlx5dv_init_obj.3 diff --git a/providers/mlx5/man/mlx5dv_create_qp.3.md b/providers/mlx5/man/mlx5dv_create_qp.3.md new file mode 100644 index 0000000..e7de364 --- /dev/null +++ b/providers/mlx5/man/mlx5dv_create_qp.3.md @@ -0,0 +1,98 @@ +--- +layout: page +title: mlx5dv_create_qp +section: 3 +tagline: Verbs +date: 2018-9-1 +header: "mlx5 Programmer's Manual" +footer: mlx5 +--- + +# NAME + +mlx5dv_create_qp - creates a queue pair (QP) + +# SYNOPSIS + +```c +#include + +struct ibv_qp *mlx5dv_create_qp(struct ibv_context *context, + struct ibv_qp_init_attr_ex *qp_attr, + struct mlx5dv_qp_init_attr *mlx5_qp_attr) +``` + + +# DESCRIPTION + +**mlx5dv_create_qp()** creates a queue pair (QP) with specific driver properties. + +# ARGUMENTS + +Please see *ibv_create_qp_ex(3)* man page for *context* and *qp_attr*. + +## mlx5_qp_attr + +```c +struct mlx5dv_qp_init_attr { + uint64_t comp_mask; + uint32_t create_flags; + struct mlx5dv_dc_init_attr dc_init_attr; +}; +``` + +*comp_mask* +: Bitmask specifying what fields in the structure are valid: + MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS: + valid values in *create_flags* + MLX5DV_QP_INIT_ATTR_MASK_DC: + valid values in *dc_init_attr* + +*create_flags* +: A bitwise OR of the various values described below. + + MLX5DV_QP_CREATE_TUNNEL_OFFLOADS: + Enable offloading such as checksum and LRO for incoming + tunneling traffic. + + MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_UC: + Allow receiving loopback unicast traffic. + + MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_MC: + Allow receiving loopback multicast traffic. + +*dc_init_attr* +: DC init attributes. + +## *dc_init_attr* + +```c +struct mlx5dv_dc_init_attr { + enum mlx5dv_dc_type dc_type; + uint64_t dct_access_key; +}; +``` + +*dc_type* +: MLX5DV_DCTYPE_DCT + QP type: Target DC. + MLX5DV_DCTYPE_DCI + QP type: Initiator DC. + +*dct_access_key* +: used to create a DCT QP. + + +# RETURN VALUE + +**mlx5dv_create_qp()** +returns a pointer to the created QP, on error NULL will be returned and errno will be set. + + +# SEE ALSO + +**ibv_query_device_ex**(3), **ibv_create_qp_ex**(3), + +# AUTHOR + +Yonatan Cohen diff --git a/providers/mlx5/mlx5dv.h b/providers/mlx5/mlx5dv.h index 69af319..d340fdd 100644 --- a/providers/mlx5/mlx5dv.h +++ b/providers/mlx5/mlx5dv.h @@ -158,6 +158,8 @@ struct ibv_cq_ex *mlx5dv_create_cq(struct ibv_context *context, enum mlx5dv_qp_create_flags { MLX5DV_QP_CREATE_TUNNEL_OFFLOADS = 1 << 0, + MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_UC = 1 << 1, + MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_MC = 1 << 2, }; enum mlx5dv_qp_init_attr_mask { diff --git a/providers/mlx5/verbs.c b/providers/mlx5/verbs.c index 81e93dd..54d229e 100644 --- a/providers/mlx5/verbs.c +++ b/providers/mlx5/verbs.c @@ -1598,6 +1598,13 @@ enum { IBV_QP_INIT_ATTR_RX_HASH), }; +enum { + MLX5DV_QP_CREATE_SUP_FLAGS = + (MLX5DV_QP_CREATE_TUNNEL_OFFLOADS | + MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_UC | + MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_MC), +}; + static int create_dct(struct ibv_context *context, struct ibv_qp_init_attr_ex *attr, struct mlx5dv_qp_init_attr *mlx5_qp_attr, @@ -1720,15 +1727,27 @@ static struct ibv_qp *create_qp(struct ibv_context *context, } if (mlx5_qp_attr->comp_mask & MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS) { - if (mlx5_qp_attr->create_flags & - MLX5DV_QP_CREATE_TUNNEL_OFFLOADS) { - mlx5_create_flags = MLX5_QP_FLAG_TUNNEL_OFFLOADS; - } else { + if (!check_comp_mask(mlx5_qp_attr->create_flags, + MLX5DV_QP_CREATE_SUP_FLAGS)) { mlx5_dbg(fp, MLX5_DBG_QP, "Unsupported creation flags requested for create_qp\n"); errno = EINVAL; goto err; } + if (mlx5_qp_attr->create_flags & + MLX5DV_QP_CREATE_TUNNEL_OFFLOADS) { + mlx5_create_flags |= MLX5_QP_FLAG_TUNNEL_OFFLOADS; + } + if (mlx5_qp_attr->create_flags & + MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_UC) { + mlx5_create_flags |= + MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; + } + if (mlx5_qp_attr->create_flags & + MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_MC) { + mlx5_create_flags |= + MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; + } } if (attr->qp_type == IBV_QPT_DRIVER) { From patchwork Tue Oct 9 15:41:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yishai Hadas X-Patchwork-Id: 10632901 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 65BC415E2 for ; Tue, 9 Oct 2018 15:42:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6226B2902C for ; Tue, 9 Oct 2018 15:42:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5683D29062; Tue, 9 Oct 2018 15:42:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DF86A2902C for ; Tue, 9 Oct 2018 15:42:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726393AbeJIXAG (ORCPT ); Tue, 9 Oct 2018 19:00:06 -0400 Received: from mail-il-dmz.mellanox.com ([193.47.165.129]:58882 "EHLO mellanox.co.il" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726492AbeJIXAG (ORCPT ); Tue, 9 Oct 2018 19:00:06 -0400 Received: from Internal Mail-Server by MTLPINE1 (envelope-from yishaih@mellanox.com) with ESMTPS (AES256-SHA encrypted); 9 Oct 2018 17:46:41 +0200 Received: from vnc17.mtl.labs.mlnx (vnc17.mtl.labs.mlnx [10.7.2.17]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id w99FfqSW015353; Tue, 9 Oct 2018 18:41:52 +0300 Received: from vnc17.mtl.labs.mlnx (vnc17.mtl.labs.mlnx [127.0.0.1]) by vnc17.mtl.labs.mlnx (8.13.8/8.13.8) with ESMTP id w99FfqAh011455; Tue, 9 Oct 2018 18:41:52 +0300 Received: (from yishaih@localhost) by vnc17.mtl.labs.mlnx (8.13.8/8.13.8/Submit) id w99FfqIi011451; Tue, 9 Oct 2018 18:41:52 +0300 From: Yishai Hadas To: linux-rdma@vger.kernel.org Cc: yishaih@mellanox.com, markb@mellanox.com, jgg@mellanox.com, majd@mellanox.com Subject: [PATCH rdma-core 3/3] mlx5: Expose device handles for RAW QP via the DV API Date: Tue, 9 Oct 2018 18:41:35 +0300 Message-Id: <1539099695-11323-4-git-send-email-yishaih@mellanox.com> X-Mailer: git-send-email 1.8.2.3 In-Reply-To: <1539099695-11323-1-git-send-email-yishaih@mellanox.com> References: <1539099695-11323-1-git-send-email-yishaih@mellanox.com> Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Expose device handles for RAW QP via the DV API, this includes, tirn, tisn, rqn, sqn. This enables using the DEVX interface with the above device handles. Signed-off-by: Yishai Hadas --- providers/mlx5/mlx5.c | 8 ++++++++ providers/mlx5/mlx5.h | 4 ++++ providers/mlx5/mlx5dv.h | 5 +++++ providers/mlx5/verbs.c | 21 +++++++++++++++++---- 4 files changed, 34 insertions(+), 4 deletions(-) diff --git a/providers/mlx5/mlx5.c b/providers/mlx5/mlx5.c index 31bf3b2..22b27fd 100644 --- a/providers/mlx5/mlx5.c +++ b/providers/mlx5/mlx5.c @@ -761,6 +761,14 @@ static int mlx5dv_get_qp(struct ibv_qp *qp_in, mask_out |= MLX5DV_QP_MASK_UAR_MMAP_OFFSET; } + if (qp_out->comp_mask & MLX5DV_QP_MASK_RAW_QP_HANDLES) { + qp_out->tirn = mqp->tirn; + qp_out->tisn = mqp->tisn; + qp_out->rqn = mqp->rqn; + qp_out->sqn = mqp->sqn; + mask_out |= MLX5DV_QP_MASK_RAW_QP_HANDLES; + } + if (mqp->bf->uuarn > 0) qp_out->bf.size = mqp->bf->buf_size; else diff --git a/providers/mlx5/mlx5.h b/providers/mlx5/mlx5.h index 9af07c8..c5b9e6f 100644 --- a/providers/mlx5/mlx5.h +++ b/providers/mlx5/mlx5.h @@ -518,6 +518,10 @@ struct mlx5_qp { int rss_qp; uint32_t flags; /* Use enum mlx5_qp_flags */ enum mlx5dv_dc_type dc_type; + uint32_t tirn; + uint32_t tisn; + uint32_t rqn; + uint32_t sqn; }; struct mlx5_ah { diff --git a/providers/mlx5/mlx5dv.h b/providers/mlx5/mlx5dv.h index d340fdd..28d68bc 100644 --- a/providers/mlx5/mlx5dv.h +++ b/providers/mlx5/mlx5dv.h @@ -288,6 +288,7 @@ int mlx5dv_query_device(struct ibv_context *ctx_in, enum mlx5dv_qp_comp_mask { MLX5DV_QP_MASK_UAR_MMAP_OFFSET = 1 << 0, + MLX5DV_QP_MASK_RAW_QP_HANDLES = 1 << 1, }; struct mlx5dv_qp { @@ -308,6 +309,10 @@ struct mlx5dv_qp { } bf; uint64_t comp_mask; off_t uar_mmap_offset; + uint32_t tirn; + uint32_t tisn; + uint32_t rqn; + uint32_t sqn; }; struct mlx5dv_cq { diff --git a/providers/mlx5/verbs.c b/providers/mlx5/verbs.c index 54d229e..9ebd742 100644 --- a/providers/mlx5/verbs.c +++ b/providers/mlx5/verbs.c @@ -1673,11 +1673,11 @@ static struct ibv_qp *create_qp(struct ibv_context *context, struct mlx5_context *ctx = to_mctx(context); struct ibv_qp *ibqp; int32_t usr_idx = 0; - uint32_t uuar_index; uint32_t mlx5_create_flags = 0; struct mlx5_bf *bf = NULL; FILE *fp = ctx->dbg_fp; struct mlx5_parent_domain *mparent_domain; + struct mlx5_ib_create_qp_resp *resp_drv; if (attr->comp_mask & ~MLX5_CREATE_QP_SUP_COMP_MASK) return NULL; @@ -1884,8 +1884,8 @@ static struct ibv_qp *create_qp(struct ibv_context *context, goto err_free_uidx; } - uuar_index = (attr->comp_mask & MLX5_CREATE_QP_EX2_COMP_MASK) ? - resp_ex.bfreg_index : resp.bfreg_index; + resp_drv = attr->comp_mask & MLX5_CREATE_QP_EX2_COMP_MASK ? + &resp_ex.drv_payload : &resp.drv_payload; if (!ctx->cqe_version) { if (qp->sq.wqe_cnt || qp->rq.wqe_cnt) { ret = mlx5_store_qp(ctx, ibqp->qp_num, qp); @@ -1898,7 +1898,7 @@ static struct ibv_qp *create_qp(struct ibv_context *context, pthread_mutex_unlock(&ctx->qp_table_mutex); } - map_uuar(context, qp, uuar_index, bf); + map_uuar(context, qp, resp_drv->bfreg_index, bf); qp->rq.max_post = qp->rq.wqe_cnt; if (attr->sq_sig_all) @@ -1916,6 +1916,19 @@ static struct ibv_qp *create_qp(struct ibv_context *context, if (mparent_domain) atomic_fetch_add(&mparent_domain->mpd.refcount, 1); + + if (resp_drv->comp_mask & MLX5_IB_CREATE_QP_RESP_MASK_TIRN) + qp->tirn = resp_drv->tirn; + + if (resp_drv->comp_mask & MLX5_IB_CREATE_QP_RESP_MASK_TISN) + qp->tisn = resp_drv->tisn; + + if (resp_drv->comp_mask & MLX5_IB_CREATE_QP_RESP_MASK_RQN) + qp->rqn = resp_drv->rqn; + + if (resp_drv->comp_mask & MLX5_IB_CREATE_QP_RESP_MASK_SQN) + qp->sqn = resp_drv->sqn; + return ibqp; err_destroy: