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Thu, 14 May 2020 05:03:07 +0000 From: To: , , Subject: [PATCH 01/16] ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions Thread-Topic: [PATCH 01/16] ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions Thread-Index: AQHWKaz0LXerz9Q/dUmbzQUpUcG6QQ== Date: Thu, 14 May 2020 05:03:07 +0000 Message-ID: <20200514050301.147442-2-tudor.ambarus@microchip.com> References: <20200514050301.147442-1-tudor.ambarus@microchip.com> In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: bootlin.com; dkim=none (message not signed) header.d=none;bootlin.com; dmarc=none action=none header.from=microchip.com; x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: fb4aa94b-c295-4d5c-f5d7-08d7f7c41740 x-ms-traffictypediagnostic: BY5PR11MB4483: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:4125; 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Label the flexcom functions in order: flx0: uart5, spi2, i2c2 flx1: uart6, spi3, i2c3 flx2: uart7, spi4, i2c4 flx3: uart8, spi5, i2c5 flx4: uart9, spi6, i2c6 Some boards respected this scheme, others not. Fix the ones that didn't. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-kizbox3-hs.dts | 4 ++-- arch/arm/boot/dts/at91-kizbox3_common.dtsi | 8 ++++---- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 20 ++++++++++---------- arch/arm/boot/dts/at91-sama5d2_icp.dts | 8 ++++---- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 2 +- 5 files changed, 21 insertions(+), 21 deletions(-) diff --git a/arch/arm/boot/dts/at91-kizbox3-hs.dts b/arch/arm/boot/dts/at91-kizbox3-hs.dts index 8734e7f8939e..0da1f0557eaf 100644 --- a/arch/arm/boot/dts/at91-kizbox3-hs.dts +++ b/arch/arm/boot/dts/at91-kizbox3-hs.dts @@ -283,7 +283,7 @@ &flx3 { status = "okay"; - uart6: serial@200 { + uart8: serial@200 { status = "okay"; }; }; @@ -291,7 +291,7 @@ &flx4 { status = "okay"; - i2c2: i2c@600 { + i2c6: i2c@600 { status = "okay"; }; }; diff --git a/arch/arm/boot/dts/at91-kizbox3_common.dtsi b/arch/arm/boot/dts/at91-kizbox3_common.dtsi index 299e74d23184..d7a6c972bdac 100644 --- a/arch/arm/boot/dts/at91-kizbox3_common.dtsi +++ b/arch/arm/boot/dts/at91-kizbox3_common.dtsi @@ -28,7 +28,7 @@ serial3 = &uart3; serial4 = &uart4; serial5 = &uart5; - serial6 = &uart6; + serial6 = &uart8; }; chosen { @@ -207,7 +207,7 @@ }; }; - pinctrl_flx4_default: flx4_i2c2_default { + pinctrl_flx4_default: flx4_i2c6_default { pinmux = , //DATA ; //CLK bias-disable; @@ -324,7 +324,7 @@ atmel,flexcom-mode = ; status = "disabled"; - uart6: serial@200 { + uart8: serial@200 { compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x400>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; @@ -350,7 +350,7 @@ atmel,flexcom-mode = ; status = "disabled"; - i2c2: i2c@600 { + i2c6: i2c@600 { compatible = "atmel,sama5d2-i2c"; reg = <0x600 0x200>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index b0853bf7901c..d215243fe163 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -21,7 +21,7 @@ serial1 = &uart4; /* mikro BUS 1 */ serial2 = &uart2; /* mikro BUS 2 */ i2c1 = &i2c1; - i2c2 = &i2c2; + i2c2 = &i2c3; }; chosen { @@ -125,7 +125,7 @@ atmel,flexcom-mode = ; status = "okay"; - i2c2: i2c@600 { + i2c3: i2c@600 { compatible = "atmel,sama5d2-i2c"; reg = <0x600 0x200>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>; @@ -178,7 +178,7 @@ atmel,flexcom-mode = ; status = "disabled"; - uart7: serial@200 { + uart8: serial@200 { compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x200>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; @@ -190,7 +190,7 @@ status = "disabled"; /* Conflict with isc. */ }; - spi2: spi@400 { + spi5: spi@400 { compatible = "atmel,at91rm9200-spi"; reg = <0x400 0x200>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; @@ -207,7 +207,7 @@ atmel,flexcom-mode = ; status = "okay"; - uart6: serial@200 { + uart9: serial@200 { compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x200>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; @@ -216,10 +216,10 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; atmel,fifo-size = <32>; - status = "disabled"; /* Conflict with spi3 and i2c3. */ + status = "disabled"; /* Conflict with spi6 and i2c6. */ }; - spi3: spi@400 { + spi6: spi@400 { compatible = "atmel,at91rm9200-spi"; reg = <0x400 0x200>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; @@ -228,10 +228,10 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>; atmel,fifo-size = <16>; - status = "okay"; /* Conflict with uart6 and i2c3. */ + status = "okay"; /* Conflict with uart5 and i2c6. */ }; - i2c3: i2c@600 { + i2c6: i2c@600 { compatible = "atmel,sama5d2-i2c"; reg = <0x600 0x200>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; @@ -243,7 +243,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; atmel,fifo-size = <16>; - status = "disabled"; /* Conflict with uart6 and spi3. */ + status = "disabled"; /* Conflict with uart5 and spi6. */ }; }; diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index cc9fa700eafb..1d9556dbbd63 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -22,7 +22,7 @@ serial0 = &uart0; /* debug uart0 + mikro BUS 1 */ serial1 = &uart1; /* mikro BUS 3 */ serial3 = &uart3; /* mikro BUS 2 */ - serial5 = &uart5; /* flx2 */ + serial5 = &uart7; /* flx2 */ i2c0 = &i2c0; i2c1 = &i2c1; }; @@ -159,7 +159,7 @@ atmel,flexcom-mode = ; status = "okay"; - uart5: serial@200 { + uart7: serial@200 { compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x200>; interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>; @@ -184,7 +184,7 @@ atmel,flexcom-mode = ; status = "okay"; - spi3: spi@400 { + spi5: spi@400 { compatible = "atmel,at91rm9200-spi"; reg = <0x400 0x200>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; @@ -201,7 +201,7 @@ atmel,flexcom-mode = ; status = "okay"; - i2c2: i2c@600 { + i2c6: i2c@600 { compatible = "atmel,sama5d2-i2c"; reg = <0x600 0x200>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index e0c6cff1a312..0666708b05f9 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -377,7 +377,7 @@ atmel,flexcom-mode = ; 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Move the flx0 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-kizbox3_common.dtsi | 14 -------- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 20 ----------- arch/arm/boot/dts/at91-sama5d2_icp.dts | 8 ----- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 8 ----- arch/arm/boot/dts/sama5d2.dtsi | 40 +++++++++++++++++++++ 5 files changed, 40 insertions(+), 50 deletions(-) diff --git a/arch/arm/boot/dts/at91-kizbox3_common.dtsi b/arch/arm/boot/dts/at91-kizbox3_common.dtsi index d7a6c972bdac..ee6f036aa008 100644 --- a/arch/arm/boot/dts/at91-kizbox3_common.dtsi +++ b/arch/arm/boot/dts/at91-kizbox3_common.dtsi @@ -351,22 +351,8 @@ status = "disabled"; i2c6: i2c@600 { - compatible = "atmel,sama5d2-i2c"; - reg = <0x600 0x200>; - interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; - dmas = <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) - | AT91_XDMAC_DT_PERID(19))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) - | AT91_XDMAC_DT_PERID(20))>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; - atmel,fifo-size = <16>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index d215243fe163..5f4a7c8725f3 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -208,41 +208,21 @@ status = "okay"; uart9: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x200>; - interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; - clock-names = "usart"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; - atmel,fifo-size = <32>; status = "disabled"; /* Conflict with spi6 and i2c6. */ }; spi6: spi@400 { - compatible = "atmel,at91rm9200-spi"; - reg = <0x400 0x200>; - interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; - clock-names = "spi_clk"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>; - atmel,fifo-size = <16>; status = "okay"; /* Conflict with uart5 and i2c6. */ }; i2c6: i2c@600 { - compatible = "atmel,sama5d2-i2c"; - reg = <0x600 0x200>; - interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <0>, <0>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; - atmel,fifo-size = <16>; status = "disabled"; /* Conflict with uart5 and spi6. */ }; }; diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 1d9556dbbd63..7216a794f4f6 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -202,17 +202,9 @@ status = "okay"; i2c6: i2c@600 { - compatible = "atmel,sama5d2-i2c"; - reg = <0x600 0x200>; - interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <0>, <0>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; - atmel,fifo-size = <16>; status = "okay"; mcp16502@5b { diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index 0666708b05f9..a5046f8257ad 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -378,20 +378,12 @@ status = "okay"; i2c6: i2c@600 { - compatible = "atmel,sama5d2-i2c"; - reg = <0x600 0x200>; - interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <0>, <0>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_flx4_default>; pinctrl-1 = <&pinctrl_flx4_gpio>; sda-gpios = <&pioA PIN_PD12 GPIO_ACTIVE_HIGH>; scl-gpios = <&pioA PIN_PD13 GPIO_ACTIVE_HIGH>; - atmel,fifo-size = <16>; i2c-analog-filter; i2c-digital-filter; i2c-digital-filter-width-ns = <35>; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index ab550d69db91..5c31e4068eb5 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -814,6 +814,46 @@ #size-cells = <1>; ranges = <0x0 0xfc018000 0x800>; status = "disabled"; + + uart9: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; + clock-names = "usart"; + atmel,fifo-size = <32>; + status = "disabled"; + }; + + spi6: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; + clock-names = "spi_clk"; + atmel,fifo-size = <16>; + status = "disabled"; + }; + + i2c6: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(19))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(20))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <16>; + status = "disabled"; + }; }; trng@fc01c000 { From patchwork Thu May 14 05:03:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 11547791 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 903EB618 for ; Thu, 14 May 2020 05:04:00 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6528A206DC for ; Thu, 14 May 2020 05:04:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="hL6RBtgA"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="W/sbb7xI"; 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Thu, 14 May 2020 05:03:08 +0000 From: To: , , Subject: [PATCH 03/16] ARM: dts: at91: sama5d2: Move flx3 definitions in the SoC dtsi Thread-Topic: [PATCH 03/16] ARM: dts: at91: sama5d2: Move flx3 definitions in the SoC dtsi Thread-Index: AQHWKaz1grvF6lJZUE2ad+lZJ9HQCA== Date: Thu, 14 May 2020 05:03:08 +0000 Message-ID: <20200514050301.147442-4-tudor.ambarus@microchip.com> References: <20200514050301.147442-1-tudor.ambarus@microchip.com> In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: bootlin.com; dkim=none (message not signed) header.d=none;bootlin.com; dmarc=none action=none header.from=microchip.com; x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 30913fad-3675-4ea5-3f23-08d7f7c417fa x-ms-traffictypediagnostic: BY5PR11MB4483: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:3968; 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Move the flx3 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-kizbox3_common.dtsi | 13 --------- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 13 +-------- arch/arm/boot/dts/at91-sama5d2_icp.dts | 6 ----- arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++ 4 files changed, 30 insertions(+), 31 deletions(-) diff --git a/arch/arm/boot/dts/at91-kizbox3_common.dtsi b/arch/arm/boot/dts/at91-kizbox3_common.dtsi index ee6f036aa008..4351a8d32225 100644 --- a/arch/arm/boot/dts/at91-kizbox3_common.dtsi +++ b/arch/arm/boot/dts/at91-kizbox3_common.dtsi @@ -325,21 +325,8 @@ status = "disabled"; uart8: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x400>; - interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; - dmas = <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) - | AT91_XDMAC_DT_PERID(17))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) - | AT91_XDMAC_DT_PERID(18))>; - dma-names = "tx", "rx"; - clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; - clock-names = "usart"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx3_default>; - atmel,fifo-size = <32>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index 5f4a7c8725f3..abbf14e29d85 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -179,26 +179,15 @@ status = "disabled"; uart8: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x200>; - interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; - clock-names = "usart"; + dmas = <0>, <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx3_default>; - atmel,fifo-size = <32>; status = "disabled"; /* Conflict with isc. */ }; spi5: spi@400 { - compatible = "atmel,at91rm9200-spi"; - reg = <0x400 0x200>; - interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; - clock-names = "spi_clk"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx3_default>; - atmel,fifo-size = <16>; status = "disabled"; /* Conflict with isc. */ }; }; diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 7216a794f4f6..8a4336e12a60 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -185,14 +185,8 @@ status = "okay"; spi5: spi@400 { - compatible = "atmel,at91rm9200-spi"; - reg = <0x400 0x200>; - interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; - clock-names = "spi_clk"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus1_spi &pinctrl_mikrobus1_spi_cs>; - atmel,fifo-size = <16>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 5c31e4068eb5..5e84cde8226a 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -804,6 +804,35 @@ #size-cells = <1>; ranges = <0x0 0xfc014000 0x800>; status = "disabled"; + + uart8: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; + clock-names = "usart"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(17))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(18))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <32>; + status = "disabled"; + }; + + spi5: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; + clock-names = "spi_clk"; + atmel,fifo-size = <16>; + status = "disabled"; + }; }; flx4: flexcom@fc018000 { From patchwork Thu May 14 05:03:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 11547801 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ACDD4139A for ; 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Move the flx2 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama5d2_icp.dts | 12 ------------ arch/arm/boot/dts/sama5d2.dtsi | 18 ++++++++++++++++++ 2 files changed, 18 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 8a4336e12a60..23f413afb333 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -160,18 +160,6 @@ status = "okay"; uart7: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x200>; - interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>; - dmas = <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(15))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(16))>; - dma-names = "tx", "rx"; - clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; - clock-names = "usart"; pinctrl-0 = <&pinctrl_flx2_default>; pinctrl-names = "default"; atmel,use-dma-rx; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 5e84cde8226a..89064225e9aa 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -794,6 +794,24 @@ #size-cells = <1>; ranges = <0x0 0xfc010000 0x800>; status = "disabled"; + + uart7: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; + clock-names = "usart"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(15))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(16))>; + dma-names = "tx", "rx"; + status = "disabled"; + }; }; flx3: flexcom@fc014000 { From patchwork Thu May 14 05:03:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 11547793 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DA095697 for ; Thu, 14 May 2020 05:04:15 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 98123206D8 for ; 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Thu, 14 May 2020 05:03:09 +0000 From: To: , , Subject: [PATCH 05/16] ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsi Thread-Topic: [PATCH 05/16] ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsi Thread-Index: AQHWKaz2EBruUKsjvkCe6lIEn8yUnA== Date: Thu, 14 May 2020 05:03:09 +0000 Message-ID: <20200514050301.147442-6-tudor.ambarus@microchip.com> References: <20200514050301.147442-1-tudor.ambarus@microchip.com> In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: bootlin.com; dkim=none (message not signed) header.d=none;bootlin.com; dmarc=none action=none header.from=microchip.com; x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 5c59111f-d2eb-4a0d-9c2e-08d7f7c418cd x-ms-traffictypediagnostic: BY5PR11MB4483: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:3968; 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Move the flx0 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 7 ----- arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 12 --------- arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++ 3 files changed, 29 insertions(+), 19 deletions(-) diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index abbf14e29d85..a0deff15fb9a 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -126,20 +126,13 @@ status = "okay"; i2c3: i2c@600 { - compatible = "atmel,sama5d2-i2c"; - reg = <0x600 0x200>; - interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <0>, <0>; dma-names = "tx", "rx"; i2c-analog-filter; i2c-digital-filter; i2c-digital-filter-width-ns = <35>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus_i2c>; - atmel,fifo-size = <16>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi index bea3d60b9722..a06700e53e4c 100644 --- a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi +++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi @@ -36,18 +36,6 @@ atmel,flexcom-mode = ; uart6: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x200>; - interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>; - dmas = <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(13))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(14))>; - dma-names = "tx", "rx"; - clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; - clock-names = "usart"; pinctrl-0 = <&pinctrl_flx1_default>; pinctrl-names = "default"; }; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 89064225e9aa..79ed7bd02df6 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -645,6 +645,35 @@ #size-cells = <1>; ranges = <0x0 0xf8038000 0x800>; status = "disabled"; + + uart6: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; + clock-names = "usart"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(13))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(14))>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + i2c3: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; + atmel,fifo-size = <16>; + status = "disabled"; + }; }; securam: sram@f8044000 { From patchwork Thu May 14 05:03:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 11547805 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 60B3B139A for ; Thu, 14 May 2020 05:06:36 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 403BE206D4 for ; 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Thu, 14 May 2020 05:03:10 +0000 From: To: , , Subject: [PATCH 06/16] ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi Thread-Topic: [PATCH 06/16] ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi Thread-Index: AQHWKaz2vPixCxQLeE6hkHQUe+T1JQ== Date: Thu, 14 May 2020 05:03:10 +0000 Message-ID: <20200514050301.147442-7-tudor.ambarus@microchip.com> References: <20200514050301.147442-1-tudor.ambarus@microchip.com> In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: bootlin.com; dkim=none (message not signed) header.d=none;bootlin.com; dmarc=none action=none header.from=microchip.com; x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 8a05ca16-981b-4a12-1a03-08d7f7c41944 x-ms-traffictypediagnostic: BY5PR11MB4483: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:6108; 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Move the flx0 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. There is a single functional change in this patch. With the move of the flx0 uart5 definition in the SoC dtsi, the uart5 from at91-sama5d27_wlsom1_ek.dts inherits the following optional property: atmel,fifo-size = <32>; This particular change was tested by Codrin. Signed-off-by: Tudor Ambarus Tested-by: Codrin Ciubotariu --- arch/arm/boot/dts/at91-kizbox3_common.dtsi | 13 ------ arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts | 12 ------ arch/arm/boot/dts/at91-sama5d2_icp.dts | 6 --- arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 7 ---- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 7 +--- arch/arm/boot/dts/sama5d2.dtsi | 40 +++++++++++++++++++ 6 files changed, 41 insertions(+), 44 deletions(-) diff --git a/arch/arm/boot/dts/at91-kizbox3_common.dtsi b/arch/arm/boot/dts/at91-kizbox3_common.dtsi index 4351a8d32225..7c3076e245ef 100644 --- a/arch/arm/boot/dts/at91-kizbox3_common.dtsi +++ b/arch/arm/boot/dts/at91-kizbox3_common.dtsi @@ -299,21 +299,8 @@ status = "disabled"; uart5: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x400>; - interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; - dmas = <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) - | AT91_XDMAC_DT_PERID(11))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) - | AT91_XDMAC_DT_PERID(12))>; - dma-names = "tx", "rx"; - clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; - clock-names = "usart"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx0_default>; - atmel,fifo-size = <32>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts index 6b8461278950..6b38fa3f5568 100644 --- a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts @@ -77,18 +77,6 @@ status = "okay"; uart5: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x200>; - interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; - dmas = <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(11))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(12))>; - dma-names = "tx", "rx"; - clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; - clock-names = "usart"; pinctrl-0 = <&pinctrl_flx0_default>; pinctrl-names = "default"; atmel,use-dma-rx; diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 23f413afb333..4a01ab8e7e70 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -105,15 +105,9 @@ status = "okay"; spi2: spi@400 { - compatible = "atmel,at91rm9200-spi"; - reg = <0x400 0x200>; - interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; - clock-names = "spi_clk"; cs-gpios = <&pioA PIN_PC0 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus2_spi &pinctrl_ksz_spi_cs>; - atmel,fifo-size = <16>; status = "okay"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts index 32435ce1dab2..8ad3a9c6c536 100644 --- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts @@ -191,20 +191,13 @@ status = "okay"; i2c2: i2c@600 { - compatible = "atmel,sama5d2-i2c"; - reg = <0x600 0x200>; - interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <0>, <0>; dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_flx0_default>; pinctrl-1 = <&pinctrl_flx0_gpio>; sda-gpios = <&pioA PIN_PB28 GPIO_ACTIVE_HIGH>; scl-gpios = <&pioA PIN_PB29 GPIO_ACTIVE_HIGH>; - atmel,fifo-size = <16>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index a5046f8257ad..da4442715ea5 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -327,14 +327,9 @@ status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */ uart5: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x200>; - interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; - clock-names = "usart"; + dmas = <0>, <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx0_default>; - atmel,fifo-size = <32>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 79ed7bd02df6..acb91908bd74 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -635,6 +635,46 @@ #size-cells = <1>; ranges = <0x0 0xf8034000 0x800>; status = "disabled"; + + uart5: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; + clock-names = "usart"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(11))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(12))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <32>; + status = "disabled"; + }; + + spi2: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; + clock-names = "spi_clk"; + atmel,fifo-size = <16>; + status = "disabled"; + }; + + i2c2: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; + atmel,fifo-size = <16>; + status = "disabled"; + }; }; flx1: flexcom@f8038000 { From patchwork Thu May 14 05:03:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 11547795 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D6F4F618 for ; Thu, 14 May 2020 05:04:42 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B13A6206C0 for ; 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Thu, 14 May 2020 05:03:11 +0000 From: To: , , Subject: [PATCH 07/16] ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UART Thread-Topic: [PATCH 07/16] ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UART Thread-Index: AQHWKaz3dpMmKuACXkmCJQFwirMG6w== Date: Thu, 14 May 2020 05:03:11 +0000 Message-ID: <20200514050301.147442-8-tudor.ambarus@microchip.com> References: <20200514050301.147442-1-tudor.ambarus@microchip.com> In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: bootlin.com; dkim=none (message not signed) header.d=none;bootlin.com; dmarc=none action=none header.from=microchip.com; x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 28573468-0748-4df3-2175-08d7f7c419cc x-ms-traffictypediagnostic: BY5PR11MB4483: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:1265; 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X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [68.232.153.233 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Tudor.Ambarus@microchip.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, Codrin.Ciubotariu@microchip.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Tudor Ambarus The UART submodule in Flexcom has 32-byte Transmit and Receive FIFOs. Tested uart7 on sama5d2-icp, which has both DMA and FIFO enabled. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/sama5d2.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index acb91908bd74..dde969a140b4 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -701,6 +701,7 @@ AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(14))>; dma-names = "tx", "rx"; + atmel,fifo-size = <32>; status = "disabled"; }; @@ -879,6 +880,7 @@ AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(16))>; dma-names = "tx", "rx"; + atmel,fifo-size = <32>; status = "disabled"; }; }; From patchwork Thu May 14 05:03:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 11547807 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8F89660D for ; Thu, 14 May 2020 05:06:54 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 63E84206D4 for ; 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Thu, 14 May 2020 05:03:12 +0000 From: To: , , Subject: [PATCH 08/16] ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functions Thread-Topic: [PATCH 08/16] ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functions Thread-Index: AQHWKaz3X6V0ap5Ns0uiIyl1zvqZWg== Date: Thu, 14 May 2020 05:03:12 +0000 Message-ID: <20200514050301.147442-9-tudor.ambarus@microchip.com> References: <20200514050301.147442-1-tudor.ambarus@microchip.com> In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: bootlin.com; dkim=none (message not signed) header.d=none;bootlin.com; dmarc=none action=none header.from=microchip.com; x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 6c2072aa-a530-4403-76f8-08d7f7c41a54 x-ms-traffictypediagnostic: BY5PR11MB4483: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:5516; 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Describe the flx4 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 2 ++ arch/arm/boot/dts/sama5d2.dtsi | 18 ++++++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index a0deff15fb9a..6ad66d034305 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -190,12 +190,14 @@ status = "okay"; uart9: serial@200 { + dmas = <0>, <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; status = "disabled"; /* Conflict with spi6 and i2c6. */ }; spi6: spi@400 { + dmas = <0>, <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>; status = "okay"; /* Conflict with uart5 and i2c6. */ diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index dde969a140b4..66aa8d6502d3 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -939,6 +939,15 @@ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; clock-names = "usart"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(19))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(20))>; + dma-names = "tx", "rx"; atmel,fifo-size = <32>; status = "disabled"; }; @@ -949,6 +958,15 @@ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; clock-names = "spi_clk"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(19))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(20))>; + dma-names = "tx", "rx"; atmel,fifo-size = <16>; status = "disabled"; }; From patchwork Thu May 14 05:03:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 11547799 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 98465913 for ; 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Describe the flx3 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 1 + arch/arm/boot/dts/at91-sama5d2_icp.dts | 1 + arch/arm/boot/dts/sama5d2.dtsi | 9 +++++++++ 3 files changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index 6ad66d034305..1aa8b79d618b 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -179,6 +179,7 @@ }; spi5: spi@400 { + dmas = <0>, <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx3_default>; status = "disabled"; /* Conflict with isc. */ diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 4a01ab8e7e70..559d8ae93af9 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -167,6 +167,7 @@ status = "okay"; spi5: spi@400 { + dmas = <0>, <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus1_spi &pinctrl_mikrobus1_spi_cs>; status = "okay"; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 66aa8d6502d3..5a0162915ae7 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -919,6 +919,15 @@ interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; clock-names = "spi_clk"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(17))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(18))>; + dma-names = "tx", "rx"; atmel,fifo-size = <16>; status = "disabled"; }; From patchwork Thu May 14 05:03:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 11547803 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8E8EF1746 for ; Thu, 14 May 2020 05:06:00 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 63F8C206D4 for ; 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Thu, 14 May 2020 05:03:13 +0000 From: To: , , Subject: [PATCH 10/16] ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function Thread-Topic: [PATCH 10/16] ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function Thread-Index: AQHWKaz4ykI3pcTezkS8vNPyyPejRA== Date: Thu, 14 May 2020 05:03:13 +0000 Message-ID: <20200514050301.147442-11-tudor.ambarus@microchip.com> References: <20200514050301.147442-1-tudor.ambarus@microchip.com> In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: bootlin.com; dkim=none (message not signed) header.d=none;bootlin.com; dmarc=none action=none header.from=microchip.com; x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 8b57620c-c9bd-487d-c73f-08d7f7c41b24 x-ms-traffictypediagnostic: BY5PR11MB4483: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:5516; 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Describe the flx1 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 1 - arch/arm/boot/dts/sama5d2.dtsi | 9 +++++++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index 1aa8b79d618b..0e159f879c15 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -127,7 +127,6 @@ i2c3: i2c@600 { dmas = <0>, <0>; - dma-names = "tx", "rx"; i2c-analog-filter; i2c-digital-filter; i2c-digital-filter-width-ns = <35>; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 5a0162915ae7..855846c74a32 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -712,6 +712,15 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(13))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(14))>; 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Thu, 14 May 2020 05:03:14 +0000 From: To: , , Subject: [PATCH 11/16] ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functions Thread-Topic: [PATCH 11/16] ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functions Thread-Index: AQHWKaz4isj8YfZrvECnXEeQAJYBzg== Date: Thu, 14 May 2020 05:03:14 +0000 Message-ID: <20200514050301.147442-12-tudor.ambarus@microchip.com> References: <20200514050301.147442-1-tudor.ambarus@microchip.com> In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: bootlin.com; dkim=none (message not signed) header.d=none;bootlin.com; dmarc=none action=none header.from=microchip.com; x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 0dd843bd-f163-4406-2d60-08d7f7c41bb7 x-ms-traffictypediagnostic: BY5PR11MB4136: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:5516; 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Describe the flx0 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama5d2_icp.dts | 1 + arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 1 - arch/arm/boot/dts/sama5d2.dtsi | 18 ++++++++++++++++++ 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 559d8ae93af9..8d19925fc09e 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -105,6 +105,7 @@ status = "okay"; spi2: spi@400 { + dmas = <0>, <0>; cs-gpios = <&pioA PIN_PC0 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus2_spi &pinctrl_ksz_spi_cs>; diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts index 8ad3a9c6c536..0e0341c83aa5 100644 --- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts @@ -192,7 +192,6 @@ i2c2: i2c@600 { dmas = <0>, <0>; - dma-names = "tx", "rx"; pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_flx0_default>; pinctrl-1 = <&pinctrl_flx0_gpio>; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 855846c74a32..5bba8024f485 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -661,6 +661,15 @@ interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; clock-names = "spi_clk"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(11))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(12))>; + dma-names = "tx", "rx"; atmel,fifo-size = <16>; status = "disabled"; }; @@ -672,6 +681,15 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(11))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(12))>; + dma-names = "tx", "rx"; atmel,fifo-size = <16>; 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Thu, 14 May 2020 05:03:15 +0000 From: To: , , Subject: [PATCH 12/16] ARM: dts: at91: sama5d2: Add missing flexcom definitions Thread-Topic: [PATCH 12/16] ARM: dts: at91: sama5d2: Add missing flexcom definitions Thread-Index: AQHWKaz5XueFWLPwRk6ZXAr8TP7nXw== Date: Thu, 14 May 2020 05:03:15 +0000 Message-ID: <20200514050301.147442-13-tudor.ambarus@microchip.com> References: <20200514050301.147442-1-tudor.ambarus@microchip.com> In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: bootlin.com; dkim=none (message not signed) header.d=none;bootlin.com; dmarc=none action=none header.from=microchip.com; x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 522b823b-c50d-447b-2060-08d7f7c41c2e x-ms-traffictypediagnostic: BY5PR11MB4040: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:3044; 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Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/sama5d2.dtsi | 79 ++++++++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 5bba8024f485..b8cdeedee6bc 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -723,6 +723,25 @@ status = "disabled"; }; + spi3: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; + clock-names = "spi_clk"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(13))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(14))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <16>; + status = "disabled"; + }; + i2c3: i2c@600 { compatible = "atmel,sama5d2-i2c"; reg = <0x600 0x200>; @@ -910,6 +929,45 @@ atmel,fifo-size = <32>; status = "disabled"; }; + + spi4: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; + clock-names = "spi_clk"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(15))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(16))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <16>; + status = "disabled"; + }; + + i2c4: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(15))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(16))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <16>; + status = "disabled"; + }; }; flx3: flexcom@fc014000 { @@ -958,6 +1016,27 @@ atmel,fifo-size = <16>; status = "disabled"; }; + + i2c5: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(17))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(18))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <16>; + status = "disabled"; + }; + }; flx4: flexcom@fc018000 { From patchwork Thu May 14 05:03:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 11547815 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BEE5260D for ; Thu, 14 May 2020 05:07:47 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A3992206D4 for ; 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Thu, 14 May 2020 05:03:16 +0000 From: To: , , Subject: [PATCH 13/16] ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi Thread-Topic: [PATCH 13/16] ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi Thread-Index: AQHWKaz6zm5AhRR5OkWBdP+dKKvzLA== Date: Thu, 14 May 2020 05:03:15 +0000 Message-ID: <20200514050301.147442-14-tudor.ambarus@microchip.com> References: <20200514050301.147442-1-tudor.ambarus@microchip.com> In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: bootlin.com; dkim=none (message not signed) header.d=none;bootlin.com; dmarc=none action=none header.from=microchip.com; x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: df3fdfab-af79-40c3-be46-08d7f7c41c8d x-ms-traffictypediagnostic: BY5PR11MB4483: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:8273; 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If an alias from the SoC dtsi is addressed by a driver that does not use any of the of_alias*() methods, we can drop it. This is the case for the i2s aliases, drop them. tcb aliases point to nodes that are not enabled in any of the sama5d2 based platforms. atmel_tclib.c is scheduled to go away, any board using that alias is already broken, so get rid of the tcb aliases too. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/sama5d2.dtsi | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index b8cdeedee6bc..c0a3ca8f9bf7 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -21,10 +21,6 @@ aliases { serial0 = &uart1; serial1 = &uart3; - tcb0 = &tcb0; - tcb1 = &tcb1; - i2s0 = &i2s0; - i2s1 = &i2s1; }; cpus { From patchwork Thu May 14 05:03:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 11547817 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D8C0460D for ; Thu, 14 May 2020 05:08:05 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BD67E206D4 for ; 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Thu, 14 May 2020 05:03:16 +0000 From: To: , , Subject: [PATCH 14/16] ARM: dts: at91: sama5d2_xplained: Add alias for DBGU Thread-Topic: [PATCH 14/16] ARM: dts: at91: sama5d2_xplained: Add alias for DBGU Thread-Index: AQHWKaz6EKQYTGVqKUifmquBLv69cw== Date: Thu, 14 May 2020 05:03:16 +0000 Message-ID: <20200514050301.147442-15-tudor.ambarus@microchip.com> References: <20200514050301.147442-1-tudor.ambarus@microchip.com> In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: bootlin.com; dkim=none (message not signed) header.d=none;bootlin.com; dmarc=none action=none header.from=microchip.com; x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: c8793658-1b2d-459d-4a3d-08d7f7c41cf5 x-ms-traffictypediagnostic: BY5PR11MB4483: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:3631; 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Don't rely on the aliases defined in the SoC dtsi and define the alias for the Serial DBGU in the board dts file. sama5d2 boards use the "serial0" alias for the Serial DBGU, do the same for sama5d2_xplained. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index da4442715ea5..01ffbddd4ab8 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -16,6 +16,10 @@ model = "Atmel SAMA5D2 Xplained"; compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5"; + aliases { + serial0 = &uart1; /* DBGU */ + }; + chosen { stdout-path = "serial0:115200n8"; }; From patchwork Thu May 14 05:03:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 11547821 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3003360D for ; Thu, 14 May 2020 05:08:43 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 08C17206D8 for ; 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Thu, 14 May 2020 05:03:17 +0000 From: To: , , Subject: [PATCH 15/16] ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function Thread-Topic: [PATCH 15/16] ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function Thread-Index: AQHWKaz63D7EDAmmS02hJMxEpz7A8Q== Date: Thu, 14 May 2020 05:03:17 +0000 Message-ID: <20200514050301.147442-16-tudor.ambarus@microchip.com> References: <20200514050301.147442-1-tudor.ambarus@microchip.com> In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: bootlin.com; dkim=none (message not signed) header.d=none;bootlin.com; dmarc=none action=none header.from=microchip.com; x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 0b09c713-a33f-4c75-de8b-08d7f7c41d61 x-ms-traffictypediagnostic: BY5PR11MB4483: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:8273; 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Describe the I2C Flexcom0 function. Add alias for the i2c2 node in order to not rely on probe order for the i2c device numbering. The sama5d2 SoC has two dedicated i2c buses and five flexcoms that can function as i2c. The i2c0 and i2c1 aliases are kept for the dedicated i2c buses, the i2c flexcom functions can be numbered in order starting from i2c2. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index 01ffbddd4ab8..77e5d4f5a102 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -18,6 +18,7 @@ aliases { serial0 = &uart1; /* DBGU */ + i2c2 = &i2c2; /* XPRO EXT2 */ }; chosen { @@ -336,6 +337,20 @@ pinctrl-0 = <&pinctrl_flx0_default>; status = "okay"; }; + + i2c2: i2c@600 { + dmas = <0>, <0>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_flx0_default>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + sda-gpios = <&pioA PIN_PB28 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA PIN_PB29 GPIO_ACTIVE_HIGH>; + i2c-sda-hold-time-ns = <350>; + i2c-analog-filter; + i2c-digital-filter; + i2c-digital-filter-width-ns = <35>; + status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */ + }; }; shdwc@f8048010 { @@ -523,6 +538,12 @@ bias-disable; }; + pinctrl_i2c2_gpio: i2c2_gpio { + pinmux = , + ; + bias-disable; + }; + pinctrl_i2s0_default: i2s0_default { pinmux = , , From patchwork Thu May 14 05:03:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 11547813 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B4234618 for ; Thu, 14 May 2020 05:07:28 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 999DD206D4 for ; Thu, 14 May 2020 05:07:28 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="pYB5pxJe"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="XK4pL8x4"; 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Thu, 14 May 2020 05:03:18 +0000 From: To: , , Subject: [PATCH 16/16] ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliases Thread-Topic: [PATCH 16/16] ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliases Thread-Index: AQHWKaz7B/63x91lDEatHaURenNffw== Date: Thu, 14 May 2020 05:03:17 +0000 Message-ID: <20200514050301.147442-17-tudor.ambarus@microchip.com> References: <20200514050301.147442-1-tudor.ambarus@microchip.com> In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: bootlin.com; dkim=none (message not signed) header.d=none;bootlin.com; dmarc=none action=none header.from=microchip.com; x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 690dd394-b430-4c24-69dc-08d7f7c41dd2 x-ms-traffictypediagnostic: BY5PR11MB4040: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:962; 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Specify that serial0 is for DBGU. This eases tester's life. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts index 0e0341c83aa5..45c671a2bcf2 100644 --- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts @@ -18,9 +18,9 @@ compatible = "atmel,sama5d2-ptc_ek", "atmel,sama5d2", "atmel,sama5"; aliases { - serial0 = &uart0; - i2c0 = &i2c0; - i2c1 = &i2c1; + serial0 = &uart0; /* DBGU */ + i2c0 = &i2c0; /* mikroBUS 1 */ + i2c1 = &i2c1; /* XPRO EXT1 */ i2c2 = &i2c2; };