From patchwork Wed May 20 21:13:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 11561583 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 05DAC739 for ; Wed, 20 May 2020 21:13:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E94B020873 for ; Wed, 20 May 2020 21:13:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727947AbgETVNq (ORCPT ); Wed, 20 May 2020 17:13:46 -0400 Received: from muru.com ([72.249.23.125]:55306 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727018AbgETVNp (ORCPT ); Wed, 20 May 2020 17:13:45 -0400 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id 279DF819C; Wed, 20 May 2020 21:14:34 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: "Andrew F . Davis" , Santosh Shilimkar , Suman Anna , Tero Kristo , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring Subject: [PATCH 1/6] dt-bindings: omap: Update PRM binding for genpd Date: Wed, 20 May 2020 14:13:29 -0700 Message-Id: <20200520211334.61814-2-tony@atomide.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200520211334.61814-1-tony@atomide.com> References: <20200520211334.61814-1-tony@atomide.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The PRM (Power and Reset Module) has registers to enable and disable power domains, so let's update the binding for that. Cc: devicetree@vger.kernel.org Cc: Rob Herring Signed-off-by: Tony Lindgren --- Documentation/devicetree/bindings/arm/omap/prm-inst.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/omap/prm-inst.txt b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt --- a/Documentation/devicetree/bindings/arm/omap/prm-inst.txt +++ b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt @@ -18,6 +18,7 @@ Required properties: (base address and length) Optional properties: +- #power-domain-cells: Should be 0 if the PRM instance is a power domain. - #reset-cells: Should be 1 if the PRM instance in question supports resets. Example: @@ -25,5 +26,6 @@ Example: prm_dsp2: prm@1b00 { compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; reg = <0x1b00 0x40>; + #power-domain-cells = <0>; #reset-cells = <1>; }; From patchwork Wed May 20 21:13:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 11561597 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A8E8690 for ; Wed, 20 May 2020 21:14:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 96A6720829 for ; Wed, 20 May 2020 21:14:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728425AbgETVNt (ORCPT ); Wed, 20 May 2020 17:13:49 -0400 Received: from muru.com ([72.249.23.125]:55314 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728396AbgETVNs (ORCPT ); Wed, 20 May 2020 17:13:48 -0400 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id D339581BF; Wed, 20 May 2020 21:14:35 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: "Andrew F . Davis" , Santosh Shilimkar , Suman Anna , Tero Kristo , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Rob Herring , devicetree@vger.kernel.org Subject: [PATCH 2/6] soc: ti: omap-prm: Add basic power domain support Date: Wed, 20 May 2020 14:13:30 -0700 Message-Id: <20200520211334.61814-3-tony@atomide.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200520211334.61814-1-tony@atomide.com> References: <20200520211334.61814-1-tony@atomide.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The PRM controller has currently only support for resets while the power domains are still handled in the platform code. Let's add basic power domain support to enable and disable a PRM controlled power domain if configured in the devicetree. This can be used for various hardware accelerators, and interconnect instances. Further support can be added later on as needed for runtime configuration based on domain-idle-states. Signed-off-by: Tony Lindgren Reported-by: kbuild test robot --- arch/arm/mach-omap2/Kconfig | 1 + drivers/soc/ti/omap_prm.c | 261 +++++++++++++++++++++++++++++++++++- 2 files changed, 261 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -7,6 +7,7 @@ config ARCH_OMAP2 depends on ARCH_MULTI_V6 select ARCH_OMAP2PLUS select CPU_V6 + select PM_GENERIC_DOMAINS if PM select SOC_HAS_OMAP2_SDRC config ARCH_OMAP3 diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c --- a/drivers/soc/ti/omap_prm.c +++ b/drivers/soc/ti/omap_prm.c @@ -10,14 +10,39 @@ #include #include #include +#include #include #include #include +#include #include #include #include +enum omap_prm_domain_mode { + OMAP_PRMD_OFF, + OMAP_PRMD_RETENTION, + OMAP_PRMD_ON_INACTIVE, + OMAP_PRMD_ON_ACTIVE, +}; + +struct omap_prm_domain_map { + unsigned int usable_modes; /* Mask of hardware supported modes */ + unsigned long statechange:1; /* Optional low-power state change */ + unsigned long logicretstate:1; /* Optional logic off mode */ +}; + +struct omap_prm_domain { + struct device *dev; + struct omap_prm *prm; + struct generic_pm_domain pd; + u16 pwrstctrl; + u16 pwrstst; + const struct omap_prm_domain_map *cap; + u32 pwrstctrl_saved; +}; + struct omap_rst_map { s8 rst; s8 st; @@ -27,6 +52,9 @@ struct omap_prm_data { u32 base; const char *name; const char *clkdm_name; + u16 pwrstctrl; + u16 pwrstst; + const struct omap_prm_domain_map *dmap; u16 rstctrl; u16 rstst; const struct omap_rst_map *rstmap; @@ -36,6 +64,7 @@ struct omap_prm_data { struct omap_prm { const struct omap_prm_data *data; void __iomem *base; + struct omap_prm_domain *prmd; }; struct omap_reset_data { @@ -47,6 +76,7 @@ struct omap_reset_data { struct device *dev; }; +#define genpd_to_prm_domain(gpd) container_of(gpd, struct omap_prm_domain, pd) #define to_omap_reset_data(p) container_of((p), struct omap_reset_data, rcdev) #define OMAP_MAX_RESETS 8 @@ -58,6 +88,43 @@ struct omap_reset_data { #define OMAP_PRM_HAS_RESETS (OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_RSTST) +#define PRM_STATE_MAX_WAIT 10000 +#define PRM_LOGICRETSTATE BIT(2) +#define PRM_LOWPOWERSTATECHANGE BIT(4) +#define PRM_POWERSTATE_MASK OMAP_PRMD_ON_ACTIVE + +#define PRM_ST_INTRANSITION BIT(20) + +static const struct __maybe_unused +omap_prm_domain_map omap_prm_all = { + .usable_modes = BIT(OMAP_PRMD_ON_ACTIVE) | BIT(OMAP_PRMD_ON_INACTIVE) | + BIT(OMAP_PRMD_RETENTION) | BIT(OMAP_PRMD_OFF), + .statechange = 1, + .logicretstate = 1, +}; + +static const struct __maybe_unused +omap_prm_domain_map omap_prm_noinact = { + .usable_modes = BIT(OMAP_PRMD_ON_ACTIVE) | BIT(OMAP_PRMD_RETENTION) | + BIT(OMAP_PRMD_OFF), + .statechange = 1, + .logicretstate = 1, +}; + +static const struct __maybe_unused +omap_prm_domain_map omap_prm_nooff = { + .usable_modes = BIT(OMAP_PRMD_ON_ACTIVE) | BIT(OMAP_PRMD_ON_INACTIVE) | + BIT(OMAP_PRMD_RETENTION), + .statechange = 1, + .logicretstate = 1, +}; + +static const struct __maybe_unused +omap_prm_domain_map omap_prm_onoff_noauto = { + .usable_modes = BIT(OMAP_PRMD_ON_ACTIVE) | BIT(OMAP_PRMD_OFF), + .statechange = 1, +}; + static const struct omap_rst_map rst_map_0[] = { { .rst = 0, .st = 0 }, { .rst = -1 }, @@ -151,6 +218,183 @@ static const struct of_device_id omap_prm_id_table[] = { { }, }; +#ifdef DEBUG +static void omap_prm_domain_show_state(struct omap_prm_domain *prmd, + const char *desc) +{ + dev_dbg(prmd->dev, "%s %s: %08x/%08x\n", + prmd->pd.name, desc, + readl_relaxed(prmd->prm->base + prmd->pwrstctrl), + readl_relaxed(prmd->prm->base + prmd->pwrstst)); +} +#else +static inline void omap_prm_domain_show_state(struct omap_prm_domain *prmd, + const char *desc) +{ +} +#endif + +static int omap_prm_domain_power_on(struct generic_pm_domain *domain) +{ + struct omap_prm_domain *prmd; + int ret; + u32 v; + + prmd = genpd_to_prm_domain(domain); + if (!prmd->cap) + return 0; + + omap_prm_domain_show_state(prmd, "on: previous state"); + + if (prmd->pwrstctrl_saved) + v = prmd->pwrstctrl_saved; + else + v = readl_relaxed(prmd->prm->base + prmd->pwrstctrl); + + writel_relaxed(v | OMAP_PRMD_ON_ACTIVE, + prmd->prm->base + prmd->pwrstctrl); + + /* wait for the transition bit to get cleared */ + ret = readl_relaxed_poll_timeout(prmd->prm->base + prmd->pwrstst, + v, !(v & PRM_ST_INTRANSITION), 1, + PRM_STATE_MAX_WAIT); + if (ret) + dev_err(prmd->dev, "%s: %s timed out\n", + prmd->pd.name, __func__); + + omap_prm_domain_show_state(prmd, "on: new state"); + + return ret; +} + +/* No need to check for holes in the mask for the lowest mode */ +static int omap_prm_domain_find_lowest(struct omap_prm_domain *prmd) +{ + return __ffs(prmd->cap->usable_modes); +} + +static int omap_prm_domain_power_off(struct generic_pm_domain *domain) +{ + struct omap_prm_domain *prmd; + int ret; + u32 v; + + prmd = genpd_to_prm_domain(domain); + if (!prmd->cap) + return 0; + + omap_prm_domain_show_state(prmd, "off: previous state"); + + v = readl_relaxed(prmd->prm->base + prmd->pwrstctrl); + prmd->pwrstctrl_saved = v; + + v &= ~PRM_POWERSTATE_MASK; + v |= omap_prm_domain_find_lowest(prmd); + + if (prmd->cap->statechange) + v |= PRM_LOWPOWERSTATECHANGE; + if (prmd->cap->logicretstate) + v &= ~PRM_LOGICRETSTATE; + else + v |= PRM_LOGICRETSTATE; + + writel_relaxed(v, prmd->prm->base + prmd->pwrstctrl); + + /* wait for the transition bit to get cleared */ + ret = readl_relaxed_poll_timeout(prmd->prm->base + prmd->pwrstst, + v, !(v & PRM_ST_INTRANSITION), 1, + PRM_STATE_MAX_WAIT); + if (ret) + dev_warn(prmd->dev, "%s: %s timed out\n", + __func__, prmd->pd.name); + + omap_prm_domain_show_state(prmd, "off: new state"); + + return 0; +} + +static int omap_prm_domain_attach_dev(struct generic_pm_domain *domain, + struct device *dev) +{ + struct generic_pm_domain_data *genpd_data; + struct of_phandle_args pd_args; + struct omap_prm_domain *prmd; + struct device_node *np; + int ret; + + prmd = genpd_to_prm_domain(domain); + np = dev->of_node; + + ret = of_parse_phandle_with_args(np, "power-domains", + "#power-domain-cells", 0, &pd_args); + if (ret < 0) + return ret; + + if (pd_args.args_count != 0) + dev_warn(dev, "%s: unusupported #power-domain-cells: %i\n", + prmd->pd.name, pd_args.args_count); + + genpd_data = dev_gpd_data(dev); + genpd_data->data = NULL; + + return 0; +} + +static void omap_prm_domain_detach_dev(struct generic_pm_domain *domain, + struct device *dev) +{ + struct generic_pm_domain_data *genpd_data; + struct omap_prm_domain *prmd; + + prmd = genpd_to_prm_domain(domain); + + genpd_data = dev_gpd_data(dev); + genpd_data->data = NULL; +} + +static int omap_prm_domain_init(struct device *dev, struct omap_prm *prm) +{ + struct omap_prm_domain *prmd; + struct device_node *np = dev->of_node; + const struct omap_prm_data *data; + const char *name; + int error; + + if (!of_find_property(dev->of_node, "#power-domain-cells", NULL)) + return 0; + + of_node_put(dev->of_node); + + prmd = devm_kzalloc(dev, sizeof(*prmd), GFP_KERNEL); + if (!prmd) + return -ENOMEM; + + data = prm->data; + name = devm_kasprintf(dev, GFP_KERNEL, "prm_%s", + data->name); + + prmd->dev = dev; + prmd->prm = prm; + prmd->cap = prmd->prm->data->dmap; + prmd->pwrstctrl = prmd->prm->data->pwrstctrl; + prmd->pwrstst = prmd->prm->data->pwrstst; + + prmd->pd.name = name; + prmd->pd.power_on = omap_prm_domain_power_on; + prmd->pd.power_off = omap_prm_domain_power_off; + prmd->pd.attach_dev = omap_prm_domain_attach_dev; + prmd->pd.detach_dev = omap_prm_domain_detach_dev; + + pm_genpd_init(&prmd->pd, NULL, true); + error = of_genpd_add_provider_simple(np, &prmd->pd); + if (error) + pm_genpd_remove(&prmd->pd); + else + prm->prmd = prmd; + + return error; +} + static bool _is_valid_reset(struct omap_reset_data *reset, unsigned long id) { if (reset->mask & BIT(id)) @@ -351,6 +595,7 @@ static int omap_prm_probe(struct platform_device *pdev) const struct omap_prm_data *data; struct omap_prm *prm; const struct of_device_id *match; + int ret; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) @@ -378,7 +623,21 @@ static int omap_prm_probe(struct platform_device *pdev) if (IS_ERR(prm->base)) return PTR_ERR(prm->base); - return omap_prm_reset_init(pdev, prm); + ret = omap_prm_domain_init(&pdev->dev, prm); + if (ret) + return ret; + + ret = omap_prm_reset_init(pdev, prm); + if (ret) + goto err_domain; + + return 0; + +err_domain: + of_genpd_del_provider(pdev->dev.of_node); + pm_genpd_remove(&prm->prmd->pd); + + return ret; } static struct platform_driver omap_prm_driver = { From patchwork Wed May 20 21:13:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 11561593 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 24B9F739 for ; Wed, 20 May 2020 21:14:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 182C92088E for ; Wed, 20 May 2020 21:14:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728522AbgETVOE (ORCPT ); Wed, 20 May 2020 17:14:04 -0400 Received: from muru.com ([72.249.23.125]:55320 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728421AbgETVNu (ORCPT ); Wed, 20 May 2020 17:13:50 -0400 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id 3873C81C7; Wed, 20 May 2020 21:14:38 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: "Andrew F . Davis" , Santosh Shilimkar , Suman Anna , Tero Kristo , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Rob Herring , devicetree@vger.kernel.org Subject: [PATCH 3/6] soc: ti: omap-prm: Configure sgx power domain for am3 and am4 Date: Wed, 20 May 2020 14:13:31 -0700 Message-Id: <20200520211334.61814-4-tony@atomide.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200520211334.61814-1-tony@atomide.com> References: <20200520211334.61814-1-tony@atomide.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Let's configure only sgx power domain for am3 and am4 to start with. Signed-off-by: Tony Lindgren --- drivers/soc/ti/omap_prm.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c --- a/drivers/soc/ti/omap_prm.c +++ b/drivers/soc/ti/omap_prm.c @@ -186,7 +186,11 @@ static const struct omap_prm_data am3_prm_data[] = { { .name = "per", .base = 0x44e00c00, .rstctrl = 0x0, .rstmap = am3_per_rst_map, .flags = OMAP_PRM_HAS_RSTCTRL, .clkdm_name = "pruss_ocp" }, { .name = "wkup", .base = 0x44e00d00, .rstctrl = 0x0, .rstst = 0xc, .rstmap = am3_wkup_rst_map, .flags = OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_NO_CLKDM }, { .name = "device", .base = 0x44e00f00, .rstctrl = 0x0, .rstst = 0x8, .rstmap = rst_map_01, .flags = OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_NO_CLKDM }, - { .name = "gfx", .base = 0x44e01100, .rstctrl = 0x4, .rstst = 0x14, .rstmap = rst_map_0, .clkdm_name = "gfx_l3" }, + { + .name = "gfx", .base = 0x44e01100, + .pwrstctrl = 0, .pwrstst = 0x10, .dmap = &omap_prm_noinact, + .rstctrl = 0x4, .rstst = 0x14, .rstmap = rst_map_0, .clkdm_name = "gfx_l3", + }, { }, }; @@ -202,7 +206,11 @@ static const struct omap_rst_map am4_device_rst_map[] = { }; static const struct omap_prm_data am4_prm_data[] = { - { .name = "gfx", .base = 0x44df0400, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_0, .clkdm_name = "gfx_l3" }, + { + .name = "gfx", .base = 0x44df0400, + .pwrstctrl = 0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto, + .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_0, .clkdm_name = "gfx_l3", + }, { .name = "per", .base = 0x44df0800, .rstctrl = 0x10, .rstst = 0x14, .rstmap = am4_per_rst_map, .clkdm_name = "pruss_ocp" }, { .name = "wkup", .base = 0x44df2000, .rstctrl = 0x10, .rstst = 0x14, .rstmap = am3_wkup_rst_map, .flags = OMAP_PRM_HAS_NO_CLKDM }, { .name = "device", .base = 0x44df4000, .rstctrl = 0x0, .rstst = 0x4, .rstmap = am4_device_rst_map, .flags = OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_NO_CLKDM }, From patchwork Wed May 20 21:13:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 11561587 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4F45090 for ; Wed, 20 May 2020 21:13:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 42A632084C for ; Wed, 20 May 2020 21:13:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728447AbgETVNv (ORCPT ); Wed, 20 May 2020 17:13:51 -0400 Received: from muru.com ([72.249.23.125]:55326 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728439AbgETVNv (ORCPT ); Wed, 20 May 2020 17:13:51 -0400 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id 2F99D8108; Wed, 20 May 2020 21:14:40 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: "Andrew F . Davis" , Santosh Shilimkar , Suman Anna , Tero Kristo , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Rob Herring , devicetree@vger.kernel.org Subject: [PATCH 4/6] soc: ti: omap-prm: Configure omap4 and 5 l4_abe power domain Date: Wed, 20 May 2020 14:13:32 -0700 Message-Id: <20200520211334.61814-5-tony@atomide.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200520211334.61814-1-tony@atomide.com> References: <20200520211334.61814-1-tony@atomide.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Let's add omap4 and 5 l4_abe interconnect instance for the power domain. Signed-off-by: Tony Lindgren --- drivers/soc/ti/omap_prm.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c --- a/drivers/soc/ti/omap_prm.c +++ b/drivers/soc/ti/omap_prm.c @@ -145,6 +145,10 @@ static const struct omap_rst_map rst_map_012[] = { static const struct omap_prm_data omap4_prm_data[] = { { .name = "tesla", .base = 0x4a306400, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01 }, + { + .name = "abe", .base = 0x4a306500, + .pwrstctrl = 0, .pwrstst = 0x4, .dmap = &omap_prm_all, + }, { .name = "core", .base = 0x4a306700, .rstctrl = 0x210, .rstst = 0x214, .clkdm_name = "ducati", .rstmap = rst_map_012 }, { .name = "ivahd", .base = 0x4a306f00, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_012 }, { .name = "device", .base = 0x4a307b00, .rstctrl = 0x0, .rstst = 0x4, .rstmap = rst_map_01, .flags = OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_NO_CLKDM }, @@ -153,6 +157,10 @@ static const struct omap_prm_data omap4_prm_data[] = { static const struct omap_prm_data omap5_prm_data[] = { { .name = "dsp", .base = 0x4ae06400, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01 }, + { + .name = "abe", .base = 0x4ae06500, + .pwrstctrl = 0, .pwrstst = 0x4, .dmap = &omap_prm_nooff, + }, { .name = "core", .base = 0x4ae06700, .rstctrl = 0x210, .rstst = 0x214, .clkdm_name = "ipu", .rstmap = rst_map_012 }, { .name = "iva", .base = 0x4ae07200, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_012 }, { .name = "device", .base = 0x4ae07c00, .rstctrl = 0x0, .rstst = 0x4, .rstmap = rst_map_01, .flags = OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_NO_CLKDM }, From patchwork Wed May 20 21:13:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 11561591 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CC80C90 for ; Wed, 20 May 2020 21:14:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BD4C92088E for ; Wed, 20 May 2020 21:14:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728475AbgETVNz (ORCPT ); Wed, 20 May 2020 17:13:55 -0400 Received: from muru.com ([72.249.23.125]:55332 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728472AbgETVNy (ORCPT ); Wed, 20 May 2020 17:13:54 -0400 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id B57AD81D8; Wed, 20 May 2020 21:14:41 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: "Andrew F . Davis" , Santosh Shilimkar , Suman Anna , Tero Kristo , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Rob Herring , devicetree@vger.kernel.org Subject: [PATCH 5/6] ARM: dts: Configure am3 and am4 sgx for genpd and drop platform data Date: Wed, 20 May 2020 14:13:33 -0700 Message-Id: <20200520211334.61814-6-tony@atomide.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200520211334.61814-1-tony@atomide.com> References: <20200520211334.61814-1-tony@atomide.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org We can power off the SGX power domain when not in use when we configure it for genpd. And with that change, we can now also drop the old unused legacy platform data. Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am33xx.dtsi | 2 + arch/arm/boot/dts/am4372.dtsi | 2 + .../omap_hwmod_33xx_43xx_interconnect_data.c | 16 -------- .../omap_hwmod_33xx_43xx_ipblock_data.c | 40 ------------------- arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 2 - arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 2 - 6 files changed, 4 insertions(+), 60 deletions(-) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -577,6 +577,7 @@ target-module@56000000 { ; clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>; clock-names = "fck"; + power-domains = <&prm_gfx>; resets = <&prm_gfx 0>; reset-names = "rstctrl"; #address-cells = <1>; @@ -616,6 +617,7 @@ prm_device: prm@f00 { prm_gfx: prm@1100 { compatible = "ti,am3-prm-inst", "ti,omap-prm-inst"; reg = <0x1100 0x100>; + #power-domain-cells = <0>; #reset-cells = <1>; }; }; diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -516,6 +516,7 @@ target-module@56000000 { ; clocks = <&gfx_l3_clkctrl AM4_GFX_L3_GFX_CLKCTRL 0>; clock-names = "fck"; + power-domains = <&prm_gfx>; resets = <&prm_gfx 0>; reset-names = "rstctrl"; #address-cells = <1>; @@ -532,6 +533,7 @@ &prcm { prm_gfx: prm@400 { compatible = "ti,am4-prm-inst", "ti,omap-prm-inst"; reg = <0x400 0x100>; + #power-domain-cells = <0>; #reset-cells = <1>; }; diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c @@ -74,22 +74,6 @@ struct omap_hwmod_ocp_if am33xx_l3_s__l3_main = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* gfx -> l3 main */ -struct omap_hwmod_ocp_if am33xx_gfx__l3_main = { - .master = &am33xx_gfx_hwmod, - .slave = &am33xx_l3_main_hwmod, - .clk = "dpll_core_m4_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3 main -> gfx */ -struct omap_hwmod_ocp_if am33xx_l3_main__gfx = { - .master = &am33xx_l3_main_hwmod, - .slave = &am33xx_gfx_hwmod, - .clk = "dpll_core_m4_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4 wkup -> rtc */ struct omap_hwmod_ocp_if am33xx_l4_wkup__rtc = { .master = &am33xx_l4_wkup_hwmod, diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c @@ -133,30 +133,6 @@ struct omap_hwmod_class am33xx_wkup_m3_hwmod_class = { .name = "wkup_m3", }; -/* gfx */ -/* Pseudo hwmod for reset control purpose only */ -static struct omap_hwmod_class am33xx_gfx_hwmod_class = { - .name = "gfx", -}; - -static struct omap_hwmod_rst_info am33xx_gfx_resets[] = { - { .name = "gfx", .rst_shift = 0, .st_shift = 0}, -}; - -struct omap_hwmod am33xx_gfx_hwmod = { - .name = "gfx", - .class = &am33xx_gfx_hwmod_class, - .clkdm_name = "gfx_l3_clkdm", - .main_clk = "gfx_fck_div_ck", - .prcm = { - .omap4 = { - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .rst_lines = am33xx_gfx_resets, - .rst_lines_cnt = ARRAY_SIZE(am33xx_gfx_resets), -}; - /* * 'prcm' class * power and reset manager (whole prcm infrastructure) @@ -379,22 +355,14 @@ static void omap_hwmod_am33xx_clkctrl(void) CLKCTRL(am33xx_l4_ls_hwmod, AM33XX_CM_PER_L4LS_CLKCTRL_OFFSET); CLKCTRL(am33xx_l4_wkup_hwmod, AM33XX_CM_WKUP_L4WKUP_CLKCTRL_OFFSET); CLKCTRL(am33xx_l3_main_hwmod, AM33XX_CM_PER_L3_CLKCTRL_OFFSET); - CLKCTRL(am33xx_gfx_hwmod, AM33XX_CM_GFX_GFX_CLKCTRL_OFFSET); CLKCTRL(am33xx_mpu_hwmod , AM33XX_CM_MPU_MPU_CLKCTRL_OFFSET); CLKCTRL(am33xx_l3_instr_hwmod , AM33XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET); CLKCTRL(am33xx_ocmcram_hwmod , AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET); } -static void omap_hwmod_am33xx_rst(void) -{ - RSTCTRL(am33xx_gfx_hwmod, AM33XX_RM_GFX_RSTCTRL_OFFSET); - RSTST(am33xx_gfx_hwmod, AM33XX_RM_GFX_RSTST_OFFSET); -} - void omap_hwmod_am33xx_reg(void) { omap_hwmod_am33xx_clkctrl(); - omap_hwmod_am33xx_rst(); } static void omap_hwmod_am43xx_clkctrl(void) @@ -410,20 +378,12 @@ static void omap_hwmod_am43xx_clkctrl(void) CLKCTRL(am33xx_l4_ls_hwmod, AM43XX_CM_PER_L4LS_CLKCTRL_OFFSET); CLKCTRL(am33xx_l4_wkup_hwmod, AM43XX_CM_WKUP_L4WKUP_CLKCTRL_OFFSET); CLKCTRL(am33xx_l3_main_hwmod, AM43XX_CM_PER_L3_CLKCTRL_OFFSET); - CLKCTRL(am33xx_gfx_hwmod, AM43XX_CM_GFX_GFX_CLKCTRL_OFFSET); CLKCTRL(am33xx_mpu_hwmod , AM43XX_CM_MPU_MPU_CLKCTRL_OFFSET); CLKCTRL(am33xx_l3_instr_hwmod , AM43XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET); CLKCTRL(am33xx_ocmcram_hwmod , AM43XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET); } -static void omap_hwmod_am43xx_rst(void) -{ - RSTCTRL(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTCTRL_OFFSET); - RSTST(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTST_OFFSET); -} - void omap_hwmod_am43xx_reg(void) { omap_hwmod_am43xx_clkctrl(); - omap_hwmod_am43xx_rst(); } diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c @@ -282,10 +282,8 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l3_main__l4_hs, &am33xx_l3_main__l3_s, &am33xx_l3_main__l3_instr, - &am33xx_l3_main__gfx, &am33xx_l3_s__l3_main, &am33xx_wkup_m3__l4_wkup, - &am33xx_gfx__l3_main, &am33xx_l3_main__debugss, &am33xx_l4_wkup__wkup_m3, &am33xx_l4_wkup__control, diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c @@ -243,11 +243,9 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am43xx_l3_main__l4_hs, &am33xx_l3_main__l3_s, &am33xx_l3_main__l3_instr, - &am33xx_l3_main__gfx, &am33xx_l3_s__l3_main, &am43xx_l3_main__emif, &am43xx_wkup_m3__l4_wkup, - &am33xx_gfx__l3_main, &am43xx_l4_wkup__wkup_m3, &am43xx_l4_wkup__control, &am43xx_l4_wkup__smartreflex0, From patchwork Wed May 20 21:13:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 11561589 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 897C3739 for ; Wed, 20 May 2020 21:14:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 73A752084C for ; Wed, 20 May 2020 21:14:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728486AbgETVN5 (ORCPT ); Wed, 20 May 2020 17:13:57 -0400 Received: from muru.com ([72.249.23.125]:55340 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728439AbgETVN4 (ORCPT ); Wed, 20 May 2020 17:13:56 -0400 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id B6EBD81BF; Wed, 20 May 2020 21:14:43 +0000 (UTC) From: Tony Lindgren To: linux-omap@vger.kernel.org Cc: "Andrew F . Davis" , Santosh Shilimkar , Suman Anna , Tero Kristo , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Rob Herring , devicetree@vger.kernel.org Subject: [PATCH 6/6] ARM: dts: Configure omap4 and 5 l4_abe for genpd and drop platform data Date: Wed, 20 May 2020 14:13:34 -0700 Message-Id: <20200520211334.61814-7-tony@atomide.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200520211334.61814-1-tony@atomide.com> References: <20200520211334.61814-1-tony@atomide.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org We can power off l4_abe domain when not in use when we configure it for genpd. And with that change, we can now also drop the old unused legacy platform data. Note that we also need to now use "simple-pm-bus" instead of "simple-bus" for PM runtime to get enabled for the bus. Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4-l4-abe.dtsi | 6 ++-- arch/arm/boot/dts/omap4.dtsi | 6 ++++ arch/arm/boot/dts/omap5-l4-abe.dtsi | 6 ++-- arch/arm/boot/dts/omap5.dtsi | 6 ++++ arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 33 ---------------------- arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 31 -------------------- 6 files changed, 20 insertions(+), 68 deletions(-) diff --git a/arch/arm/boot/dts/omap4-l4-abe.dtsi b/arch/arm/boot/dts/omap4-l4-abe.dtsi --- a/arch/arm/boot/dts/omap4-l4-abe.dtsi +++ b/arch/arm/boot/dts/omap4-l4-abe.dtsi @@ -1,14 +1,16 @@ &l4_abe { /* 0x40100000 */ - compatible = "ti,omap4-l4-abe", "simple-bus"; + compatible = "ti,omap4-l4-abe", "simple-pm-bus"; reg = <0x40100000 0x400>, <0x40100400 0x400>; reg-names = "la", "ap"; + power-domains = <&prm_abe>; + /* OMAP4_L4_ABE_CLKCTRL is read-only */ #address-cells = <1>; #size-cells = <1>; ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */ <0x49000000 0x49000000 0x100000>; segment@0 { /* 0x40100000 */ - compatible = "simple-bus"; + compatible = "simple-pm-bus"; #address-cells = <1>; #size-cells = <1>; ranges = diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -637,6 +637,12 @@ prm_tesla: prm@400 { #reset-cells = <1>; }; + prm_abe: prm@500 { + compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst"; + reg = <0x500 0x100>; + #power-domain-cells = <0>; + }; + prm_core: prm@700 { compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst"; reg = <0x700 0x100>; diff --git a/arch/arm/boot/dts/omap5-l4-abe.dtsi b/arch/arm/boot/dts/omap5-l4-abe.dtsi --- a/arch/arm/boot/dts/omap5-l4-abe.dtsi +++ b/arch/arm/boot/dts/omap5-l4-abe.dtsi @@ -1,14 +1,16 @@ &l4_abe { /* 0x40100000 */ - compatible = "ti,omap5-l4-abe", "simple-bus"; + compatible = "ti,omap5-l4-abe", "simple-pm-bus"; reg = <0x40100000 0x400>, <0x40100400 0x400>; reg-names = "la", "ap"; + power-domains = <&prm_abe>; + /* OMAP5_L4_ABE_CLKCTRL is read-only */ #address-cells = <1>; #size-cells = <1>; ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */ <0x49000000 0x49000000 0x100000>; segment@0 { /* 0x40100000 */ - compatible = "simple-bus"; + compatible = "simple-pm-bus"; #address-cells = <1>; #size-cells = <1>; ranges = diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -563,6 +563,12 @@ prm_dsp: prm@400 { #reset-cells = <1>; }; + prm_abe: prm@500 { + compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst"; + reg = <0x500 0x100>; + #power-domain-cells = <0>; + }; + prm_core: prm@700 { compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst"; reg = <0x700 0x100>; diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -124,21 +124,6 @@ static struct omap_hwmod_class omap44xx_l4_hwmod_class = { .name = "l4", }; -/* l4_abe */ -static struct omap_hwmod omap44xx_l4_abe_hwmod = { - .name = "l4_abe", - .class = &omap44xx_l4_hwmod_class, - .clkdm_name = "abe_clkdm", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ABE_AESS_CONTEXT_OFFSET, - .lostcontext_mask = OMAP4430_LOSTMEM_AESSMEM_MASK, - .flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT, - }, - }, -}; - /* l4_cfg */ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { .name = "l4_cfg", @@ -1007,22 +992,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l3_main_1 -> l4_abe */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_abe = { - .master = &omap44xx_l3_main_1_hwmod, - .slave = &omap44xx_l4_abe_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mpu -> l4_abe */ -static struct omap_hwmod_ocp_if omap44xx_mpu__l4_abe = { - .master = &omap44xx_mpu_hwmod, - .slave = &omap44xx_l4_abe_hwmod, - .clk = "ocp_abe_iclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l3_main_1 -> l4_cfg */ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = { .master = &omap44xx_l3_main_1_hwmod, @@ -1266,8 +1235,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_l3_main_1__l3_main_3, &omap44xx_l3_main_2__l3_main_3, &omap44xx_l4_cfg__l3_main_3, - &omap44xx_l3_main_1__l4_abe, - &omap44xx_mpu__l4_abe, &omap44xx_l3_main_1__l4_cfg, &omap44xx_l3_main_2__l4_per, &omap44xx_l4_cfg__l4_wkup, diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c @@ -121,19 +121,6 @@ static struct omap_hwmod_class omap54xx_l4_hwmod_class = { .name = "l4", }; -/* l4_abe */ -static struct omap_hwmod omap54xx_l4_abe_hwmod = { - .name = "l4_abe", - .class = &omap54xx_l4_hwmod_class, - .clkdm_name = "abe_clkdm", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP54XX_CM_ABE_L4_ABE_CLKCTRL_OFFSET, - .flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT, - }, - }, -}; - /* l4_cfg */ static struct omap_hwmod omap54xx_l4_cfg_hwmod = { .name = "l4_cfg", @@ -618,22 +605,6 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__l3_main_3 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l3_main_1 -> l4_abe */ -static struct omap_hwmod_ocp_if omap54xx_l3_main_1__l4_abe = { - .master = &omap54xx_l3_main_1_hwmod, - .slave = &omap54xx_l4_abe_hwmod, - .clk = "abe_iclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mpu -> l4_abe */ -static struct omap_hwmod_ocp_if omap54xx_mpu__l4_abe = { - .master = &omap54xx_mpu_hwmod, - .slave = &omap54xx_l4_abe_hwmod, - .clk = "abe_iclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l3_main_1 -> l4_cfg */ static struct omap_hwmod_ocp_if omap54xx_l3_main_1__l4_cfg = { .master = &omap54xx_l3_main_1_hwmod, @@ -741,8 +712,6 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = { &omap54xx_l3_main_1__l3_main_3, &omap54xx_l3_main_2__l3_main_3, &omap54xx_l4_cfg__l3_main_3, - &omap54xx_l3_main_1__l4_abe, - &omap54xx_mpu__l4_abe, &omap54xx_l3_main_1__l4_cfg, &omap54xx_l3_main_2__l4_per, &omap54xx_l3_main_1__l4_wkup,