From patchwork Wed Oct 10 21:20:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raju P.L.S.S.S.N" X-Patchwork-Id: 10635295 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EB9AE17E3 for ; Wed, 10 Oct 2018 21:21:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DD63F2AE98 for ; Wed, 10 Oct 2018 21:21:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D9EDF2AEA8; Wed, 10 Oct 2018 21:21:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.2 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,FROM_LOCAL_NOVOWEL,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 28FD32AE6D for ; Wed, 10 Oct 2018 21:21:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726051AbeJKEp2 (ORCPT ); Thu, 11 Oct 2018 00:45:28 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:37774 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725868AbeJKEp1 (ORCPT ); Thu, 11 Oct 2018 00:45:27 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id E481B60B7A; Wed, 10 Oct 2018 21:21:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1539206486; bh=Wgz+OIgHIlsxrkWgLNQ317LbpzFWiR/RC4D+psOfXOw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IZ3VQmk3TOej6jV6n0cofbdgIg3lROOm5XS6wZC6PdYDX57VTH6k5c4RBXoO9S2nE PSqmWy7/HP40w4RAoz/3vFI4In+psnijEGQdnCLwPk6q+6iN85U1xWLeFVSy8axDSD ulBObwgreco8wHX+KCvqrvhB8+qfSmtGuvyB/z1A= Received: from rplsssn-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rplsssn@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id E68C260B7A; Wed, 10 Oct 2018 21:21:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1539206485; bh=Wgz+OIgHIlsxrkWgLNQ317LbpzFWiR/RC4D+psOfXOw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=d9ojuZPbT7cBRMU55SSFE00kOdyYFNO3iSqaANYJa9QgFP25cmibY/D3LrU1u5hsU 7B9TeIDVArDW/wG0lI2XAnMdiKGAUXHXgH4WG+Cq4KUndljgUE+0gX6ETwwzoWVoH8 T3SYKENyyLF0zA7ll1qo3v4T8cETOUDTen/7xty0= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E68C260B7A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rplsssn@codeaurora.org From: "Raju P.L.S.S.S.N" To: andy.gross@linaro.org, david.brown@linaro.org, rjw@rjwysocki.net, ulf.hansson@linaro.org, khilman@kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, mka@chromium.org, ilina@codeaurora.org, "Raju P.L.S.S.S.N" Subject: [PATCH RFC v1 1/8] PM / Domains: Add helper functions to attach/detach CPUs to/from genpd Date: Thu, 11 Oct 2018 02:50:48 +0530 Message-Id: <1539206455-29342-2-git-send-email-rplsssn@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> References: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ulf Hansson Introduce two new genpd helper functions, of_genpd_attach|detach_cpu(), which takes the CPU-number as an in-parameter. To attach a CPU to a genpd, of_genpd_attach_cpu() starts by fetching the struct device belonging to the CPU. Then it calls genpd_dev_pm_attach(), which via DT tries to hook up the CPU device to its corresponding PM domain. If it succeeds, of_genpd_attach_cpu() continues to prepare/enable runtime PM of the device. To detach a CPU from its PM domain, of_genpd_attach_cpu() reverse the operations made from of_genpd_attach_cpu(). However, first it checks that the CPU device has a valid PM domain pointer assigned, as to make sure it belongs to genpd. Cc: Lina Iyer Co-developed-by: Lina Iyer Signed-off-by: Ulf Hansson [rplsssn@codeaurora.org: Fix compilation issue] Signed-off-by: Raju P.L.S.S.S.N (am from https://patchwork.kernel.org/patch/10478167/) --- drivers/base/power/domain.c | 70 +++++++++++++++++++++++++++++++++++++++++++++ include/linux/pm_domain.h | 9 ++++++ 2 files changed, 79 insertions(+) diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c index 4b57141..82973e3 100644 --- a/drivers/base/power/domain.c +++ b/drivers/base/power/domain.c @@ -6,6 +6,7 @@ * This file is released under the GPLv2. */ +#include #include #include #include @@ -2398,6 +2399,75 @@ struct device *genpd_dev_pm_attach_by_name(struct device *dev, char *name) return genpd_dev_pm_attach_by_id(dev, index); } +/* + * of_genpd_attach_cpu() - Attach a CPU to its PM domain + * @cpu: The CPU to be attached. + * + * Parses the OF node of the CPU's device, to find a PM domain specifier. If + * such is found, attaches the CPU's device to the retrieved pm_domain ops and + * enables runtime PM for it. This to allow the CPU to be power managed through + * its PM domain. + * + * Returns zero when successfully attached the CPU's device to its PM domain, + * else a negative error code. + */ +int of_genpd_attach_cpu(int cpu) +{ + struct device *dev = get_cpu_device(cpu); + int ret; + + if (!dev) { + pr_warn("genpd: no dev for cpu%d\n", cpu); + return -ENODEV; + } + + ret = genpd_dev_pm_attach(dev); + if (ret != 1) { + dev_warn(dev, "genpd: attach cpu failed %d\n", ret); + return ret < 0 ? ret : -ENODEV; + } + + pm_runtime_irq_safe(dev); + pm_runtime_get_noresume(dev); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + + dev_info(dev, "genpd: attached cpu\n"); + return 0; +} +EXPORT_SYMBOL(of_genpd_attach_cpu); + +/** + * of_genpd_detach_cpu() - Detach a CPU from its PM domain + * @cpu: The CPU to be detached. + * + * Detach the CPU's device from its corresponding PM domain. If detaching is + * completed successfully, disable runtime PM and restore the runtime PM usage + * count for the CPU's device. + */ +void of_genpd_detach_cpu(int cpu) +{ + struct device *dev = get_cpu_device(cpu); + + if (!dev) { + pr_warn("genpd: no dev for cpu%d\n", cpu); + return; + } + + /* Check that the device is attached to a genpd. */ + if (!(dev->pm_domain && dev->pm_domain->detach == genpd_dev_pm_detach)) + return; + + genpd_dev_pm_detach(dev, true); + + pm_runtime_disable(dev); + pm_runtime_put_noidle(dev); + pm_runtime_reinit(dev); + + dev_info(dev, "genpd: detached cpu\n"); +} +EXPORT_SYMBOL(of_genpd_detach_cpu); + static const struct of_device_id idle_state_match[] = { { .compatible = "domain-idle-state", }, { } diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h index 776c546..48850af 100644 --- a/include/linux/pm_domain.h +++ b/include/linux/pm_domain.h @@ -241,6 +241,8 @@ struct device *genpd_dev_pm_attach_by_id(struct device *dev, unsigned int index); struct device *genpd_dev_pm_attach_by_name(struct device *dev, char *name); +int of_genpd_attach_cpu(int cpu); +void of_genpd_detach_cpu(int cpu); #else /* !CONFIG_PM_GENERIC_DOMAINS_OF */ static inline int of_genpd_add_provider_simple(struct device_node *np, struct generic_pm_domain *genpd) @@ -298,6 +300,13 @@ static inline struct device *genpd_dev_pm_attach_by_name(struct device *dev, return NULL; } +static inline int of_genpd_attach_cpu(int cpu) +{ + return -ENODEV; +} + +static inline void of_genpd_detach_cpu(int cpu) {} + static inline struct generic_pm_domain *of_genpd_remove_last(struct device_node *np) { From patchwork Wed Oct 10 21:20:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raju P.L.S.S.S.N" X-Patchwork-Id: 10635297 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0A2F517E3 for ; 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h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PXSjiaZn50nT3CCY3AVL28DHlfMzKeiAmk1xrc2iwXEVlYGJjDT2JR3jd+vCLm5bb oejVBq5y4+0GlcWVRKgJDBEFSlush87+TdD2+o++QppzAMixL4sfnfqzxKw76TXKZy ap2AoqPr/ny6qcs8HR9TLse1z5HCxwTR3mFsb5H0= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6FFD2601A8 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rplsssn@codeaurora.org From: "Raju P.L.S.S.S.N" To: andy.gross@linaro.org, david.brown@linaro.org, rjw@rjwysocki.net, ulf.hansson@linaro.org, khilman@kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, mka@chromium.org, ilina@codeaurora.org, "Raju P.L.S.S.S.N" Subject: [PATCH RFC v1 2/8] kernel/cpu_pm: Manage runtime PM in the idle path for CPUs Date: Thu, 11 Oct 2018 02:50:49 +0530 Message-Id: <1539206455-29342-3-git-send-email-rplsssn@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> References: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ulf Hansson To allow CPUs being power managed by PM domains, let's deploy support for runtime PM for the CPU's corresponding struct device. More precisely, at the point when the CPU is about to enter an idle state, decrease the runtime PM usage count for its corresponding struct device, via calling pm_runtime_put_sync_suspend(). Then, at the point when the CPU resumes from idle, let's increase the runtime PM usage count, via calling pm_runtime_get_sync(). Cc: Lina Iyer Co-developed-by: Lina Iyer Signed-off-by: Ulf Hansson Signed-off-by: Raju P.L.S.S.S.N (am from https://patchwork.kernel.org/patch/10478153/) --- kernel/cpu_pm.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/kernel/cpu_pm.c b/kernel/cpu_pm.c index 67b02e1..492d4a8 100644 --- a/kernel/cpu_pm.c +++ b/kernel/cpu_pm.c @@ -16,9 +16,11 @@ */ #include +#include #include #include #include +#include #include #include @@ -91,6 +93,7 @@ int cpu_pm_enter(void) { int nr_calls; int ret = 0; + struct device *dev = get_cpu_device(smp_processor_id()); ret = cpu_pm_notify(CPU_PM_ENTER, -1, &nr_calls); if (ret) @@ -100,6 +103,9 @@ int cpu_pm_enter(void) */ cpu_pm_notify(CPU_PM_ENTER_FAILED, nr_calls - 1, NULL); + if (!ret && dev && dev->pm_domain) + pm_runtime_put_sync_suspend(dev); + return ret; } EXPORT_SYMBOL_GPL(cpu_pm_enter); @@ -118,6 +124,11 @@ int cpu_pm_enter(void) */ int cpu_pm_exit(void) { + struct device *dev = get_cpu_device(smp_processor_id()); + + if (dev && dev->pm_domain) + pm_runtime_get_sync(dev); + return cpu_pm_notify(CPU_PM_EXIT, -1, NULL); } EXPORT_SYMBOL_GPL(cpu_pm_exit); From patchwork Wed Oct 10 21:20:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raju P.L.S.S.S.N" X-Patchwork-Id: 10635307 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 14CA315E2 for ; Wed, 10 Oct 2018 21:21:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 078C02AE58 for ; Wed, 10 Oct 2018 21:21:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 056342AE5E; Wed, 10 Oct 2018 21:21:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.2 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,FROM_LOCAL_NOVOWEL,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9059A2AE7A for ; Wed, 10 Oct 2018 21:21:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725879AbeJKEpn (ORCPT ); Thu, 11 Oct 2018 00:45:43 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:38184 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725899AbeJKEpn (ORCPT ); Thu, 11 Oct 2018 00:45:43 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 67ACF60C60; Wed, 10 Oct 2018 21:21:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1539206502; bh=S111ydwN3Rpmcs3kPsAcfRoMDUH6nJcnZx4HI+bxqfs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TmIudI9PMtoFEw+unqFA7ehIQ0DQdQCGdgy0fJLLTc+oEpHKv5Fmnp2qQgJjQ1bOO 636jRrg45dSfR3EjzCaOZk8yvFVv9UH8365TpC6XJDssTvne16EsQgkxcgoVsHM/9X FgF+TPADdCFl0ODhp5G+9j5RJ12UqjnAEvqL1M7M= Received: from rplsssn-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rplsssn@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id AEF9860B73; Wed, 10 Oct 2018 21:21:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1539206500; bh=S111ydwN3Rpmcs3kPsAcfRoMDUH6nJcnZx4HI+bxqfs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hyBpp4W1fLiyRB3p59reuSEBkaO7ixGKwl8pLoUOUI8RHYE1rtOt9FWC9XML0gbhf U/d6rDESuoaPVvDjAq076q7wzyzRgheqlIoTP2c4yWsXFek/O0EeHlGTZ/PpaPWdHQ kOzd0MTLAjamuxZLr6StaqYyybkO/l85/TH4zalE= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org AEF9860B73 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rplsssn@codeaurora.org From: "Raju P.L.S.S.S.N" To: andy.gross@linaro.org, david.brown@linaro.org, rjw@rjwysocki.net, ulf.hansson@linaro.org, khilman@kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, mka@chromium.org, ilina@codeaurora.org, Lina Iyer , Thomas Gleixner , Daniel Lezcano , Frederic Weisbecker , Ingo Molnar , "Raju P.L.S.S.S.N" Subject: [PATCH RFC v1 3/8] timer: Export next wakeup time of a CPU Date: Thu, 11 Oct 2018 02:50:50 +0530 Message-Id: <1539206455-29342-4-git-send-email-rplsssn@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> References: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Lina Iyer Knowing the sleep duration of CPUs, is known to be needed while selecting the most energy efficient idle state for a CPU or a group of CPUs. However, to be able to compute the sleep duration, we need to know at what time the next expected wakeup is for the CPU. Therefore, let's export this information via a new function, tick_nohz_get_next_wakeup(). Following changes make use of it. Cc: Thomas Gleixner Cc: Daniel Lezcano Cc: Lina Iyer Cc: Frederic Weisbecker Cc: Ingo Molnar Signed-off-by: Lina Iyer Co-developed-by: Ulf Hansson Signed-off-by: Ulf Hansson Signed-off-by: Raju P.L.S.S.S.N (am from https://patchwork.kernel.org/patch/10478021/) --- include/linux/tick.h | 8 ++++++++ kernel/time/tick-sched.c | 10 ++++++++++ 2 files changed, 18 insertions(+) diff --git a/include/linux/tick.h b/include/linux/tick.h index 55388ab..e48f6b2 100644 --- a/include/linux/tick.h +++ b/include/linux/tick.h @@ -125,6 +125,7 @@ enum tick_dep_bits { extern ktime_t tick_nohz_get_sleep_length(ktime_t *delta_next); extern unsigned long tick_nohz_get_idle_calls(void); extern unsigned long tick_nohz_get_idle_calls_cpu(int cpu); +extern ktime_t tick_nohz_get_next_wakeup(int cpu); extern u64 get_cpu_idle_time_us(int cpu, u64 *last_update_time); extern u64 get_cpu_iowait_time_us(int cpu, u64 *last_update_time); @@ -151,6 +152,13 @@ static inline ktime_t tick_nohz_get_sleep_length(ktime_t *delta_next) *delta_next = TICK_NSEC; return *delta_next; } + +static inline ktime_t tick_nohz_get_next_wakeup(int cpu) +{ + /* Next wake up is the tick period, assume it starts now */ + return ktime_add(ktime_get(), TICK_NSEC); +} + static inline u64 get_cpu_idle_time_us(int cpu, u64 *unused) { return -1; } static inline u64 get_cpu_iowait_time_us(int cpu, u64 *unused) { return -1; } diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c index 5b33e2f..bca95f9 100644 --- a/kernel/time/tick-sched.c +++ b/kernel/time/tick-sched.c @@ -1089,6 +1089,16 @@ unsigned long tick_nohz_get_idle_calls(void) return ts->idle_calls; } +/** + * tick_nohz_get_next_wakeup - return the next wake up of the CPU + */ +ktime_t tick_nohz_get_next_wakeup(int cpu) +{ + struct clock_event_device *dev = per_cpu(tick_cpu_device.evtdev, cpu); + + return dev->next_event; +} + static void tick_nohz_account_idle_ticks(struct tick_sched *ts) { #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE From patchwork Wed Oct 10 21:20:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raju P.L.S.S.S.N" X-Patchwork-Id: 10635309 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0533417E3 for ; Wed, 10 Oct 2018 21:21:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E9D072ADD3 for ; Wed, 10 Oct 2018 21:21:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E5CAF2AEC7; Wed, 10 Oct 2018 21:21:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.2 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,FROM_LOCAL_NOVOWEL,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 177AC2AD97 for ; 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Wed, 10 Oct 2018 21:21:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1539206506; bh=5G1Qf0TmOyyE51jdo0SflcxP/5JdpmCQs4kQ9cobvyI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nS82Cw3nbDEtRV/u/T8YREiwgMvNPl7jHdrQ8TQmdCy5W/WcqXyTojhfXop1PK3Vp lQfart2XV2MmBBpsNpabwTLdfssckxGqHk4inclLwSCd9fF717gJJ4ompWTgw1Hd8+ 1nV2oNYZmEaaqxWllorPo786XmmlyLJh84MIVxJY= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 10C0160881 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rplsssn@codeaurora.org From: "Raju P.L.S.S.S.N" To: andy.gross@linaro.org, david.brown@linaro.org, rjw@rjwysocki.net, ulf.hansson@linaro.org, khilman@kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, mka@chromium.org, ilina@codeaurora.org, "Raju P.L.S.S.S.N" Subject: [PATCH RFC v1 4/8] drivers: qcom: cpu_pd: add cpu power domain support using genpd Date: Thu, 11 Oct 2018 02:50:51 +0530 Message-Id: <1539206455-29342-5-git-send-email-rplsssn@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> References: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP RPMH based targets require that the sleep and wake state request votes be sent during system low power mode entry. The votes help reduce the power consumption when the AP is not using them. The votes sent by the clients are cached in RPMH controller and needs to be flushed when the last cpu enters low power mode. So add cpu power domain using Linux generic power domain infrastructure to perform necessary tasks as part of domain power down. Suggested-by: Lina Iyer Signed-off-by: Raju P.L.S.S.S.N --- drivers/soc/qcom/Kconfig | 9 ++++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/cpu_pd.c | 104 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 114 insertions(+) create mode 100644 drivers/soc/qcom/cpu_pd.c diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index ba79b60..91e8b3b 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -95,6 +95,7 @@ config QCOM_RMTFS_MEM config QCOM_RPMH bool "Qualcomm RPM-Hardened (RPMH) Communication" depends on ARCH_QCOM && ARM64 && OF || COMPILE_TEST + select QCOM_CPU_PD help Support for communication with the hardened-RPM blocks in Qualcomm Technologies Inc (QTI) SoCs. RPMH communication uses an @@ -102,6 +103,14 @@ config QCOM_RPMH of hardware components aggregate requests for these resources and help apply the aggregated state on the resource. +config QCOM_CPU_PD + bool "Qualcomm cpu power domain driver" + depends on QCOM_RPMH && PM_GENERIC_DOMAINS || COMPILE_TEST + help + Support for QCOM platform cpu power management to perform tasks + necessary while application processor votes for deeper modes so that + the firmware can enter SoC level low power modes to save power. + config QCOM_SMEM tristate "Qualcomm Shared Memory Manager (SMEM)" depends on ARCH_QCOM diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index f25b54c..57a1b0e 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_QCOM_RMTFS_MEM) += rmtfs_mem.o obj-$(CONFIG_QCOM_RPMH) += qcom_rpmh.o qcom_rpmh-y += rpmh-rsc.o qcom_rpmh-y += rpmh.o +obj-$(CONFIG_QCOM_CPU_PD) += cpu_pd.o obj-$(CONFIG_QCOM_SMD_RPM) += smd-rpm.o obj-$(CONFIG_QCOM_SMEM) += smem.o obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o diff --git a/drivers/soc/qcom/cpu_pd.c b/drivers/soc/qcom/cpu_pd.c new file mode 100644 index 0000000..565c510 --- /dev/null +++ b/drivers/soc/qcom/cpu_pd.c @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include + +#include + +static struct device *cpu_pd_dev; + +static int cpu_pd_power_off(struct generic_pm_domain *domain) +{ + if (rpmh_ctrlr_idle(cpu_pd_dev)) { + /* Flush the sleep/wake sets */ + rpmh_flush(cpu_pd_dev); + } else { + pr_debug("rpmh controller is busy\n"); + return -EBUSY; + } + + return 0; +} + +static int cpu_pm_domain_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + struct generic_pm_domain *cpu_pd; + int ret = -EINVAL, cpu; + + if (!np) { + dev_err(dev, "device tree node not found\n"); + return -ENODEV; + } + + if (!of_find_property(np, "#power-domain-cells", NULL)) { + pr_err("power-domain-cells not found\n"); + return -ENODEV; + } + + cpu_pd_dev = &pdev->dev; + if (IS_ERR_OR_NULL(cpu_pd_dev)) + return PTR_ERR(cpu_pd_dev); + + cpu_pd = devm_kzalloc(dev, sizeof(*cpu_pd), GFP_KERNEL); + if (!cpu_pd) + return -ENOMEM; + + cpu_pd->name = kasprintf(GFP_KERNEL, "%s", np->name); + if (!cpu_pd->name) + goto free_cpu_pd; + cpu_pd->name = kbasename(cpu_pd->name); + cpu_pd->power_off = cpu_pd_power_off; + cpu_pd->flags |= GENPD_FLAG_IRQ_SAFE; + + ret = pm_genpd_init(cpu_pd, NULL, false); + if (ret) + goto free_name; + + ret = of_genpd_add_provider_simple(np, cpu_pd); + if (ret) + goto remove_pd; + + pr_info("init PM domain %s\n", cpu_pd->name); + + for_each_present_cpu(cpu) { + ret = of_genpd_attach_cpu(cpu); + if (ret) + goto detach_cpu; + } + return 0; + +detach_cpu: + of_genpd_detach_cpu(cpu); + +remove_pd: + pm_genpd_remove(cpu_pd); + +free_name: + kfree(cpu_pd->name); + +free_cpu_pd: + kfree(cpu_pd); + cpu_pd_dev = NULL; + pr_err("failed to init PM domain ret=%d %pOF\n", ret, np); + return ret; +} + +static const struct of_device_id cpu_pd_drv_match[] = { + { .compatible = "qcom,cpu-pm-domain", }, + { } +}; + +static struct platform_driver cpu_pm_domain_driver = { + .probe = cpu_pm_domain_probe, + .driver = { + .name = "cpu_pm_domain", + .of_match_table = cpu_pd_drv_match, + }, +}; +builtin_platform_driver(cpu_pm_domain_driver); From patchwork Wed Oct 10 21:20:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raju P.L.S.S.S.N" X-Patchwork-Id: 10635311 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 39DC415E2 for ; Wed, 10 Oct 2018 21:22:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2DEFA2ADE2 for ; Wed, 10 Oct 2018 21:22:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2B3E02AE2A; Wed, 10 Oct 2018 21:22:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.2 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,FROM_LOCAL_NOVOWEL,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CB7662AE00 for ; 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Wed, 10 Oct 2018 21:21:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1539206513; bh=1p+u/PhUAyvhdhWlHurQ5EUgMfSl0SCOqlTj2A7Ldxw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=f5oodXuYOrHe7YSv8maaOrKXs57b/7JRhKtG1u9u8c5nnXJ/bbaxhfYoVmihl1Pnn BzCU7SALVEOhZ3+xpD8tVJ2JOvt8RMGXCXmgmXDlTEK69sjag+q0u+qg6GpMh/NwFI r0vviTsjziT0ISvx69+FXkyletCGVkPKUubpDc2M= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 8A53E60C8E Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rplsssn@codeaurora.org From: "Raju P.L.S.S.S.N" To: andy.gross@linaro.org, david.brown@linaro.org, rjw@rjwysocki.net, ulf.hansson@linaro.org, khilman@kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, mka@chromium.org, ilina@codeaurora.org, "Raju P.L.S.S.S.N" Subject: [PATCH RFC v1 5/8] dt-bindings: introduce cpu power domain bindings for Qualcomm SoCs Date: Thu, 11 Oct 2018 02:50:52 +0530 Message-Id: <1539206455-29342-6-git-send-email-rplsssn@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> References: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add device binding documentation for Qualcomm Technology Inc's cpu domain driver. The driver is used for managing system sleep activities that are required when application processor is going to deepest low power mode. Cc: devicetree@vger.kernel.org Signed-off-by: Raju P.L.S.S.S.N --- .../bindings/soc/qcom/cpu_power_domain.txt | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/cpu_power_domain.txt diff --git a/Documentation/devicetree/bindings/soc/qcom/cpu_power_domain.txt b/Documentation/devicetree/bindings/soc/qcom/cpu_power_domain.txt new file mode 100644 index 0000000..1c8fe69 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/cpu_power_domain.txt @@ -0,0 +1,39 @@ +Qualcomm Technologies cpu power domain +----------------------------------------- + +CPU power domain handles the tasks that need to be performed during +application processor deeper low power mode entry for QCOM SoCs which +have hardened IP blocks combinedly called as RPMH (Resource Power Manager +Hardened) for shared resource management. Flushing the buffered requests +to TCS (Triggered Command Set) in RSC (Resource State Coordinator) and +programming the wakeup timer in PDC (Power Domain Controller) for timer +based wakeup are handled as part of domain power down. + +The bindings for cpu power domain is specified in the RSC section in +devicetree. + +Properties: +- compatible: + Usage: required + Value type: + Definition: must be "qcom,cpu-pm-domain". + +- #power-domain-cells: number of cells in power domain specifier; + must be 0. + +Node of a device using power domains must have a power-domains property +defined with a phandle to respective power domain. + +Example: + + apps_rsc: rsc@179c0000 { + [...] + cpu_pd: power-domain-controller { + compatible = "qcom,cpu-pm-domain"; + #power-domain-cells = <0>; + }; + }; + + +See Documentation/devicetree/bindings/power/power_domain.txt for description +of consumer-side bindings. From patchwork Wed Oct 10 21:20:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raju P.L.S.S.S.N" X-Patchwork-Id: 10635319 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E312815E2 for ; Wed, 10 Oct 2018 21:22:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D43DC2ADA2 for ; Wed, 10 Oct 2018 21:22:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C79B02ADCA; Wed, 10 Oct 2018 21:22:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.2 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,FROM_LOCAL_NOVOWEL,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 521192ADA2 for ; Wed, 10 Oct 2018 21:22:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725967AbeJKEqE (ORCPT ); Thu, 11 Oct 2018 00:46:04 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:38780 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725886AbeJKEqD (ORCPT ); Thu, 11 Oct 2018 00:46:03 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id E71B360C60; Wed, 10 Oct 2018 21:22:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1539206523; bh=+L/PdC0ly2ZAOfrfv1klqE9wrry6LuuB2CO0TvaBRSg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZQ/cGMdEFZOcJa49OQrfc2HSyUf16+KzQOnihvGfRQXz1pdNZb3SFXAjGVMfyjTN3 OMtHRWfSJvoIcd6zuijJRwMKU9q5UPb/LuBGvNqQgKiu435OohoFooN+TiQgwijFNl FGBypHbKQp9SL3x/UKMvELJN/Bc3GOkPlptgzeZI= Received: from rplsssn-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rplsssn@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6962160CE9; Wed, 10 Oct 2018 21:21:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1539206520; bh=+L/PdC0ly2ZAOfrfv1klqE9wrry6LuuB2CO0TvaBRSg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SAKDAh/nv8NV0+WReMVYT1Cw92Uau4qIjgC6GWZ3aiQodJ4IsPV6BlJGiPdSTPcQe allXt3lgbtdljfy3jPVUu0BdGkXcZm7kdBeoAqN9CUGoAQthyhEycE7xqOR4ufEWDm SyCN24LjK/03YdPKL3qYrImUTJSBngKKqWyHzNPQ= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6962160CE9 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rplsssn@codeaurora.org From: "Raju P.L.S.S.S.N" To: andy.gross@linaro.org, david.brown@linaro.org, rjw@rjwysocki.net, ulf.hansson@linaro.org, khilman@kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, mka@chromium.org, ilina@codeaurora.org, "Raju P.L.S.S.S.N" Subject: [PATCH RFC v1 6/8] drivers: qcom: cpu_pd: program next wakeup to PDC timer Date: Thu, 11 Oct 2018 02:50:53 +0530 Message-Id: <1539206455-29342-7-git-send-email-rplsssn@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> References: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In addition to sleep and wake request votes that need to be sent to remote processor as part of low power mode entry, the next wake-up timer value needs to be programmed to PDC (Power Domain Controller) which has its own timer and is in an always on power domain. A specific control register is provided in RSC address space for this purpose. PDC wakes-up the RSC and sets up the resources back in active state before the processor is woken up by a timer interrupt. Signed-off-by: Raju P.L.S.S.S.N --- drivers/soc/qcom/Kconfig | 2 +- drivers/soc/qcom/cpu_pd.c | 79 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+), 1 deletion(-) diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index 91e8b3b..9abaeab 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -105,7 +105,7 @@ config QCOM_RPMH config QCOM_CPU_PD bool "Qualcomm cpu power domain driver" - depends on QCOM_RPMH && PM_GENERIC_DOMAINS || COMPILE_TEST + depends on QCOM_RPMH && PM_GENERIC_DOMAINS && PM_SLEEP || COMPILE_TEST help Support for QCOM platform cpu power management to perform tasks necessary while application processor votes for deeper modes so that diff --git a/drivers/soc/qcom/cpu_pd.c b/drivers/soc/qcom/cpu_pd.c index 565c510..242eced 100644 --- a/drivers/soc/qcom/cpu_pd.c +++ b/drivers/soc/qcom/cpu_pd.c @@ -3,19 +3,80 @@ * Copyright (c) 2018, The Linux Foundation. All rights reserved. */ +#include #include #include #include +#include #include +#define ARCH_TIMER_HZ (19200000) +#define PDC_TIME_VALID_SHIFT 31 +#define PDC_TIME_UPPER_MASK 0xFFFFFF static struct device *cpu_pd_dev; +static bool suspend; + +static uint64_t us_to_ticks(uint64_t time_us) +{ + uint64_t sec, nsec, time_cycles; + + sec = time_us; + do_div(sec, USEC_PER_SEC); + nsec = time_us - sec * USEC_PER_SEC; + + if (nsec > 0) { + nsec = nsec * NSEC_PER_USEC; + do_div(nsec, NSEC_PER_SEC); + } + + sec += nsec; + + time_cycles = (u64)sec * ARCH_TIMER_HZ; + + return time_cycles; +} + +static int setup_pdc_wakeup_timer(struct device *dev) +{ + int cpu; + struct tcs_cmd cmd[2] = { { 0 } }; + ktime_t next_wakeup, cpu_wakeup; + uint64_t wakeup_cycles = ~0ULL; + + if (!suspend) { + /* + * Find the next wakeup for any of the online CPUs + */ + next_wakeup = ktime_set(KTIME_SEC_MAX, 0); + for_each_online_cpu(cpu) { + cpu_wakeup = tick_nohz_get_next_wakeup(cpu); + if (ktime_before(cpu_wakeup, next_wakeup)) + next_wakeup = cpu_wakeup; + } + wakeup_cycles = us_to_ticks(ktime_to_us(next_wakeup)); + } + + cmd[0].data = (wakeup_cycles >> 32) & PDC_TIME_UPPER_MASK; + cmd[0].data |= 1 << PDC_TIME_VALID_SHIFT; + cmd[1].data = (wakeup_cycles & 0xFFFFFFFF); + + return rpmh_write_pdc_data(dev, cmd, ARRAY_SIZE(cmd)); +} static int cpu_pd_power_off(struct generic_pm_domain *domain) { if (rpmh_ctrlr_idle(cpu_pd_dev)) { /* Flush the sleep/wake sets */ rpmh_flush(cpu_pd_dev); + /* + * The next wakeup value is converted to ticks + * and copied to the Power Domain Controller + * that has its own timer, which is in an + * always-on power domain. The programming is + * done through a separate register on the RSC + */ + setup_pdc_wakeup_timer(cpu_pd_dev); } else { pr_debug("rpmh controller is busy\n"); return -EBUSY; @@ -89,6 +150,23 @@ static int cpu_pm_domain_probe(struct platform_device *pdev) return ret; } +static int cpu_pd_suspend(struct device *dev) +{ + suspend = true; + return 0; +} + +static int cpu_pd_resume(struct device *dev) +{ + suspend = false; + return 0; +} + +static const struct dev_pm_ops cpu_pd_dev_pm_ops = { + SET_LATE_SYSTEM_SLEEP_PM_OPS(cpu_pd_suspend, cpu_pd_resume) +}; + + static const struct of_device_id cpu_pd_drv_match[] = { { .compatible = "qcom,cpu-pm-domain", }, { } @@ -99,6 +177,7 @@ static int cpu_pm_domain_probe(struct platform_device *pdev) .driver = { .name = "cpu_pm_domain", .of_match_table = cpu_pd_drv_match, + .pm = &cpu_pd_dev_pm_ops, }, }; builtin_platform_driver(cpu_pm_domain_driver); From patchwork Wed Oct 10 21:20:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raju P.L.S.S.S.N" X-Patchwork-Id: 10635323 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A185615E2 for ; Wed, 10 Oct 2018 21:22:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 956BF2ADA2 for ; Wed, 10 Oct 2018 21:22:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8987A2ADCA; Wed, 10 Oct 2018 21:22:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.2 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,FROM_LOCAL_NOVOWEL,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 29CBB2ADA2 for ; Wed, 10 Oct 2018 21:22:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726943AbeJKEqN (ORCPT ); Thu, 11 Oct 2018 00:46:13 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:39010 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725964AbeJKEqM (ORCPT ); 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h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lNZKmvbsHG2WMi3a0QX3OVYCKyeQeYrTZsPOYpL4uN4Jr0aqIaZbe649vIW1/D2BT npQRvof8ptxkFxDy3/JAd6s4ijhUSTrgSbCGXwCFcs2FD+PS1kHNjaTTgmBqjTAhbs 6ZH0iOYX83qHgbvhV741EeI6d0HHGbFEP6mq0SGM= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 457FB60C6A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rplsssn@codeaurora.org From: "Raju P.L.S.S.S.N" To: andy.gross@linaro.org, david.brown@linaro.org, rjw@rjwysocki.net, ulf.hansson@linaro.org, khilman@kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, mka@chromium.org, ilina@codeaurora.org, "Raju P.L.S.S.S.N" Subject: [PATCH RFC v1 7/8] drivers: qcom: cpu_pd: Handle cpu hotplug in the domain Date: Thu, 11 Oct 2018 02:50:54 +0530 Message-Id: <1539206455-29342-8-git-send-email-rplsssn@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> References: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Use cpu hotplug callback mechanism to attach/dettach the cpu in the cpu power domain. During cpu hotplug callback registration, the starting callback is invoked on all online cpus. So there is no need to attach from device probe. Signed-off-by: Raju P.L.S.S.S.N --- drivers/soc/qcom/cpu_pd.c | 33 +++++++++++++++++++++++++-------- include/linux/cpuhotplug.h | 1 + 2 files changed, 26 insertions(+), 8 deletions(-) diff --git a/drivers/soc/qcom/cpu_pd.c b/drivers/soc/qcom/cpu_pd.c index 242eced..bf2d95d 100644 --- a/drivers/soc/qcom/cpu_pd.c +++ b/drivers/soc/qcom/cpu_pd.c @@ -3,6 +3,7 @@ * Copyright (c) 2018, The Linux Foundation. All rights reserved. */ +#include #include #include #include @@ -85,12 +86,26 @@ static int cpu_pd_power_off(struct generic_pm_domain *domain) return 0; } +static int cpu_pd_starting(unsigned int cpu) +{ + if (!suspend && of_genpd_attach_cpu(cpu)) + pr_err("%s: genpd_attach_cpu fail\n", __func__); + return 0; +} + +static int cpu_pd_dying(unsigned int cpu) +{ + if (!suspend) + of_genpd_detach_cpu(cpu); + return 0; +} + static int cpu_pm_domain_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; struct generic_pm_domain *cpu_pd; - int ret = -EINVAL, cpu; + int ret = -EINVAL; if (!np) { dev_err(dev, "device tree node not found\n"); @@ -127,15 +142,17 @@ static int cpu_pm_domain_probe(struct platform_device *pdev) pr_info("init PM domain %s\n", cpu_pd->name); - for_each_present_cpu(cpu) { - ret = of_genpd_attach_cpu(cpu); - if (ret) - goto detach_cpu; - } + /* Install hotplug callbacks */ + ret = cpuhp_setup_state(CPUHP_AP_QCOM_SYS_PM_DOMAIN_STARTING, + "AP_QCOM_SYS_PM_DOMAIN_STARTING", + cpu_pd_starting, cpu_pd_dying); + if (ret) + goto remove_hotplug; + return 0; -detach_cpu: - of_genpd_detach_cpu(cpu); +remove_hotplug: + cpuhp_remove_state(CPUHP_AP_QCOM_SYS_PM_DOMAIN_STARTING); remove_pd: pm_genpd_remove(cpu_pd); diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h index caf40ad..4bfe8e2 100644 --- a/include/linux/cpuhotplug.h +++ b/include/linux/cpuhotplug.h @@ -139,6 +139,7 @@ enum cpuhp_state { CPUHP_AP_X86_TBOOT_DYING, CPUHP_AP_ARM_CACHE_B15_RAC_DYING, CPUHP_AP_ONLINE, + CPUHP_AP_QCOM_SYS_PM_DOMAIN_STARTING, CPUHP_TEARDOWN_CPU, CPUHP_AP_ONLINE_IDLE, CPUHP_AP_SMPBOOT_THREADS, From patchwork Wed Oct 10 21:20:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raju P.L.S.S.S.N" X-Patchwork-Id: 10635325 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 658BB15E2 for ; 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h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JWzh6/YzsTpNzN0XSKexJ5bjtVvrUIvOCyLJtYoaA4gkAfVO/oR4Jj19hi/toMzUk xy3dV9wPByKkze7airCs94BauvoKWImUBKHbGVIQ1Y4PiCSuqS3kA1R9II7lKPNUdz a1JaDrK9AVvjDpp7eQl7dcrgRsRKXZuK2eoEm0GU= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 1A3F960CE9 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rplsssn@codeaurora.org From: "Raju P.L.S.S.S.N" To: andy.gross@linaro.org, david.brown@linaro.org, rjw@rjwysocki.net, ulf.hansson@linaro.org, khilman@kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, mka@chromium.org, ilina@codeaurora.org, "Raju P.L.S.S.S.N" Subject: [PATCH RFC v1 8/8] arm64: dtsi: sdm845: Add cpu power domain support Date: Thu, 11 Oct 2018 02:50:55 +0530 Message-Id: <1539206455-29342-9-git-send-email-rplsssn@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> References: <1539206455-29342-1-git-send-email-rplsssn@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add cpu power domain support Signed-off-by: Raju P.L.S.S.S.N --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index d3662a8..aadaa20 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -96,6 +96,7 @@ reg = <0x0 0x0>; enable-method = "psci"; next-level-cache = <&L2_0>; + power-domains = <&cpu_pd>; L2_0: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -111,6 +112,7 @@ reg = <0x0 0x100>; enable-method = "psci"; next-level-cache = <&L2_100>; + power-domains = <&cpu_pd>; L2_100: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -123,6 +125,7 @@ reg = <0x0 0x200>; enable-method = "psci"; next-level-cache = <&L2_200>; + power-domains = <&cpu_pd>; L2_200: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -135,6 +138,7 @@ reg = <0x0 0x300>; enable-method = "psci"; next-level-cache = <&L2_300>; + power-domains = <&cpu_pd>; L2_300: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -147,6 +151,7 @@ reg = <0x0 0x400>; enable-method = "psci"; next-level-cache = <&L2_400>; + power-domains = <&cpu_pd>; L2_400: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -159,6 +164,7 @@ reg = <0x0 0x500>; enable-method = "psci"; next-level-cache = <&L2_500>; + power-domains = <&cpu_pd>; L2_500: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -171,6 +177,7 @@ reg = <0x0 0x600>; enable-method = "psci"; next-level-cache = <&L2_600>; + power-domains = <&cpu_pd>; L2_600: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -183,6 +190,7 @@ reg = <0x0 0x700>; enable-method = "psci"; next-level-cache = <&L2_700>; + power-domains = <&cpu_pd>; L2_700: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -1170,6 +1178,11 @@ , ; + cpu_pd: power-domain-controller { + compatible = "qcom,cpu-pm-domain"; + #power-domain-cells = <0>; + }; + rpmhcc: clock-controller { compatible = "qcom,sdm845-rpmh-clk"; #clock-cells = <1>;