From patchwork Thu Oct 11 06:35:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinbo Zhu X-Patchwork-Id: 10636135 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7A158112B for ; Thu, 11 Oct 2018 06:39:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 62FBB2B0D3 for ; Thu, 11 Oct 2018 06:39:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 572ED2B0DF; Thu, 11 Oct 2018 06:39:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F1AA32B0D7 for ; Thu, 11 Oct 2018 06:39:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=nb6fhExJxooQLG1TvZOzmJbN97OIvNP/f6mfwoj2UO8=; b=Fhn l1Xg9rVm4SNw1R2FJaTWF3PayXTcAeJXI2xM+4q+y/m5+/T9HZWVNB5Ciz9sd5W9gvN3DGMrTDHY2 lXBR0MCYyLRgdSjm4TkODz6sYcMh5bFAnGjFPxMyBCQP9mcaWZdhPRlPjhKj6c8P+otqeDkz5Q3Ok fMXwMVC6LUcPqsO9iSlDQOWYmACTBGnUnym4RlCVSSz7rluDvyIEdC0gSMxqu9iG8NF3kCsUL+/XG NgGq7ZJexCsYf1GWtngcMxFQuo2hzwZtogcAwIBwbXr15pd81HjojfmhduE2ruznodWqLXHLnR0eC UeJgzptiD7jcttdhrbCTZjs2h2Q96fg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gAUd5-0002MZ-6h; Thu, 11 Oct 2018 06:39:27 +0000 Received: from inva021.nxp.com ([92.121.34.21]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gAUd2-0002KB-By for linux-arm-kernel@lists.infradead.org; Thu, 11 Oct 2018 06:39:25 +0000 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5E150200049; Thu, 11 Oct 2018 08:39:10 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id BBAFA200186; Thu, 11 Oct 2018 08:39:05 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id C9B15402E2; Thu, 11 Oct 2018 14:38:59 +0800 (SGT) From: Yinbo Zhu To: yinbo.zhu@nxp.com, yangbo.lu@nxp.com, linux-mmc@vger.kernel.org, Adrian Hunter , ulf.hansson@linaro.org, leoyang.li@nxp.com Subject: [PATCH v2] arm64: dts: lx2160a: enable eSDHC controller Date: Thu, 11 Oct 2018 14:35:22 +0800 Message-Id: <20181011063522.7767-1-yinbo.zhu@nxp.com> X-Mailer: git-send-email 2.14.1 X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181010_233924_546578_1BD061E2 X-CRM114-Status: GOOD ( 10.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, xiaobo.xie@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP There are two eSDHC controllers in lx2160a. This patch is to enable eSDHC for RDB and QDS board. Signed-off-by: Yinbo Zhu --- Change in v2: squash all lx2160a esdhc dts patch into the original patch arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 8 ++++++ arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 15 ++++++++++++ arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 25 +++++++++++++++++++++ 3 files changed, 48 insertions(+), 0 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts index bc30173..b58b96c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts @@ -294,6 +294,14 @@ status = "okay"; }; +&esdhc0 { + status = "okay"; +}; + +&esdhc1 { + status = "okay"; +}; + &dspi0 { dflash0: n25q128a { #address-cells = <1>; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts index 53b0e80..cbe8919 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts @@ -170,6 +170,21 @@ status = "okay"; }; +&esdhc0 { + sd-uhs-sdr104; + sd-uhs-sdr50; + sd-uhs-sdr25; + sd-uhs-sdr12; + status = "okay"; +}; + +&esdhc1 { + mmc-hs200-1_8v; + mmc-hs400-1_8v; + bus-width = <8>; + status = "okay"; +}; + &fspi { status = "okay"; nxp,fspi-has-second-chip; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index fa4a1f8..174544a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -356,6 +356,31 @@ little-endian; }; + esdhc0: esdhc@2140000 { + compatible = "fsl,esdhc"; + reg = <0x0 0x2140000 0x0 0x10000>; + interrupts = <0 28 0x4>; /* Level high type */ + clocks = <&clockgen 4 1>; + voltage-ranges = <1800 1800 3300 3300>; + sdhci,auto-cmd12; + little-endian; + bus-width = <4>; + status = "disabled"; + }; + + esdhc1: esdhc@2150000 { + compatible = "fsl,esdhc"; + reg = <0x0 0x2150000 0x0 0x10000>; + interrupts = <0 63 0x4>; /* Level high type */ + clocks = <&clockgen 4 1>; + voltage-ranges = <1800 1800 3300 3300>; + sdhci,auto-cmd12; + broken-cd; + little-endian; + bus-width = <4>; + status = "disabled"; + }; + gpio0: gpio@2300000 { compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2300000 0x0 0x10000>;