From patchwork Fri May 29 13:44:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578747 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2D537912 for ; Fri, 29 May 2020 13:46:42 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 00CA7207BC for ; Fri, 29 May 2020 13:46:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="M98U4Znk" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 00CA7207BC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:42978 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefLN-0004m6-5Y for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:46:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49064) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKG-0002Se-OM for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:32 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:41003 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKG-0006wr-29 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:32 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759930; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XLT3kuPJ3puZM/oyUC80njguPPSJ1CogkRftmEc5Xvs=; b=M98U4Znks+GJJ/lv00QBcxREmfjTbvtJrRxuUWRPArPpLlrgXUszebaag/CVLCeKV23iXb RDzxUAio3RXynUKvybhMoF4YYMh2PMvM9lqf5DRboqpm4ui8nfaG/nZvB5MllpCq8rTvRE SWvSY+2TFcrzlLzx7XvbIVeZNFNarKc= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-25-wFdui7m4P5ahnE0YD-UDgA-1; Fri, 29 May 2020 09:45:29 -0400 X-MC-Unique: wFdui7m4P5ahnE0YD-UDgA-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 27CE78005AA; Fri, 29 May 2020 13:45:28 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 504042B6F8; Fri, 29 May 2020 13:45:25 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id D4FA011386A3; Fri, 29 May 2020 15:45:23 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 02/58] Revert "hw/prep: realize the PCI root bus as part of the prep init" Date: Fri, 29 May 2020 15:44:27 +0200 Message-Id: <20200529134523.8477-3-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" This reverts commit 685f9a3428f625f580af0123aa95f4838d86cac3. Realizing a device automatically realizes its buses, in device_set_realized(). Realizing them in realize methods is redundant, unless the methods themselves require them to be realized early. raven_pcihost_realizefn() doesn't. Drop the redundant bus realization. Cc: Marcel Apfelbaum Cc: Michael S. Tsirkin Signed-off-by: Markus Armbruster --- hw/pci-host/prep.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 1a02e9a670..c821ef889d 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -268,7 +268,6 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp) memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->pci_intack); /* TODO Remove once realize propagates to child devices. */ - object_property_set_bool(OBJECT(&s->pci_bus), true, "realized", errp); object_property_set_bool(OBJECT(&s->pci_dev), true, "realized", errp); } From patchwork Fri May 29 13:44:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578785 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 05A8D912 for ; Fri, 29 May 2020 13:52:41 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D08F8206A1 for ; Fri, 29 May 2020 13:52:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="M8JoL3ck" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D08F8206A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:43044 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefR9-00086f-TB for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:52:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49112) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKJ-0002aL-Ma for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:35 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:48313 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKI-000707-2C for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:35 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759933; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rLksYj7h3Mic75iBfQ1nmdfcny+WCAY80nA53fWCRqU=; b=M8JoL3ck6yo3b/svzEb4iHkGHFa9vrt+etcmCPz9MtCZ2N7ihcs43l2//Ljc3hc3KYZ0AY 46lMlw9fW3VLgbtH/wrLbhQTV5RuXGvQXT3glnjQNcWqI+jR0BIc/5FHdlKW1LiFTW2/aN 3tOiKZezGUGFnW2dZrTcmcqVfNiAMMM= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-402-qTQCJwF-NhyZvoil87Fszw-1; Fri, 29 May 2020 09:45:29 -0400 X-MC-Unique: qTQCJwF-NhyZvoil87Fszw-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 5E35318FE861; Fri, 29 May 2020 13:45:28 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 51EFD1001B07; Fri, 29 May 2020 13:45:25 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id D854E11385E2; Fri, 29 May 2020 15:45:23 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 03/58] Revert "hw/versatile: realize the PCI root bus as part of the versatile init" Date: Fri, 29 May 2020 15:44:28 +0200 Message-Id: <20200529134523.8477-4-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" This reverts commit b1af7959a66610669e1a019b9a84f6ed3a7936c6. Realizing a device automatically realizes its buses, in device_set_realized(). Realizing them in realize methods is redundant, unless the methods themselves require them to be realized early. pci_vpb_realize() doesn't. Drop the redundant bus realization. Cc: Marcel Apfelbaum Cc: Michael S. Tsirkin Signed-off-by: Markus Armbruster --- hw/pci-host/versatile.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index cfb9a78ea6..28817dbeec 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -458,7 +458,6 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp) } /* TODO Remove once realize propagates to child devices. */ - object_property_set_bool(OBJECT(&s->pci_bus), true, "realized", errp); object_property_set_bool(OBJECT(&s->pci_dev), true, "realized", errp); } From patchwork Fri May 29 13:44:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578851 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8F511912 for ; Fri, 29 May 2020 14:03:19 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 658DF20707 for ; Fri, 29 May 2020 14:03:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="KnBkpe85" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 658DF20707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:60080 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefbS-0005Mr-GZ for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:03:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49278) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKX-00036q-5m for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:49 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:56088 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00076C-7R for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:48 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ESYkganH0eo+c6ItLlt1Zpd7I6bC5gHEV8kJfhbqKJE=; b=KnBkpe858E+1SsxEO1zfWxdTVv+moyXiY0zitL7YWo47ZHRKq6BWXwSQfRlo2lO/hajqoH Gk6a3aIv6iGkFsuPRCT/4BLUG51bsjPY6uL5xMsf6LJJH09YBENqxuv6ORvXZ5I6l2T7ie ZIvgVkKK0c1vYTMbuF53eAPy9yGNtvY= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-123-52bCV8inPICvOvU_jjdqWw-1; Fri, 29 May 2020 09:45:32 -0400 X-MC-Unique: 52bCV8inPICvOvU_jjdqWw-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 5BBF8835B43; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 799ED5D9D5; Fri, 29 May 2020 13:45:25 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id DBDB31138611; Fri, 29 May 2020 15:45:23 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 04/58] qdev: New qdev_new(), qdev_realize(), etc. Date: Fri, 29 May 2020 15:44:29 +0200 Message-Id: <20200529134523.8477-5-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S . Tsirkin" , Alistair Francis , Mark Cave-Ayland , Gerd Hoffmann , David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" We commonly plug devices into their bus right when we create them, like this: dev = qdev_create(bus, type_name); Note that @dev is a weak reference. The reference from @bus to @dev is the only strong one. We realize at some later time, either with object_property_set_bool(OBJECT(dev), true, "realized", errp); or its convenience wrapper qdev_init_nofail(dev); If @dev still has no QOM parent then, realizing makes the /machine/unattached/ orphanage its QOM parent. Note that the device returned by qdev_create() is plugged into a bus, but doesn't have a QOM parent, yet. Until it acquires one, unrealizing the bus will hang in bus_unparent(): while ((kid = QTAILQ_FIRST(&bus->children)) != NULL) { DeviceState *dev = kid->child; object_unparent(OBJECT(dev)); } object_unparent() does nothing when its argument has no QOM parent, and the loop spins forever. Device state "no QOM parent, but plugged into bus" is dangerous. Paolo suggested to delay plugging into the bus until realize. We need to plug into the parent bus before we call the device's realize method, in case it uses the parent bus. So the dangerous state still exists, but only within realization, where we can manage it safely. This commit creates infrastructure to do this: dev = qdev_new(type_name); ... qdev_realize_and_unref(dev, bus, errp) Note that @dev becomes a strong reference here. qdev_realize_and_unref() drops it. There is also plain qdev_realize(), which doesn't drop it. The remainder of this series will convert all users to this new interface. Cc: Michael S. Tsirkin Cc: Marcel Apfelbaum Cc: Alistair Francis Cc: Gerd Hoffmann Cc: Mark Cave-Ayland Cc: David Gibson Signed-off-by: Markus Armbruster Acked-by: Gerd Hoffmann Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé --- include/hw/qdev-core.h | 11 +++++- hw/core/bus.c | 14 +++++++ hw/core/qdev.c | 90 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 114 insertions(+), 1 deletion(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index b870b27966..fba29308f7 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -57,7 +57,7 @@ typedef void (*BusUnrealize)(BusState *bus); * After successful realization, setting static properties will fail. * * As an interim step, the #DeviceState:realized property can also be - * set with qdev_init_nofail(). + * set with qdev_realize() or qdev_init_nofail(). * In the future, devices will propagate this state change to their children * and along busses they expose. * The point in time will be deferred to machine creation, so that values @@ -322,7 +322,13 @@ compat_props_add(GPtrArray *arr, DeviceState *qdev_create(BusState *bus, const char *name); DeviceState *qdev_try_create(BusState *bus, const char *name); +DeviceState *qdev_new(const char *name); +DeviceState *qdev_try_new(const char *name); void qdev_init_nofail(DeviceState *dev); +bool qdev_realize(DeviceState *dev, BusState *bus, Error **errp); +bool qdev_realize_and_unref(DeviceState *dev, BusState *bus, Error **errp); +void qdev_unrealize(DeviceState *dev); + void qdev_set_legacy_instance_id(DeviceState *dev, int alias_id, int required_for_version); HotplugHandler *qdev_get_bus_hotplug_handler(DeviceState *dev); @@ -411,6 +417,9 @@ typedef int (qdev_walkerfn)(DeviceState *dev, void *opaque); void qbus_create_inplace(void *bus, size_t size, const char *typename, DeviceState *parent, const char *name); BusState *qbus_create(const char *typename, DeviceState *parent, const char *name); +bool qbus_realize(BusState *bus, Error **errp); +void qbus_unrealize(BusState *bus); + /* Returns > 0 if either devfn or busfn skip walk somewhere in cursion, * < 0 if either devfn or busfn terminate walk somewhere in cursion, * 0 otherwise. */ diff --git a/hw/core/bus.c b/hw/core/bus.c index 33a4443217..6f6071f5fa 100644 --- a/hw/core/bus.c +++ b/hw/core/bus.c @@ -164,6 +164,20 @@ BusState *qbus_create(const char *typename, DeviceState *parent, const char *nam return bus; } +bool qbus_realize(BusState *bus, Error **errp) +{ + Error *err = NULL; + + object_property_set_bool(OBJECT(bus), true, "realized", &err); + error_propagate(errp, err); + return !err; +} + +void qbus_unrealize(BusState *bus) +{ + object_property_set_bool(OBJECT(bus), false, "realized", &error_abort); +} + static bool bus_get_realized(Object *obj, Error **errp) { BusState *bus = BUS(obj); diff --git a/hw/core/qdev.c b/hw/core/qdev.c index a68ba674db..f2c5cee278 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -176,6 +176,32 @@ DeviceState *qdev_try_create(BusState *bus, const char *type) return dev; } +/* + * Create a device on the heap. + * A type @name must exist. + * This only initializes the device state structure and allows + * properties to be set. The device still needs to be realized. See + * qdev-core.h. + */ +DeviceState *qdev_new(const char *name) +{ + return DEVICE(object_new(name)); +} + +/* + * Try to create a device on the heap. + * This is like qdev_new(), except it returns %NULL when type @name + * does not exist. + */ +DeviceState *qdev_try_new(const char *name) +{ + if (!object_class_by_name(name)) { + return NULL; + } + + return DEVICE(object_new(name)); +} + static QTAILQ_HEAD(, DeviceListener) device_listeners = QTAILQ_HEAD_INITIALIZER(device_listeners); @@ -427,6 +453,66 @@ void qdev_init_nofail(DeviceState *dev) object_unref(OBJECT(dev)); } +/* + * Realize @dev. + * @dev must not be plugged into a bus. + * Plug @dev into @bus if non-null, else into the main system bus. + * This takes a reference to @dev. + * If @dev has no QOM parent, make one up, taking another reference. + * On success, return true. + * On failure, store an error through @errp and return false. + */ +bool qdev_realize(DeviceState *dev, BusState *bus, Error **errp) +{ + Error *err = NULL; + + assert(!dev->realized && !dev->parent_bus); + + if (!bus) { + /* + * Assert that the device really is a SysBusDevice before we + * put it onto the sysbus. Non-sysbus devices which aren't + * being put onto a bus should be realized with + * object_property_set_bool(OBJECT(dev), true, "realized", + * errp); + */ + g_assert(object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)); + bus = sysbus_get_default(); + } + + qdev_set_parent_bus(dev, bus); + + object_property_set_bool(OBJECT(dev), true, "realized", &err); + if (err) { + error_propagate(errp, err); + } + return !err; +} + +/* + * Realize @dev and drop a reference. + * This is like qdev_realize(), except the caller must hold a + * (private) reference, which is dropped on return regardless of + * success or failure. Intended use: + * dev = qdev_new(); + * [...] + * qdev_realize_and_unref(dev, bus, errp); + * Now @dev can go away without further ado. + */ +bool qdev_realize_and_unref(DeviceState *dev, BusState *bus, Error **errp) +{ + bool ret; + + ret = qdev_realize(dev, bus, errp); + object_unref(OBJECT(dev)); + return ret; +} + +void qdev_unrealize(DeviceState *dev) +{ + object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); +} + static int qdev_assert_realized_properly(Object *obj, void *opaque) { DeviceState *dev = DEVICE(object_dynamic_cast(obj, TYPE_DEVICE)); @@ -1002,6 +1088,10 @@ post_realize_fail: fail: error_propagate(errp, local_err); if (unattached_parent) { + /* + * Beware, this doesn't just revert + * object_property_add_child(), it also runs bus_remove()! + */ object_unparent(OBJECT(dev)); unattached_count--; } From patchwork Fri May 29 13:44:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578743 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0CADA739 for ; Fri, 29 May 2020 13:46:40 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 963F1207BC for ; Fri, 29 May 2020 13:46:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="RrtqqcK2" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 963F1207BC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:42722 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefLK-0004dd-As for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:46:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49042) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKF-0002SH-L1 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:31 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:29694 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKE-0006w3-UG for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:31 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759930; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=IUgy8UQUvLdKrp9kE6giOUSUOdmUDgCVVf6kfLQkLE0=; b=RrtqqcK2tW4MA5W8YqRvw0WgYO/rcX7KaE5Yp09dJBS2Y3dlW79gwOHCfTgNwOKht8cD06 9eF+DMBaWnj+XVkuDO3cynxFRkjkULWohtgRp8mL64gEB8NdyRqQxb2t0E+7nOcynhCd8d u9S1+NULEartgBik+Mt9MypLmFzrQis= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-433-zpP3gSVHM--y_pdpVxa4Wg-1; Fri, 29 May 2020 09:45:27 -0400 X-MC-Unique: zpP3gSVHM--y_pdpVxa4Wg-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 03CAD107ACF2 for ; Fri, 29 May 2020 13:45:27 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id CB51119C79 for ; Fri, 29 May 2020 13:45:26 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id DF0BD113639D; Fri, 29 May 2020 15:45:23 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 05/58] qdev: Put qdev_new() to use with Coccinelle Date: Fri, 29 May 2020 15:44:30 +0200 Message-Id: <20200529134523.8477-6-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Let's start simple and put qdev_new() to use. Coccinelle script: @ depends on !(file in "hw/core/qdev.c")@ expression type_name; @@ - DEVICE(object_new(type_name)) + qdev_new(type_name) Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- hw/block/nand.c | 2 +- hw/misc/auxbus.c | 2 +- qdev-monitor.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/block/nand.c b/hw/block/nand.c index bba89688ba..cdf3429ce6 100644 --- a/hw/block/nand.c +++ b/hw/block/nand.c @@ -644,7 +644,7 @@ DeviceState *nand_init(BlockBackend *blk, int manf_id, int chip_id) if (nand_flash_ids[chip_id].size == 0) { hw_error("%s: Unsupported NAND chip ID.\n", __func__); } - dev = DEVICE(object_new(TYPE_NAND)); + dev = qdev_new(TYPE_NAND); qdev_prop_set_uint8(dev, "manufacturer_id", manf_id); qdev_prop_set_uint8(dev, "chip_id", chip_id); if (blk) { diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index 5e4794f0ac..7fb020086f 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -273,7 +273,7 @@ DeviceState *aux_create_slave(AUXBus *bus, const char *type) { DeviceState *dev; - dev = DEVICE(object_new(type)); + dev = qdev_new(type); assert(dev); qdev_set_parent_bus(dev, &bus->qbus); return dev; diff --git a/qdev-monitor.c b/qdev-monitor.c index a4735d3bb1..20cfa7615b 100644 --- a/qdev-monitor.c +++ b/qdev-monitor.c @@ -652,7 +652,7 @@ DeviceState *qdev_device_add(QemuOpts *opts, Error **errp) } /* create device */ - dev = DEVICE(object_new(driver)); + dev = qdev_new(driver); /* Check whether the hotplug is allowed by the machine */ if (qdev_hotplug && !qdev_hotplug_allowed(dev, &err)) { From patchwork Fri May 29 13:44:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578763 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 97B1F912 for ; Fri, 29 May 2020 13:48:43 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6D8DD207BC for ; Fri, 29 May 2020 13:48:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="E1LYJ7Ao" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6D8DD207BC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:51296 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefNK-0008Le-MQ for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:48:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49038) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKF-0002S7-Gm for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:31 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:25419 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKE-0006uw-Hd for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:31 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759929; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9MxXmEuiHjIpKQSTmv7tL+icq13YA6JgXfJeOezxKDQ=; b=E1LYJ7Ao+NUVwt4M6balMg8XqdeoY+njckCCZp3AIk3oKloCY4MKSSzam6kunp5X8YyTGS XKNfdGFOIrSCD51ATSP8eHd5kPrfkbGXYwCaji5bOWzmx3JwX+ORXObwotXPl1SaQ+3Y4Y cE2cNF9Oviblbo7oToHVZZHZDaKKUMg= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-370-z0fX8RNRPLm_rX8W8I89Ag-1; Fri, 29 May 2020 09:45:27 -0400 X-MC-Unique: z0fX8RNRPLm_rX8W8I89Ag-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 092D6107ACF3 for ; Fri, 29 May 2020 13:45:27 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D0EDB2B6F9 for ; Fri, 29 May 2020 13:45:26 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id E249B11358BC; Fri, 29 May 2020 15:45:23 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 06/58] qdev: Convert to qbus_realize(), qbus_unrealize() Date: Fri, 29 May 2020 15:44:31 +0200 Message-Id: <20200529134523.8477-7-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" I'm going to convert device realization to qdev_realize() with the help of Coccinelle. Convert bus realization to qbus_realize() first, to get it out of Coccinelle's way. Readability improves. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- hw/core/qdev.c | 10 +++------- hw/pci/pci.c | 2 +- 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/hw/core/qdev.c b/hw/core/qdev.c index f2c5cee278..b7355fbcd0 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -1024,9 +1024,7 @@ static void device_set_realized(Object *obj, bool value, Error **errp) resettable_state_clear(&dev->reset); QLIST_FOREACH(bus, &dev->child_bus, sibling) { - object_property_set_bool(OBJECT(bus), true, "realized", - &local_err); - if (local_err != NULL) { + if (!qbus_realize(bus, errp)) { goto child_realize_fail; } } @@ -1051,8 +1049,7 @@ static void device_set_realized(Object *obj, bool value, Error **errp) } else if (!value && dev->realized) { QLIST_FOREACH(bus, &dev->child_bus, sibling) { - object_property_set_bool(OBJECT(bus), false, "realized", - &error_abort); + qbus_unrealize(bus); } if (qdev_get_vmsd(dev)) { vmstate_unregister(VMSTATE_IF(dev), qdev_get_vmsd(dev), dev); @@ -1070,8 +1067,7 @@ static void device_set_realized(Object *obj, bool value, Error **errp) child_realize_fail: QLIST_FOREACH(bus, &dev->child_bus, sibling) { - object_property_set_bool(OBJECT(bus), false, "realized", - &error_abort); + qbus_unrealize(bus); } if (qdev_get_vmsd(dev)) { diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 70c66965f5..6947c741c3 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -456,7 +456,7 @@ void pci_root_bus_cleanup(PCIBus *bus) { pci_bus_uninit(bus); /* the caller of the unplug hotplug handler will delete this device */ - object_property_set_bool(OBJECT(bus), false, "realized", &error_abort); + qbus_unrealize(BUS(bus)); } void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, From patchwork Fri May 29 13:44:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578781 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 11675912 for ; Fri, 29 May 2020 13:52:14 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DC4C1206F1 for ; Fri, 29 May 2020 13:52:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="jN9Oej8n" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DC4C1206F1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:40306 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefQi-00071w-UZ for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:52:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49088) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKI-0002Xe-No for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:34 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:24962 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKG-0006xV-31 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:34 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759931; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bvkrpO4Pw9He+WZIy8yGctwroRn3RGTFts1Ep2tQCtQ=; b=jN9Oej8nMBIZJLkRAktmGxd7lPDjsYX8rD371FhWfm8G52oact8i64MXw/PnkcXo8FCMJV pIePIdKTYeg/oROHQf7Bl9HNeU3XssfrapFMq/gaaY0ABxEv54zenU35S9NVnL1DelfGeL nGbxReFZhM7eDWmCwlGxKMIdsZzLKvw= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-164-Q9leLhYmNJaySm_ZxSDQXQ-1; Fri, 29 May 2020 09:45:29 -0400 X-MC-Unique: Q9leLhYmNJaySm_ZxSDQXQ-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 91D81461 for ; Fri, 29 May 2020 13:45:28 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3D80C6298C for ; Fri, 29 May 2020 13:45:28 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id E5C1511358BE; Fri, 29 May 2020 15:45:23 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 07/58] qdev: Convert to qdev_unrealize() with Coccinelle Date: Fri, 29 May 2020 15:44:32 +0200 Message-Id: <20200529134523.8477-8-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/28 23:43:13 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" For readability, and consistency with qbus_realize(). Coccinelle script: @ depends on !(file in "hw/core/qdev.c")@ typedef DeviceState; DeviceState *dev; symbol false, error_abort; @@ - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); @ depends on !(file in "hw/core/qdev.c")@ expression dev; symbol false, error_abort; @@ - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(DEVICE(dev)); Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- hw/acpi/pcihp.c | 2 +- hw/char/serial-pci-multi.c | 2 +- hw/char/serial-pci.c | 2 +- hw/core/bus.c | 3 +-- hw/i386/pc.c | 4 ++-- hw/pci/pcie.c | 2 +- hw/pci/shpc.c | 2 +- hw/ppc/spapr.c | 8 ++++---- hw/ppc/spapr_pci.c | 3 +-- hw/s390x/css-bridge.c | 2 +- hw/s390x/s390-pci-bus.c | 4 ++-- 11 files changed, 16 insertions(+), 18 deletions(-) diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index d42906ea19..33ea2b76ae 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -266,7 +266,7 @@ void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s, { trace_acpi_pci_unplug(PCI_SLOT(PCI_DEVICE(dev)->devfn), acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev)))); - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev, diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 5f9ccfcc93..23d0ebe2cd 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -56,7 +56,7 @@ static void multi_serial_pci_exit(PCIDevice *dev) for (i = 0; i < pci->ports; i++) { s = pci->state + i; - object_property_set_bool(OBJECT(s), false, "realized", &error_abort); + qdev_unrealize(DEVICE(s)); memory_region_del_subregion(&pci->iobar, &s->io); g_free(pci->name[i]); } diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index 37818db156..65eacfae0e 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -68,7 +68,7 @@ static void serial_pci_exit(PCIDevice *dev) PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev); SerialState *s = &pci->state; - object_property_set_bool(OBJECT(s), false, "realized", &error_abort); + qdev_unrealize(DEVICE(s)); qemu_free_irq(s->irq); } diff --git a/hw/core/bus.c b/hw/core/bus.c index 6f6071f5fa..6cc28b334e 100644 --- a/hw/core/bus.c +++ b/hw/core/bus.c @@ -200,8 +200,7 @@ static void bus_set_realized(Object *obj, bool value, Error **errp) } else if (!value && bus->realized) { QTAILQ_FOREACH(kid, &bus->children, sibling) { DeviceState *dev = kid->child; - object_property_set_bool(OBJECT(dev), false, "realized", - &error_abort); + qdev_unrealize(dev); } if (bc->unrealize) { bc->unrealize(bus); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 2128f3d6fe..f9d51479b1 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1385,7 +1385,7 @@ static void pc_memory_unplug(HotplugHandler *hotplug_dev, } pc_dimm_unplug(PC_DIMM(dev), MACHINE(pcms)); - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); out: error_propagate(errp, local_err); } @@ -1493,7 +1493,7 @@ static void pc_cpu_unplug_cb(HotplugHandler *hotplug_dev, found_cpu = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL); found_cpu->cpu = NULL; - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); /* decrement the number of CPUs */ x86ms->boot_cpus--; diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index f50e10b8fb..582f81fdff 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -457,7 +457,7 @@ void pcie_cap_slot_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, void pcie_cap_slot_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } static void pcie_unplug_device(PCIBus *bus, PCIDevice *dev, void *opaque) diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c index b76d3d2c9a..99d65d5c4c 100644 --- a/hw/pci/shpc.c +++ b/hw/pci/shpc.c @@ -547,7 +547,7 @@ void shpc_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, void shpc_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } void shpc_device_unplug_request_cb(HotplugHandler *hotplug_dev, diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 3b1a5ed865..6a315c0dc8 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3671,7 +3671,7 @@ static void spapr_memory_unplug(HotplugHandler *hotplug_dev, DeviceState *dev) SpaprDimmState *ds = spapr_pending_dimm_unplugs_find(spapr, PC_DIMM(dev)); pc_dimm_unplug(PC_DIMM(dev), MACHINE(hotplug_dev)); - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); spapr_pending_dimm_unplugs_remove(spapr, ds); } @@ -3764,7 +3764,7 @@ static void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *dev) assert(core_slot); core_slot->cpu = NULL; - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } static @@ -4037,7 +4037,7 @@ void spapr_phb_release(DeviceState *dev) static void spapr_phb_unplug(HotplugHandler *hotplug_dev, DeviceState *dev) { - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } static void spapr_phb_unplug_request(HotplugHandler *hotplug_dev, @@ -4073,7 +4073,7 @@ static void spapr_tpm_proxy_unplug(HotplugHandler *hotplug_dev, DeviceState *dev { SpaprMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev)); - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); object_unparent(OBJECT(dev)); spapr->tpm_proxy = NULL; } diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 83f1453096..329002ac04 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1587,8 +1587,7 @@ static void spapr_pci_unplug(HotplugHandler *plug_handler, return; } - object_property_set_bool(OBJECT(plugged_dev), false, "realized", - &error_abort); + qdev_unrealize(plugged_dev); } static void spapr_pci_unplug_request(HotplugHandler *plug_handler, diff --git a/hw/s390x/css-bridge.c b/hw/s390x/css-bridge.c index 3f6aec6b6a..813bfc768a 100644 --- a/hw/s390x/css-bridge.c +++ b/hw/s390x/css-bridge.c @@ -54,7 +54,7 @@ static void ccw_device_unplug(HotplugHandler *hotplug_dev, css_generate_sch_crws(sch->cssid, sch->ssid, sch->schid, 1, 0); - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } static void virtual_css_bus_reset(BusState *qbus) diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index c4a4259f0c..7a4bfb7383 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -1003,7 +1003,7 @@ static void s390_pcihost_unplug(HotplugHandler *hotplug_dev, DeviceState *dev, pbdev->fh, pbdev->fid); bus = pci_get_bus(pci_dev); devfn = pci_dev->devfn; - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); s390_pci_msix_free(pbdev); s390_pci_iommu_free(s, bus, devfn); @@ -1014,7 +1014,7 @@ static void s390_pcihost_unplug(HotplugHandler *hotplug_dev, DeviceState *dev, pbdev->fid = 0; QTAILQ_REMOVE(&s->zpci_devs, pbdev, link); g_hash_table_remove(s->zpci_table, &pbdev->idx); - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } } From patchwork Fri May 29 13:44:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578773 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8972D139A for ; Fri, 29 May 2020 13:50:24 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5E748206A1 for ; Fri, 29 May 2020 13:50:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="TM4OjEdH" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5E748206A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:59966 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefOx-0003Pi-Gm for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:50:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49068) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKH-0002Tc-7p for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:33 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:43758 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKG-0006wv-2m for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:32 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759931; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CdvkeeNhGsyAzYPFwvCMnaIvKCJTduXXJGoF2TR7+A0=; b=TM4OjEdHrGuXQa7rTWQtPt2UcjMYMHwXZofHC/ViEOQHIwCCPbF2boeIuppVHhkX+dSFCj T1+XYO434ljuSa4Qf0BKauPaNjoc/MsVKsihmiFjqLoXuHSa2vI1bstrDrIEJvgGHeHJ1m V55tkLZgKXXyK9Dw4Lcx3FYEHAN7v68= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-352-_xMDvyKgPdqMfzlGCytfTA-1; Fri, 29 May 2020 09:45:29 -0400 X-MC-Unique: _xMDvyKgPdqMfzlGCytfTA-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 6D29A800688 for ; Fri, 29 May 2020 13:45:28 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 41BDF5C1C8 for ; Fri, 29 May 2020 13:45:28 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id E919211358BF; Fri, 29 May 2020 15:45:23 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 08/58] qdev: Convert to qdev_unrealize() manually Date: Fri, 29 May 2020 15:44:33 +0200 Message-Id: <20200529134523.8477-9-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/28 23:43:13 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- include/hw/qdev-core.h | 1 - hw/core/qdev.c | 4 ++-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index fba29308f7..be6f7c4736 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -328,7 +328,6 @@ void qdev_init_nofail(DeviceState *dev); bool qdev_realize(DeviceState *dev, BusState *bus, Error **errp); bool qdev_realize_and_unref(DeviceState *dev, BusState *bus, Error **errp); void qdev_unrealize(DeviceState *dev); - void qdev_set_legacy_instance_id(DeviceState *dev, int alias_id, int required_for_version); HotplugHandler *qdev_get_bus_hotplug_handler(DeviceState *dev); diff --git a/hw/core/qdev.c b/hw/core/qdev.c index b7355fbcd0..4768244f31 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -421,7 +421,7 @@ static void device_reset_child_foreach(Object *obj, ResettableChildCallback cb, void qdev_simple_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } /* @@ -1183,7 +1183,7 @@ static void device_unparent(Object *obj) BusState *bus; if (dev->realized) { - object_property_set_bool(obj, false, "realized", &error_abort); + qdev_unrealize(dev); } while (dev->num_child_bus) { bus = QLIST_FIRST(&dev->child_bus); From patchwork Fri May 29 13:44:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578843 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9590614F6 for ; Fri, 29 May 2020 14:00:29 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2831220707 for ; Fri, 29 May 2020 14:00:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="hWLIsQaP" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2831220707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:50348 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefYi-0006aI-6R for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:00:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49274) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKW-00034t-DT for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:48 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:33873 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKJ-00073p-SJ for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:47 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759934; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=lBf0JVkAnrPyt5q8dn4hWxyhm9CBImw+GZ+ygvN5gaU=; b=hWLIsQaPFCgty2JvqZgxReNGZzpTuzc0I9HNCVpdsYkVQ9r0A5iLaMnePbbqYNra/jQYxR G4fCrR1eRPuCHBHjnPQlLTVGzcCxfCU8krfTq4yTAE6uvt+F++8m2jvl0+s6IK8Lh/3xOG zBhELIrcnLg/0FVWahHpnk4QGU3Th0I= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-384-TOR9aR-3OZuKGHdgywWulA-1; Fri, 29 May 2020 09:45:30 -0400 X-MC-Unique: TOR9aR-3OZuKGHdgywWulA-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 6230118FE866 for ; Fri, 29 May 2020 13:45:29 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 42BEC5C1D0 for ; Fri, 29 May 2020 13:45:28 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id EE88711358C0; Fri, 29 May 2020 15:45:23 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 09/58] qdev: Convert uses of qdev_create() with Coccinelle Date: Fri, 29 May 2020 15:44:34 +0200 Message-Id: <20200529134523.8477-10-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/28 23:43:13 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" This is the transformation explained in the commit before previous. Takes care of just one pattern that needs conversion. More to come in this series. Coccinelle script: @ depends on !(file in "hw/arm/highbank.c")@ expression bus, type_name, dev, expr; @@ - dev = qdev_create(bus, type_name); + dev = qdev_new(type_name); ... when != dev = expr - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, bus, &error_fatal); @@ expression bus, type_name, dev, expr; identifier DOWN; @@ - dev = DOWN(qdev_create(bus, type_name)); + dev = DOWN(qdev_new(type_name)); ... when != dev = expr - qdev_init_nofail(DEVICE(dev)); + qdev_realize_and_unref(DEVICE(dev), bus, &error_fatal); @@ expression bus, type_name, expr; identifier dev; @@ - DeviceState *dev = qdev_create(bus, type_name); + DeviceState *dev = qdev_new(type_name); ... when != dev = expr - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, bus, &error_fatal); @@ expression bus, type_name, dev, expr, errp; symbol true; @@ - dev = qdev_create(bus, type_name); + dev = qdev_new(type_name); ... when != dev = expr - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize_and_unref(dev, bus, errp); @@ expression bus, type_name, expr, errp; identifier dev; symbol true; @@ - DeviceState *dev = qdev_create(bus, type_name); + DeviceState *dev = qdev_new(type_name); ... when != dev = expr - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize_and_unref(dev, bus, errp); The first rule exempts hw/arm/highbank.c, because it matches along two control flow paths there, with different @type_name. Covered by the next commit's manual conversions. Missing #include "qapi/error.h" added manually. Signed-off-by: Markus Armbruster --- hw/lm32/lm32.h | 13 ++--- hw/lm32/milkymist-hw.h | 37 +++++++------- include/hw/char/cadence_uart.h | 5 +- include/hw/char/cmsdk-apb-uart.h | 4 +- include/hw/char/pl011.h | 9 ++-- include/hw/char/xilinx_uartlite.h | 4 +- include/hw/cris/etraxfs.h | 4 +- include/hw/misc/unimp.h | 5 +- include/hw/timer/cmsdk-apb-timer.h | 4 +- hw/alpha/typhoon.c | 4 +- hw/arm/aspeed.c | 7 +-- hw/arm/cubieboard.c | 4 +- hw/arm/exynos4210.c | 41 +++++++-------- hw/arm/exynos4_boards.c | 4 +- hw/arm/imx25_pdk.c | 5 +- hw/arm/integratorcp.c | 4 +- hw/arm/mcimx6ul-evk.c | 5 +- hw/arm/mcimx7d-sabre.c | 5 +- hw/arm/mps2-tz.c | 4 +- hw/arm/msf2-som.c | 4 +- hw/arm/musicpal.c | 8 +-- hw/arm/netduino2.c | 4 +- hw/arm/netduinoplus2.c | 4 +- hw/arm/nseries.c | 8 +-- hw/arm/omap1.c | 16 +++--- hw/arm/omap2.c | 16 +++--- hw/arm/orangepi.c | 4 +- hw/arm/pxa2xx.c | 8 +-- hw/arm/pxa2xx_gpio.c | 5 +- hw/arm/pxa2xx_pic.c | 5 +- hw/arm/raspi.c | 4 +- hw/arm/realview.c | 20 ++++---- hw/arm/sbsa-ref.c | 20 ++++---- hw/arm/spitz.c | 4 +- hw/arm/stellaris.c | 12 ++--- hw/arm/strongarm.c | 9 ++-- hw/arm/versatilepb.c | 16 +++--- hw/arm/vexpress.c | 16 +++--- hw/arm/virt.c | 32 ++++++------ hw/arm/xilinx_zynq.c | 38 +++++++------- hw/arm/xlnx-versal-virt.c | 9 ++-- hw/arm/xlnx-versal.c | 4 +- hw/arm/xlnx-zcu102.c | 5 +- hw/audio/intel-hda.c | 4 +- hw/block/fdc.c | 12 ++--- hw/block/pflash_cfi01.c | 4 +- hw/block/pflash_cfi02.c | 4 +- hw/char/exynos4210_uart.c | 5 +- hw/char/mcf_uart.c | 5 +- hw/char/spapr_vty.c | 4 +- hw/core/empty_slot.c | 5 +- hw/core/sysbus.c | 4 +- hw/cris/axis_dev88.c | 4 +- hw/display/milkymist-tmu2.c | 4 +- hw/display/sm501.c | 4 +- hw/dma/pxa2xx_dma.c | 8 +-- hw/dma/rc4030.c | 5 +- hw/dma/sparc32_dma.c | 16 +++--- hw/hppa/dino.c | 4 +- hw/hppa/lasi.c | 4 +- hw/hppa/machine.c | 4 +- hw/i2c/core.c | 5 +- hw/i2c/smbus_eeprom.c | 4 +- hw/i386/pc_q35.c | 4 +- hw/i386/x86.c | 6 +-- hw/ide/qdev.c | 4 +- hw/intc/exynos4210_gic.c | 5 +- hw/intc/s390_flic.c | 6 +-- hw/isa/isa-bus.c | 4 +- hw/m68k/mcf5208.c | 4 +- hw/m68k/mcf_intc.c | 5 +- hw/m68k/next-cube.c | 12 ++--- hw/m68k/q800.c | 36 ++++++------- hw/microblaze/petalogix_ml605_mmu.c | 20 ++++---- hw/microblaze/petalogix_s3adsp1800_mmu.c | 12 ++--- hw/mips/boston.c | 8 +-- hw/mips/gt64xxx_pci.c | 5 +- hw/mips/jazz.c | 16 +++--- hw/mips/malta.c | 4 +- hw/mips/mipssim.c | 8 +-- hw/net/etraxfs_eth.c | 4 +- hw/net/fsl_etsec/etsec.c | 5 +- hw/net/lan9118.c | 5 +- hw/net/lasi_i82596.c | 5 +- hw/net/smc91c111.c | 5 +- hw/net/spapr_llan.c | 4 +- hw/nios2/10m50_devboard.c | 12 ++--- hw/nvram/fw_cfg.c | 8 +-- hw/openrisc/openrisc_sim.c | 8 +-- hw/pci-bridge/pci_expander_bridge.c | 4 +- hw/pci-host/bonito.c | 5 +- hw/pci-host/i440fx.c | 4 +- hw/pcmcia/pxa2xx.c | 5 +- hw/ppc/e500.c | 32 ++++++------ hw/ppc/mac_newworld.c | 40 +++++++-------- hw/ppc/mac_oldworld.c | 20 ++++---- hw/ppc/pnv.c | 4 +- hw/ppc/ppc440_uc.c | 8 +-- hw/ppc/prep.c | 9 ++-- hw/ppc/sam460ex.c | 4 +- hw/ppc/spapr.c | 8 +-- hw/ppc/spapr_irq.c | 4 +- hw/ppc/spapr_vio.c | 4 +- hw/ppc/virtex_ml507.c | 9 ++-- hw/riscv/sifive_clint.c | 5 +- hw/riscv/sifive_e_prci.c | 5 +- hw/riscv/sifive_plic.c | 5 +- hw/riscv/sifive_test.c | 5 +- hw/riscv/virt.c | 4 +- hw/rtc/m48t59.c | 5 +- hw/rtc/sun4v-rtc.c | 5 +- hw/s390x/ap-bridge.c | 4 +- hw/s390x/css-bridge.c | 4 +- hw/s390x/s390-virtio-ccw.c | 12 ++--- hw/scsi/scsi-bus.c | 4 +- hw/scsi/spapr_vscsi.c | 4 +- hw/sd/milkymist-memcard.c | 4 +- hw/sd/pxa2xx_mmci.c | 8 +-- hw/sd/ssi-sd.c | 4 +- hw/sh4/r2d.c | 12 ++--- hw/sparc/leon3.c | 12 ++--- hw/sparc/sun4m.c | 64 ++++++++++++------------ hw/sparc64/sun4u.c | 24 ++++----- hw/xen/xen-bus.c | 4 +- hw/xen/xen-legacy-backend.c | 4 +- hw/xtensa/virt.c | 4 +- hw/xtensa/xtfpga.c | 8 +-- 127 files changed, 581 insertions(+), 552 deletions(-) diff --git a/hw/lm32/lm32.h b/hw/lm32/lm32.h index 98de07acf2..326238d859 100644 --- a/hw/lm32/lm32.h +++ b/hw/lm32/lm32.h @@ -3,14 +3,15 @@ #include "hw/char/lm32_juart.h" #include "hw/qdev-properties.h" +#include "qapi/error.h" static inline DeviceState *lm32_pic_init(qemu_irq cpu_irq) { DeviceState *dev; SysBusDevice *d; - dev = qdev_create(NULL, "lm32-pic"); - qdev_init_nofail(dev); + dev = qdev_new("lm32-pic"); + qdev_realize_and_unref(dev, NULL, &error_fatal); d = SYS_BUS_DEVICE(dev); sysbus_connect_irq(d, 0, cpu_irq); @@ -21,9 +22,9 @@ static inline DeviceState *lm32_juart_init(Chardev *chr) { DeviceState *dev; - dev = qdev_create(NULL, TYPE_LM32_JUART); + dev = qdev_new(TYPE_LM32_JUART); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); return dev; } @@ -35,10 +36,10 @@ static inline DeviceState *lm32_uart_create(hwaddr addr, DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, "lm32-uart"); + dev = qdev_new("lm32-uart"); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); return dev; diff --git a/hw/lm32/milkymist-hw.h b/hw/lm32/milkymist-hw.h index 5f63024355..d5f15a30a1 100644 --- a/hw/lm32/milkymist-hw.h +++ b/hw/lm32/milkymist-hw.h @@ -3,6 +3,7 @@ #include "hw/qdev-core.h" #include "net/net.h" +#include "qapi/error.h" static inline DeviceState *milkymist_uart_create(hwaddr base, qemu_irq irq, @@ -10,9 +11,9 @@ static inline DeviceState *milkymist_uart_create(hwaddr base, { DeviceState *dev; - dev = qdev_create(NULL, "milkymist-uart"); + dev = qdev_new("milkymist-uart"); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); @@ -23,8 +24,8 @@ static inline DeviceState *milkymist_hpdmc_create(hwaddr base) { DeviceState *dev; - dev = qdev_create(NULL, "milkymist-hpdmc"); - qdev_init_nofail(dev); + dev = qdev_new("milkymist-hpdmc"); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return dev; @@ -34,8 +35,8 @@ static inline DeviceState *milkymist_memcard_create(hwaddr base) { DeviceState *dev; - dev = qdev_create(NULL, "milkymist-memcard"); - qdev_init_nofail(dev); + dev = qdev_new("milkymist-memcard"); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return dev; @@ -46,10 +47,10 @@ static inline DeviceState *milkymist_vgafb_create(hwaddr base, { DeviceState *dev; - dev = qdev_create(NULL, "milkymist-vgafb"); + dev = qdev_new("milkymist-vgafb"); qdev_prop_set_uint32(dev, "fb_offset", fb_offset); qdev_prop_set_uint32(dev, "fb_mask", fb_mask); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return dev; @@ -62,12 +63,12 @@ static inline DeviceState *milkymist_sysctl_create(hwaddr base, { DeviceState *dev; - dev = qdev_create(NULL, "milkymist-sysctl"); + dev = qdev_new("milkymist-sysctl"); qdev_prop_set_uint32(dev, "frequency", freq_hz); qdev_prop_set_uint32(dev, "systemid", system_id); qdev_prop_set_uint32(dev, "capabilities", capabilities); qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, gpio_irq); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, timer0_irq); @@ -81,8 +82,8 @@ static inline DeviceState *milkymist_pfpu_create(hwaddr base, { DeviceState *dev; - dev = qdev_create(NULL, "milkymist-pfpu"); - qdev_init_nofail(dev); + dev = qdev_new("milkymist-pfpu"); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); return dev; @@ -94,8 +95,8 @@ static inline DeviceState *milkymist_ac97_create(hwaddr base, { DeviceState *dev; - dev = qdev_create(NULL, "milkymist-ac97"); - qdev_init_nofail(dev); + dev = qdev_new("milkymist-ac97"); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, crrequest_irq); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, crreply_irq); @@ -111,9 +112,9 @@ static inline DeviceState *milkymist_minimac2_create(hwaddr base, DeviceState *dev; qemu_check_nic_model(&nd_table[0], "minimac2"); - dev = qdev_create(NULL, "milkymist-minimac2"); + dev = qdev_new("milkymist-minimac2"); qdev_set_nic_properties(dev, &nd_table[0]); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, buffers_base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, rx_irq); @@ -128,10 +129,10 @@ static inline DeviceState *milkymist_softusb_create(hwaddr base, { DeviceState *dev; - dev = qdev_create(NULL, "milkymist-softusb"); + dev = qdev_new("milkymist-softusb"); qdev_prop_set_uint32(dev, "pmem_size", pmem_size); qdev_prop_set_uint32(dev, "dmem_size", dmem_size); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, pmem_base); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, dmem_base); diff --git a/include/hw/char/cadence_uart.h b/include/hw/char/cadence_uart.h index 2a179a572f..af80b6083b 100644 --- a/include/hw/char/cadence_uart.h +++ b/include/hw/char/cadence_uart.h @@ -22,6 +22,7 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "chardev/char-fe.h" +#include "qapi/error.h" #include "qemu/timer.h" #define CADENCE_UART_RX_FIFO_SIZE 16 @@ -59,10 +60,10 @@ static inline DeviceState *cadence_uart_create(hwaddr addr, DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, TYPE_CADENCE_UART); + dev = qdev_new(TYPE_CADENCE_UART); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); diff --git a/include/hw/char/cmsdk-apb-uart.h b/include/hw/char/cmsdk-apb-uart.h index 3c1b53db4e..a51471ff74 100644 --- a/include/hw/char/cmsdk-apb-uart.h +++ b/include/hw/char/cmsdk-apb-uart.h @@ -62,11 +62,11 @@ static inline DeviceState *cmsdk_apb_uart_create(hwaddr addr, DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, TYPE_CMSDK_APB_UART); + dev = qdev_new(TYPE_CMSDK_APB_UART); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); qdev_prop_set_uint32(dev, "pclk-frq", pclk_frq); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, txint); sysbus_connect_irq(s, 1, rxint); diff --git a/include/hw/char/pl011.h b/include/hw/char/pl011.h index 14187165c6..18e701b65d 100644 --- a/include/hw/char/pl011.h +++ b/include/hw/char/pl011.h @@ -18,6 +18,7 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "chardev/char-fe.h" +#include "qapi/error.h" #define TYPE_PL011 "pl011" #define PL011(obj) OBJECT_CHECK(PL011State, (obj), TYPE_PL011) @@ -57,10 +58,10 @@ static inline DeviceState *pl011_create(hwaddr addr, DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, "pl011"); + dev = qdev_new("pl011"); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); @@ -74,10 +75,10 @@ static inline DeviceState *pl011_luminary_create(hwaddr addr, DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, "pl011_luminary"); + dev = qdev_new("pl011_luminary"); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); diff --git a/include/hw/char/xilinx_uartlite.h b/include/hw/char/xilinx_uartlite.h index 194e2feafe..007b84575f 100644 --- a/include/hw/char/xilinx_uartlite.h +++ b/include/hw/char/xilinx_uartlite.h @@ -25,10 +25,10 @@ static inline DeviceState *xilinx_uartlite_create(hwaddr addr, DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, "xlnx.xps-uartlite"); + dev = qdev_new("xlnx.xps-uartlite"); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); diff --git a/include/hw/cris/etraxfs.h b/include/hw/cris/etraxfs.h index 403e7f95e6..19b903facf 100644 --- a/include/hw/cris/etraxfs.h +++ b/include/hw/cris/etraxfs.h @@ -41,10 +41,10 @@ static inline DeviceState *etraxfs_ser_create(hwaddr addr, DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, "etraxfs,serial"); + dev = qdev_new("etraxfs,serial"); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); return dev; diff --git a/include/hw/misc/unimp.h b/include/hw/misc/unimp.h index 44d87be903..e71ec17e13 100644 --- a/include/hw/misc/unimp.h +++ b/include/hw/misc/unimp.h @@ -10,6 +10,7 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" +#include "qapi/error.h" #define TYPE_UNIMPLEMENTED_DEVICE "unimplemented-device" @@ -40,11 +41,11 @@ static inline void create_unimplemented_device(const char *name, hwaddr base, hwaddr size) { - DeviceState *dev = qdev_create(NULL, TYPE_UNIMPLEMENTED_DEVICE); + DeviceState *dev = qdev_new(TYPE_UNIMPLEMENTED_DEVICE); qdev_prop_set_string(dev, "name", name); qdev_prop_set_uint64(dev, "size", size); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map_overlap(SYS_BUS_DEVICE(dev), 0, base, -1000); } diff --git a/include/hw/timer/cmsdk-apb-timer.h b/include/hw/timer/cmsdk-apb-timer.h index e93caccc3c..eee175eaa4 100644 --- a/include/hw/timer/cmsdk-apb-timer.h +++ b/include/hw/timer/cmsdk-apb-timer.h @@ -48,10 +48,10 @@ static inline DeviceState *cmsdk_apb_timer_create(hwaddr addr, DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, TYPE_CMSDK_APB_TIMER); + dev = qdev_new(TYPE_CMSDK_APB_TIMER); s = SYS_BUS_DEVICE(dev); qdev_prop_set_uint32(dev, "pclk-frq", pclk_frq); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, timerint); return dev; diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 1795e2f29d..480d866c77 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -826,7 +826,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bus, qemu_irq *p_rtc_irq, PCIBus *b; int i; - dev = qdev_create(NULL, TYPE_TYPHOON_PCI_HOST_BRIDGE); + dev = qdev_new(TYPE_TYPHOON_PCI_HOST_BRIDGE); s = TYPHOON_PCI_HOST_BRIDGE(dev); phb = PCI_HOST_BRIDGE(dev); @@ -889,7 +889,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bus, qemu_irq *p_rtc_irq, &s->pchip.reg_mem, &s->pchip.reg_io, 0, 64, TYPE_PCI_BUS); phb->bus = b; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); /* Host memory as seen from the PCI side, via the IOMMU. */ memory_region_init_iommu(&s->pchip.iommu, sizeof(s->pchip.iommu), diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index f8f3ef89d3..63a7105e8b 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -241,13 +241,14 @@ static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo) { DeviceState *card; - card = qdev_create(qdev_get_child_bus(DEVICE(sdhci), "sd-bus"), - TYPE_SD_CARD); + card = qdev_new(TYPE_SD_CARD); if (dinfo) { qdev_prop_set_drive(card, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); } - object_property_set_bool(OBJECT(card), true, "realized", &error_fatal); + qdev_realize_and_unref(card, + qdev_get_child_bus(DEVICE(sdhci), "sd-bus"), + &error_fatal); } static void aspeed_machine_init(MachineState *machine) diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c index cd1b6d3e19..4bc4f08caf 100644 --- a/hw/arm/cubieboard.c +++ b/hw/arm/cubieboard.c @@ -92,9 +92,9 @@ static void cubieboard_init(MachineState *machine) bus = qdev_get_child_bus(DEVICE(a10), "sd-bus"); /* Plug in SD card */ - carddev = qdev_create(bus, TYPE_SD_CARD); + carddev = qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, "realized", &error_fatal); + qdev_realize_and_unref(carddev, bus, &error_fatal); memory_region_add_subregion(get_system_memory(), AW_A10_SDRAM_BASE, machine->ram); diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 1f7253ef6f..9ff1a11f80 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -173,7 +173,7 @@ static DeviceState *pl330_create(uint32_t base, qemu_or_irq *orgate, DeviceState *dev; int i; - dev = qdev_create(NULL, "pl330"); + dev = qdev_new("pl330"); qdev_prop_set_uint8(dev, "num_events", nevents); qdev_prop_set_uint8(dev, "num_chnls", 8); qdev_prop_set_uint8(dev, "num_periph_req", nreq); @@ -184,7 +184,7 @@ static DeviceState *pl330_create(uint32_t base, qemu_or_irq *orgate, qdev_prop_set_uint8(dev, "rd_q_dep", 8); qdev_prop_set_uint8(dev, "data_width", width); qdev_prop_set_uint16(dev, "data_buffer_dep", width); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, base); @@ -232,9 +232,9 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) /* IRQ Gate */ for (i = 0; i < EXYNOS4210_NCPUS; i++) { - dev = qdev_create(NULL, "exynos4210.irq_gate"); + dev = qdev_new("exynos4210.irq_gate"); qdev_prop_set_uint32(dev, "n_in", EXYNOS4210_IRQ_GATE_NINPUTS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); /* Get IRQ Gate input in gate_irq */ for (n = 0; n < EXYNOS4210_IRQ_GATE_NINPUTS; n++) { gate_irq[i][n] = qdev_get_gpio_in(dev, n); @@ -247,9 +247,9 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) } /* Private memory region and Internal GIC */ - dev = qdev_create(NULL, TYPE_A9MPCORE_PRIV); + dev = qdev_new(TYPE_A9MPCORE_PRIV); qdev_prop_set_uint32(dev, "num-cpu", EXYNOS4210_NCPUS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, EXYNOS4210_SMP_PRIVATE_BASE_ADDR); for (n = 0; n < EXYNOS4210_NCPUS; n++) { @@ -263,9 +263,9 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) sysbus_create_simple("l2x0", EXYNOS4210_L2X0_BASE_ADDR, NULL); /* External GIC */ - dev = qdev_create(NULL, "exynos4210.gic"); + dev = qdev_new("exynos4210.gic"); qdev_prop_set_uint32(dev, "num-cpu", EXYNOS4210_NCPUS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); /* Map CPU interface */ sysbus_mmio_map(busdev, 0, EXYNOS4210_EXT_GIC_CPU_BASE_ADDR); @@ -279,8 +279,8 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) } /* Internal Interrupt Combiner */ - dev = qdev_create(NULL, "exynos4210.combiner"); - qdev_init_nofail(dev); + dev = qdev_new("exynos4210.combiner"); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) { sysbus_connect_irq(busdev, n, s->irqs.int_gic_irq[n]); @@ -289,9 +289,9 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) sysbus_mmio_map(busdev, 0, EXYNOS4210_INT_COMBINER_BASE_ADDR); /* External Interrupt Combiner */ - dev = qdev_create(NULL, "exynos4210.combiner"); + dev = qdev_new("exynos4210.combiner"); qdev_prop_set_uint32(dev, "external", 1); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) { sysbus_connect_irq(busdev, n, s->irqs.ext_gic_irq[n]); @@ -353,8 +353,8 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) NULL); /* Multi Core Timer */ - dev = qdev_create(NULL, "exynos4210.mct"); - qdev_init_nofail(dev); + dev = qdev_new("exynos4210.mct"); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); for (n = 0; n < 4; n++) { /* Connect global timer interrupts to Combiner gpio_in */ @@ -379,8 +379,8 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) i2c_irq = s->irq_table[exynos4210_get_irq(EXYNOS4210_HDMI_INTG, 1)]; } - dev = qdev_create(NULL, "exynos4210.i2c"); - qdev_init_nofail(dev); + dev = qdev_new("exynos4210.i2c"); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_connect_irq(busdev, 0, i2c_irq); sysbus_mmio_map(busdev, 0, addr); @@ -423,9 +423,9 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) * public datasheet which is very similar (implementing * MMC Specification Version 4.0 being the only difference noted) */ - dev = qdev_create(NULL, TYPE_S3C_SDHCI); + dev = qdev_new(TYPE_S3C_SDHCI); qdev_prop_set_uint64(dev, "capareg", EXYNOS4210_SDHCI_CAPABILITIES); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, EXYNOS4210_SDHCI_ADDR(n)); @@ -433,9 +433,10 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) di = drive_get(IF_SD, 0, n); blk = di ? blk_by_legacy_dinfo(di) : NULL; - carddev = qdev_create(qdev_get_child_bus(dev, "sd-bus"), TYPE_SD_CARD); + carddev = qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_abort); - qdev_init_nofail(carddev); + qdev_realize_and_unref(carddev, qdev_get_child_bus(dev, "sd-bus"), + &error_fatal); } /*** Display controller (FIMD) ***/ diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index 09da52876d..d4fe9c6128 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -81,10 +81,10 @@ static void lan9215_init(uint32_t base, qemu_irq irq) /* This should be a 9215 but the 9118 is close enough */ if (nd_table[0].used) { qemu_check_nic_model(&nd_table[0], "lan9118"); - dev = qdev_create(NULL, TYPE_LAN9118); + dev = qdev_new(TYPE_LAN9118); qdev_set_nic_properties(dev, &nd_table[0]); qdev_prop_set_uint32(dev, "mode_16bit", 1); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, base); sysbus_connect_irq(s, 0, irq); diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c index b3ca82bafa..75076f2ea4 100644 --- a/hw/arm/imx25_pdk.c +++ b/hw/arm/imx25_pdk.c @@ -130,10 +130,9 @@ static void imx25_pdk_init(MachineState *machine) di = drive_get_next(IF_SD); blk = di ? blk_by_legacy_dinfo(di) : NULL; bus = qdev_get_child_bus(DEVICE(&s->soc.esdhc[i]), "sd-bus"); - carddev = qdev_create(bus, TYPE_SD_CARD); + carddev = qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, - "realized", &error_fatal); + qdev_realize_and_unref(carddev, bus, &error_fatal); } /* diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index 5fb54e5aa7..45698307f1 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -620,9 +620,9 @@ static void integratorcp_init(MachineState *machine) 0, ram_size); memory_region_add_subregion(address_space_mem, 0x80000000, ram_alias); - dev = qdev_create(NULL, TYPE_INTEGRATOR_CM); + dev = qdev_new(TYPE_INTEGRATOR_CM); qdev_prop_set_uint32(dev, "memsz", ram_size >> 20); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map((SysBusDevice *)dev, 0, 0x10000000); dev = sysbus_create_varargs(TYPE_INTEGRATOR_PIC, 0x14000000, diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c index 5b5f23a6d4..769fe6d802 100644 --- a/hw/arm/mcimx6ul-evk.c +++ b/hw/arm/mcimx6ul-evk.c @@ -54,10 +54,9 @@ static void mcimx6ul_evk_init(MachineState *machine) di = drive_get_next(IF_SD); blk = di ? blk_by_legacy_dinfo(di) : NULL; bus = qdev_get_child_bus(DEVICE(&s->usdhc[i]), "sd-bus"); - carddev = qdev_create(bus, TYPE_SD_CARD); + carddev = qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, - "realized", &error_fatal); + qdev_realize_and_unref(carddev, bus, &error_fatal); } if (!qtest_enabled()) { diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c index 3851cd9e3e..645ad5470f 100644 --- a/hw/arm/mcimx7d-sabre.c +++ b/hw/arm/mcimx7d-sabre.c @@ -56,10 +56,9 @@ static void mcimx7d_sabre_init(MachineState *machine) di = drive_get_next(IF_SD); blk = di ? blk_by_legacy_dinfo(di) : NULL; bus = qdev_get_child_bus(DEVICE(&s->usdhc[i]), "sd-bus"); - carddev = qdev_create(bus, TYPE_SD_CARD); + carddev = qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, - "realized", &error_fatal); + qdev_realize_and_unref(carddev, bus, &error_fatal); } if (!qtest_enabled()) { diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 2c43041564..07d11e439f 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -246,9 +246,9 @@ static MemoryRegion *make_eth_dev(MPS2TZMachineState *mms, void *opaque, * except that it doesn't support the checksum-offload feature. */ qemu_check_nic_model(nd, "lan9118"); - mms->lan9118 = qdev_create(NULL, TYPE_LAN9118); + mms->lan9118 = qdev_new(TYPE_LAN9118); qdev_set_nic_properties(mms->lan9118, nd); - qdev_init_nofail(mms->lan9118); + qdev_realize_and_unref(mms->lan9118, NULL, &error_fatal); s = SYS_BUS_DEVICE(mms->lan9118); sysbus_connect_irq(s, 0, get_sse_irq_in(mms, 16)); diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c index dbd35b6def..e398703742 100644 --- a/hw/arm/msf2-som.c +++ b/hw/arm/msf2-som.c @@ -61,7 +61,7 @@ static void emcraft_sf2_s2s010_init(MachineState *machine) &error_fatal); memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr); - dev = qdev_create(NULL, TYPE_MSF2_SOC); + dev = qdev_new(TYPE_MSF2_SOC); qdev_prop_set_string(dev, "part-name", "M2S010"); qdev_prop_set_string(dev, "cpu-type", mc->default_cpu_type); @@ -77,7 +77,7 @@ static void emcraft_sf2_s2s010_init(MachineState *machine) qdev_prop_set_uint32(dev, "apb0div", 2); qdev_prop_set_uint32(dev, "apb1div", 2); - object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal); + qdev_realize_and_unref(dev, NULL, &error_fatal); soc = MSF2_SOC(dev); diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 92f33ed87e..d03351e5fa 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1651,9 +1651,9 @@ static void musicpal_init(MachineState *machine) sysbus_create_simple(TYPE_MV88W8618_FLASHCFG, MP_FLASHCFG_BASE, NULL); qemu_check_nic_model(&nd_table[0], "mv88w8618"); - dev = qdev_create(NULL, TYPE_MV88W8618_ETH); + dev = qdev_new(TYPE_MV88W8618_ETH); qdev_set_nic_properties(dev, &nd_table[0]); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MP_ETH_BASE); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[MP_ETH_IRQ]); @@ -1688,11 +1688,11 @@ static void musicpal_init(MachineState *machine) } wm8750_dev = i2c_create_slave(i2c, TYPE_WM8750, MP_WM_ADDR); - dev = qdev_create(NULL, TYPE_MV88W8618_AUDIO); + dev = qdev_new(TYPE_MV88W8618_AUDIO); s = SYS_BUS_DEVICE(dev); object_property_set_link(OBJECT(dev), OBJECT(wm8750_dev), "wm8750", NULL); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, MP_AUDIO_BASE); sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]); diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c index e770d9cac8..6bd8e4e197 100644 --- a/hw/arm/netduino2.c +++ b/hw/arm/netduino2.c @@ -34,9 +34,9 @@ static void netduino2_init(MachineState *machine) { DeviceState *dev; - dev = qdev_create(NULL, TYPE_STM32F205_SOC); + dev = qdev_new(TYPE_STM32F205_SOC); qdev_prop_set_string(dev, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3")); - object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal); + qdev_realize_and_unref(dev, NULL, &error_fatal); armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, FLASH_SIZE); diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c index e5e247edbe..8d4b3d7c43 100644 --- a/hw/arm/netduinoplus2.c +++ b/hw/arm/netduinoplus2.c @@ -34,9 +34,9 @@ static void netduinoplus2_init(MachineState *machine) { DeviceState *dev; - dev = qdev_create(NULL, TYPE_STM32F405_SOC); + dev = qdev_new(TYPE_STM32F405_SOC); qdev_prop_set_string(dev, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m4")); - object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal); + qdev_realize_and_unref(dev, NULL, &error_fatal); armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c index eae800b5c1..856fa565a4 100644 --- a/hw/arm/nseries.c +++ b/hw/arm/nseries.c @@ -174,7 +174,7 @@ static void n8x0_nand_setup(struct n800_s *s) char *otp_region; DriveInfo *dinfo; - s->nand = qdev_create(NULL, "onenand"); + s->nand = qdev_new("onenand"); qdev_prop_set_uint16(s->nand, "manufacturer_id", NAND_MFR_SAMSUNG); /* Either 0x40 or 0x48 are OK for the device ID */ qdev_prop_set_uint16(s->nand, "device_id", 0x48); @@ -185,7 +185,7 @@ static void n8x0_nand_setup(struct n800_s *s) qdev_prop_set_drive(s->nand, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); } - qdev_init_nofail(s->nand); + qdev_realize_and_unref(s->nand, NULL, &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(s->nand), 0, qdev_get_gpio_in(s->mpu->gpio, N8X0_ONENAND_GPIO)); omap_gpmc_attach(s->mpu->gpmc, N8X0_ONENAND_CS, @@ -802,9 +802,9 @@ static void n8x0_uart_setup(struct n800_s *s) static void n8x0_usb_setup(struct n800_s *s) { SysBusDevice *dev; - s->usb = qdev_create(NULL, "tusb6010"); + s->usb = qdev_new("tusb6010"); dev = SYS_BUS_DEVICE(s->usb); - qdev_init_nofail(s->usb); + qdev_realize_and_unref(s->usb, NULL, &error_fatal); sysbus_connect_irq(dev, 0, qdev_get_gpio_in(s->mpu->gpio, N8X0_TUSB_INT_GPIO)); /* Using the NOR interface */ diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 761cc17ea9..c11d6da9d5 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -3887,20 +3887,20 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, omap_clkm_init(system_memory, 0xfffece00, 0xe1008000, s); - s->ih[0] = qdev_create(NULL, "omap-intc"); + s->ih[0] = qdev_new("omap-intc"); qdev_prop_set_uint32(s->ih[0], "size", 0x100); omap_intc_set_iclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "arminth_ck")); - qdev_init_nofail(s->ih[0]); + qdev_realize_and_unref(s->ih[0], NULL, &error_fatal); busdev = SYS_BUS_DEVICE(s->ih[0]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ)); sysbus_connect_irq(busdev, 1, qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_FIQ)); sysbus_mmio_map(busdev, 0, 0xfffecb00); - s->ih[1] = qdev_create(NULL, "omap-intc"); + s->ih[1] = qdev_new("omap-intc"); qdev_prop_set_uint32(s->ih[1], "size", 0x800); omap_intc_set_iclk(OMAP_INTC(s->ih[1]), omap_findclk(s, "arminth_ck")); - qdev_init_nofail(s->ih[1]); + qdev_realize_and_unref(s->ih[1], NULL, &error_fatal); busdev = SYS_BUS_DEVICE(s->ih[1]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_15XX_IH2_IRQ)); @@ -4010,10 +4010,10 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, qdev_get_gpio_in(s->ih[1], OMAP_INT_MPUIO), s->wakeup, omap_findclk(s, "clk32-kHz")); - s->gpio = qdev_create(NULL, "omap-gpio"); + s->gpio = qdev_new("omap-gpio"); qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); omap_gpio_set_clk(OMAP1_GPIO(s->gpio), omap_findclk(s, "arm_gpio_ck")); - qdev_init_nofail(s->gpio); + qdev_realize_and_unref(s->gpio, NULL, &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(s->gpio), 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_GPIO_BANK1)); sysbus_mmio_map(SYS_BUS_DEVICE(s->gpio), 0, 0xfffce000); @@ -4028,10 +4028,10 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, s->pwt = omap_pwt_init(system_memory, 0xfffb6000, omap_findclk(s, "armxor_ck")); - s->i2c[0] = qdev_create(NULL, "omap_i2c"); + s->i2c[0] = qdev_new("omap_i2c"); qdev_prop_set_uint8(s->i2c[0], "revision", 0x11); omap_i2c_set_fclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "mpuper_ck")); - qdev_init_nofail(s->i2c[0]); + qdev_realize_and_unref(s->i2c[0], NULL, &error_fatal); busdev = SYS_BUS_DEVICE(s->i2c[0]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[1], OMAP_INT_I2C)); sysbus_connect_irq(busdev, 1, s->drq[OMAP_DMA_I2C_TX]); diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index e1c11de5ce..b45ed5c9ec 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -2306,11 +2306,11 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, s->l4 = omap_l4_init(sysmem, OMAP2_L4_BASE, 54); /* Actually mapped at any 2K boundary in the ARM11 private-peripheral if */ - s->ih[0] = qdev_create(NULL, "omap2-intc"); + s->ih[0] = qdev_new("omap2-intc"); qdev_prop_set_uint8(s->ih[0], "revision", 0x21); omap_intc_set_fclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "mpu_intc_fclk")); omap_intc_set_iclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "mpu_intc_iclk")); - qdev_init_nofail(s->ih[0]); + qdev_realize_and_unref(s->ih[0], NULL, &error_fatal); busdev = SYS_BUS_DEVICE(s->ih[0]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ)); @@ -2423,11 +2423,11 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, omap_findclk(s, "clk32-kHz"), omap_findclk(s, "core_l4_iclk")); - s->i2c[0] = qdev_create(NULL, "omap_i2c"); + s->i2c[0] = qdev_new("omap_i2c"); qdev_prop_set_uint8(s->i2c[0], "revision", 0x34); omap_i2c_set_iclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "i2c1.iclk")); omap_i2c_set_fclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "i2c1.fclk")); - qdev_init_nofail(s->i2c[0]); + qdev_realize_and_unref(s->i2c[0], NULL, &error_fatal); busdev = SYS_BUS_DEVICE(s->i2c[0]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_I2C1_IRQ)); @@ -2435,11 +2435,11 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, sysbus_connect_irq(busdev, 2, s->drq[OMAP24XX_DMA_I2C1_RX]); sysbus_mmio_map(busdev, 0, omap_l4_region_base(omap_l4tao(s->l4, 5), 0)); - s->i2c[1] = qdev_create(NULL, "omap_i2c"); + s->i2c[1] = qdev_new("omap_i2c"); qdev_prop_set_uint8(s->i2c[1], "revision", 0x34); omap_i2c_set_iclk(OMAP_I2C(s->i2c[1]), omap_findclk(s, "i2c2.iclk")); omap_i2c_set_fclk(OMAP_I2C(s->i2c[1]), omap_findclk(s, "i2c2.fclk")); - qdev_init_nofail(s->i2c[1]); + qdev_realize_and_unref(s->i2c[1], NULL, &error_fatal); busdev = SYS_BUS_DEVICE(s->i2c[1]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_I2C2_IRQ)); @@ -2447,7 +2447,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, sysbus_connect_irq(busdev, 2, s->drq[OMAP24XX_DMA_I2C2_RX]); sysbus_mmio_map(busdev, 0, omap_l4_region_base(omap_l4tao(s->l4, 6), 0)); - s->gpio = qdev_create(NULL, "omap2-gpio"); + s->gpio = qdev_new("omap2-gpio"); qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); omap2_gpio_set_iclk(OMAP2_GPIO(s->gpio), omap_findclk(s, "gpio_iclk")); omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 0, omap_findclk(s, "gpio1_dbclk")); @@ -2458,7 +2458,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 4, omap_findclk(s, "gpio5_dbclk")); } - qdev_init_nofail(s->gpio); + qdev_realize_and_unref(s->gpio, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(s->gpio); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_GPIO_BANK1)); diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index b291715f27..44a333a6eb 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -94,9 +94,9 @@ static void orangepi_init(MachineState *machine) bus = qdev_get_child_bus(DEVICE(h3), "sd-bus"); /* Plug in SD card */ - carddev = qdev_create(bus, TYPE_SD_CARD); + carddev = qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, "realized", &error_fatal); + qdev_realize_and_unref(carddev, bus, &error_fatal); /* SDRAM */ memory_region_add_subregion(get_system_memory(), h3->memmap[AW_H3_SDRAM], diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 336c9bad4a..8d8b06d920 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -1486,10 +1486,10 @@ PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base, PXA2xxI2CState *s; I2CBus *i2cbus; - dev = qdev_create(NULL, TYPE_PXA2XX_I2C); + dev = qdev_new(TYPE_PXA2XX_I2C); qdev_prop_set_uint32(dev, "size", region_size + 1); qdev_prop_set_uint32(dev, "offset", base & region_size); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); i2c_dev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(i2c_dev, 0, base & ~region_size); @@ -2041,9 +2041,9 @@ static PXA2xxFIrState *pxa2xx_fir_init(MemoryRegion *sysmem, DeviceState *dev; SysBusDevice *sbd; - dev = qdev_create(NULL, TYPE_PXA2XX_FIR); + dev = qdev_new(TYPE_PXA2XX_FIR); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sbd = SYS_BUS_DEVICE(dev); sysbus_mmio_map(sbd, 0, base); sysbus_connect_irq(sbd, 0, irq); diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c index a01db54a51..27199af43c 100644 --- a/hw/arm/pxa2xx_gpio.c +++ b/hw/arm/pxa2xx_gpio.c @@ -14,6 +14,7 @@ #include "hw/sysbus.h" #include "migration/vmstate.h" #include "hw/arm/pxa.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" @@ -269,10 +270,10 @@ DeviceState *pxa2xx_gpio_init(hwaddr base, CPUState *cs = CPU(cpu); DeviceState *dev; - dev = qdev_create(NULL, TYPE_PXA2XX_GPIO); + dev = qdev_new(TYPE_PXA2XX_GPIO); qdev_prop_set_int32(dev, "lines", lines); qdev_prop_set_int32(dev, "ncpu", cs->cpu_index); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c index 203d4d28af..4c451cf540 100644 --- a/hw/arm/pxa2xx_pic.c +++ b/hw/arm/pxa2xx_pic.c @@ -9,6 +9,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/module.h" #include "cpu.h" #include "hw/arm/pxa.h" @@ -267,7 +268,7 @@ static int pxa2xx_pic_post_load(void *opaque, int version_id) DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu) { - DeviceState *dev = qdev_create(NULL, TYPE_PXA2XX_PIC); + DeviceState *dev = qdev_new(TYPE_PXA2XX_PIC); PXA2xxPICState *s = PXA2XX_PIC(dev); s->cpu = cpu; @@ -279,7 +280,7 @@ DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu) s->is_fiq[0] = 0; s->is_fiq[1] = 0; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); qdev_init_gpio_in(dev, pxa2xx_pic_set_irq, PXA2XX_PIC_SRCS); diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index a2efe0b94d..a8e26a70bb 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -297,9 +297,9 @@ static void raspi_machine_init(MachineState *machine) error_report("No SD bus found in SOC object"); exit(1); } - carddev = qdev_create(bus, TYPE_SD_CARD); + carddev = qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, "realized", &error_fatal); + qdev_realize_and_unref(carddev, bus, &error_fatal); vcram_size = object_property_get_uint(OBJECT(&s->soc), "vcram-size", &error_abort); diff --git a/hw/arm/realview.c b/hw/arm/realview.c index 8fcdf75a2b..128146448c 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -161,16 +161,16 @@ static void realview_init(MachineState *machine, } sys_id = is_pb ? 0x01780500 : 0xc1400400; - sysctl = qdev_create(NULL, "realview_sysctl"); + sysctl = qdev_new("realview_sysctl"); qdev_prop_set_uint32(sysctl, "sys_id", sys_id); qdev_prop_set_uint32(sysctl, "proc_id", proc_id); - qdev_init_nofail(sysctl); + qdev_realize_and_unref(sysctl, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000); if (is_mpcore) { - dev = qdev_create(NULL, is_pb ? TYPE_A9MPCORE_PRIV : "realview_mpcore"); + dev = qdev_new(is_pb ? TYPE_A9MPCORE_PRIV : "realview_mpcore"); qdev_prop_set_uint32(dev, "num-cpu", smp_cpus); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, periphbase); for (n = 0; n < smp_cpus; n++) { @@ -188,9 +188,9 @@ static void realview_init(MachineState *machine, pic[n] = qdev_get_gpio_in(dev, n); } - pl041 = qdev_create(NULL, "pl041"); + pl041 = qdev_new("pl041"); qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512); - qdev_init_nofail(pl041); + qdev_realize_and_unref(pl041, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000); sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, pic[19]); @@ -203,10 +203,10 @@ static void realview_init(MachineState *machine, pl011_create(0x1000c000, pic[15], serial_hd(3)); /* DMA controller is optional, apparently. */ - dev = qdev_create(NULL, "pl081"); + dev = qdev_new("pl081"); object_property_set_link(OBJECT(dev), OBJECT(sysmem), "downstream", &error_fatal); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, 0x10030000); sysbus_connect_irq(busdev, 0, pic[24]); @@ -239,9 +239,9 @@ static void realview_init(MachineState *machine, sysbus_create_simple("pl031", 0x10017000, pic[10]); if (!is_pb) { - dev = qdev_create(NULL, "realview_pci"); + dev = qdev_new("realview_pci"); busdev = SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(busdev, 0, 0x10019000); /* PCI controller registers */ sysbus_mmio_map(busdev, 1, 0x60000000); /* PCI self-config */ sysbus_mmio_map(busdev, 2, 0x61000000); /* PCI config */ diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 6a0221a681..d68c5d87af 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -339,7 +339,7 @@ static void create_gic(SBSAMachineState *sms) gictype = gicv3_class_name(); - sms->gic = qdev_create(NULL, gictype); + sms->gic = qdev_new(gictype); qdev_prop_set_uint32(sms->gic, "revision", 3); qdev_prop_set_uint32(sms->gic, "num-cpu", smp_cpus); /* @@ -356,7 +356,7 @@ static void create_gic(SBSAMachineState *sms) qdev_prop_set_uint32(sms->gic, "len-redist-region-count", 1); qdev_prop_set_uint32(sms->gic, "redist-region-count[0]", redist0_count); - qdev_init_nofail(sms->gic); + qdev_realize_and_unref(sms->gic, NULL, &error_fatal); gicbusdev = SYS_BUS_DEVICE(sms->gic); sysbus_mmio_map(gicbusdev, 0, sbsa_ref_memmap[SBSA_GIC_DIST].base); sysbus_mmio_map(gicbusdev, 1, sbsa_ref_memmap[SBSA_GIC_REDIST].base); @@ -409,11 +409,11 @@ static void create_uart(const SBSAMachineState *sms, int uart, { hwaddr base = sbsa_ref_memmap[uart].base; int irq = sbsa_ref_irqmap[uart]; - DeviceState *dev = qdev_create(NULL, TYPE_PL011); + DeviceState *dev = qdev_new(TYPE_PL011); SysBusDevice *s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0)); sysbus_connect_irq(s, 0, qdev_get_gpio_in(sms->gic, irq)); @@ -464,9 +464,9 @@ static void create_ahci(const SBSAMachineState *sms) AHCIState *ahci; int i; - dev = qdev_create(NULL, "sysbus-ahci"); + dev = qdev_new("sysbus-ahci"); qdev_prop_set_uint32(dev, "num-ports", NUM_SATA_PORTS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(sms->gic, irq)); @@ -497,11 +497,11 @@ static void create_smmu(const SBSAMachineState *sms, PCIBus *bus) DeviceState *dev; int i; - dev = qdev_create(NULL, "arm-smmuv3"); + dev = qdev_new("arm-smmuv3"); object_property_set_link(OBJECT(dev), OBJECT(bus), "primary-bus", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i = 0; i < NUM_SMMU_IRQS; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, @@ -525,8 +525,8 @@ static void create_pcie(SBSAMachineState *sms) PCIHostState *pci; int i; - dev = qdev_create(NULL, TYPE_GPEX_HOST); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_GPEX_HOST); + qdev_realize_and_unref(dev, NULL, &error_fatal); /* Map ECAM space */ ecam_alias = g_new0(MemoryRegion, 1); diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index c28d9b5ed7..edae6bf8be 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -155,7 +155,7 @@ static void sl_flash_register(PXA2xxState *cpu, int size) { DeviceState *dev; - dev = qdev_create(NULL, TYPE_SL_NAND); + dev = qdev_new(TYPE_SL_NAND); qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG); if (size == FLASH_128M) @@ -163,7 +163,7 @@ static void sl_flash_register(PXA2xxState *cpu, int size) else if (size == FLASH_1024M) qdev_prop_set_uint8(dev, "chip_id", 0xf1); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); } diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index d136ba1a92..f824cbd498 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -1308,14 +1308,14 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board) &error_fatal); memory_region_add_subregion(system_memory, 0x20000000, sram); - nvic = qdev_create(NULL, TYPE_ARMV7M); + nvic = qdev_new(TYPE_ARMV7M); qdev_prop_set_uint32(nvic, "num-irq", NUM_IRQ_LINES); qdev_prop_set_string(nvic, "cpu-type", ms->cpu_type); qdev_prop_set_bit(nvic, "enable-bitband", true); object_property_set_link(OBJECT(nvic), OBJECT(get_system_memory()), "memory", &error_abort); /* This will exit with an error if the user passed us a bad cpu_type */ - qdev_init_nofail(nvic); + qdev_realize_and_unref(nvic, NULL, &error_fatal); qdev_connect_gpio_out_named(nvic, "SYSRESETREQ", 0, qemu_allocate_irq(&do_sys_reset, NULL, 0)); @@ -1347,13 +1347,13 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board) if (board->dc1 & (1 << 3)) { /* watchdog present */ - dev = qdev_create(NULL, TYPE_LUMINARY_WATCHDOG); + dev = qdev_new(TYPE_LUMINARY_WATCHDOG); /* system_clock_scale is valid now */ uint32_t mainclk = NANOSECONDS_PER_SECOND / system_clock_scale; qdev_prop_set_uint32(dev, "wdogclk-frq", mainclk); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x40000000u); @@ -1425,9 +1425,9 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board) qemu_check_nic_model(&nd_table[0], "stellaris"); - enet = qdev_create(NULL, "stellaris_enet"); + enet = qdev_new("stellaris_enet"); qdev_set_nic_properties(enet, &nd_table[0]); - qdev_init_nofail(enet); + qdev_realize_and_unref(enet, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(enet), 0, 0x40048000); sysbus_connect_irq(SYS_BUS_DEVICE(enet), 0, qdev_get_gpio_in(nvic, 42)); } diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 3010d765bb..108ed8d147 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -42,6 +42,7 @@ #include "chardev/char-serial.h" #include "sysemu/sysemu.h" #include "hw/ssi/ssi.h" +#include "qapi/error.h" #include "qemu/cutils.h" #include "qemu/log.h" @@ -644,8 +645,8 @@ static DeviceState *strongarm_gpio_init(hwaddr base, DeviceState *dev; int i; - dev = qdev_create(NULL, TYPE_STRONGARM_GPIO); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_STRONGARM_GPIO); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i = 0; i < 12; i++) @@ -1626,9 +1627,9 @@ StrongARMState *sa1110_init(const char *cpu_type) s->ppc = sysbus_create_varargs(TYPE_STRONGARM_PPC, 0x90060000, NULL); for (i = 0; sa_serial[i].io_base; i++) { - DeviceState *dev = qdev_create(NULL, TYPE_STRONGARM_UART); + DeviceState *dev = qdev_new(TYPE_STRONGARM_UART); qdev_prop_set_chr(dev, "chardev", serial_hd(i)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, sa_serial[i].io_base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index f3c4a50b19..154fa72f33 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -223,10 +223,10 @@ static void versatile_init(MachineState *machine, int board_id) /* SDRAM at address zero. */ memory_region_add_subregion(sysmem, 0, machine->ram); - sysctl = qdev_create(NULL, "realview_sysctl"); + sysctl = qdev_new("realview_sysctl"); qdev_prop_set_uint32(sysctl, "sys_id", 0x41007004); qdev_prop_set_uint32(sysctl, "proc_id", 0x02000000); - qdev_init_nofail(sysctl); + qdev_realize_and_unref(sysctl, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000); dev = sysbus_create_varargs("pl190", 0x10140000, @@ -245,9 +245,9 @@ static void versatile_init(MachineState *machine, int board_id) sysbus_create_simple("pl050_keyboard", 0x10006000, sic[3]); sysbus_create_simple("pl050_mouse", 0x10007000, sic[4]); - dev = qdev_create(NULL, "versatile_pci"); + dev = qdev_new("versatile_pci"); busdev = SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(busdev, 0, 0x10001000); /* PCI controller regs */ sysbus_mmio_map(busdev, 1, 0x41000000); /* PCI self-config */ sysbus_mmio_map(busdev, 2, 0x42000000); /* PCI config */ @@ -286,10 +286,10 @@ static void versatile_init(MachineState *machine, int board_id) pl011_create(0x101f3000, pic[14], serial_hd(2)); pl011_create(0x10009000, sic[6], serial_hd(3)); - dev = qdev_create(NULL, "pl080"); + dev = qdev_new("pl080"); object_property_set_link(OBJECT(dev), OBJECT(sysmem), "downstream", &error_fatal); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, 0x10130000); sysbus_connect_irq(busdev, 0, pic[17]); @@ -319,9 +319,9 @@ static void versatile_init(MachineState *machine, int board_id) i2c_create_slave(i2c, "ds1338", 0x68); /* Add PL041 AACI Interface to the LM4549 codec */ - pl041 = qdev_create(NULL, "pl041"); + pl041 = qdev_new("pl041"); qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512); - qdev_init_nofail(pl041); + qdev_realize_and_unref(pl041, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000); sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, sic[24]); diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index 69ee4988f9..ef29e9f5ae 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -236,9 +236,9 @@ static void init_cpus(MachineState *ms, const char *cpu_type, * this must happen after the CPUs are created because a15mpcore_priv * wires itself up to the CPU's generic_timer gpio out lines. */ - dev = qdev_create(NULL, privdev); + dev = qdev_new(privdev); qdev_prop_set_uint32(dev, "num-cpu", smp_cpus); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, periphbase); @@ -514,7 +514,7 @@ static void vexpress_modify_dtb(const struct arm_boot_info *info, void *fdt) static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name, DriveInfo *di) { - DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI01); + DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); if (di) { qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(di), @@ -532,7 +532,7 @@ static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name, qdev_prop_set_uint16(dev, "id2", 0x00); qdev_prop_set_uint16(dev, "id3", 0x00); qdev_prop_set_string(dev, "name", name); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return PFLASH_CFI01(dev); @@ -593,7 +593,7 @@ static void vexpress_common_init(MachineState *machine) sys_id = 0x1190f500; - sysctl = qdev_create(NULL, "realview_sysctl"); + sysctl = qdev_new("realview_sysctl"); qdev_prop_set_uint32(sysctl, "sys_id", sys_id); qdev_prop_set_uint32(sysctl, "proc_id", daughterboard->proc_id); qdev_prop_set_uint32(sysctl, "len-db-voltage", @@ -610,15 +610,15 @@ static void vexpress_common_init(MachineState *machine) qdev_prop_set_uint32(sysctl, propname, daughterboard->clocks[i]); g_free(propname); } - qdev_init_nofail(sysctl); + qdev_realize_and_unref(sysctl, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, map[VE_SYSREGS]); /* VE_SP810: not modelled */ /* VE_SERIALPCI: not modelled */ - pl041 = qdev_create(NULL, "pl041"); + pl041 = qdev_new("pl041"); qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512); - qdev_init_nofail(pl041); + qdev_realize_and_unref(pl041, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, map[VE_PL041]); sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, pic[11]); diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 37462a6f78..154cd24731 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -572,14 +572,14 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms) event |= ACPI_GED_NVDIMM_HOTPLUG_EVT; } - dev = qdev_create(NULL, TYPE_ACPI_GED); + dev = qdev_new(TYPE_ACPI_GED); qdev_prop_set_uint32(dev, "ged-event", event); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].base); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, vms->memmap[VIRT_PCDIMM_ACPI].base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(vms->gic, irq)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); return dev; } @@ -594,11 +594,11 @@ static void create_its(VirtMachineState *vms) return; } - dev = qdev_create(NULL, itsclass); + dev = qdev_new(itsclass); object_property_set_link(OBJECT(dev), OBJECT(vms->gic), "parent-gicv3", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_GIC_ITS].base); fdt_add_its_gic_node(vms); @@ -610,11 +610,11 @@ static void create_v2m(VirtMachineState *vms) int irq = vms->irqmap[VIRT_GIC_V2M]; DeviceState *dev; - dev = qdev_create(NULL, "arm-gicv2m"); + dev = qdev_new("arm-gicv2m"); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_GIC_V2M].base); qdev_prop_set_uint32(dev, "base-spi", irq); qdev_prop_set_uint32(dev, "num-spi", NUM_GICV2M_SPIS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); for (i = 0; i < NUM_GICV2M_SPIS; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, @@ -636,7 +636,7 @@ static void create_gic(VirtMachineState *vms) gictype = (type == 3) ? gicv3_class_name() : gic_class_name(); - vms->gic = qdev_create(NULL, gictype); + vms->gic = qdev_new(gictype); qdev_prop_set_uint32(vms->gic, "revision", type); qdev_prop_set_uint32(vms->gic, "num-cpu", smp_cpus); /* Note that the num-irq property counts both internal and external @@ -671,7 +671,7 @@ static void create_gic(VirtMachineState *vms) vms->virt); } } - qdev_init_nofail(vms->gic); + qdev_realize_and_unref(vms->gic, NULL, &error_fatal); gicbusdev = SYS_BUS_DEVICE(vms->gic); sysbus_mmio_map(gicbusdev, 0, vms->memmap[VIRT_GIC_DIST].base); if (type == 3) { @@ -754,11 +754,11 @@ static void create_uart(const VirtMachineState *vms, int uart, int irq = vms->irqmap[uart]; const char compat[] = "arm,pl011\0arm,primecell"; const char clocknames[] = "uartclk\0apb_pclk"; - DeviceState *dev = qdev_create(NULL, TYPE_PL011); + DeviceState *dev = qdev_new(TYPE_PL011); SysBusDevice *s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0)); sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq)); @@ -1173,11 +1173,11 @@ static void create_smmu(const VirtMachineState *vms, return; } - dev = qdev_create(NULL, "arm-smmuv3"); + dev = qdev_new("arm-smmuv3"); object_property_set_link(OBJECT(dev), OBJECT(bus), "primary-bus", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i = 0; i < NUM_SMMU_IRQS; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, @@ -1253,8 +1253,8 @@ static void create_pcie(VirtMachineState *vms) int i, ecam_id; PCIHostState *pci; - dev = qdev_create(NULL, TYPE_GPEX_HOST); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_GPEX_HOST); + qdev_realize_and_unref(dev, NULL, &error_fatal); ecam_id = VIRT_ECAM_ID(vms->highmem_ecam); base_ecam = vms->memmap[ecam_id].base; @@ -1372,11 +1372,11 @@ static void create_platform_bus(VirtMachineState *vms) int i; MemoryRegion *sysmem = get_system_memory(); - dev = qdev_create(NULL, TYPE_PLATFORM_BUS_DEVICE); + dev = qdev_new(TYPE_PLATFORM_BUS_DEVICE); dev->id = TYPE_PLATFORM_BUS_DEVICE; qdev_prop_set_uint32(dev, "num_irqs", PLATFORM_BUS_NUM_IRQS); qdev_prop_set_uint32(dev, "mmio_size", vms->memmap[VIRT_PLATFORM_BUS].size); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); vms->platform_bus_dev = dev; s = SYS_BUS_DEVICE(dev); diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index cb933efb49..5fbd2b2e31 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -114,12 +114,12 @@ static void gem_init(NICInfo *nd, uint32_t base, qemu_irq irq) DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, TYPE_CADENCE_GEM); + dev = qdev_new(TYPE_CADENCE_GEM); if (nd->used) { qemu_check_nic_model(nd, TYPE_CADENCE_GEM); qdev_set_nic_properties(dev, nd); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, base); sysbus_connect_irq(s, 0, irq); @@ -136,11 +136,11 @@ static inline void zynq_init_spi_flashes(uint32_t base_addr, qemu_irq irq, int num_busses = is_qspi ? NUM_QSPI_BUSSES : 1; int num_ss = is_qspi ? NUM_QSPI_FLASHES : NUM_SPI_FLASHES; - dev = qdev_create(NULL, is_qspi ? "xlnx.ps7-qspi" : "xlnx.ps7-spi"); + dev = qdev_new(is_qspi ? "xlnx.ps7-qspi" : "xlnx.ps7-spi"); qdev_prop_set_uint8(dev, "num-txrx-bytes", is_qspi ? 4 : 1); qdev_prop_set_uint8(dev, "num-ss-bits", num_ss); qdev_prop_set_uint8(dev, "num-busses", num_busses); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, base_addr); if (is_qspi) { @@ -222,8 +222,8 @@ static void zynq_init(MachineState *machine) 0); /* Create slcr, keep a pointer to connect clocks */ - slcr = qdev_create(NULL, "xilinx,zynq_slcr"); - qdev_init_nofail(slcr); + slcr = qdev_new("xilinx,zynq_slcr"); + qdev_realize_and_unref(slcr, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(slcr), 0, 0xF8000000); /* Create the main clock source, and feed slcr with it */ @@ -234,9 +234,9 @@ static void zynq_init(MachineState *machine) clock_set_hz(zynq_machine->ps_clk, PS_CLK_FREQUENCY); qdev_connect_clock_in(slcr, "ps_clk", zynq_machine->ps_clk); - dev = qdev_create(NULL, TYPE_A9MPCORE_PRIV); + dev = qdev_new(TYPE_A9MPCORE_PRIV); qdev_prop_set_uint32(dev, "num-cpu", 1); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, MPCORE_PERIPHBASE); sysbus_connect_irq(busdev, 0, @@ -280,27 +280,27 @@ static void zynq_init(MachineState *machine) * - SDIO Specification Version 2.0 * - MMC Specification Version 3.31 */ - dev = qdev_create(NULL, TYPE_SYSBUS_SDHCI); + dev = qdev_new(TYPE_SYSBUS_SDHCI); qdev_prop_set_uint8(dev, "sd-spec-version", 2); qdev_prop_set_uint64(dev, "capareg", ZYNQ_SDHCI_CAPABILITIES); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, hci_addr); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[hci_irq - IRQ_OFFSET]); di = drive_get_next(IF_SD); blk = di ? blk_by_legacy_dinfo(di) : NULL; - carddev = qdev_create(qdev_get_child_bus(dev, "sd-bus"), TYPE_SD_CARD); + carddev = qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, "realized", - &error_fatal); + qdev_realize_and_unref(carddev, qdev_get_child_bus(dev, "sd-bus"), + &error_fatal); } - dev = qdev_create(NULL, TYPE_ZYNQ_XADC); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_ZYNQ_XADC); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xF8007100); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[39-IRQ_OFFSET]); - dev = qdev_create(NULL, "pl330"); + dev = qdev_new("pl330"); qdev_prop_set_uint8(dev, "num_chnls", 8); qdev_prop_set_uint8(dev, "num_periph_req", 4); qdev_prop_set_uint8(dev, "num_events", 16); @@ -312,7 +312,7 @@ static void zynq_init(MachineState *machine) qdev_prop_set_uint8(dev, "rd_q_dep", 16); qdev_prop_set_uint16(dev, "data_buffer_dep", 256); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, 0xF8003000); sysbus_connect_irq(busdev, 0, pic[45-IRQ_OFFSET]); /* abort irq line */ @@ -320,8 +320,8 @@ static void zynq_init(MachineState *machine) sysbus_connect_irq(busdev, n + 1, pic[dma_irqs[n] - IRQ_OFFSET]); } - dev = qdev_create(NULL, "xlnx.ps7-dev-cfg"); - qdev_init_nofail(dev); + dev = qdev_new("xlnx.ps7-dev-cfg"); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_connect_irq(busdev, 0, pic[40 - IRQ_OFFSET]); sysbus_mmio_map(busdev, 0, 0xF8007000); diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 43a71e2eea..fb37b235fe 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -432,9 +432,9 @@ static void create_virtio_regions(VersalVirt *s) qemu_irq pic_irq; pic_irq = qdev_get_gpio_in(DEVICE(&s->soc.fpd.apu.gic), irq); - dev = qdev_create(NULL, "virtio-mmio"); + dev = qdev_new("virtio-mmio"); object_property_add_child(OBJECT(&s->soc), name, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic_irq); mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion(&s->soc.mr_ps, base, mr); @@ -463,10 +463,11 @@ static void sd_plugin_card(SDHCIState *sd, DriveInfo *di) BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL; DeviceState *card; - card = qdev_create(qdev_get_child_bus(DEVICE(sd), "sd-bus"), TYPE_SD_CARD); + card = qdev_new(TYPE_SD_CARD); object_property_add_child(OBJECT(sd), "card[*]", OBJECT(card)); qdev_prop_set_drive(card, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(card), true, "realized", &error_fatal); + qdev_realize_and_unref(card, qdev_get_child_bus(DEVICE(sd), "sd-bus"), + &error_fatal); } static void versal_virt_init(MachineState *machine) diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 809a31390f..c3d47bb9e9 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -304,13 +304,13 @@ static void versal_unimp_area(Versal *s, const char *name, MemoryRegion *mr, hwaddr base, hwaddr size) { - DeviceState *dev = qdev_create(NULL, TYPE_UNIMPLEMENTED_DEVICE); + DeviceState *dev = qdev_new(TYPE_UNIMPLEMENTED_DEVICE); MemoryRegion *mr_dev; qdev_prop_set_string(dev, "name", name); qdev_prop_set_uint64(dev, "size", size); object_property_add_child(OBJECT(s), name, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); mr_dev = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion(mr, base, mr_dev); diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index b01e575b58..4229b2d936 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -143,10 +143,9 @@ static void xlnx_zcu102_init(MachineState *machine) error_report("No SD bus found for SD card %d", i); exit(1); } - carddev = qdev_create(bus, TYPE_SD_CARD); + carddev = qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, "realized", - &error_fatal); + qdev_realize_and_unref(carddev, bus, &error_fatal); } for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) { diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c index 4696ae0d9a..f673b8317a 100644 --- a/hw/audio/intel-hda.c +++ b/hw/audio/intel-hda.c @@ -1309,8 +1309,8 @@ static int intel_hda_and_codec_init(PCIBus *bus) controller = DEVICE(pci_create_simple(bus, -1, "intel-hda")); hdabus = QLIST_FIRST(&controller->child_bus); - codec = qdev_create(hdabus, "hda-duplex"); - qdev_init_nofail(codec); + codec = qdev_new("hda-duplex"); + qdev_realize_and_unref(codec, hdabus, &error_fatal); return 0; } diff --git a/hw/block/fdc.c b/hw/block/fdc.c index c5fb9d6ece..1feb398875 100644 --- a/hw/block/fdc.c +++ b/hw/block/fdc.c @@ -2516,7 +2516,7 @@ static void fdctrl_connect_drives(FDCtrl *fdctrl, DeviceState *fdc_dev, continue; } - dev = qdev_create(&fdctrl->bus.bus, "floppy"); + dev = qdev_new("floppy"); qdev_prop_set_uint32(dev, "unit", i); qdev_prop_set_enum(dev, "drive-type", fdctrl->qdev_for_drives[i].type); @@ -2531,7 +2531,7 @@ static void fdctrl_connect_drives(FDCtrl *fdctrl, DeviceState *fdc_dev, return; } - object_property_set_bool(OBJECT(dev), true, "realized", &local_err); + qdev_realize_and_unref(dev, &fdctrl->bus.bus, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -2571,7 +2571,7 @@ void fdctrl_init_sysbus(qemu_irq irq, int dma_chann, SysBusDevice *sbd; FDCtrlSysBus *sys; - dev = qdev_create(NULL, "sysbus-fdc"); + dev = qdev_new("sysbus-fdc"); sys = SYSBUS_FDC(dev); fdctrl = &sys->state; fdctrl->dma_chann = dma_chann; /* FIXME */ @@ -2583,7 +2583,7 @@ void fdctrl_init_sysbus(qemu_irq irq, int dma_chann, qdev_prop_set_drive(dev, "driveB", blk_by_legacy_dinfo(fds[1]), &error_fatal); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sbd = SYS_BUS_DEVICE(dev); sysbus_connect_irq(sbd, 0, irq); sysbus_mmio_map(sbd, 0, mmio_base); @@ -2595,12 +2595,12 @@ void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base, DeviceState *dev; FDCtrlSysBus *sys; - dev = qdev_create(NULL, "SUNW,fdtwo"); + dev = qdev_new("SUNW,fdtwo"); if (fds[0]) { qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(fds[0]), &error_fatal); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sys = SYSBUS_FDC(dev); sysbus_connect_irq(SYS_BUS_DEVICE(sys), 0, irq); sysbus_mmio_map(SYS_BUS_DEVICE(sys), 0, io_base); diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 11922c0f96..d2a647d2b8 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -959,7 +959,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, uint16_t id2, uint16_t id3, int be) { - DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI01); + DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); if (blk) { qdev_prop_set_drive(dev, "drive", blk, &error_abort); @@ -974,7 +974,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, qdev_prop_set_uint16(dev, "id2", id2); qdev_prop_set_uint16(dev, "id3", id3); qdev_prop_set_string(dev, "name", name); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return PFLASH_CFI01(dev); diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index ac7e34ecbf..ed9e9eef0c 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -998,7 +998,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, uint16_t unlock_addr1, int be) { - DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI02); + DeviceState *dev = qdev_new(TYPE_PFLASH_CFI02); if (blk) { qdev_prop_set_drive(dev, "drive", blk, &error_abort); @@ -1016,7 +1016,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, qdev_prop_set_uint16(dev, "unlock-addr0", unlock_addr0); qdev_prop_set_uint16(dev, "unlock-addr1", unlock_addr1); qdev_prop_set_string(dev, "name", name); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return PFLASH_CFI02(dev); diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c index 96d5180e3e..b86bd7b2e6 100644 --- a/hw/char/exynos4210_uart.c +++ b/hw/char/exynos4210_uart.c @@ -22,6 +22,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qapi/error.h" #include "qemu/error-report.h" #include "qemu/module.h" #include "qemu/timer.h" @@ -652,7 +653,7 @@ DeviceState *exynos4210_uart_create(hwaddr addr, DeviceState *dev; SysBusDevice *bus; - dev = qdev_create(NULL, TYPE_EXYNOS4210_UART); + dev = qdev_new(TYPE_EXYNOS4210_UART); qdev_prop_set_chr(dev, "chardev", chr); qdev_prop_set_uint32(dev, "channel", channel); @@ -660,7 +661,7 @@ DeviceState *exynos4210_uart_create(hwaddr addr, qdev_prop_set_uint32(dev, "tx-size", fifo_size); bus = SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); if (addr != (hwaddr)-1) { sysbus_mmio_map(bus, 0, addr); } diff --git a/hw/char/mcf_uart.c b/hw/char/mcf_uart.c index 97e4bbc31a..2ac0a195f3 100644 --- a/hw/char/mcf_uart.c +++ b/hw/char/mcf_uart.c @@ -10,6 +10,7 @@ #include "hw/irq.h" #include "hw/sysbus.h" #include "qemu/module.h" +#include "qapi/error.h" #include "hw/m68k/mcf.h" #include "hw/qdev-properties.h" #include "chardev/char-fe.h" @@ -343,11 +344,11 @@ void *mcf_uart_init(qemu_irq irq, Chardev *chrdrv) { DeviceState *dev; - dev = qdev_create(NULL, TYPE_MCF_UART); + dev = qdev_new(TYPE_MCF_UART); if (chrdrv) { qdev_prop_set_chr(dev, "chardev", chrdrv); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); diff --git a/hw/char/spapr_vty.c b/hw/char/spapr_vty.c index ecb94f5673..464a52342a 100644 --- a/hw/char/spapr_vty.c +++ b/hw/char/spapr_vty.c @@ -158,9 +158,9 @@ void spapr_vty_create(SpaprVioBus *bus, Chardev *chardev) { DeviceState *dev; - dev = qdev_create(&bus->bus, "spapr-vty"); + dev = qdev_new("spapr-vty"); qdev_prop_set_chr(dev, "chardev", chardev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, &bus->bus, &error_fatal); } static Property spapr_vty_properties[] = { diff --git a/hw/core/empty_slot.c b/hw/core/empty_slot.c index 3ba450e1ca..725e5fd998 100644 --- a/hw/core/empty_slot.c +++ b/hw/core/empty_slot.c @@ -11,6 +11,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qapi/error.h" #include "qemu/module.h" #include "hw/empty_slot.h" @@ -60,12 +61,12 @@ void empty_slot_init(hwaddr addr, uint64_t slot_size) SysBusDevice *s; EmptySlot *e; - dev = qdev_create(NULL, TYPE_EMPTY_SLOT); + dev = qdev_new(TYPE_EMPTY_SLOT); s = SYS_BUS_DEVICE(dev); e = EMPTY_SLOT(dev); e->size = slot_size; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); } diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index 08b0311c5f..b5db0d179f 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -230,9 +230,9 @@ DeviceState *sysbus_create_varargs(const char *name, qemu_irq irq; int n; - dev = qdev_create(NULL, name); + dev = qdev_new(name); s = SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); if (addr != (hwaddr)-1) { sysbus_mmio_map(s, 0, addr); } diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c index 75e5c993b5..5db667d518 100644 --- a/hw/cris/axis_dev88.c +++ b/hw/cris/axis_dev88.c @@ -289,8 +289,8 @@ void axisdev88_init(MachineState *machine) &gpio_state.iomem); - dev = qdev_create(NULL, "etraxfs,pic"); - qdev_init_nofail(dev); + dev = qdev_new("etraxfs,pic"); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, 0x3001c000); sysbus_connect_irq(s, 0, qdev_get_gpio_in(DEVICE(cpu), CRIS_CPU_IRQ)); diff --git a/hw/display/milkymist-tmu2.c b/hw/display/milkymist-tmu2.c index 513c0d5bab..e54fd85777 100644 --- a/hw/display/milkymist-tmu2.c +++ b/hw/display/milkymist-tmu2.c @@ -543,8 +543,8 @@ DeviceState *milkymist_tmu2_create(hwaddr base, qemu_irq irq) XFree(configs); XCloseDisplay(d); - dev = qdev_create(NULL, TYPE_MILKYMIST_TMU2); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_MILKYMIST_TMU2); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); diff --git a/hw/display/sm501.c b/hw/display/sm501.c index fbedc56715..0124223140 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1952,10 +1952,10 @@ static void sm501_realize_sysbus(DeviceState *dev, Error **errp) sysbus_init_mmio(sbd, &s->state.mmio_region); /* bridge to usb host emulation module */ - usb_dev = qdev_create(NULL, "sysbus-ohci"); + usb_dev = qdev_new("sysbus-ohci"); qdev_prop_set_uint32(usb_dev, "num-ports", 2); qdev_prop_set_uint64(usb_dev, "dma-offset", s->base); - qdev_init_nofail(usb_dev); + qdev_realize_and_unref(usb_dev, NULL, &error_fatal); memory_region_add_subregion(&s->state.mmio_region, SM501_USB_HOST, sysbus_mmio_get_region(SYS_BUS_DEVICE(usb_dev), 0)); sysbus_pass_irq(sbd, SYS_BUS_DEVICE(usb_dev)); diff --git a/hw/dma/pxa2xx_dma.c b/hw/dma/pxa2xx_dma.c index 8a2eeb32bc..6b761af701 100644 --- a/hw/dma/pxa2xx_dma.c +++ b/hw/dma/pxa2xx_dma.c @@ -495,9 +495,9 @@ DeviceState *pxa27x_dma_init(hwaddr base, qemu_irq irq) { DeviceState *dev; - dev = qdev_create(NULL, "pxa2xx-dma"); + dev = qdev_new("pxa2xx-dma"); qdev_prop_set_int32(dev, "channels", PXA27X_DMA_NUM_CHANNELS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); @@ -509,9 +509,9 @@ DeviceState *pxa255_dma_init(hwaddr base, qemu_irq irq) { DeviceState *dev; - dev = qdev_create(NULL, "pxa2xx-dma"); + dev = qdev_new("pxa2xx-dma"); qdev_prop_set_int32(dev, "channels", PXA27X_DMA_NUM_CHANNELS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index eefbabd758..21c9706bf3 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -28,6 +28,7 @@ #include "hw/mips/mips.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qapi/error.h" #include "qemu/timer.h" #include "qemu/log.h" #include "qemu/module.h" @@ -744,8 +745,8 @@ DeviceState *rc4030_init(rc4030_dma **dmas, IOMMUMemoryRegion **dma_mr) { DeviceState *dev; - dev = qdev_create(NULL, TYPE_RC4030); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_RC4030); + qdev_realize_and_unref(dev, NULL, &error_fatal); *dmas = rc4030_allocate_dmas(dev, 4); *dma_mr = &RC4030(dev)->dma_mr; diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index 84b9c5dc77..77cf41e591 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -301,7 +301,7 @@ static void sparc32_espdma_device_realize(DeviceState *dev, Error **errp) SysBusESPState *sysbus; ESPState *esp; - d = qdev_create(NULL, TYPE_ESP); + d = qdev_new(TYPE_ESP); object_property_add_child(OBJECT(dev), "esp", OBJECT(d)); sysbus = ESP_STATE(d); esp = &sysbus->esp; @@ -310,7 +310,7 @@ static void sparc32_espdma_device_realize(DeviceState *dev, Error **errp) esp->dma_opaque = SPARC32_DMA_DEVICE(dev); sysbus->it_shift = 2; esp->dma_enabled = 1; - qdev_init_nofail(d); + qdev_realize_and_unref(d, NULL, &error_fatal); } static void sparc32_espdma_device_class_init(ObjectClass *klass, void *data) @@ -343,11 +343,11 @@ static void sparc32_ledma_device_realize(DeviceState *dev, Error **errp) qemu_check_nic_model(nd, TYPE_LANCE); - d = qdev_create(NULL, TYPE_LANCE); + d = qdev_new(TYPE_LANCE); object_property_add_child(OBJECT(dev), "lance", OBJECT(d)); qdev_set_nic_properties(d, nd); object_property_set_link(OBJECT(d), OBJECT(dev), "dma", errp); - qdev_init_nofail(d); + qdev_realize_and_unref(d, NULL, &error_fatal); } static void sparc32_ledma_device_class_init(ObjectClass *klass, void *data) @@ -378,10 +378,10 @@ static void sparc32_dma_realize(DeviceState *dev, Error **errp) return; } - espdma = qdev_create(NULL, TYPE_SPARC32_ESPDMA_DEVICE); + espdma = qdev_new(TYPE_SPARC32_ESPDMA_DEVICE); object_property_set_link(OBJECT(espdma), iommu, "iommu", errp); object_property_add_child(OBJECT(s), "espdma", OBJECT(espdma)); - qdev_init_nofail(espdma); + qdev_realize_and_unref(espdma, NULL, &error_fatal); esp = DEVICE(object_resolve_path_component(OBJECT(espdma), "esp")); sbd = SYS_BUS_DEVICE(esp); @@ -393,10 +393,10 @@ static void sparc32_dma_realize(DeviceState *dev, Error **errp) memory_region_add_subregion(&s->dmamem, 0x0, sysbus_mmio_get_region(sbd, 0)); - ledma = qdev_create(NULL, TYPE_SPARC32_LEDMA_DEVICE); + ledma = qdev_new(TYPE_SPARC32_LEDMA_DEVICE); object_property_set_link(OBJECT(ledma), iommu, "iommu", errp); object_property_add_child(OBJECT(s), "ledma", OBJECT(ledma)); - qdev_init_nofail(ledma); + qdev_realize_and_unref(ledma, NULL, &error_fatal); lance = DEVICE(object_resolve_path_component(OBJECT(ledma), "lance")); sbd = SYS_BUS_DEVICE(lance); diff --git a/hw/hppa/dino.c b/hw/hppa/dino.c index 2b1b38c58a..50ba26737b 100644 --- a/hw/hppa/dino.c +++ b/hw/hppa/dino.c @@ -521,7 +521,7 @@ PCIBus *dino_init(MemoryRegion *addr_space, PCIBus *b; int i; - dev = qdev_create(NULL, TYPE_DINO_PCI_HOST_BRIDGE); + dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE); s = DINO_PCI_HOST_BRIDGE(dev); s->iar0 = s->iar1 = CPU_HPA + 3; s->toc_addr = 0xFFFA0030; /* IO_COMMAND of CPU */ @@ -548,7 +548,7 @@ PCIBus *dino_init(MemoryRegion *addr_space, &s->pci_mem, get_system_io(), PCI_DEVFN(0, 0), 32, TYPE_PCI_BUS); s->parent_obj.bus = b; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); /* Set up windows into PCI bus memory. */ for (i = 1; i < 31; i++) { diff --git a/hw/hppa/lasi.c b/hw/hppa/lasi.c index d8d03f95c0..4539022c5b 100644 --- a/hw/hppa/lasi.c +++ b/hw/hppa/lasi.c @@ -300,7 +300,7 @@ DeviceState *lasi_init(MemoryRegion *address_space) DeviceState *dev; LasiState *s; - dev = qdev_create(NULL, TYPE_LASI_CHIP); + dev = qdev_new(TYPE_LASI_CHIP); s = LASI_CHIP(dev); s->iar = CPU_HPA + 3; @@ -309,7 +309,7 @@ DeviceState *lasi_init(MemoryRegion *address_space) s, "lasi", 0x100000); memory_region_add_subregion(address_space, LASI_HPA, &s->this_mem); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); /* LAN */ if (enable_lasi_lan()) { diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index 00dd9f58d6..d828b4fb94 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -124,8 +124,8 @@ static void machine_hppa_init(MachineState *machine) /* Graphics setup. */ if (machine->enable_graphics && vga_interface_type != VGA_NONE) { - dev = qdev_create(NULL, "artist"); - qdev_init_nofail(dev); + dev = qdev_new("artist"); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, LASI_GFX_HPA); sysbus_mmio_map(s, 1, ARTIST_FB_ADDR); diff --git a/hw/i2c/core.c b/hw/i2c/core.c index d413a192ed..1aac457a2a 100644 --- a/hw/i2c/core.c +++ b/hw/i2c/core.c @@ -11,6 +11,7 @@ #include "hw/i2c/i2c.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qapi/error.h" #include "qemu/module.h" #include "trace.h" @@ -270,9 +271,9 @@ DeviceState *i2c_create_slave(I2CBus *bus, const char *name, uint8_t addr) { DeviceState *dev; - dev = qdev_create(&bus->qbus, name); + dev = qdev_new(name); qdev_prop_set_uint8(dev, "address", addr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, &bus->qbus, &error_fatal); return dev; } diff --git a/hw/i2c/smbus_eeprom.c b/hw/i2c/smbus_eeprom.c index e199fc8678..b7def9eeb8 100644 --- a/hw/i2c/smbus_eeprom.c +++ b/hw/i2c/smbus_eeprom.c @@ -169,11 +169,11 @@ void smbus_eeprom_init_one(I2CBus *smbus, uint8_t address, uint8_t *eeprom_buf) { DeviceState *dev; - dev = qdev_create((BusState *) smbus, TYPE_SMBUS_EEPROM); + dev = qdev_new(TYPE_SMBUS_EEPROM); qdev_prop_set_uint8(dev, "address", address); /* FIXME: use an array of byte or block backend property? */ SMBUS_EEPROM(dev)->init_data = eeprom_buf; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, (BusState *)smbus, &error_fatal); } void smbus_eeprom_init(I2CBus *smbus, int nb_eeprom, diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 4ba8ac8774..a2e7faccbc 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -212,7 +212,7 @@ static void pc_q35_init(MachineState *machine) } /* create pci host bus */ - q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE)); + q35_host = Q35_HOST_DEVICE(qdev_new(TYPE_Q35_HOST_DEVICE)); object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host)); object_property_set_link(OBJECT(q35_host), OBJECT(ram_memory), @@ -228,7 +228,7 @@ static void pc_q35_init(MachineState *machine) object_property_set_int(OBJECT(q35_host), x86ms->above_4g_mem_size, PCI_HOST_ABOVE_4G_MEM_SIZE, NULL); /* pci */ - qdev_init_nofail(DEVICE(q35_host)); + qdev_realize_and_unref(DEVICE(q35_host), NULL, &error_fatal); phb = PCI_HOST_BRIDGE(q35_host); host_bus = phb->bus; /* create ISA bus */ diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 7a3bc7ab66..85ab52b316 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -345,13 +345,13 @@ void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name) assert(parent_name); if (kvm_ioapic_in_kernel()) { - dev = qdev_create(NULL, TYPE_KVM_IOAPIC); + dev = qdev_new(TYPE_KVM_IOAPIC); } else { - dev = qdev_create(NULL, TYPE_IOAPIC); + dev = qdev_new(TYPE_IOAPIC); } object_property_add_child(object_resolve_path(parent_name, NULL), "ioapic", OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); d = SYS_BUS_DEVICE(dev); sysbus_mmio_map(d, 0, IO_APIC_DEFAULT_ADDRESS); diff --git a/hw/ide/qdev.c b/hw/ide/qdev.c index 06b11583f5..caa88526f5 100644 --- a/hw/ide/qdev.c +++ b/hw/ide/qdev.c @@ -127,11 +127,11 @@ IDEDevice *ide_create_drive(IDEBus *bus, int unit, DriveInfo *drive) { DeviceState *dev; - dev = qdev_create(&bus->qbus, drive->media_cd ? "ide-cd" : "ide-hd"); + dev = qdev_new(drive->media_cd ? "ide-cd" : "ide-hd"); qdev_prop_set_uint32(dev, "unit", unit); qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(drive), &error_fatal); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, &bus->qbus, &error_fatal); return DO_UPCAST(IDEDevice, qdev, dev); } diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c index 82c8f4192c..a261ab2401 100644 --- a/hw/intc/exynos4210_gic.c +++ b/hw/intc/exynos4210_gic.c @@ -23,6 +23,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qapi/error.h" #include "qemu/module.h" #include "hw/irq.h" #include "hw/qdev-properties.h" @@ -296,10 +297,10 @@ static void exynos4210_gic_realize(DeviceState *dev, Error **errp) uint32_t n = s->num_cpu; uint32_t i; - s->gic = qdev_create(NULL, "arm_gic"); + s->gic = qdev_new("arm_gic"); qdev_prop_set_uint32(s->gic, "num-cpu", s->num_cpu); qdev_prop_set_uint32(s->gic, "num-irq", EXYNOS4210_GIC_NIRQ); - qdev_init_nofail(s->gic); + qdev_realize_and_unref(s->gic, NULL, &error_fatal); gicbusdev = SYS_BUS_DEVICE(s->gic); /* Pass through outbound IRQ lines from the GIC */ diff --git a/hw/intc/s390_flic.c b/hw/intc/s390_flic.c index baca4d8a2d..b2a247dd15 100644 --- a/hw/intc/s390_flic.c +++ b/hw/intc/s390_flic.c @@ -63,15 +63,15 @@ void s390_flic_init(void) DeviceState *dev; if (kvm_enabled()) { - dev = qdev_create(NULL, TYPE_KVM_S390_FLIC); + dev = qdev_new(TYPE_KVM_S390_FLIC); object_property_add_child(qdev_get_machine(), TYPE_KVM_S390_FLIC, OBJECT(dev)); } else { - dev = qdev_create(NULL, TYPE_QEMU_S390_FLIC); + dev = qdev_new(TYPE_QEMU_S390_FLIC); object_property_add_child(qdev_get_machine(), TYPE_QEMU_S390_FLIC, OBJECT(dev)); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); } static int qemu_s390_register_io_adapter(S390FLICState *fs, uint32_t id, diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index 1f2189f4d5..1c9d7e19ab 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -61,8 +61,8 @@ ISABus *isa_bus_new(DeviceState *dev, MemoryRegion* address_space, return NULL; } if (!dev) { - dev = qdev_create(NULL, "isabus-bridge"); - qdev_init_nofail(dev); + dev = qdev_new("isabus-bridge"); + qdev_realize_and_unref(dev, NULL, &error_fatal); } isabus = ISA_BUS(qbus_create(TYPE_ISA_BUS, dev, NULL)); diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c index b84c152ce3..53020033cb 100644 --- a/hw/m68k/mcf5208.c +++ b/hw/m68k/mcf5208.c @@ -210,9 +210,9 @@ static void mcf_fec_init(MemoryRegion *sysmem, NICInfo *nd, hwaddr base, int i; qemu_check_nic_model(nd, TYPE_MCF_FEC_NET); - dev = qdev_create(NULL, TYPE_MCF_FEC_NET); + dev = qdev_new(TYPE_MCF_FEC_NET); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); for (i = 0; i < FEC_NUM_IRQ; i++) { diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c index d9e03a06ab..c575021577 100644 --- a/hw/m68k/mcf_intc.c +++ b/hw/m68k/mcf_intc.c @@ -7,6 +7,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/module.h" #include "cpu.h" #include "hw/hw.h" @@ -200,8 +201,8 @@ qemu_irq *mcf_intc_init(MemoryRegion *sysmem, DeviceState *dev; mcf_intc_state *s; - dev = qdev_create(NULL, TYPE_MCF_INTC); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_MCF_INTC); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = MCF_INTC(dev); s->cpu = cpu; diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 14b99ed25d..e1e16bf9af 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -839,7 +839,7 @@ static void next_escc_init(M68kCPU *cpu) DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, TYPE_ESCC); + dev = qdev_new(TYPE_ESCC); qdev_prop_set_uint32(dev, "disabled", 0); qdev_prop_set_uint32(dev, "frequency", 9600 * 384); qdev_prop_set_uint32(dev, "it_shift", 0); @@ -848,7 +848,7 @@ static void next_escc_init(M68kCPU *cpu) qdev_prop_set_chr(dev, "chrA", serial_hd(0)); qdev_prop_set_uint32(dev, "chnBtype", escc_serial); qdev_prop_set_uint32(dev, "chnAtype", escc_serial); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, ser_irq[0]); @@ -895,8 +895,8 @@ static void next_cube_init(MachineState *machine) memory_region_add_subregion(sysmem, 0x04000000, machine->ram); /* Framebuffer */ - dev = qdev_create(NULL, TYPE_NEXTFB); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_NEXTFB); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x0B000000); /* MMIO */ @@ -918,8 +918,8 @@ static void next_cube_init(MachineState *machine) memory_region_add_subregion(sysmem, 0x02100000, scrmem); /* KBD */ - dev = qdev_create(NULL, TYPE_NEXTKBD); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_NEXTKBD); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x0200e000); /* Load ROM here */ diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 81749e7ec6..15b7eb719a 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -218,13 +218,13 @@ static void q800_init(MachineState *machine) /* VIA */ - via_dev = qdev_create(NULL, TYPE_MAC_VIA); + via_dev = qdev_new(TYPE_MAC_VIA); dinfo = drive_get(IF_MTD, 0, 0); if (dinfo) { qdev_prop_set_drive(via_dev, "drive", blk_by_legacy_dinfo(dinfo), &error_abort); } - qdev_init_nofail(via_dev); + qdev_realize_and_unref(via_dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(via_dev); sysbus_mmio_map(sysbus, 0, VIA_BASE); qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, pic[0]); @@ -232,10 +232,10 @@ static void q800_init(MachineState *machine) adb_bus = qdev_get_child_bus(via_dev, "adb.0"); - dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD); - qdev_init_nofail(dev); - dev = qdev_create(adb_bus, TYPE_ADB_MOUSE); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_ADB_KEYBOARD); + qdev_realize_and_unref(dev, adb_bus, &error_fatal); + dev = qdev_new(TYPE_ADB_MOUSE); + qdev_realize_and_unref(dev, adb_bus, &error_fatal); /* MACSONIC */ @@ -259,13 +259,13 @@ static void q800_init(MachineState *machine) nd_table[0].macaddr.a[1] = 0x00; nd_table[0].macaddr.a[2] = 0x07; - dev = qdev_create(NULL, "dp8393x"); + dev = qdev_new("dp8393x"); qdev_set_nic_properties(dev, &nd_table[0]); qdev_prop_set_uint8(dev, "it_shift", 2); qdev_prop_set_bit(dev, "big_endian", true); object_property_set_link(OBJECT(dev), OBJECT(get_system_memory()), "dma_mr", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(dev); sysbus_mmio_map(sysbus, 0, SONIC_BASE); sysbus_mmio_map(sysbus, 1, SONIC_PROM_BASE); @@ -273,7 +273,7 @@ static void q800_init(MachineState *machine) /* SCC */ - dev = qdev_create(NULL, TYPE_ESCC); + dev = qdev_new(TYPE_ESCC); qdev_prop_set_uint32(dev, "disabled", 0); qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK); qdev_prop_set_uint32(dev, "it_shift", 1); @@ -282,7 +282,7 @@ static void q800_init(MachineState *machine) qdev_prop_set_chr(dev, "chrB", serial_hd(1)); qdev_prop_set_uint32(dev, "chnBtype", 0); qdev_prop_set_uint32(dev, "chnAtype", 0); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(dev); sysbus_connect_irq(sysbus, 0, pic[3]); sysbus_connect_irq(sysbus, 1, pic[3]); @@ -290,7 +290,7 @@ static void q800_init(MachineState *machine) /* SCSI */ - dev = qdev_create(NULL, TYPE_ESP); + dev = qdev_new(TYPE_ESP); sysbus_esp = ESP_STATE(dev); esp = &sysbus_esp->esp; esp->dma_memory_read = NULL; @@ -298,7 +298,7 @@ static void q800_init(MachineState *machine) esp->dma_opaque = NULL; sysbus_esp->it_shift = 4; esp->dma_enabled = 1; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(dev); sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in_named(via_dev, @@ -314,14 +314,14 @@ static void q800_init(MachineState *machine) /* SWIM floppy controller */ - dev = qdev_create(NULL, TYPE_SWIM); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_SWIM); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE); /* NuBus */ - dev = qdev_create(NULL, TYPE_MAC_NUBUS_BRIDGE); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_MAC_NUBUS_BRIDGE); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, NUBUS_SUPER_SLOT_BASE); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE); @@ -329,11 +329,11 @@ static void q800_init(MachineState *machine) /* framebuffer in nubus slot #9 */ - dev = qdev_create(BUS(nubus), TYPE_NUBUS_MACFB); + dev = qdev_new(TYPE_NUBUS_MACFB); qdev_prop_set_uint32(dev, "width", graphic_width); qdev_prop_set_uint32(dev, "height", graphic_height); qdev_prop_set_uint8(dev, "depth", graphic_depth); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, BUS(nubus), &error_fatal); cs = CPU(cpu); if (linux_boot) { diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c index 05a5614a04..2e7a3fa119 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -110,9 +110,9 @@ petalogix_ml605_init(MachineState *machine) 64 * KiB, 2, 0x89, 0x18, 0x0000, 0x0, 0); - dev = qdev_create(NULL, "xlnx.xps-intc"); + dev = qdev_new("xlnx.xps-intc"); qdev_prop_set_uint32(dev, "kind-of-intr", 1 << TIMER_IRQ); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ)); @@ -125,17 +125,17 @@ petalogix_ml605_init(MachineState *machine) DEVICE_LITTLE_ENDIAN); /* 2 timers at irq 2 @ 100 Mhz. */ - dev = qdev_create(NULL, "xlnx.xps-timer"); + dev = qdev_new("xlnx.xps-timer"); qdev_prop_set_uint32(dev, "one-timer-only", 0); qdev_prop_set_uint32(dev, "clock-frequency", 100 * 1000000); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]); /* axi ethernet and dma initialization. */ qemu_check_nic_model(&nd_table[0], "xlnx.axi-ethernet"); - eth0 = qdev_create(NULL, "xlnx.axi-ethernet"); - dma = qdev_create(NULL, "xlnx.axi-dma"); + eth0 = qdev_new("xlnx.axi-ethernet"); + dma = qdev_new("xlnx.axi-dma"); /* FIXME: attach to the sysbus instead */ object_property_add_child(qdev_get_machine(), "xilinx-eth", OBJECT(eth0)); @@ -152,7 +152,7 @@ petalogix_ml605_init(MachineState *machine) "axistream-connected", &error_abort); object_property_set_link(OBJECT(eth0), cs, "axistream-control-connected", &error_abort); - qdev_init_nofail(eth0); + qdev_realize_and_unref(eth0, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(eth0), 0, AXIENET_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(eth0), 0, irq[AXIENET_IRQ]); @@ -165,7 +165,7 @@ petalogix_ml605_init(MachineState *machine) "axistream-connected", &error_abort); object_property_set_link(OBJECT(dma), cs, "axistream-control-connected", &error_abort); - qdev_init_nofail(dma); + qdev_realize_and_unref(dma, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, AXIDMA_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dma), 0, irq[AXIDMA_IRQ0]); sysbus_connect_irq(SYS_BUS_DEVICE(dma), 1, irq[AXIDMA_IRQ1]); @@ -173,9 +173,9 @@ petalogix_ml605_init(MachineState *machine) { SSIBus *spi; - dev = qdev_create(NULL, "xlnx.xps-spi"); + dev = qdev_new("xlnx.xps-spi"); qdev_prop_set_uint8(dev, "num-ss-bits", NUM_SPI_FLASHES); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, SPI_BASEADDR); sysbus_connect_irq(busdev, 0, irq[SPI_IRQ]); diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c index 0bb6cdea8d..aecee2f5f3 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -89,10 +89,10 @@ petalogix_s3adsp1800_init(MachineState *machine) dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); - dev = qdev_create(NULL, "xlnx.xps-intc"); + dev = qdev_new("xlnx.xps-intc"); qdev_prop_set_uint32(dev, "kind-of-intr", 1 << ETHLITE_IRQ | 1 << UARTLITE_IRQ); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ)); @@ -104,19 +104,19 @@ petalogix_s3adsp1800_init(MachineState *machine) serial_hd(0)); /* 2 timers at irq 2 @ 62 Mhz. */ - dev = qdev_create(NULL, "xlnx.xps-timer"); + dev = qdev_new("xlnx.xps-timer"); qdev_prop_set_uint32(dev, "one-timer-only", 0); qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]); qemu_check_nic_model(&nd_table[0], "xlnx.xps-ethernetlite"); - dev = qdev_create(NULL, "xlnx.xps-ethernetlite"); + dev = qdev_new("xlnx.xps-ethernetlite"); qdev_set_nic_properties(dev, &nd_table[0]); qdev_prop_set_uint32(dev, "tx-ping-pong", 0); qdev_prop_set_uint32(dev, "rx-ping-pong", 0); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, ETHLITE_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[ETHLITE_IRQ]); diff --git a/hw/mips/boston.c b/hw/mips/boston.c index a896056be1..a34ccdf616 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -400,7 +400,7 @@ xilinx_pcie_init(MemoryRegion *sys_mem, uint32_t bus_nr, DeviceState *dev; MemoryRegion *cfg, *mmio; - dev = qdev_create(NULL, TYPE_XILINX_PCIE_HOST); + dev = qdev_new(TYPE_XILINX_PCIE_HOST); qdev_prop_set_uint32(dev, "bus_nr", bus_nr); qdev_prop_set_uint64(dev, "cfg_base", cfg_base); @@ -409,7 +409,7 @@ xilinx_pcie_init(MemoryRegion *sys_mem, uint32_t bus_nr, qdev_prop_set_uint64(dev, "mmio_size", mmio_size); qdev_prop_set_bit(dev, "link_up", link_up); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); cfg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion_overlap(sys_mem, cfg_base, cfg, 0); @@ -441,8 +441,8 @@ static void boston_mach_init(MachineState *machine) exit(1); } - dev = qdev_create(NULL, TYPE_MIPS_BOSTON); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_MIPS_BOSTON); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = BOSTON(dev); s->mach = machine; diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index b2ea13f09d..37750b8037 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -23,6 +23,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/units.h" #include "qemu/log.h" #include "hw/mips/mips.h" @@ -1201,7 +1202,7 @@ PCIBus *gt64120_register(qemu_irq *pic) PCIHostState *phb; DeviceState *dev; - dev = qdev_create(NULL, TYPE_GT64120_PCI_HOST_BRIDGE); + dev = qdev_new(TYPE_GT64120_PCI_HOST_BRIDGE); d = GT64120_PCI_HOST_BRIDGE(dev); phb = PCI_HOST_BRIDGE(dev); memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", 4 * GiB); @@ -1212,7 +1213,7 @@ PCIBus *gt64120_register(qemu_irq *pic) &d->pci0_mem, get_system_io(), PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, "isd-mem", 0x1000); diff --git a/hw/mips/jazz.c b/hw/mips/jazz.c index afea52b41b..fb975bd1c7 100644 --- a/hw/mips/jazz.c +++ b/hw/mips/jazz.c @@ -255,8 +255,8 @@ static void mips_jazz_init(MachineState *machine, /* Video card */ switch (jazz_model) { case JAZZ_MAGNUM: - dev = qdev_create(NULL, "sysbus-g364"); - qdev_init_nofail(dev); + dev = qdev_new("sysbus-g364"); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(dev); sysbus_mmio_map(sysbus, 0, 0x60080000); sysbus_mmio_map(sysbus, 1, 0x40000000); @@ -287,12 +287,12 @@ static void mips_jazz_init(MachineState *machine, if (strcmp(nd->model, "dp83932") == 0) { qemu_check_nic_model(nd, "dp83932"); - dev = qdev_create(NULL, "dp8393x"); + dev = qdev_new("dp8393x"); qdev_set_nic_properties(dev, nd); qdev_prop_set_uint8(dev, "it_shift", 2); object_property_set_link(OBJECT(dev), OBJECT(rc4030_dma_mr), "dma_mr", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(dev); sysbus_mmio_map(sysbus, 0, 0x80001000); sysbus_mmio_map(sysbus, 1, 0x8000b000); @@ -308,7 +308,7 @@ static void mips_jazz_init(MachineState *machine, } /* SCSI adapter */ - dev = qdev_create(NULL, TYPE_ESP); + dev = qdev_new(TYPE_ESP); sysbus_esp = ESP_STATE(dev); esp = &sysbus_esp->esp; esp->dma_memory_read = rc4030_dma_read; @@ -317,7 +317,7 @@ static void mips_jazz_init(MachineState *machine, sysbus_esp->it_shift = 0; /* XXX for now until rc4030 has been changed to use DMA enable signal */ esp->dma_enabled = 1; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(dev); sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(rc4030, 5)); @@ -362,8 +362,8 @@ static void mips_jazz_init(MachineState *machine, /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */ /* NVRAM */ - dev = qdev_create(NULL, "ds1225y"); - qdev_init_nofail(dev); + dev = qdev_new("ds1225y"); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(dev); sysbus_mmio_map(sysbus, 0, 0x80009000); diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 636c95d1fe..d03e1c3e49 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1233,7 +1233,7 @@ void mips_malta_init(MachineState *machine) int fl_idx = 0; int be; - DeviceState *dev = qdev_create(NULL, TYPE_MIPS_MALTA); + DeviceState *dev = qdev_new(TYPE_MIPS_MALTA); MaltaState *s = MIPS_MALTA(dev); /* @@ -1243,7 +1243,7 @@ void mips_malta_init(MachineState *machine) */ empty_slot_init(0, 0x20000000); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); /* create CPU */ mips_create_cpu(machine, s, &cbus_irq, &i8259_irq); diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c index d220318939..72b1e846af 100644 --- a/hw/mips/mipssim.c +++ b/hw/mips/mipssim.c @@ -129,9 +129,9 @@ static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd) DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, "mipsnet"); + dev = qdev_new("mipsnet"); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, irq); @@ -216,11 +216,11 @@ mips_mipssim_init(MachineState *machine) * MIPS CPU INT2, which is interrupt 4. */ if (serial_hd(0)) { - DeviceState *dev = qdev_create(NULL, TYPE_SERIAL_IO); + DeviceState *dev = qdev_new(TYPE_SERIAL_IO); qdev_prop_set_chr(dev, "chardev", serial_hd(0)); qdev_set_legacy_instance_id(dev, 0x3f8, 2); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]); sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); diff --git a/hw/net/etraxfs_eth.c b/hw/net/etraxfs_eth.c index 27fd069b96..7e98cbda87 100644 --- a/hw/net/etraxfs_eth.c +++ b/hw/net/etraxfs_eth.c @@ -654,7 +654,7 @@ etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr, DeviceState *dev; qemu_check_nic_model(nd, "fseth"); - dev = qdev_create(NULL, "etraxfs-eth"); + dev = qdev_new("etraxfs-eth"); qdev_set_nic_properties(dev, nd); qdev_prop_set_uint32(dev, "phyaddr", phyaddr); @@ -668,7 +668,7 @@ etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr, */ ETRAX_FS_ETH(dev)->dma_out = dma_out; ETRAX_FS_ETH(dev)->dma_in = dma_in; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return dev; diff --git a/hw/net/fsl_etsec/etsec.c b/hw/net/fsl_etsec/etsec.c index 475f3c887a..d0e9ff57ca 100644 --- a/hw/net/fsl_etsec/etsec.c +++ b/hw/net/fsl_etsec/etsec.c @@ -33,6 +33,7 @@ #include "hw/qdev-properties.h" #include "etsec.h" #include "registers.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" @@ -452,9 +453,9 @@ DeviceState *etsec_create(hwaddr base, { DeviceState *dev; - dev = qdev_create(NULL, "eTSEC"); + dev = qdev_new("eTSEC"); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, tx_irq); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, rx_irq); diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c index da7e0bb0e8..81c32c8107 100644 --- a/hw/net/lan9118.c +++ b/hw/net/lan9118.c @@ -20,6 +20,7 @@ #include "hw/net/lan9118.h" #include "hw/ptimer.h" #include "hw/qdev-properties.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" /* For crc32 */ @@ -1394,9 +1395,9 @@ void lan9118_init(NICInfo *nd, uint32_t base, qemu_irq irq) SysBusDevice *s; qemu_check_nic_model(nd, "lan9118"); - dev = qdev_create(NULL, TYPE_LAN9118); + dev = qdev_new(TYPE_LAN9118); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, base); sysbus_connect_irq(s, 0, irq); diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c index 5e0fd69763..1870507727 100644 --- a/hw/net/lasi_i82596.c +++ b/hw/net/lasi_i82596.c @@ -11,6 +11,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/timer.h" #include "hw/sysbus.h" #include "net/eth.h" @@ -126,11 +127,11 @@ SysBusI82596State *lasi_82596_init(MemoryRegion *addr_space, .a = { 0x08, 0x00, 0x09, 0xef, 0x34, 0xf6 } }; qemu_check_nic_model(&nd_table[0], TYPE_LASI_82596); - dev = qdev_create(NULL, TYPE_LASI_82596); + dev = qdev_new(TYPE_LASI_82596); s = SYSBUS_I82596(dev); s->state.irq = lan_irq; qdev_set_nic_properties(dev, &nd_table[0]); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s->state.conf.macaddr = HP_MAC; /* set HP MAC prefix */ /* LASI 82596 ports in main memory. */ diff --git a/hw/net/smc91c111.c b/hw/net/smc91c111.c index b3240b9335..9b616fe62a 100644 --- a/hw/net/smc91c111.c +++ b/hw/net/smc91c111.c @@ -14,6 +14,7 @@ #include "hw/irq.h" #include "hw/net/smc91c111.h" #include "hw/qdev-properties.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" /* For crc32 */ @@ -821,9 +822,9 @@ void smc91c111_init(NICInfo *nd, uint32_t base, qemu_irq irq) SysBusDevice *s; qemu_check_nic_model(nd, "smc91c111"); - dev = qdev_create(NULL, TYPE_SMC91C111); + dev = qdev_new(TYPE_SMC91C111); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, base); sysbus_connect_irq(s, 0, irq); diff --git a/hw/net/spapr_llan.c b/hw/net/spapr_llan.c index 968a1ce78e..4cd02dda01 100644 --- a/hw/net/spapr_llan.c +++ b/hw/net/spapr_llan.c @@ -372,11 +372,11 @@ void spapr_vlan_create(SpaprVioBus *bus, NICInfo *nd) { DeviceState *dev; - dev = qdev_create(&bus->bus, "spapr-vlan"); + dev = qdev_new("spapr-vlan"); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, &bus->bus, &error_fatal); } static int spapr_vlan_devnode(SpaprVioDevice *dev, void *fdt, int node_off) diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c index 4c60a27fb7..3d304d724a 100644 --- a/hw/nios2/10m50_devboard.c +++ b/hw/nios2/10m50_devboard.c @@ -80,9 +80,9 @@ static void nios2_10m50_ghrd_init(MachineState *machine) cpu_irq = nios2_cpu_pic_init(cpu); /* Register: Internal Interrupt Controller (IIC) */ - dev = qdev_create(NULL, "altera,iic"); + dev = qdev_new("altera,iic"); object_property_add_const_link(OBJECT(dev), "cpu", OBJECT(cpu)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq[0]); for (i = 0; i < 32; i++) { irq[i] = qdev_get_gpio_in(dev, i); @@ -93,16 +93,16 @@ static void nios2_10m50_ghrd_init(MachineState *machine) serial_hd(0), DEVICE_NATIVE_ENDIAN); /* Register: Timer sys_clk_timer */ - dev = qdev_create(NULL, "ALTR.timer"); + dev = qdev_new("ALTR.timer"); qdev_prop_set_uint32(dev, "clock-frequency", 75 * 1000000); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xf8001440); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[0]); /* Register: Timer sys_clk_timer_1 */ - dev = qdev_create(NULL, "ALTR.timer"); + dev = qdev_new("ALTR.timer"); qdev_prop_set_uint32(dev, "clock-frequency", 75 * 1000000); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xe0000880); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[5]); diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 8dd50c2c72..fbcaf66002 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -1099,14 +1099,14 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase, FWCfgState *s; bool dma_requested = dma_iobase && dma_as; - dev = qdev_create(NULL, TYPE_FW_CFG_IO); + dev = qdev_new(TYPE_FW_CFG_IO); if (!dma_requested) { qdev_prop_set_bit(dev, "dma_enabled", false); } object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sbd = SYS_BUS_DEVICE(dev); ios = FW_CFG_IO(dev); @@ -1138,7 +1138,7 @@ FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, FWCfgState *s; bool dma_requested = dma_addr && dma_as; - dev = qdev_create(NULL, TYPE_FW_CFG_MEM); + dev = qdev_new(TYPE_FW_CFG_MEM); qdev_prop_set_uint32(dev, "data_width", data_width); if (!dma_requested) { qdev_prop_set_bit(dev, "dma_enabled", false); @@ -1146,7 +1146,7 @@ FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sbd = SYS_BUS_DEVICE(dev); sysbus_mmio_map(sbd, 0, ctl_addr); diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index d08ce61811..5c55c12b1d 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -59,9 +59,9 @@ static void openrisc_sim_net_init(hwaddr base, hwaddr descriptors, SysBusDevice *s; int i; - dev = qdev_create(NULL, "open_eth"); + dev = qdev_new("open_eth"); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); for (i = 0; i < num_cpus; i++) { @@ -78,9 +78,9 @@ static void openrisc_sim_ompic_init(hwaddr base, int num_cpus, SysBusDevice *s; int i; - dev = qdev_create(NULL, "or1k-ompic"); + dev = qdev_new("or1k-ompic"); qdev_prop_set_uint32(dev, "num-cpus", num_cpus); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); for (i = 0; i < num_cpus; i++) { diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c index 47aaaf8fd1..5da0d21061 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -231,7 +231,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp) dev_name = dev->qdev.id; } - ds = qdev_create(NULL, TYPE_PXB_HOST); + ds = qdev_new(TYPE_PXB_HOST); if (pcie) { bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS); } else { @@ -255,7 +255,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp) goto err_register_bus; } - qdev_init_nofail(ds); + qdev_realize_and_unref(ds, NULL, &error_fatal); if (bds) { qdev_init_nofail(bds); } diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index f9697dcc43..546ac84cf4 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -40,6 +40,7 @@ #include "qemu/osdep.h" #include "qemu/units.h" +#include "qapi/error.h" #include "qemu/error-report.h" #include "hw/pci/pci.h" #include "hw/irq.h" @@ -743,11 +744,11 @@ PCIBus *bonito_init(qemu_irq *pic) PCIBonitoState *s; PCIDevice *d; - dev = qdev_create(NULL, TYPE_BONITO_PCI_HOST_BRIDGE); + dev = qdev_new(TYPE_BONITO_PCI_HOST_BRIDGE); phb = PCI_HOST_BRIDGE(dev); pcihost = BONITO_PCI_HOST_BRIDGE(dev); pcihost->pic = pic; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); d = pci_create(phb->bus, PCI_DEVFN(0, 0), TYPE_PCI_BONITO); s = PCI_BONITO(d); diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 0adbd77553..873d334637 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -270,13 +270,13 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type, unsigned i; I440FXState *i440fx; - dev = qdev_create(NULL, host_type); + dev = qdev_new(host_type); s = PCI_HOST_BRIDGE(dev); b = pci_root_bus_new(dev, NULL, pci_address_space, address_space_io, 0, TYPE_PCI_BUS); s->bus = b; object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); d = pci_create_simple(b, 0, pci_type); *pi440fx_state = I440FX_PCI_DEVICE(d); diff --git a/hw/pcmcia/pxa2xx.c b/hw/pcmcia/pxa2xx.c index 8667244df4..90f540209d 100644 --- a/hw/pcmcia/pxa2xx.c +++ b/hw/pcmcia/pxa2xx.c @@ -13,6 +13,7 @@ #include "qemu/osdep.h" #include "hw/irq.h" #include "hw/sysbus.h" +#include "qapi/error.h" #include "qemu/module.h" #include "hw/pcmcia.h" #include "hw/arm/pxa.h" @@ -147,11 +148,11 @@ PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem, DeviceState *dev; PXA2xxPCMCIAState *s; - dev = qdev_create(NULL, TYPE_PXA2XX_PCMCIA); + dev = qdev_new(TYPE_PXA2XX_PCMCIA); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); s = PXA2XX_PCMCIA(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); return s; } diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 2a0b66a152..06f4a38266 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -743,12 +743,12 @@ static DeviceState *ppce500_init_mpic_qemu(PPCE500MachineState *pms, unsigned int smp_cpus = machine->smp.cpus; const PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(pms); - dev = qdev_create(NULL, TYPE_OPENPIC); + dev = qdev_new(TYPE_OPENPIC); object_property_add_child(OBJECT(machine), "pic", OBJECT(dev)); qdev_prop_set_uint32(dev, "model", pmc->mpic_version); qdev_prop_set_uint32(dev, "nb_cpus", smp_cpus); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); k = 0; @@ -768,10 +768,10 @@ static DeviceState *ppce500_init_mpic_kvm(const PPCE500MachineClass *pmc, DeviceState *dev; CPUState *cs; - dev = qdev_create(NULL, TYPE_KVM_OPENPIC); + dev = qdev_new(TYPE_KVM_OPENPIC); qdev_prop_set_uint32(dev, "model", pmc->mpic_version); - object_property_set_bool(OBJECT(dev), true, "realized", &err); + qdev_realize_and_unref(dev, NULL, &err); if (err) { error_propagate(errp, err); object_unparent(OBJECT(dev)); @@ -913,10 +913,10 @@ void ppce500_init(MachineState *machine) /* Register Memory */ memory_region_add_subregion(address_space_mem, 0, machine->ram); - dev = qdev_create(NULL, "e500-ccsr"); + dev = qdev_new("e500-ccsr"); object_property_add_child(qdev_get_machine(), "e500-ccsr", OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); ccsr = CCSR(dev); ccsr_addr_space = &ccsr->ccsr_space; memory_region_add_subregion(address_space_mem, pmc->ccsrbar_base, @@ -937,9 +937,9 @@ void ppce500_init(MachineState *machine) serial_hd(1), DEVICE_BIG_ENDIAN); } /* I2C */ - dev = qdev_create(NULL, "mpc-i2c"); + dev = qdev_new("mpc-i2c"); s = SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC8544_I2C_IRQ)); memory_region_add_subregion(ccsr_addr_space, MPC8544_I2C_REGS_OFFSET, sysbus_mmio_get_region(s, 0)); @@ -948,18 +948,18 @@ void ppce500_init(MachineState *machine) /* General Utility device */ - dev = qdev_create(NULL, "mpc8544-guts"); - qdev_init_nofail(dev); + dev = qdev_new("mpc8544-guts"); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); memory_region_add_subregion(ccsr_addr_space, MPC8544_UTIL_OFFSET, sysbus_mmio_get_region(s, 0)); /* PCI */ - dev = qdev_create(NULL, "e500-pcihost"); + dev = qdev_new("e500-pcihost"); object_property_add_child(qdev_get_machine(), "pci-host", OBJECT(dev)); qdev_prop_set_uint32(dev, "first_slot", pmc->pci_first_slot); qdev_prop_set_uint32(dev, "first_pin_irq", pci_irq_nrs[0]); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); for (i = 0; i < PCI_NUM_PINS; i++) { sysbus_connect_irq(s, i, qdev_get_gpio_in(mpicdev, pci_irq_nrs[i])); @@ -985,9 +985,9 @@ void ppce500_init(MachineState *machine) if (pmc->has_mpc8xxx_gpio) { qemu_irq poweroff_irq; - dev = qdev_create(NULL, "mpc8xxx_gpio"); + dev = qdev_new("mpc8xxx_gpio"); s = SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC8XXX_GPIO_IRQ)); memory_region_add_subregion(ccsr_addr_space, MPC8XXX_GPIO_OFFSET, sysbus_mmio_get_region(s, 0)); @@ -999,11 +999,11 @@ void ppce500_init(MachineState *machine) /* Platform Bus Device */ if (pmc->has_platform_bus) { - dev = qdev_create(NULL, TYPE_PLATFORM_BUS_DEVICE); + dev = qdev_new(TYPE_PLATFORM_BUS_DEVICE); dev->id = TYPE_PLATFORM_BUS_DEVICE; qdev_prop_set_uint32(dev, "num_irqs", pmc->platform_bus_num_irqs); qdev_prop_set_uint32(dev, "mmio_size", pmc->platform_bus_size); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); pms->pbus_dev = PLATFORM_BUS_DEVICE(dev); s = SYS_BUS_DEVICE(pms->pbus_dev); diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 3507f26f6e..69281d7834 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -242,8 +242,8 @@ static void ppc_core99_init(MachineState *machine) } /* UniN init */ - dev = qdev_create(NULL, TYPE_UNI_NORTH); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_UNI_NORTH); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); memory_region_add_subregion(get_system_memory(), 0xf8000000, sysbus_mmio_get_region(s, 0)); @@ -288,9 +288,9 @@ static void ppc_core99_init(MachineState *machine) } } - pic_dev = qdev_create(NULL, TYPE_OPENPIC); + pic_dev = qdev_new(TYPE_OPENPIC); qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO); - qdev_init_nofail(pic_dev); + qdev_realize_and_unref(pic_dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(pic_dev); k = 0; for (i = 0; i < smp_cpus; i++) { @@ -303,10 +303,10 @@ static void ppc_core99_init(MachineState *machine) if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) { /* 970 gets a U3 bus */ /* Uninorth AGP bus */ - dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE); + dev = qdev_new(TYPE_U3_AGP_HOST_BRIDGE); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); uninorth_pci = U3_AGP_HOST_BRIDGE(dev); s = SYS_BUS_DEVICE(dev); /* PCI hole */ @@ -322,29 +322,29 @@ static void ppc_core99_init(MachineState *machine) } else { /* Use values found on a real PowerMac */ /* Uninorth AGP bus */ - dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE); + dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, 0xf0800000); sysbus_mmio_map(s, 1, 0xf0c00000); /* Uninorth internal bus */ - dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE); + dev = qdev_new(TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, 0xf4800000); sysbus_mmio_map(s, 1, 0xf4c00000); /* Uninorth main bus */ - dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE); + dev = qdev_new(TYPE_UNI_NORTH_PCI_HOST_BRIDGE); qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev); s = SYS_BUS_DEVICE(dev); /* PCI hole */ @@ -403,13 +403,13 @@ static void ppc_core99_init(MachineState *machine) } adb_bus = qdev_get_child_bus(dev, "adb.0"); - dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD); + dev = qdev_new(TYPE_ADB_KEYBOARD); qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, adb_bus, &error_fatal); - dev = qdev_create(adb_bus, TYPE_ADB_MOUSE); + dev = qdev_new(TYPE_ADB_MOUSE); qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, adb_bus, &error_fatal); } if (machine->usb) { @@ -441,22 +441,22 @@ static void ppc_core99_init(MachineState *machine) move the NVRAM out of ROM again for KVM */ nvram_addr = 0xFFE00000; } - dev = qdev_create(NULL, TYPE_MACIO_NVRAM); + dev = qdev_new(TYPE_MACIO_NVRAM); qdev_prop_set_uint32(dev, "size", 0x2000); qdev_prop_set_uint32(dev, "it_shift", 1); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr); nvr = MACIO_NVRAM(dev); pmac_format_nvram_partition(nvr, 0x2000); /* No PCI init: the BIOS will do it */ - dev = qdev_create(NULL, TYPE_FW_CFG_MEM); + dev = qdev_new(TYPE_FW_CFG_MEM); fw_cfg = FW_CFG(dev); qdev_prop_set_uint32(dev, "data_width", 1); qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(fw_cfg)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, CFG_ADDR); sysbus_mmio_map(s, 1, CFG_ADDR + 2); diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 0b4c1c6373..cfc2eae1d9 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -222,8 +222,8 @@ static void ppc_heathrow_init(MachineState *machine) } /* XXX: we register only 1 output pin for heathrow PIC */ - pic_dev = qdev_create(NULL, TYPE_HEATHROW); - qdev_init_nofail(pic_dev); + pic_dev = qdev_new(TYPE_HEATHROW); + qdev_realize_and_unref(pic_dev, NULL, &error_fatal); /* Connect the heathrow PIC outputs to the 6xx bus */ for (i = 0; i < smp_cpus; i++) { @@ -252,11 +252,11 @@ static void ppc_heathrow_init(MachineState *machine) } /* Grackle PCI host bridge */ - dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE); + dev = qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE); qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, GRACKLE_BASE); sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000); @@ -295,10 +295,10 @@ static void ppc_heathrow_init(MachineState *machine) dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda")); adb_bus = qdev_get_child_bus(dev, "adb.0"); - dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD); - qdev_init_nofail(dev); - dev = qdev_create(adb_bus, TYPE_ADB_MOUSE); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_ADB_KEYBOARD); + qdev_realize_and_unref(dev, adb_bus, &error_fatal); + dev = qdev_new(TYPE_ADB_MOUSE); + qdev_realize_and_unref(dev, adb_bus, &error_fatal); if (machine_usb(machine)) { pci_create_simple(pci_bus, -1, "pci-ohci"); @@ -309,13 +309,13 @@ static void ppc_heathrow_init(MachineState *machine) /* No PCI init: the BIOS will do it */ - dev = qdev_create(NULL, TYPE_FW_CFG_MEM); + dev = qdev_new(TYPE_FW_CFG_MEM); fw_cfg = FW_CFG(dev); qdev_prop_set_uint32(dev, "data_width", 1); qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(fw_cfg)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, CFG_ADDR); sysbus_mmio_map(s, 1, CFG_ADDR + 2); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 9d1a11adb7..e3b6f0b884 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -729,12 +729,12 @@ static void pnv_init(MachineState *machine) /* * Create our simple PNOR device */ - dev = qdev_create(NULL, TYPE_PNV_PNOR); + dev = qdev_new(TYPE_PNV_PNOR); if (pnor) { qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(pnor), &error_abort); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); pnv->pnor = PNV_PNOR(dev); /* load skiboot firmware */ diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index dc318c7aa7..c1cf8d0f46 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -1367,13 +1367,13 @@ void ppc460ex_pcie_init(CPUPPCState *env) { DeviceState *dev; - dev = qdev_create(NULL, TYPE_PPC460EX_PCIE_HOST); + dev = qdev_new(TYPE_PPC460EX_PCIE_HOST); qdev_prop_set_int32(dev, "dcrn-base", DCRN_PCIE0_BASE); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); ppc460ex_pcie_register_dcrs(PPC460EX_PCIE_HOST(dev), env); - dev = qdev_create(NULL, TYPE_PPC460EX_PCIE_HOST); + dev = qdev_new(TYPE_PPC460EX_PCIE_HOST); qdev_prop_set_int32(dev, "dcrn-base", DCRN_PCIE1_BASE); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); ppc460ex_pcie_register_dcrs(PPC460EX_PCIE_HOST(dev), env); } diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index 9266453dd9..c7af0e16c3 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -35,6 +35,7 @@ #include "hw/pci/pci_host.h" #include "hw/ppc/ppc.h" #include "hw/boards.h" +#include "qapi/error.h" #include "qemu/error-report.h" #include "qemu/log.h" #include "hw/irq.h" @@ -268,7 +269,7 @@ static void ibm_40p_init(MachineState *machine) qemu_register_reset(ppc_prep_reset, cpu); /* PCI host */ - dev = qdev_create(NULL, "raven-pcihost"); + dev = qdev_new("raven-pcihost"); if (!bios_name) { bios_name = "openbios-ppc"; } @@ -276,7 +277,7 @@ static void ibm_40p_init(MachineState *machine) qdev_prop_set_uint32(dev, "elf-machine", PPC_ELF_MACHINE); pcihost = SYS_BUS_DEVICE(dev); object_property_add_child(qdev_get_machine(), "raven", OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci.0")); if (!pci_bus) { error_report("could not create PCI host controller"); @@ -338,13 +339,13 @@ static void ibm_40p_init(MachineState *machine) } /* Prepare firmware configuration for OpenBIOS */ - dev = qdev_create(NULL, TYPE_FW_CFG_MEM); + dev = qdev_new(TYPE_FW_CFG_MEM); fw_cfg = FW_CFG(dev); qdev_prop_set_uint32(dev, "data_width", 1); qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(fw_cfg)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, CFG_ADDR); sysbus_mmio_map(s, 1, CFG_ADDR + 2); diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index 42a8c9fb7f..503bd21728 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -370,10 +370,10 @@ static void sam460ex_init(MachineState *machine) /* USB */ sysbus_create_simple(TYPE_PPC4xx_EHCI, 0x4bffd0400, uic[2][29]); - dev = qdev_create(NULL, "sysbus-ohci"); + dev = qdev_new("sysbus-ohci"); qdev_prop_set_string(dev, "masterbus", "usb-bus.0"); qdev_prop_set_uint32(dev, "num-ports", 6); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sbdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(sbdev, 0, 0x4bffd0000); sysbus_connect_irq(sbdev, 0, uic[2][30]); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 6a315c0dc8..1228aeb4b0 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1712,7 +1712,7 @@ static void spapr_machine_reset(MachineState *machine) static void spapr_create_nvram(SpaprMachineState *spapr) { - DeviceState *dev = qdev_create(&spapr->vio_bus->bus, "spapr-nvram"); + DeviceState *dev = qdev_new("spapr-nvram"); DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0); if (dinfo) { @@ -1720,7 +1720,7 @@ static void spapr_create_nvram(SpaprMachineState *spapr) &error_fatal); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, &spapr->vio_bus->bus, &error_fatal); spapr->nvram = (struct SpaprNvram *)dev; } @@ -2640,9 +2640,9 @@ static PCIHostState *spapr_create_default_phb(void) { DeviceState *dev; - dev = qdev_create(NULL, TYPE_SPAPR_PCI_HOST_BRIDGE); + dev = qdev_new(TYPE_SPAPR_PCI_HOST_BRIDGE); qdev_prop_set_uint32(dev, "index", 0); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); return PCI_HOST_BRIDGE(dev); } diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 0c594aa72e..f2ade64e7d 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -325,7 +325,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **errp) DeviceState *dev; int i; - dev = qdev_create(NULL, TYPE_SPAPR_XIVE); + dev = qdev_new(TYPE_SPAPR_XIVE); qdev_prop_set_uint32(dev, "nr-irqs", smc->nr_xirqs + SPAPR_XIRQ_BASE); /* * 8 XIVE END structures per CPU. One for each available @@ -334,7 +334,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **errp) qdev_prop_set_uint32(dev, "nr-ends", nr_servers << 3); object_property_set_link(OBJECT(dev), OBJECT(spapr), "xive-fabric", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); spapr->xive = SPAPR_XIVE(dev); diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c index 0b085eabe4..61558db1bf 100644 --- a/hw/ppc/spapr_vio.c +++ b/hw/ppc/spapr_vio.c @@ -576,8 +576,8 @@ SpaprVioBus *spapr_vio_bus_init(void) DeviceState *dev; /* Create bridge device */ - dev = qdev_create(NULL, TYPE_SPAPR_VIO_BRIDGE); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_SPAPR_VIO_BRIDGE); + qdev_realize_and_unref(dev, NULL, &error_fatal); /* Create bus on bridge device */ qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio"); diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index 0dacfcd236..f28a69c0f9 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -36,6 +36,7 @@ #include "sysemu/device_tree.h" #include "hw/loader.h" #include "elf.h" +#include "qapi/error.h" #include "qemu/error-report.h" #include "qemu/log.h" #include "qemu/option.h" @@ -228,9 +229,9 @@ static void virtex_init(MachineState *machine) 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT]; - dev = qdev_create(NULL, "xlnx.xps-intc"); + dev = qdev_new("xlnx.xps-intc"); qdev_prop_set_uint32(dev, "kind-of-intr", 0); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq[0]); for (i = 0; i < 32; i++) { @@ -241,10 +242,10 @@ static void virtex_init(MachineState *machine) 115200, serial_hd(0), DEVICE_LITTLE_ENDIAN); /* 2 timers at irq 2 @ 62 Mhz. */ - dev = qdev_create(NULL, "xlnx.xps-timer"); + dev = qdev_new("xlnx.xps-timer"); qdev_prop_set_uint32(dev, "one-timer-only", 0); qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]); diff --git a/hw/riscv/sifive_clint.c b/hw/riscv/sifive_clint.c index e933d35092..729fce0a58 100644 --- a/hw/riscv/sifive_clint.c +++ b/hw/riscv/sifive_clint.c @@ -20,6 +20,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/error-report.h" #include "qemu/module.h" #include "hw/sysbus.h" @@ -245,13 +246,13 @@ DeviceState *sifive_clint_create(hwaddr addr, hwaddr size, uint32_t num_harts, env->timecmp = 0; } - DeviceState *dev = qdev_create(NULL, TYPE_SIFIVE_CLINT); + DeviceState *dev = qdev_new(TYPE_SIFIVE_CLINT); qdev_prop_set_uint32(dev, "num-harts", num_harts); qdev_prop_set_uint32(dev, "sip-base", sip_base); qdev_prop_set_uint32(dev, "timecmp-base", timecmp_base); qdev_prop_set_uint32(dev, "time-base", time_base); qdev_prop_set_uint32(dev, "aperture-size", size); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); return dev; } diff --git a/hw/riscv/sifive_e_prci.c b/hw/riscv/sifive_e_prci.c index a1c0d44f18..423af22ecc 100644 --- a/hw/riscv/sifive_e_prci.c +++ b/hw/riscv/sifive_e_prci.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" #include "hw/hw.h" @@ -117,8 +118,8 @@ type_init(sifive_e_prci_register_types) */ DeviceState *sifive_e_prci_create(hwaddr addr) { - DeviceState *dev = qdev_create(NULL, TYPE_SIFIVE_E_PRCI); - qdev_init_nofail(dev); + DeviceState *dev = qdev_new(TYPE_SIFIVE_E_PRCI); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); return dev; } diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c index c1e04cbb98..203fec8e48 100644 --- a/hw/riscv/sifive_plic.c +++ b/hw/riscv/sifive_plic.c @@ -19,6 +19,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" #include "qemu/error-report.h" @@ -494,7 +495,7 @@ DeviceState *sifive_plic_create(hwaddr addr, char *hart_config, uint32_t context_base, uint32_t context_stride, uint32_t aperture_size) { - DeviceState *dev = qdev_create(NULL, TYPE_SIFIVE_PLIC); + DeviceState *dev = qdev_new(TYPE_SIFIVE_PLIC); assert(enable_stride == (enable_stride & -enable_stride)); assert(context_stride == (context_stride & -context_stride)); qdev_prop_set_string(dev, "hart-config", hart_config); @@ -507,7 +508,7 @@ DeviceState *sifive_plic_create(hwaddr addr, char *hart_config, qdev_prop_set_uint32(dev, "context-base", context_base); qdev_prop_set_uint32(dev, "context-stride", context_stride); qdev_prop_set_uint32(dev, "aperture-size", aperture_size); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); return dev; } diff --git a/hw/riscv/sifive_test.c b/hw/riscv/sifive_test.c index 339195c6ff..596757f714 100644 --- a/hw/riscv/sifive_test.c +++ b/hw/riscv/sifive_test.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" #include "sysemu/runstate.h" @@ -92,8 +93,8 @@ type_init(sifive_test_register_types) */ DeviceState *sifive_test_create(hwaddr addr) { - DeviceState *dev = qdev_create(NULL, TYPE_SIFIVE_TEST); - qdev_init_nofail(dev); + DeviceState *dev = qdev_new(TYPE_SIFIVE_TEST); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); return dev; } diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 0c5bcdc37f..1b1a0019c8 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -443,9 +443,9 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem, qemu_irq irq; int i; - dev = qdev_create(NULL, TYPE_GPEX_HOST); + dev = qdev_new(TYPE_GPEX_HOST); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); ecam_alias = g_new0(MemoryRegion, 1); ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); diff --git a/hw/rtc/m48t59.c b/hw/rtc/m48t59.c index 47d48054fd..f6acf416ff 100644 --- a/hw/rtc/m48t59.c +++ b/hw/rtc/m48t59.c @@ -33,6 +33,7 @@ #include "sysemu/sysemu.h" #include "hw/sysbus.h" #include "exec/address-spaces.h" +#include "qapi/error.h" #include "qemu/bcd.h" #include "qemu/module.h" #include "trace.h" @@ -579,9 +580,9 @@ Nvram *m48t59_init(qemu_irq IRQ, hwaddr mem_base, continue; } - dev = qdev_create(NULL, m48txx_sysbus_info[i].bus_name); + dev = qdev_new(m48txx_sysbus_info[i].bus_name); qdev_prop_set_int32(dev, "base-year", base_year); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, IRQ); if (io_base != 0) { diff --git a/hw/rtc/sun4v-rtc.c b/hw/rtc/sun4v-rtc.c index ada01b5774..ed1c10832f 100644 --- a/hw/rtc/sun4v-rtc.c +++ b/hw/rtc/sun4v-rtc.c @@ -11,6 +11,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qapi/error.h" #include "qemu/module.h" #include "qemu/timer.h" #include "hw/rtc/sun4v-rtc.h" @@ -55,10 +56,10 @@ void sun4v_rtc_init(hwaddr addr) DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, TYPE_SUN4V_RTC); + dev = qdev_new(TYPE_SUN4V_RTC); s = SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); } diff --git a/hw/s390x/ap-bridge.c b/hw/s390x/ap-bridge.c index d0dbd0f1b6..974c97f454 100644 --- a/hw/s390x/ap-bridge.c +++ b/hw/s390x/ap-bridge.c @@ -49,10 +49,10 @@ void s390_init_ap(void) } /* Create bridge device */ - dev = qdev_create(NULL, TYPE_AP_BRIDGE); + dev = qdev_new(TYPE_AP_BRIDGE); object_property_add_child(qdev_get_machine(), TYPE_AP_BRIDGE, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); /* Create bus on bridge device */ bus = qbus_create(TYPE_AP_BUS, dev, TYPE_AP_BUS); diff --git a/hw/s390x/css-bridge.c b/hw/s390x/css-bridge.c index 813bfc768a..a0dd2da0b8 100644 --- a/hw/s390x/css-bridge.c +++ b/hw/s390x/css-bridge.c @@ -101,10 +101,10 @@ VirtualCssBus *virtual_css_bus_init(void) DeviceState *dev; /* Create bridge device */ - dev = qdev_create(NULL, TYPE_VIRTUAL_CSS_BRIDGE); + dev = qdev_new(TYPE_VIRTUAL_CSS_BRIDGE); object_property_add_child(qdev_get_machine(), TYPE_VIRTUAL_CSS_BRIDGE, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); /* Create bus on bridge device */ bus = qbus_create(TYPE_VIRTUAL_CSS_BUS, dev, "virtual-css"); diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index 67ae2e02ff..65e9d9a9cd 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -227,9 +227,9 @@ static void s390_create_virtio_net(BusState *bus, const char *name) qemu_check_nic_model(nd, "virtio"); - dev = qdev_create(bus, name); + dev = qdev_new(name); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, bus, &error_fatal); } } @@ -237,9 +237,9 @@ static void s390_create_sclpconsole(const char *type, Chardev *chardev) { DeviceState *dev; - dev = qdev_create(sclp_get_event_facility_bus(), type); + dev = qdev_new(type); qdev_prop_set_chr(dev, "chardev", chardev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, sclp_get_event_facility_bus(), &error_fatal); } static void ccw_init(MachineState *machine) @@ -269,10 +269,10 @@ static void ccw_init(MachineState *machine) machine->initrd_filename, "s390-ccw.img", "s390-netboot.img", true); - dev = qdev_create(NULL, TYPE_S390_PCI_HOST_BRIDGE); + dev = qdev_new(TYPE_S390_PCI_HOST_BRIDGE); object_property_add_child(qdev_get_machine(), TYPE_S390_PCI_HOST_BRIDGE, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); /* register hypercalls */ virtio_ccw_register_hcalls(); diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c index 2836f807a0..1a7320c0af 100644 --- a/hw/scsi/scsi-bus.c +++ b/hw/scsi/scsi-bus.c @@ -261,7 +261,7 @@ SCSIDevice *scsi_bus_legacy_add_drive(SCSIBus *bus, BlockBackend *blk, driver = "scsi-hd"; } } - dev = qdev_create(&bus->qbus, driver); + dev = qdev_new(driver); name = g_strdup_printf("legacy[%d]", unit); object_property_add_child(OBJECT(bus), name, OBJECT(dev)); g_free(name); @@ -293,7 +293,7 @@ SCSIDevice *scsi_bus_legacy_add_drive(SCSIBus *bus, BlockBackend *blk, qdev_prop_set_enum(dev, "rerror", rerror); qdev_prop_set_enum(dev, "werror", werror); - object_property_set_bool(OBJECT(dev), true, "realized", &err); + qdev_realize_and_unref(dev, &bus->qbus, &err); if (err != NULL) { error_propagate(errp, err); object_unparent(OBJECT(dev)); diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c index 923488beb2..d17dc03c73 100644 --- a/hw/scsi/spapr_vscsi.c +++ b/hw/scsi/spapr_vscsi.c @@ -1225,9 +1225,9 @@ void spapr_vscsi_create(SpaprVioBus *bus) { DeviceState *dev; - dev = qdev_create(&bus->bus, "spapr-vscsi"); + dev = qdev_new("spapr-vscsi"); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, &bus->bus, &error_fatal); scsi_bus_legacy_handle_cmdline(&VIO_SPAPR_VSCSI_DEVICE(dev)->bus); } diff --git a/hw/sd/milkymist-memcard.c b/hw/sd/milkymist-memcard.c index 926e1af475..4cfdf7b64c 100644 --- a/hw/sd/milkymist-memcard.c +++ b/hw/sd/milkymist-memcard.c @@ -278,9 +278,9 @@ static void milkymist_memcard_realize(DeviceState *dev, Error **errp) /* FIXME use a qdev drive property instead of drive_get_next() */ dinfo = drive_get_next(IF_SD); blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL; - carddev = qdev_create(BUS(&s->sdbus), TYPE_SD_CARD); + carddev = qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &err); - object_property_set_bool(OBJECT(carddev), true, "realized", &err); + qdev_realize_and_unref(carddev, BUS(&s->sdbus), &err); if (err) { error_setg(errp, "failed to init SD card: %s", error_get_pretty(err)); return; diff --git a/hw/sd/pxa2xx_mmci.c b/hw/sd/pxa2xx_mmci.c index c32df1b8f9..89784407b9 100644 --- a/hw/sd/pxa2xx_mmci.c +++ b/hw/sd/pxa2xx_mmci.c @@ -485,23 +485,23 @@ PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysmem, PXA2xxMMCIState *s; Error *err = NULL; - dev = qdev_create(NULL, TYPE_PXA2XX_MMCI); + dev = qdev_new(TYPE_PXA2XX_MMCI); s = PXA2XX_MMCI(dev); sbd = SYS_BUS_DEVICE(dev); sysbus_mmio_map(sbd, 0, base); sysbus_connect_irq(sbd, 0, irq); qdev_connect_gpio_out_named(dev, "rx-dma", 0, rx_dma); qdev_connect_gpio_out_named(dev, "tx-dma", 0, tx_dma); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); /* Create and plug in the sd card */ - carddev = qdev_create(qdev_get_child_bus(dev, "sd-bus"), TYPE_SD_CARD); + carddev = qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &err); if (err) { error_reportf_err(err, "failed to init SD card: "); return NULL; } - object_property_set_bool(OBJECT(carddev), true, "realized", &err); + qdev_realize_and_unref(carddev, qdev_get_child_bus(dev, "sd-bus"), &err); if (err) { error_reportf_err(err, "failed to init SD card: "); return NULL; diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c index 829797b597..f98a6f3ae1 100644 --- a/hw/sd/ssi-sd.c +++ b/hw/sd/ssi-sd.c @@ -252,7 +252,7 @@ static void ssi_sd_realize(SSISlave *d, Error **errp) /* Create and plug in the sd card */ /* FIXME use a qdev drive property instead of drive_get_next() */ dinfo = drive_get_next(IF_SD); - carddev = qdev_create(BUS(&s->sdbus), TYPE_SD_CARD); + carddev = qdev_new(TYPE_SD_CARD); if (dinfo) { qdev_prop_set_drive(carddev, "drive", blk_by_legacy_dinfo(dinfo), &err); if (err) { @@ -265,7 +265,7 @@ static void ssi_sd_realize(SSISlave *d, Error **errp) goto fail; } - object_property_set_bool(OBJECT(carddev), true, "realized", &err); + qdev_realize_and_unref(carddev, BUS(&s->sdbus), &err); if (err) { goto fail; } diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index 72bb5285cc..d9592280bc 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -257,9 +257,9 @@ static void r2d_init(MachineState *machine) s = sh7750_init(cpu, address_space_mem); irq = r2d_fpga_init(address_space_mem, 0x04000000, sh7750_irl(s)); - dev = qdev_create(NULL, "sh_pci"); + dev = qdev_new("sh_pci"); busdev = SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci")); sysbus_mmio_map(busdev, 0, P4ADDR(0x1e200000)); sysbus_mmio_map(busdev, 1, A7ADDR(0x1e200000)); @@ -268,23 +268,23 @@ static void r2d_init(MachineState *machine) sysbus_connect_irq(busdev, 2, irq[PCI_INTC]); sysbus_connect_irq(busdev, 3, irq[PCI_INTD]); - dev = qdev_create(NULL, "sysbus-sm501"); + dev = qdev_new("sysbus-sm501"); busdev = SYS_BUS_DEVICE(dev); qdev_prop_set_uint32(dev, "vram-size", SM501_VRAM_SIZE); qdev_prop_set_uint32(dev, "base", 0x10000000); qdev_prop_set_chr(dev, "chardev", serial_hd(2)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(busdev, 0, 0x10000000); sysbus_mmio_map(busdev, 1, 0x13e00000); sysbus_connect_irq(busdev, 0, irq[SM501]); /* onboard CF (True IDE mode, Master only). */ dinfo = drive_get(IF_IDE, 0, 0); - dev = qdev_create(NULL, "mmio-ide"); + dev = qdev_new("mmio-ide"); busdev = SYS_BUS_DEVICE(dev); sysbus_connect_irq(busdev, 0, irq[CF_IDE]); qdev_prop_set_uint32(dev, "shift", 1); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(busdev, 0, 0x14001000); sysbus_mmio_map(busdev, 1, 0x1400080c); mmio_ide_init_drives(dev, dinfo, NULL); diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 3facb8c2ae..52c0229574 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -228,12 +228,12 @@ static void leon3_generic_hw_init(MachineState *machine) GRLIB_AHB_SLAVE, GRLIB_AHBMEM_AREA); /* Allocate IRQ manager */ - dev = qdev_create(NULL, TYPE_GRLIB_IRQMP); + dev = qdev_new(TYPE_GRLIB_IRQMP); qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, env, "pil", 1); qdev_connect_gpio_out_named(dev, "grlib-irq", 0, qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); env->irq_manager = dev; env->qemu_irq_ack = leon3_irq_manager; @@ -322,11 +322,11 @@ static void leon3_generic_hw_init(MachineState *machine) } /* Allocate timers */ - dev = qdev_create(NULL, TYPE_GRLIB_GPTIMER); + dev = qdev_new(TYPE_GRLIB_GPTIMER); qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT); qdev_prop_set_uint32(dev, "frequency", CPU_CLK); qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET); for (i = 0; i < LEON3_TIMER_COUNT; i++) { @@ -340,9 +340,9 @@ static void leon3_generic_hw_init(MachineState *machine) /* Allocate uart */ if (serial_hd(0)) { - dev = qdev_create(NULL, TYPE_GRLIB_APB_UART); + dev = qdev_new(TYPE_GRLIB_APB_UART); qdev_prop_set_chr(dev, "chrdev", serial_hd(0)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irqs[LEON3_UART_IRQ]); grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF, diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 8dda3f7292..61356946e9 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -315,9 +315,9 @@ static void *iommu_init(hwaddr addr, uint32_t version, qemu_irq irq) DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, TYPE_SUN4M_IOMMU); + dev = qdev_new(TYPE_SUN4M_IOMMU); qdev_prop_set_uint32(dev, "version", version); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, irq); sysbus_mmio_map(s, 0, addr); @@ -335,8 +335,8 @@ static void *sparc32_dma_init(hwaddr dma_base, SysBusESPState *esp; SysBusPCNetState *lance; - dma = qdev_create(NULL, TYPE_SPARC32_DMA); - qdev_init_nofail(dma); + dma = qdev_new(TYPE_SPARC32_DMA); + qdev_realize_and_unref(dma, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, dma_base); espdma = SPARC32_ESPDMA_DEVICE(object_resolve_path_component( @@ -366,8 +366,8 @@ static DeviceState *slavio_intctl_init(hwaddr addr, SysBusDevice *s; unsigned int i, j; - dev = qdev_create(NULL, "slavio_intctl"); - qdev_init_nofail(dev); + dev = qdev_new("slavio_intctl"); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); @@ -394,9 +394,9 @@ static void slavio_timer_init_all(hwaddr addr, qemu_irq master_irq, SysBusDevice *s; unsigned int i; - dev = qdev_create(NULL, "slavio_timer"); + dev = qdev_new("slavio_timer"); qdev_prop_set_uint32(dev, "num_cpus", num_cpus); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, master_irq); sysbus_mmio_map(s, 0, addr + SYS_TIMER_OFFSET); @@ -432,8 +432,8 @@ static void slavio_misc_init(hwaddr base, DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, "slavio_misc"); - qdev_init_nofail(dev); + dev = qdev_new("slavio_misc"); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); if (base) { /* 8 bit registers */ @@ -469,9 +469,9 @@ static void ecc_init(hwaddr base, qemu_irq irq, uint32_t version) DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, "eccmemctl"); + dev = qdev_new("eccmemctl"); qdev_prop_set_uint32(dev, "version", version); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, irq); sysbus_mmio_map(s, 0, base); @@ -485,8 +485,8 @@ static void apc_init(hwaddr power_base, qemu_irq cpu_halt) DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, "apc"); - qdev_init_nofail(dev); + dev = qdev_new("apc"); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); /* Power management (APC) XXX: not a Slavio device */ sysbus_mmio_map(s, 0, power_base); @@ -499,12 +499,12 @@ static void tcx_init(hwaddr addr, qemu_irq irq, int vram_size, int width, DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, "SUNW,tcx"); + dev = qdev_new("SUNW,tcx"); qdev_prop_set_uint32(dev, "vram_size", vram_size); qdev_prop_set_uint16(dev, "width", width); qdev_prop_set_uint16(dev, "height", height); qdev_prop_set_uint16(dev, "depth", depth); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); /* 10/ROM : FCode ROM */ @@ -551,12 +551,12 @@ static void cg3_init(hwaddr addr, qemu_irq irq, int vram_size, int width, DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, "cgthree"); + dev = qdev_new("cgthree"); qdev_prop_set_uint32(dev, "vram-size", vram_size); qdev_prop_set_uint16(dev, "width", width); qdev_prop_set_uint16(dev, "height", height); qdev_prop_set_uint16(dev, "depth", depth); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); /* FCode ROM */ @@ -580,8 +580,8 @@ static void idreg_init(hwaddr addr) DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, TYPE_MACIO_ID_REGISTER); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_MACIO_ID_REGISTER); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, addr); @@ -646,8 +646,8 @@ static void afx_init(hwaddr addr) DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, TYPE_TCX_AFX); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_TCX_AFX); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, addr); @@ -707,8 +707,8 @@ static void prom_init(hwaddr addr, const char *bios_name) char *filename; int ret; - dev = qdev_create(NULL, TYPE_OPENPROM); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_OPENPROM); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, addr); @@ -876,9 +876,9 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, cpu_irqs[i] = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, MAX_PILS); /* Create and map RAM frontend */ - dev = qdev_create(NULL, "memory"); + dev = qdev_new("memory"); object_property_set_link(OBJECT(dev), ram_memdev, "memdev", &error_fatal); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0); /* models without ECC don't trap when missing ram is accessed */ @@ -977,7 +977,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, /* Slavio TTYA (base+4, Linux ttyS0) is the first QEMU serial device Slavio TTYB (base+0, Linux ttyS1) is the second QEMU serial device */ - dev = qdev_create(NULL, TYPE_ESCC); + dev = qdev_new(TYPE_ESCC); qdev_prop_set_uint32(dev, "disabled", !machine->enable_graphics); qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK); qdev_prop_set_uint32(dev, "it_shift", 1); @@ -985,13 +985,13 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, qdev_prop_set_chr(dev, "chrA", NULL); qdev_prop_set_uint32(dev, "chnBtype", escc_mouse); qdev_prop_set_uint32(dev, "chnAtype", escc_kbd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, slavio_irq[14]); sysbus_connect_irq(s, 1, slavio_irq[14]); sysbus_mmio_map(s, 0, hwdef->ms_kb_base); - dev = qdev_create(NULL, TYPE_ESCC); + dev = qdev_new(TYPE_ESCC); qdev_prop_set_uint32(dev, "disabled", 0); qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK); qdev_prop_set_uint32(dev, "it_shift", 1); @@ -999,7 +999,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, qdev_prop_set_chr(dev, "chrA", serial_hd(0)); qdev_prop_set_uint32(dev, "chnBtype", escc_serial); qdev_prop_set_uint32(dev, "chnAtype", escc_serial); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, slavio_irq[15]); @@ -1055,13 +1055,13 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ecc_init(hwdef->ecc_base, slavio_irq[28], hwdef->ecc_version); - dev = qdev_create(NULL, TYPE_FW_CFG_MEM); + dev = qdev_new(TYPE_FW_CFG_MEM); fw_cfg = FW_CFG(dev); qdev_prop_set_uint32(dev, "data_width", 1); qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(fw_cfg)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, CFG_ADDR); sysbus_mmio_map(s, 1, CFG_ADDR + 2); diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 3a757ec42e..ade9c22825 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -351,8 +351,8 @@ static void ebus_realize(PCIDevice *pci_dev, Error **errp) qdev_init_nofail(dev); /* Power */ - dev = qdev_create(NULL, TYPE_SUN4U_POWER); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_SUN4U_POWER); + qdev_realize_and_unref(dev, NULL, &error_fatal); sbd = SYS_BUS_DEVICE(dev); memory_region_add_subregion(pci_address_space_io(pci_dev), 0x7240, sysbus_mmio_get_region(sbd, 0)); @@ -426,8 +426,8 @@ static void prom_init(hwaddr addr, const char *bios_name) char *filename; int ret; - dev = qdev_create(NULL, TYPE_OPENPROM); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_OPENPROM); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, addr); @@ -520,12 +520,12 @@ static void ram_init(hwaddr addr, ram_addr_t RAM_size) RamDevice *d; /* allocate RAM */ - dev = qdev_create(NULL, TYPE_SUN4U_MEMORY); + dev = qdev_new(TYPE_SUN4U_MEMORY); s = SYS_BUS_DEVICE(dev); d = SUN4U_RAM(dev); d->size = RAM_size; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); } @@ -572,8 +572,8 @@ static void sun4uv_init(MemoryRegion *address_space_mem, cpu = sparc64_cpu_devinit(machine->cpu_type, hwdef->prom_addr); /* IOMMU */ - iommu = qdev_create(NULL, TYPE_SUN4U_IOMMU); - qdev_init_nofail(iommu); + iommu = qdev_new(TYPE_SUN4U_IOMMU); + qdev_realize_and_unref(iommu, NULL, &error_fatal); /* set up devices */ ram_init(0, machine->ram_size); @@ -581,12 +581,12 @@ static void sun4uv_init(MemoryRegion *address_space_mem, prom_init(hwdef->prom_addr, bios_name); /* Init sabre (PCI host bridge) */ - sabre = SABRE_DEVICE(qdev_create(NULL, TYPE_SABRE)); + sabre = SABRE_DEVICE(qdev_new(TYPE_SABRE)); qdev_prop_set_uint64(DEVICE(sabre), "special-base", PBM_SPECIAL_BASE); qdev_prop_set_uint64(DEVICE(sabre), "mem-base", PBM_MEM_BASE); object_property_set_link(OBJECT(sabre), OBJECT(iommu), "iommu", &error_abort); - qdev_init_nofail(DEVICE(sabre)); + qdev_realize_and_unref(DEVICE(sabre), NULL, &error_fatal); /* Wire up PCI interrupts to CPU */ for (i = 0; i < IVEC_MAX; i++) { @@ -689,10 +689,10 @@ static void sun4uv_init(MemoryRegion *address_space_mem, graphic_width, graphic_height, graphic_depth, (uint8_t *)&macaddr); - dev = qdev_create(NULL, TYPE_FW_CFG_IO); + dev = qdev_new(TYPE_FW_CFG_IO); qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(ebus), TYPE_FW_CFG, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); memory_region_add_subregion(pci_address_space_io(ebus), BIOS_CFG_IOPORT, &FW_CFG_IO(dev)->comb_iomem); diff --git a/hw/xen/xen-bus.c b/hw/xen/xen-bus.c index 32dd4461be..532f73661b 100644 --- a/hw/xen/xen-bus.c +++ b/hw/xen/xen-bus.c @@ -1387,9 +1387,9 @@ type_init(xen_register_types) void xen_bus_init(void) { - DeviceState *dev = qdev_create(NULL, TYPE_XEN_BRIDGE); + DeviceState *dev = qdev_new(TYPE_XEN_BRIDGE); BusState *bus = qbus_create(TYPE_XEN_BUS, dev, NULL); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); qbus_set_bus_hotplug_handler(bus, &error_abort); } diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c index f9d013811a..1c25373852 100644 --- a/hw/xen/xen-legacy-backend.c +++ b/hw/xen/xen-legacy-backend.c @@ -703,8 +703,8 @@ int xen_be_init(void) xengnttab_close(gnttabdev); } - xen_sysdev = qdev_create(NULL, TYPE_XENSYSDEV); - qdev_init_nofail(xen_sysdev); + xen_sysdev = qdev_new(TYPE_XENSYSDEV); + qdev_realize_and_unref(xen_sysdev, NULL, &error_fatal); xen_sysbus = qbus_create(TYPE_XENSYSBUS, xen_sysdev, "xen-sysbus"); qbus_set_bus_hotplug_handler(xen_sysbus, &error_abort); diff --git a/hw/xtensa/virt.c b/hw/xtensa/virt.c index b22dcf938a..4dbc1a1614 100644 --- a/hw/xtensa/virt.c +++ b/hw/xtensa/virt.c @@ -62,8 +62,8 @@ static void create_pcie(CPUXtensaState *env, int irq_base, hwaddr addr_base) qemu_irq *extints; int i; - dev = qdev_create(NULL, TYPE_GPEX_HOST); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_GPEX_HOST); + qdev_realize_and_unref(dev, NULL, &error_fatal); /* Map only the first size_ecam bytes of ECAM space. */ ecam_alias = g_new0(MemoryRegion, 1); diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 60ccc74f5f..eab5c8062e 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -148,9 +148,9 @@ static void xtfpga_net_init(MemoryRegion *address_space, SysBusDevice *s; MemoryRegion *ram; - dev = qdev_create(NULL, "open_eth"); + dev = qdev_new("open_eth"); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, irq); @@ -171,7 +171,7 @@ static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *address_space, DriveInfo *dinfo, int be) { SysBusDevice *s; - DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI01); + DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo), &error_abort); @@ -181,7 +181,7 @@ static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *address_space, qdev_prop_set_uint8(dev, "width", 2); qdev_prop_set_bit(dev, "big-endian", be); qdev_prop_set_string(dev, "name", "xtfpga.io.flash"); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); memory_region_add_subregion(address_space, board->flash->base, sysbus_mmio_get_region(s, 0)); From patchwork Fri May 29 13:44:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578749 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F40BA14F6 for ; Fri, 29 May 2020 13:46:43 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B9150207BC for ; Fri, 29 May 2020 13:46:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="IqN4CBIs" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B9150207BC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:43104 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefLO-0004pZ-SO for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:46:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49074) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKH-0002V2-Nl for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:33 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:55620 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKG-0006xT-2Q for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:33 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759931; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cKPq38yCdHwVScT5u0TsmpzVR8hdxdHPiVPa+1vHnvA=; b=IqN4CBIsQlzYMEWRjwc40taOZe7+L2kedVxnPfqoLjQ9F1y4Mm4VcPKlXuEvgsQCEqbv/z +Tz74pmtTOSiIhmlYUKX03tZKNnQoI2A82H106Xv3f5tChCHvTzHAoGpu/tPDcyuVQinSw DlNI2xAxQ5nRUTPmKfbHL1/EUEYE1FI= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-457-_fZVp2WuMO2igVGqSFe9-w-1; Fri, 29 May 2020 09:45:29 -0400 X-MC-Unique: _fZVp2WuMO2igVGqSFe9-w-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id BFD42835B41 for ; Fri, 29 May 2020 13:45:28 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 46C715D9EF for ; Fri, 29 May 2020 13:45:28 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id F20D011358C2; Fri, 29 May 2020 15:45:23 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 10/58] qdev: Convert uses of qdev_create() manually Date: Fri, 29 May 2020 15:44:35 +0200 Message-Id: <20200529134523.8477-11-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Same transformation as in the previous commit. Manual, because convincing Coccinelle to transform these cases is somewhere between not worthwhile and infeasible (at least for me). Signed-off-by: Markus Armbruster --- hw/arm/highbank.c | 26 +++++++++++++------------- hw/arm/sbsa-ref.c | 4 ++-- hw/arm/virt.c | 4 ++-- hw/block/xen-block.c | 4 ++-- hw/char/serial.c | 4 ++-- hw/display/ati.c | 5 ++--- hw/display/sm501.c | 5 ++--- hw/display/xlnx_dp.c | 5 +++-- hw/i386/pc.c | 4 ++-- hw/i386/pc_sysfw.c | 4 ++-- hw/pci-bridge/pci_expander_bridge.c | 4 ++-- hw/ppc/pnv.c | 4 ++-- hw/riscv/virt.c | 4 ++-- hw/s390x/s390-pci-bus.c | 4 ++-- hw/sparc/leon3.c | 8 ++++---- hw/usb/bus.c | 8 ++++---- 16 files changed, 48 insertions(+), 49 deletions(-) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index ac9de9411e..1bed540011 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -311,20 +311,20 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) switch (machine_id) { case CALXEDA_HIGHBANK: - dev = qdev_create(NULL, "l2x0"); - qdev_init_nofail(dev); + dev = qdev_new("l2x0"); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, 0xfff12000); - dev = qdev_create(NULL, TYPE_A9MPCORE_PRIV); + dev = qdev_new(TYPE_A9MPCORE_PRIV); break; case CALXEDA_MIDWAY: - dev = qdev_create(NULL, TYPE_A15MPCORE_PRIV); + dev = qdev_new(TYPE_A15MPCORE_PRIV); break; } qdev_prop_set_uint32(dev, "num-cpu", smp_cpus); qdev_prop_set_uint32(dev, "num-irq", NIRQ_GIC); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, MPCORE_PERIPHBASE); for (n = 0; n < smp_cpus; n++) { @@ -338,17 +338,17 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) pic[n] = qdev_get_gpio_in(dev, n); } - dev = qdev_create(NULL, "sp804"); + dev = qdev_new("sp804"); qdev_prop_set_uint32(dev, "freq0", 150000000); qdev_prop_set_uint32(dev, "freq1", 150000000); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, 0xfff34000); sysbus_connect_irq(busdev, 0, pic[18]); pl011_create(0xfff36000, pic[20], serial_hd(0)); - dev = qdev_create(NULL, TYPE_HIGHBANK_REGISTERS); - qdev_init_nofail(dev); + dev = qdev_new(TYPE_HIGHBANK_REGISTERS); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, 0xfff3c000); @@ -363,18 +363,18 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) if (nd_table[0].used) { qemu_check_nic_model(&nd_table[0], "xgmac"); - dev = qdev_create(NULL, "xgmac"); + dev = qdev_new("xgmac"); qdev_set_nic_properties(dev, &nd_table[0]); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xfff50000); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[77]); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, pic[78]); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, pic[79]); qemu_check_nic_model(&nd_table[1], "xgmac"); - dev = qdev_create(NULL, "xgmac"); + dev = qdev_new("xgmac"); qdev_set_nic_properties(dev, &nd_table[1]); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xfff51000); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[80]); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, pic[81]); diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index d68c5d87af..fe24567333 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -211,7 +211,7 @@ static PFlashCFI01 *sbsa_flash_create1(SBSAMachineState *sms, * Create a single flash device. We use the same parameters as * the flash devices on the Versatile Express board. */ - DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI01); + DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); qdev_prop_set_uint64(dev, "sector-length", SBSA_FLASH_SECTOR_SIZE); qdev_prop_set_uint8(dev, "width", 4); @@ -243,7 +243,7 @@ static void sbsa_flash_map1(PFlashCFI01 *flash, assert(QEMU_IS_ALIGNED(size, SBSA_FLASH_SECTOR_SIZE)); assert(size / SBSA_FLASH_SECTOR_SIZE <= UINT32_MAX); qdev_prop_set_uint32(dev, "num-blocks", size / SBSA_FLASH_SECTOR_SIZE); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 154cd24731..ca151435ae 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -948,7 +948,7 @@ static PFlashCFI01 *virt_flash_create1(VirtMachineState *vms, * Create a single flash device. We use the same parameters as * the flash devices on the Versatile Express board. */ - DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI01); + DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE); qdev_prop_set_uint8(dev, "width", 4); @@ -980,7 +980,7 @@ static void virt_flash_map1(PFlashCFI01 *flash, assert(QEMU_IS_ALIGNED(size, VIRT_FLASH_SECTOR_SIZE)); assert(size / VIRT_FLASH_SECTOR_SIZE <= UINT32_MAX); qdev_prop_set_uint32(dev, "num-blocks", size / VIRT_FLASH_SECTOR_SIZE); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), diff --git a/hw/block/xen-block.c b/hw/block/xen-block.c index 570489d6d9..2827c90ac7 100644 --- a/hw/block/xen-block.c +++ b/hw/block/xen-block.c @@ -937,7 +937,7 @@ static void xen_block_device_create(XenBackendInstance *backend, goto fail; } - xendev = XEN_DEVICE(qdev_create(BUS(xenbus), type)); + xendev = XEN_DEVICE(qdev_new(type)); blockdev = XEN_BLOCK_DEVICE(xendev); object_property_set_str(OBJECT(xendev), vdev, "vdev", &local_err); @@ -965,7 +965,7 @@ static void xen_block_device_create(XenBackendInstance *backend, blockdev->iothread = iothread; blockdev->drive = drive; - object_property_set_bool(OBJECT(xendev), true, "realized", &local_err); + qdev_realize_and_unref(DEVICE(xendev), BUS(xenbus), &local_err); if (local_err) { error_propagate_prepend(errp, local_err, "realization of device %s failed: ", diff --git a/hw/char/serial.c b/hw/char/serial.c index 7d74694587..a0cab38fb0 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1127,7 +1127,7 @@ SerialMM *serial_mm_init(MemoryRegion *address_space, qemu_irq irq, int baudbase, Chardev *chr, enum device_endian end) { - SerialMM *smm = SERIAL_MM(qdev_create(NULL, TYPE_SERIAL_MM)); + SerialMM *smm = SERIAL_MM(qdev_new(TYPE_SERIAL_MM)); MemoryRegion *mr; qdev_prop_set_uint8(DEVICE(smm), "regshift", regshift); @@ -1135,7 +1135,7 @@ SerialMM *serial_mm_init(MemoryRegion *address_space, qdev_prop_set_chr(DEVICE(smm), "chardev", chr); qdev_set_legacy_instance_id(DEVICE(smm), base, 2); qdev_prop_set_uint8(DEVICE(smm), "endianness", end); - qdev_init_nofail(DEVICE(smm)); + qdev_realize_and_unref(DEVICE(smm), NULL, &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(smm), 0, irq); mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(smm), 0); diff --git a/hw/display/ati.c b/hw/display/ati.c index 5c71e5f295..a329e90665 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -927,10 +927,9 @@ static void ati_vga_realize(PCIDevice *dev, Error **errp) /* ddc, edid */ I2CBus *i2cbus = i2c_init_bus(DEVICE(s), "ati-vga.ddc"); bitbang_i2c_init(&s->bbi2c, i2cbus); - I2CSlave *i2cddc = I2C_SLAVE(qdev_create(BUS(i2cbus), TYPE_I2CDDC)); + I2CSlave *i2cddc = I2C_SLAVE(qdev_new(TYPE_I2CDDC)); i2c_set_slave_address(i2cddc, 0x50); - object_property_set_bool(OBJECT(i2cddc), true, "realized", - &error_abort); + qdev_realize_and_unref(DEVICE(i2cddc), BUS(i2cbus), &error_abort); /* mmio register space */ memory_region_init_io(&s->mm, OBJECT(s), &ati_mm_ops, s, diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 0124223140..0eb259fb98 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1814,10 +1814,9 @@ static void sm501_init(SM501State *s, DeviceState *dev, /* i2c */ s->i2c_bus = i2c_init_bus(dev, "sm501.i2c"); /* ddc */ - I2CDDCState *ddc = I2CDDC(qdev_create(BUS(s->i2c_bus), TYPE_I2CDDC)); + I2CDDCState *ddc = I2CDDC(qdev_new(TYPE_I2CDDC)); i2c_set_slave_address(I2C_SLAVE(ddc), 0x50); - object_property_set_bool(OBJECT(ddc), true, "realized", - &error_abort); + qdev_realize_and_unref(DEVICE(ddc), BUS(s->i2c_bus), &error_abort); /* mmio */ memory_region_init(&s->mmio_region, OBJECT(dev), "sm501.mmio", MMIO_SIZE); diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index bdc229a51e..dd6aa172f3 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -1250,7 +1250,7 @@ static void xlnx_dp_init(Object *obj) s->dpcd = DPCD(aux_create_slave(s->aux_bus, "dpcd")); object_property_add_child(OBJECT(s), "dpcd", OBJECT(s->dpcd)); - s->edid = I2CDDC(qdev_create(BUS(aux_get_i2c_bus(s->aux_bus)), "i2c-ddc")); + s->edid = I2CDDC(qdev_new("i2c-ddc")); i2c_set_slave_address(I2C_SLAVE(s->edid), 0x50); object_property_add_child(OBJECT(s), "edid", OBJECT(s->edid)); @@ -1269,7 +1269,8 @@ static void xlnx_dp_realize(DeviceState *dev, Error **errp) qdev_init_nofail(DEVICE(s->dpcd)); aux_map_slave(AUX_SLAVE(s->dpcd), 0x0000); - qdev_init_nofail(DEVICE(s->edid)); + qdev_realize_and_unref(DEVICE(s->edid), BUS(aux_get_i2c_bus(s->aux_bus)), + &error_fatal); s->console = graphic_console_init(dev, 0, &xlnx_dp_gfx_ops, s); surface = qemu_console_surface(s->console); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index f9d51479b1..b549d0bbfc 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1204,7 +1204,7 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, * when the HPET wants to take over. Thus we have to disable the latter. */ if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) { - hpet = qdev_try_create(NULL, TYPE_HPET); + hpet = qdev_try_new(TYPE_HPET); if (hpet) { /* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7 * and earlier, use IRQ2 for compat. Otherwise, use IRQ16~23, @@ -1215,7 +1215,7 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, if (!compat) { qdev_prop_set_uint32(hpet, HPET_INTCAP, hpet_irqs); } - qdev_init_nofail(hpet); + qdev_realize_and_unref(hpet, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(hpet), 0, HPET_BASE); for (i = 0; i < GSI_NUM_PINS; i++) { diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index b8d8ef59eb..2e414d1934 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -85,7 +85,7 @@ static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms, const char *name, const char *alias_prop_name) { - DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI01); + DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); qdev_prop_set_uint64(dev, "sector-length", FLASH_SECTOR_SIZE); qdev_prop_set_uint8(dev, "width", 1); @@ -187,7 +187,7 @@ static void pc_system_flash_map(PCMachineState *pcms, total_size += size; qdev_prop_set_uint32(DEVICE(system_flash), "num-blocks", size / FLASH_SECTOR_SIZE); - qdev_init_nofail(DEVICE(system_flash)); + qdev_realize_and_unref(DEVICE(system_flash), NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(system_flash), 0, 0x100000000ULL - total_size); diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c index 5da0d21061..3a395ab2f0 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -236,7 +236,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp) bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS); } else { bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS); - bds = qdev_create(BUS(bus), "pci-bridge"); + bds = qdev_new("pci-bridge"); bds->id = dev_name; qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr); qdev_prop_set_bit(bds, PCI_BRIDGE_DEV_PROP_SHPC, false); @@ -257,7 +257,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp) qdev_realize_and_unref(ds, NULL, &error_fatal); if (bds) { - qdev_init_nofail(bds); + qdev_realize_and_unref(bds, &bus->qbus, &error_fatal); } pci_word_test_and_set_mask(dev->config + PCI_STATUS, diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index e3b6f0b884..8562af3fe0 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -818,7 +818,7 @@ static void pnv_init(MachineState *machine) pnv->chips = g_new0(PnvChip *, pnv->num_chips); for (i = 0; i < pnv->num_chips; i++) { char chip_name[32]; - Object *chip = OBJECT(qdev_create(NULL, chip_typename)); + Object *chip = OBJECT(qdev_new(chip_typename)); pnv->chips[i] = PNV_CHIP(chip); @@ -850,7 +850,7 @@ static void pnv_init(MachineState *machine) object_property_set_link(chip, OBJECT(pnv), "xive-fabric", &error_abort); } - object_property_set_bool(chip, true, "realized", &error_fatal); + qdev_realize_and_unref(DEVICE(chip), NULL, &error_fatal); } g_free(chip_typename); diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 1b1a0019c8..1ce88b7031 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -80,7 +80,7 @@ static PFlashCFI01 *virt_flash_create1(RISCVVirtState *s, * Create a single flash device. We use the same parameters as * the flash devices on the ARM virt board. */ - DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI01); + DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01); qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE); qdev_prop_set_uint8(dev, "width", 4); @@ -114,7 +114,7 @@ static void virt_flash_map1(PFlashCFI01 *flash, assert(QEMU_IS_ALIGNED(size, VIRT_FLASH_SECTOR_SIZE)); assert(size / VIRT_FLASH_SECTOR_SIZE <= UINT32_MAX); qdev_prop_set_uint32(dev, "num-blocks", size / VIRT_FLASH_SECTOR_SIZE); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 7a4bfb7383..a13978bb37 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -824,7 +824,7 @@ static S390PCIBusDevice *s390_pci_device_new(S390pciState *s, Error *local_err = NULL; DeviceState *dev; - dev = qdev_try_create(BUS(s->bus), TYPE_S390_PCI_DEVICE); + dev = qdev_try_new(TYPE_S390_PCI_DEVICE); if (!dev) { error_setg(errp, "zPCI device could not be created"); return NULL; @@ -837,7 +837,7 @@ static S390PCIBusDevice *s390_pci_device_new(S390pciState *s, "zPCI device could not be created: "); return NULL; } - object_property_set_bool(OBJECT(dev), true, "realized", &local_err); + qdev_realize_and_unref(dev, BUS(s->bus), &local_err); if (local_err) { object_unparent(OBJECT(dev)); error_propagate_prepend(errp, local_err, diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 52c0229574..b1d8f25dcc 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -213,15 +213,15 @@ static void leon3_generic_hw_init(MachineState *machine) reset_info->sp = LEON3_RAM_OFFSET + ram_size; qemu_register_reset(main_cpu_reset, reset_info); - ahb_pnp = GRLIB_AHB_PNP(qdev_create(NULL, TYPE_GRLIB_AHB_PNP)); - object_property_set_bool(OBJECT(ahb_pnp), true, "realized", &error_fatal); + ahb_pnp = GRLIB_AHB_PNP(qdev_new(TYPE_GRLIB_AHB_PNP)); + qdev_realize_and_unref(DEVICE(ahb_pnp), NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(ahb_pnp), 0, LEON3_AHB_PNP_OFFSET); grlib_ahb_pnp_add_entry(ahb_pnp, 0, 0, GRLIB_VENDOR_GAISLER, GRLIB_LEON3_DEV, GRLIB_AHB_MASTER, GRLIB_CPU_AREA); - apb_pnp = GRLIB_APB_PNP(qdev_create(NULL, TYPE_GRLIB_APB_PNP)); - object_property_set_bool(OBJECT(apb_pnp), true, "realized", &error_fatal); + apb_pnp = GRLIB_APB_PNP(qdev_new(TYPE_GRLIB_APB_PNP)); + qdev_realize_and_unref(DEVICE(apb_pnp), NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(apb_pnp), 0, LEON3_APB_PNP_OFFSET); grlib_ahb_pnp_add_entry(ahb_pnp, LEON3_APB_PNP_OFFSET, 0xFFF, GRLIB_VENDOR_GAISLER, GRLIB_APBMST_DEV, diff --git a/hw/usb/bus.c b/hw/usb/bus.c index fa07df98a2..d28eff1b5c 100644 --- a/hw/usb/bus.c +++ b/hw/usb/bus.c @@ -326,21 +326,21 @@ static USBDevice *usb_try_create_simple(USBBus *bus, const char *name, Error **errp) { Error *err = NULL; - USBDevice *dev; + DeviceState *dev; - dev = USB_DEVICE(qdev_try_create(&bus->qbus, name)); + dev = qdev_try_new(name); if (!dev) { error_setg(errp, "Failed to create USB device '%s'", name); return NULL; } - object_property_set_bool(OBJECT(dev), true, "realized", &err); + qdev_realize_and_unref(dev, &bus->qbus, &err); if (err) { error_propagate_prepend(errp, err, "Failed to initialize USB device '%s': ", name); return NULL; } - return dev; + return USB_DEVICE(dev); } USBDevice *usb_create_simple(USBBus *bus, const char *name) From patchwork Fri May 29 13:44:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578849 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F0F0814C0 for ; Fri, 29 May 2020 14:03:02 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B73D720707 for ; Fri, 29 May 2020 14:03:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="It36WLNm" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B73D720707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:58718 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefbB-0004Mn-Pa for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:03:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49286) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKY-0003Au-KS for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:50 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:27247 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00072v-9i for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:50 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759934; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=tfDFY5qkfzdas+fcH9KeyOq5/1f46QAvSQQm0Mn20tU=; b=It36WLNmpQberakWi3cY9d5WY6R4zrBbbQvj4ANE34HmmuGypz9VayiR2MQvE+ufV17Jd/ +RfYvN9vaTImxOnIXmAYStUkmvpgUMr4+nCaI8WJ1bsSams47BCCp9sgpo9x81tpPVRnkz XEMklTRnCPiIHoKwyvsJT+OEHfo5IJI= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-494--lqlIQ28PjS5OEeeStEWCw-1; Fri, 29 May 2020 09:45:31 -0400 X-MC-Unique: -lqlIQ28PjS5OEeeStEWCw-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 491568005AA for ; Fri, 29 May 2020 13:45:30 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9FEFC19C79 for ; Fri, 29 May 2020 13:45:29 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 0184911358C3; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 11/58] qdev: Convert uses of qdev_set_parent_bus() with Coccinelle Date: Fri, 29 May 2020 15:44:36 +0200 Message-Id: <20200529134523.8477-12-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" In addition to the qdev_create() patterns converted so far, we have a qdev_set_parent_bus() pattern. Mostly when we embed a device in a parent device rather than allocating it on the heap. This pattern also puts devices in the dangerous "no QOM parent, but plugged into bus" state I explained in recent commit "qdev: New qdev_new(), qdev_realize(), etc." Apply same solution: convert to qdev_realize(). Coccinelle script: @@ expression dev, bus, errp; symbol true; @@ - qdev_set_parent_bus(DEVICE(dev), bus); ... - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize(DEVICE(dev), bus, errp); @ depends on !(file in "qdev-monitor.c") && !(file in "hw/core/qdev.c")@ expression dev, bus, errp; symbol true; @@ - qdev_set_parent_bus(dev, bus); ... - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize(dev, bus, errp); @@ expression dev, bus; symbol true; @@ - qdev_set_parent_bus(DEVICE(dev), bus); ... - qdev_init_nofail(DEVICE(dev)); + qdev_realize(DEVICE(dev), bus, &error_fatal); Unconverted uses of qdev_set_parent_bus() remain. They'll be converted later in this series. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- hw/display/virtio-gpu-pci.c | 3 +-- hw/display/virtio-vga.c | 3 +-- hw/i386/amd_iommu.c | 3 +-- hw/isa/piix4.c | 3 +-- hw/misc/macio/macio.c | 7 ++----- hw/pci-host/designware.c | 3 +-- hw/pci-host/gpex.c | 3 +-- hw/pci-host/pnv_phb3.c | 3 +-- hw/pci-host/pnv_phb4.c | 3 +-- hw/pci-host/q35.c | 3 +-- hw/pci-host/versatile.c | 3 +-- hw/pci-host/xilinx-pcie.c | 3 +-- hw/s390x/vhost-vsock-ccw.c | 3 +-- hw/s390x/virtio-ccw-9p.c | 3 +-- hw/s390x/virtio-ccw-balloon.c | 3 +-- hw/s390x/virtio-ccw-blk.c | 3 +-- hw/s390x/virtio-ccw-crypto.c | 3 +-- hw/s390x/virtio-ccw-gpu.c | 3 +-- hw/s390x/virtio-ccw-input.c | 3 +-- hw/s390x/virtio-ccw-net.c | 3 +-- hw/s390x/virtio-ccw-rng.c | 3 +-- hw/s390x/virtio-ccw-scsi.c | 6 ++---- hw/s390x/virtio-ccw-serial.c | 3 +-- hw/virtio/vhost-scsi-pci.c | 3 +-- hw/virtio/vhost-user-blk-pci.c | 3 +-- hw/virtio/vhost-user-fs-pci.c | 3 +-- hw/virtio/vhost-user-scsi-pci.c | 3 +-- hw/virtio/vhost-vsock-pci.c | 3 +-- hw/virtio/virtio-9p-pci.c | 3 +-- hw/virtio/virtio-balloon-pci.c | 3 +-- hw/virtio/virtio-blk-pci.c | 3 +-- hw/virtio/virtio-crypto-pci.c | 3 +-- hw/virtio/virtio-input-pci.c | 3 +-- hw/virtio/virtio-iommu-pci.c | 3 +-- hw/virtio/virtio-net-pci.c | 3 +-- hw/virtio/virtio-pmem-pci.c | 3 +-- hw/virtio/virtio-rng-pci.c | 3 +-- hw/virtio/virtio-scsi-pci.c | 3 +-- hw/virtio/virtio-serial-pci.c | 3 +-- hw/xen/xen-legacy-backend.c | 3 +-- 40 files changed, 42 insertions(+), 85 deletions(-) diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c index 3d152ff5c8..b532fe8b5f 100644 --- a/hw/display/virtio-gpu-pci.c +++ b/hw/display/virtio-gpu-pci.c @@ -33,9 +33,8 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) int i; Error *local_error = NULL; - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); virtio_pci_force_virtio_1(vpci_dev); - object_property_set_bool(OBJECT(vdev), true, "realized", &local_error); + qdev_realize(vdev, BUS(&vpci_dev->bus), &local_error); if (local_error) { error_propagate(errp, local_error); diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index 95757a6619..68a062ece6 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -137,9 +137,8 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) vpci_dev->common.offset = offset; /* init virtio bits */ - qdev_set_parent_bus(DEVICE(g), BUS(&vpci_dev->bus)); virtio_pci_force_virtio_1(vpci_dev); - object_property_set_bool(OBJECT(g), true, "realized", &err); + qdev_realize(DEVICE(g), BUS(&vpci_dev->bus), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index fd75cae024..021fef0f45 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1548,8 +1548,7 @@ static void amdvi_realize(DeviceState *dev, Error **errp) /* This device should take care of IOMMU PCI properties */ x86_iommu->type = TYPE_AMD; - qdev_set_parent_bus(DEVICE(&s->pci), &bus->qbus); - object_property_set_bool(OBJECT(&s->pci), true, "realized", errp); + qdev_realize(DEVICE(&s->pci), &bus->qbus, errp); ret = pci_add_capability(&s->pci.dev, AMDVI_CAPAB_ID_SEC, 0, AMDVI_CAPAB_SIZE, errp); if (ret < 0) { diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 9a10fb9b3c..f634bcb2d1 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -182,9 +182,8 @@ static void piix4_realize(PCIDevice *dev, Error **errp) i8257_dma_init(isa_bus, 0); /* RTC */ - qdev_set_parent_bus(DEVICE(&s->rtc), BUS(isa_bus)); qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000); - object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err); + qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index 53a9fd5696..216bdc69c0 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -356,9 +356,7 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp) object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio", &error_abort); qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb); - qdev_set_parent_bus(DEVICE(&s->pmu), BUS(&s->macio_bus)); - - object_property_set_bool(OBJECT(&s->pmu), true, "realized", &err); + qdev_realize(DEVICE(&s->pmu), BUS(&s->macio_bus), &err); if (err) { error_propagate(errp, err); return; @@ -374,11 +372,10 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp) /* CUDA */ object_initialize_child(OBJECT(s), "cuda", &s->cuda, sizeof(s->cuda), TYPE_CUDA, &error_abort, NULL); - qdev_set_parent_bus(DEVICE(&s->cuda), BUS(&s->macio_bus)); qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", s->frequency); - object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err); + qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index dd245516dd..2e97d6b17f 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -688,8 +688,7 @@ static void designware_pcie_host_realize(DeviceState *dev, Error **errp) "pcie-bus-address-space"); pci_setup_iommu(pci->bus, designware_pcie_host_set_iommu, s); - qdev_set_parent_bus(DEVICE(&s->root), BUS(pci->bus)); - qdev_init_nofail(DEVICE(&s->root)); + qdev_realize(DEVICE(&s->root), BUS(pci->bus), &error_fatal); } static const VMStateDescription vmstate_designware_pcie_host = { diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c index 0ca604dc62..3dfb3bf599 100644 --- a/hw/pci-host/gpex.c +++ b/hw/pci-host/gpex.c @@ -98,9 +98,8 @@ static void gpex_host_realize(DeviceState *dev, Error **errp) pci_swizzle_map_irq_fn, s, &s->io_mmio, &s->io_ioport, 0, 4, TYPE_PCIE_BUS); - qdev_set_parent_bus(DEVICE(&s->gpex_root), BUS(pci->bus)); pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq); - qdev_init_nofail(DEVICE(&s->gpex_root)); + qdev_realize(DEVICE(&s->gpex_root), BUS(pci->bus), &error_fatal); } static const char *gpex_host_root_bus_path(PCIHostState *host_bridge, diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 74618fadf0..8dcfe4a2fd 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -1064,8 +1064,7 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) /* Add a single Root port */ qdev_prop_set_uint8(DEVICE(&phb->root), "chassis", phb->chip_id); qdev_prop_set_uint16(DEVICE(&phb->root), "slot", phb->phb_id); - qdev_set_parent_bus(DEVICE(&phb->root), BUS(pci->bus)); - qdev_init_nofail(DEVICE(&phb->root)); + qdev_realize(DEVICE(&phb->root), BUS(pci->bus), &error_fatal); } void pnv_phb3_update_regions(PnvPHB3 *phb) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 23cf093928..e30ae9ad5b 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1210,8 +1210,7 @@ static void pnv_phb4_realize(DeviceState *dev, Error **errp) /* Add a single Root port */ qdev_prop_set_uint8(DEVICE(&phb->root), "chassis", phb->chip_id); qdev_prop_set_uint16(DEVICE(&phb->root), "slot", phb->phb_id); - qdev_set_parent_bus(DEVICE(&phb->root), BUS(pci->bus)); - qdev_init_nofail(DEVICE(&phb->root)); + qdev_realize(DEVICE(&phb->root), BUS(pci->bus), &error_fatal); /* Setup XIVE Source */ if (phb->big_phb) { diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 352aeecfa7..8d526457f4 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -64,8 +64,7 @@ static void q35_host_realize(DeviceState *dev, Error **errp) s->mch.address_space_io, 0, TYPE_PCIE_BUS); PC_MACHINE(qdev_get_machine())->bus = pci->bus; - qdev_set_parent_bus(DEVICE(&s->mch), BUS(pci->bus)); - qdev_init_nofail(DEVICE(&s->mch)); + qdev_realize(DEVICE(&s->mch), BUS(pci->bus), &error_fatal); } static const char *q35_host_root_bus_path(PCIHostState *host_bridge, diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index 28817dbeec..753a685d9f 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -408,7 +408,6 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp) h->bus = &s->pci_bus; object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_VERSATILE_PCI_HOST); - qdev_set_parent_bus(DEVICE(&s->pci_dev), BUS(&s->pci_bus)); for (i = 0; i < 4; i++) { sysbus_init_irq(sbd, &s->irq[i]); @@ -458,7 +457,7 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp) } /* TODO Remove once realize propagates to child devices. */ - object_property_set_bool(OBJECT(&s->pci_dev), true, "realized", errp); + qdev_realize(DEVICE(&s->pci_dev), BUS(&s->pci_bus), errp); } static void versatile_pci_host_realize(PCIDevice *d, Error **errp) diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c index e06f2b59cf..e4fc8abb6a 100644 --- a/hw/pci-host/xilinx-pcie.c +++ b/hw/pci-host/xilinx-pcie.c @@ -137,8 +137,7 @@ static void xilinx_pcie_host_realize(DeviceState *dev, Error **errp) pci_swizzle_map_irq_fn, s, &s->mmio, &s->io, 0, 4, TYPE_PCIE_BUS); - qdev_set_parent_bus(DEVICE(&s->root), BUS(pci->bus)); - qdev_init_nofail(DEVICE(&s->root)); + qdev_realize(DEVICE(&s->root), BUS(pci->bus), &error_fatal); } static const char *xilinx_pcie_host_root_bus_path(PCIHostState *host_bridge, diff --git a/hw/s390x/vhost-vsock-ccw.c b/hw/s390x/vhost-vsock-ccw.c index 12dee15e11..0822ecca89 100644 --- a/hw/s390x/vhost-vsock-ccw.c +++ b/hw/s390x/vhost-vsock-ccw.c @@ -24,8 +24,7 @@ static void vhost_vsock_ccw_realize(VirtioCcwDevice *ccw_dev, Error **errp) VHostVSockCCWState *dev = VHOST_VSOCK_CCW(ccw_dev); DeviceState *vdev = DEVICE(&dev->vdev); - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } static void vhost_vsock_ccw_class_init(ObjectClass *klass, void *data) diff --git a/hw/s390x/virtio-ccw-9p.c b/hw/s390x/virtio-ccw-9p.c index 08e1d5d416..88c8884fc5 100644 --- a/hw/s390x/virtio-ccw-9p.c +++ b/hw/s390x/virtio-ccw-9p.c @@ -21,8 +21,7 @@ static void virtio_ccw_9p_realize(VirtioCcwDevice *ccw_dev, Error **errp) V9fsCCWState *dev = VIRTIO_9P_CCW(ccw_dev); DeviceState *vdev = DEVICE(&dev->vdev); - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } static void virtio_ccw_9p_instance_init(Object *obj) diff --git a/hw/s390x/virtio-ccw-balloon.c b/hw/s390x/virtio-ccw-balloon.c index ef3308ecab..4c7631a433 100644 --- a/hw/s390x/virtio-ccw-balloon.c +++ b/hw/s390x/virtio-ccw-balloon.c @@ -21,8 +21,7 @@ static void virtio_ccw_balloon_realize(VirtioCcwDevice *ccw_dev, Error **errp) VirtIOBalloonCcw *dev = VIRTIO_BALLOON_CCW(ccw_dev); DeviceState *vdev = DEVICE(&dev->vdev); - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } static void virtio_ccw_balloon_instance_init(Object *obj) diff --git a/hw/s390x/virtio-ccw-blk.c b/hw/s390x/virtio-ccw-blk.c index 7287932b7e..2294ce1ce4 100644 --- a/hw/s390x/virtio-ccw-blk.c +++ b/hw/s390x/virtio-ccw-blk.c @@ -21,8 +21,7 @@ static void virtio_ccw_blk_realize(VirtioCcwDevice *ccw_dev, Error **errp) VirtIOBlkCcw *dev = VIRTIO_BLK_CCW(ccw_dev); DeviceState *vdev = DEVICE(&dev->vdev); - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } static void virtio_ccw_blk_instance_init(Object *obj) diff --git a/hw/s390x/virtio-ccw-crypto.c b/hw/s390x/virtio-ccw-crypto.c index 1a2690cf9e..ca6753bff3 100644 --- a/hw/s390x/virtio-ccw-crypto.c +++ b/hw/s390x/virtio-ccw-crypto.c @@ -21,8 +21,7 @@ static void virtio_ccw_crypto_realize(VirtioCcwDevice *ccw_dev, Error **errp) DeviceState *vdev = DEVICE(&dev->vdev); Error *err = NULL; - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", &err); + qdev_realize(vdev, BUS(&ccw_dev->bus), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/s390x/virtio-ccw-gpu.c b/hw/s390x/virtio-ccw-gpu.c index f69e3ff5a0..c301e2586b 100644 --- a/hw/s390x/virtio-ccw-gpu.c +++ b/hw/s390x/virtio-ccw-gpu.c @@ -20,8 +20,7 @@ static void virtio_ccw_gpu_realize(VirtioCcwDevice *ccw_dev, Error **errp) VirtIOGPUCcw *dev = VIRTIO_GPU_CCW(ccw_dev); DeviceState *vdev = DEVICE(&dev->vdev); - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } static void virtio_ccw_gpu_instance_init(Object *obj) diff --git a/hw/s390x/virtio-ccw-input.c b/hw/s390x/virtio-ccw-input.c index b257dfd467..5601e25dee 100644 --- a/hw/s390x/virtio-ccw-input.c +++ b/hw/s390x/virtio-ccw-input.c @@ -20,8 +20,7 @@ static void virtio_ccw_input_realize(VirtioCcwDevice *ccw_dev, Error **errp) VirtIOInputCcw *dev = VIRTIO_INPUT_CCW(ccw_dev); DeviceState *vdev = DEVICE(&dev->vdev); - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } static Property virtio_ccw_input_properties[] = { diff --git a/hw/s390x/virtio-ccw-net.c b/hw/s390x/virtio-ccw-net.c index 26c4d873bf..3860d4e6ea 100644 --- a/hw/s390x/virtio-ccw-net.c +++ b/hw/s390x/virtio-ccw-net.c @@ -24,8 +24,7 @@ static void virtio_ccw_net_realize(VirtioCcwDevice *ccw_dev, Error **errp) virtio_net_set_netclient_name(&dev->vdev, qdev->id, object_get_typename(OBJECT(qdev))); - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } static void virtio_ccw_net_instance_init(Object *obj) diff --git a/hw/s390x/virtio-ccw-rng.c b/hw/s390x/virtio-ccw-rng.c index d575e30cc6..4077160f49 100644 --- a/hw/s390x/virtio-ccw-rng.c +++ b/hw/s390x/virtio-ccw-rng.c @@ -22,8 +22,7 @@ static void virtio_ccw_rng_realize(VirtioCcwDevice *ccw_dev, Error **errp) DeviceState *vdev = DEVICE(&dev->vdev); Error *err = NULL; - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", &err); + qdev_realize(vdev, BUS(&ccw_dev->bus), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/s390x/virtio-ccw-scsi.c b/hw/s390x/virtio-ccw-scsi.c index 3cb3ad669d..6e4beef700 100644 --- a/hw/s390x/virtio-ccw-scsi.c +++ b/hw/s390x/virtio-ccw-scsi.c @@ -33,8 +33,7 @@ static void virtio_ccw_scsi_realize(VirtioCcwDevice *ccw_dev, Error **errp) g_free(bus_name); } - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } static void virtio_ccw_scsi_instance_init(Object *obj) @@ -78,8 +77,7 @@ static void vhost_ccw_scsi_realize(VirtioCcwDevice *ccw_dev, Error **errp) VHostSCSICcw *dev = VHOST_SCSI_CCW(ccw_dev); DeviceState *vdev = DEVICE(&dev->vdev); - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } static void vhost_ccw_scsi_instance_init(Object *obj) diff --git a/hw/s390x/virtio-ccw-serial.c b/hw/s390x/virtio-ccw-serial.c index 1764db2e70..61958228d1 100644 --- a/hw/s390x/virtio-ccw-serial.c +++ b/hw/s390x/virtio-ccw-serial.c @@ -33,8 +33,7 @@ static void virtio_ccw_serial_realize(VirtioCcwDevice *ccw_dev, Error **errp) g_free(bus_name); } - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } diff --git a/hw/virtio/vhost-scsi-pci.c b/hw/virtio/vhost-scsi-pci.c index 5da6bb6449..095af23f3f 100644 --- a/hw/virtio/vhost-scsi-pci.c +++ b/hw/virtio/vhost-scsi-pci.c @@ -53,8 +53,7 @@ static void vhost_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) vpci_dev->nvectors = vs->conf.num_queues + 3; } - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } static void vhost_scsi_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/vhost-user-blk-pci.c b/hw/virtio/vhost-user-blk-pci.c index 58d7c31735..4f5d5cbf44 100644 --- a/hw/virtio/vhost-user-blk-pci.c +++ b/hw/virtio/vhost-user-blk-pci.c @@ -58,8 +58,7 @@ static void vhost_user_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) vpci_dev->nvectors = dev->vdev.num_queues + 1; } - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } static void vhost_user_blk_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/vhost-user-fs-pci.c b/hw/virtio/vhost-user-fs-pci.c index ae36f1172d..e11c889d82 100644 --- a/hw/virtio/vhost-user-fs-pci.c +++ b/hw/virtio/vhost-user-fs-pci.c @@ -44,8 +44,7 @@ static void vhost_user_fs_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) vpci_dev->nvectors = dev->vdev.conf.num_request_queues + 2; } - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } static void vhost_user_fs_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/vhost-user-scsi-pci.c b/hw/virtio/vhost-user-scsi-pci.c index 6f3375fe55..4705cd54e8 100644 --- a/hw/virtio/vhost-user-scsi-pci.c +++ b/hw/virtio/vhost-user-scsi-pci.c @@ -59,8 +59,7 @@ static void vhost_user_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) vpci_dev->nvectors = vs->conf.num_queues + 3; } - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } static void vhost_user_scsi_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/vhost-vsock-pci.c b/hw/virtio/vhost-vsock-pci.c index 01effe3d52..a815278e69 100644 --- a/hw/virtio/vhost-vsock-pci.c +++ b/hw/virtio/vhost-vsock-pci.c @@ -44,8 +44,7 @@ static void vhost_vsock_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) VHostVSockPCI *dev = VHOST_VSOCK_PCI(vpci_dev); DeviceState *vdev = DEVICE(&dev->vdev); - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } static void vhost_vsock_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-9p-pci.c b/hw/virtio/virtio-9p-pci.c index 6507ce340b..cbcb062faa 100644 --- a/hw/virtio/virtio-9p-pci.c +++ b/hw/virtio/virtio-9p-pci.c @@ -38,8 +38,7 @@ static void virtio_9p_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) V9fsPCIState *dev = VIRTIO_9P_PCI(vpci_dev); DeviceState *vdev = DEVICE(&dev->vdev); - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } static Property virtio_9p_pci_properties[] = { diff --git a/hw/virtio/virtio-balloon-pci.c b/hw/virtio/virtio-balloon-pci.c index cc25df0a3d..5adc4e5819 100644 --- a/hw/virtio/virtio-balloon-pci.c +++ b/hw/virtio/virtio-balloon-pci.c @@ -48,8 +48,7 @@ static void virtio_balloon_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) vpci_dev->class_code = PCI_CLASS_OTHERS; } - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } static void virtio_balloon_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-blk-pci.c b/hw/virtio/virtio-blk-pci.c index 28838fa958..849cc7dfd8 100644 --- a/hw/virtio/virtio-blk-pci.c +++ b/hw/virtio/virtio-blk-pci.c @@ -55,8 +55,7 @@ static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) vpci_dev->nvectors = dev->vdev.conf.num_queues + 1; } - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } static void virtio_blk_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-crypto-pci.c b/hw/virtio/virtio-crypto-pci.c index 0bebe0149d..72be531c95 100644 --- a/hw/virtio/virtio-crypto-pci.c +++ b/hw/virtio/virtio-crypto-pci.c @@ -53,9 +53,8 @@ static void virtio_crypto_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) return; } - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); virtio_pci_force_virtio_1(vpci_dev); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); object_property_set_link(OBJECT(vcrypto), OBJECT(vcrypto->vdev.conf.cryptodev), "cryptodev", NULL); diff --git a/hw/virtio/virtio-input-pci.c b/hw/virtio/virtio-input-pci.c index 5a965408df..74651a42ea 100644 --- a/hw/virtio/virtio-input-pci.c +++ b/hw/virtio/virtio-input-pci.c @@ -49,9 +49,8 @@ static void virtio_input_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) VirtIOInputPCI *vinput = VIRTIO_INPUT_PCI(vpci_dev); DeviceState *vdev = DEVICE(&vinput->vdev); - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); virtio_pci_force_virtio_1(vpci_dev); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } static void virtio_input_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-iommu-pci.c b/hw/virtio/virtio-iommu-pci.c index 3dfbf55b47..632533abaf 100644 --- a/hw/virtio/virtio-iommu-pci.c +++ b/hw/virtio/virtio-iommu-pci.c @@ -54,11 +54,10 @@ static void virtio_iommu_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) "-no-acpi\n"); return; } - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); object_property_set_link(OBJECT(dev), OBJECT(pci_get_bus(&vpci_dev->pci_dev)), "primary-bus", errp); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } static void virtio_iommu_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-net-pci.c b/hw/virtio/virtio-net-pci.c index ea43040f7b..489b5dbad6 100644 --- a/hw/virtio/virtio-net-pci.c +++ b/hw/virtio/virtio-net-pci.c @@ -52,8 +52,7 @@ static void virtio_net_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) virtio_net_set_netclient_name(&dev->vdev, qdev->id, object_get_typename(OBJECT(qdev))); - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } static void virtio_net_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-pmem-pci.c b/hw/virtio/virtio-pmem-pci.c index fe2af00fa1..11d0c8ebc6 100644 --- a/hw/virtio/virtio-pmem-pci.c +++ b/hw/virtio/virtio-pmem-pci.c @@ -22,8 +22,7 @@ static void virtio_pmem_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) VirtIOPMEMPCI *pmem_pci = VIRTIO_PMEM_PCI(vpci_dev); DeviceState *vdev = DEVICE(&pmem_pci->vdev); - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } static void virtio_pmem_pci_set_addr(MemoryDeviceState *md, uint64_t addr, diff --git a/hw/virtio/virtio-rng-pci.c b/hw/virtio/virtio-rng-pci.c index 8aaf54b781..cf1afb47a6 100644 --- a/hw/virtio/virtio-rng-pci.c +++ b/hw/virtio/virtio-rng-pci.c @@ -36,8 +36,7 @@ static void virtio_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) DeviceState *vdev = DEVICE(&vrng->vdev); Error *err = NULL; - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", &err); + qdev_realize(vdev, BUS(&vpci_dev->bus), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/virtio/virtio-scsi-pci.c b/hw/virtio/virtio-scsi-pci.c index e82e7e5680..c23a134202 100644 --- a/hw/virtio/virtio-scsi-pci.c +++ b/hw/virtio/virtio-scsi-pci.c @@ -64,8 +64,7 @@ static void virtio_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) g_free(bus_name); } - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } static void virtio_scsi_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-serial-pci.c b/hw/virtio/virtio-serial-pci.c index 22ab4d8562..95d25d54da 100644 --- a/hw/virtio/virtio-serial-pci.c +++ b/hw/virtio/virtio-serial-pci.c @@ -65,8 +65,7 @@ static void virtio_serial_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) g_free(bus_name); } - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } static Property virtio_serial_pci_properties[] = { diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c index 1c25373852..ef7c832e2e 100644 --- a/hw/xen/xen-legacy-backend.c +++ b/hw/xen/xen-legacy-backend.c @@ -278,9 +278,8 @@ static struct XenLegacyDevice *xen_be_get_xendev(const char *type, int dom, xendev = g_malloc0(ops->size); object_initialize(&xendev->qdev, ops->size, TYPE_XENBACKEND); OBJECT(xendev)->free = g_free; - qdev_set_parent_bus(DEVICE(xendev), xen_sysbus); qdev_set_id(DEVICE(xendev), g_strdup_printf("xen-%s-%d", type, dev)); - qdev_init_nofail(DEVICE(xendev)); + qdev_realize(DEVICE(xendev), xen_sysbus, &error_fatal); object_unref(OBJECT(xendev)); xendev->type = type; From patchwork Fri May 29 13:44:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578805 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E2AC8139A for ; Fri, 29 May 2020 13:54:05 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B8B0C206A1 for ; Fri, 29 May 2020 13:54:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="E5NQHxjp" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B8B0C206A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:48956 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefSW-00025I-PN for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:54:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49094) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKJ-0002YF-1o for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:35 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:23907 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKH-0006z7-3e for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:34 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759932; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=90vpPTaZ3Uz60Uu7fkSsqKHnEEwpUnE5HLSbOUW5UHg=; b=E5NQHxjpu4r1zk3DP/JpCIU/ZO+lG/87flqJadwvqTRCjILkfipbX3hvntf51E/qd/+oeM wQs1REx1MkEneABfrhkYuM3ftAJmVfQfAJmb5KaPZteZ14kDmvdhvlRKT6yNFJtkUPspkD BpLvVrqSezknE/p1L6ij9asEpf5eqys= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-417-c1JRMnvdPV2-7TxBmVnjZQ-1; Fri, 29 May 2020 09:45:30 -0400 X-MC-Unique: c1JRMnvdPV2-7TxBmVnjZQ-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id D084D8015CF for ; Fri, 29 May 2020 13:45:29 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A450D6298C for ; Fri, 29 May 2020 13:45:29 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 04AD911358C4; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 12/58] qdev: Convert uses of qdev_set_parent_bus() manually Date: Fri, 29 May 2020 15:44:37 +0200 Message-Id: <20200529134523.8477-13-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:27:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Same transformation as in the previous commit. Manual, because convincing Coccinelle to transform these cases is somewhere between not worthwhile and infeasible (at least for me). Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- hw/pci-host/prep.c | 3 +-- hw/ppc/pnv.c | 6 ++---- hw/s390x/sclp.c | 10 ++++------ 3 files changed, 7 insertions(+), 12 deletions(-) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index c821ef889d..42c7e63a60 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -268,7 +268,7 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp) memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->pci_intack); /* TODO Remove once realize propagates to child devices. */ - object_property_set_bool(OBJECT(&s->pci_dev), true, "realized", errp); + qdev_realize(DEVICE(&s->pci_dev), BUS(&s->pci_bus), errp); } static void raven_pcihost_initfn(Object *obj) @@ -308,7 +308,6 @@ static void raven_pcihost_initfn(Object *obj) object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_RAVEN_PCI_DEVICE); pci_dev = DEVICE(&s->pci_dev); - qdev_set_parent_bus(pci_dev, BUS(&s->pci_bus)); object_property_set_int(OBJECT(&s->pci_dev), PCI_DEVFN(0, 0), "addr", NULL); qdev_prop_set_bit(pci_dev, "multifunction", false); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 8562af3fe0..e0588285a2 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1212,12 +1212,11 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) object_property_set_int(OBJECT(phb), i, "index", &error_fatal); object_property_set_int(OBJECT(phb), chip->chip_id, "chip-id", &error_fatal); - object_property_set_bool(OBJECT(phb), true, "realized", &local_err); + qdev_realize(DEVICE(phb), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; } - qdev_set_parent_bus(DEVICE(phb), sysbus_get_default()); /* Populate the XSCOM address space. */ pnv_xscom_add_subregion(chip, @@ -1422,12 +1421,11 @@ static void pnv_chip_power9_phb_realize(PnvChip *chip, Error **errp) object_property_set_int(obj, PNV_PHB4_DEVICE_ID, "device-id", &error_fatal); object_property_set_link(obj, OBJECT(stack), "stack", &error_abort); - object_property_set_bool(obj, true, "realized", &local_err); + qdev_realize(DEVICE(obj), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; } - qdev_set_parent_bus(DEVICE(obj), sysbus_get_default()); /* Populate the XSCOM address space. */ pnv_xscom_add_subregion(chip, diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c index 20aca30ac4..40e27a8cb4 100644 --- a/hw/s390x/sclp.c +++ b/hw/s390x/sclp.c @@ -333,17 +333,15 @@ static void sclp_realize(DeviceState *dev, Error **errp) uint64_t hw_limit; int ret; - object_property_set_bool(OBJECT(sclp->event_facility), true, "realized", - &err); - if (err) { - goto out; - } /* * qdev_device_add searches the sysbus for TYPE_SCLP_EVENTS_BUS. As long * as we can't find a fitting bus via the qom tree, we have to add the * event facility to the sysbus, so e.g. a sclp console can be created. */ - qdev_set_parent_bus(DEVICE(sclp->event_facility), sysbus_get_default()); + qdev_realize(DEVICE(sclp->event_facility), NULL, &err); + if (err) { + goto out; + } ret = s390_set_memory_limit(machine->maxram_size, &hw_limit); if (ret == -E2BIG) { From patchwork Fri May 29 13:44:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578821 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D960A139A for ; Fri, 29 May 2020 13:56:25 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B0195206A1 for ; Fri, 29 May 2020 13:56:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="KrqEughf" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B0195206A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:60686 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefUm-00078V-RW for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:56:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49262) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKT-0002vg-3q for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:45 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:47817 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-000760-2x for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:44 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DHgoFM8sSce36Nfwds/4dWG1ljaYs6CSL20+18yJTs8=; b=KrqEughfRDAEAYRLCEMsncyhl/oxeC4mKm18HbLtZFkPgeJZJ6AcbbL898kBunqyR9TZt/ AI2/y9WZ3ehTQMaXONAJEEt55I98JmdwBrfAy4Kb1gft5Bzg6apLabwq3GmpwuR7dW5xA5 McE/4pDyLOBPD3O3dmDxokLITmxabdQ= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-131-2sAsEcZuMnGdvv8_t2qB6A-1; Fri, 29 May 2020 09:45:32 -0400 X-MC-Unique: 2sAsEcZuMnGdvv8_t2qB6A-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 34BD6800688; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D60345D9EF; Fri, 29 May 2020 13:45:29 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 07F1511358C6; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 13/58] pci: New pci_new(), pci_realize_and_unref() etc. Date: Fri, 29 May 2020 15:44:38 +0200 Message-Id: <20200529134523.8477-14-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" I'm converting from qdev_create()/qdev_init_nofail() to qdev_new()/qdev_realize_and_unref(); recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. PCI devices use qdev_create() through pci_create() and pci_create_multifunction(). Provide pci_new(), pci_new_multifunction(), and pci_realize_and_unref() for converting PCI devices. Cc: Michael S. Tsirkin Cc: Marcel Apfelbaum Signed-off-by: Markus Armbruster --- include/hw/pci/pci.h | 5 +++++ hw/pci/pci.c | 21 +++++++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index cfedf5a995..66f8ba519b 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -712,6 +712,11 @@ pci_get_quad_by_mask(uint8_t *config, uint64_t mask) return (val & mask) >> ctz32(mask); } +PCIDevice *pci_new_multifunction(int devfn, bool multifunction, + const char *name); +PCIDevice *pci_new(int devfn, const char *name); +bool pci_realize_and_unref(PCIDevice *dev, PCIBus *bus, Error **errp); + PCIDevice *pci_create_multifunction(PCIBus *bus, int devfn, bool multifunction, const char *name); PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn, diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 6947c741c3..92f3f0f134 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2147,6 +2147,27 @@ static void pci_qdev_realize(DeviceState *qdev, Error **errp) } } +PCIDevice *pci_new_multifunction(int devfn, bool multifunction, + const char *name) +{ + DeviceState *dev; + + dev = qdev_new(name); + qdev_prop_set_int32(dev, "addr", devfn); + qdev_prop_set_bit(dev, "multifunction", multifunction); + return PCI_DEVICE(dev); +} + +PCIDevice *pci_new(int devfn, const char *name) +{ + return pci_new_multifunction(devfn, false, name); +} + +bool pci_realize_and_unref(PCIDevice *dev, PCIBus *bus, Error **errp) +{ + return qdev_realize_and_unref(&dev->qdev, &bus->qbus, errp); +} + PCIDevice *pci_create_multifunction(PCIBus *bus, int devfn, bool multifunction, const char *name) { From patchwork Fri May 29 13:44:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578775 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E1024912 for ; Fri, 29 May 2020 13:50:25 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B5D10206A1 for ; Fri, 29 May 2020 13:50:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="Ejl9ewJU" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B5D10206A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:60106 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefOy-0003Tz-RG for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:50:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49154) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKL-0002eZ-NX for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:37 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:21779 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKH-0006zL-ND for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:36 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759932; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=svtZhAoGUz8dj052xrs8qz0YRPOEV0x5EwMMzpZi4u0=; b=Ejl9ewJUQddDn9u9FAtflnInE9h48EJdGTzlup8W1kDIz4jWertzBSX2sKKPABsMNU9OhA 0lavdApKGuUhh1duf6vLGP1O6sRvMDfXI94RMThloeOReANQ7kkZoazJz3CNZIvPdoIbfN 19iJtorYZULqR3Q27tlyls4xQ7z/SQw= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-460-xwZ7unVYPduX_f8OunB9_w-1; Fri, 29 May 2020 09:45:30 -0400 X-MC-Unique: xwZ7unVYPduX_f8OunB9_w-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id DDDBB8015D1 for ; Fri, 29 May 2020 13:45:29 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id AE7F510013D4; Fri, 29 May 2020 13:45:29 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 0B3D911358C7; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 14/58] hw/ppc: Eliminate two superfluous QOM casts Date: Fri, 29 May 2020 15:44:39 +0200 Message-Id: <20200529134523.8477-15-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- hw/ppc/mac_newworld.c | 4 ++-- hw/ppc/mac_oldworld.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 69281d7834..2d069dcc59 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -122,7 +122,7 @@ static void ppc_core99_init(MachineState *machine) long kernel_size, initrd_size; UNINHostState *uninorth_pci; PCIBus *pci_bus; - NewWorldMacIOState *macio; + PCIDevice *macio; bool has_pmu, has_adb; MACIOIDEState *macio_ide; BusState *adb_bus; @@ -375,7 +375,7 @@ static void ppc_core99_init(MachineState *machine) pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus; /* MacIO */ - macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO)); + macio = pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO); dev = DEVICE(macio); qdev_prop_set_uint64(dev, "frequency", tbfreq); qdev_prop_set_bit(dev, "has-pmu", has_pmu); diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index cfc2eae1d9..f73ec5f3a9 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -94,7 +94,7 @@ static void ppc_heathrow_init(MachineState *machine) uint32_t kernel_base, initrd_base, cmdline_base = 0; int32_t kernel_size, initrd_size; PCIBus *pci_bus; - OldWorldMacIOState *macio; + PCIDevice *macio; MACIOIDEState *macio_ide; SysBusDevice *s; DeviceState *dev, *pic_dev; @@ -278,7 +278,7 @@ static void ppc_heathrow_init(MachineState *machine) ide_drive_get(hd, ARRAY_SIZE(hd)); /* MacIO */ - macio = OLDWORLD_MACIO(pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO)); + macio = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO); dev = DEVICE(macio); qdev_prop_set_uint64(dev, "frequency", tbfreq); object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic", From patchwork Fri May 29 13:44:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578845 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C91AD14C0 for ; Fri, 29 May 2020 14:01:17 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7E8E220707 for ; Fri, 29 May 2020 14:01:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="AVQdD5qD" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7E8E220707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:54074 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefZU-0008Mx-Kc for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:01:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49222) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKO-0002kj-Jc for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:40 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:56416 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKK-00073z-2X for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:40 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759935; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=C2L8rCL9J/jA+fgktv7pG5IZRfYTDPzjXQQpmSVZwkE=; b=AVQdD5qDpo4rfeYMHz31gn8ykRi/YMgctwCimbewRiPD1sjoPRRLHzSkovJ8jOe0q+xeGD tRgFORpuS1MU3FNfTvEN/UVgcaDTL7UAZdBzyjbabBmi0EBmctXuiJQrJS0N84WNNpc8kX a/OD7HH54vtjy+g0g4dj7NeOkU09j+o= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-468-JPTL3vW3NPq--7rGaYMz2A-1; Fri, 29 May 2020 09:45:31 -0400 X-MC-Unique: JPTL3vW3NPq--7rGaYMz2A-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 38B6F835B42; Fri, 29 May 2020 13:45:30 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B0E6919D71; Fri, 29 May 2020 13:45:29 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 0EA8611358CA; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 15/58] pci: Convert uses of pci_create() etc. with Coccinelle Date: Fri, 29 May 2020 15:44:40 +0200 Message-Id: <20200529134523.8477-16-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Replace dev = pci_create(bus, type_name); ... qdev_init_nofail(dev); by dev = pci_new(type_name); ... pci_realize_and_unref(dev, bus, &error_fatal); and similarly for pci_create_multifunction(). Recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. Coccinelle script: @@ expression dev, bus, expr; expression list args; @@ - dev = pci_create(bus, args); + dev = pci_new(args); ... when != dev = expr - qdev_init_nofail(&dev->qdev); + pci_realize_and_unref(dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; expression d; @@ - dev = pci_create(bus, args); + dev = pci_new(args); ( d = &dev->qdev; | d = DEVICE(dev); ) ... when != dev = expr - qdev_init_nofail(d); + pci_realize_and_unref(dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; @@ - dev = pci_create(bus, args); + dev = pci_new(args); ... when != dev = expr - qdev_init_nofail(DEVICE(dev)); + pci_realize_and_unref(dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; @@ - dev = DEVICE(pci_create(bus, args)); + PCIDevice *pci_dev; // TODO move + pci_dev = pci_new(args); + dev = DEVICE(pci_dev); ... when != dev = expr - qdev_init_nofail(dev); + pci_realize_and_unref(pci_dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; @@ - dev = pci_create_multifunction(bus, args); + dev = pci_new_multifunction(args); ... when != dev = expr - qdev_init_nofail(&dev->qdev); + pci_realize_and_unref(dev, bus, &error_fatal); @@ expression bus, expr; expression list args; identifier dev; @@ - PCIDevice *dev = pci_create_multifunction(bus, args); + PCIDevice *dev = pci_new_multifunction(args); ... when != dev = expr - qdev_init_nofail(&dev->qdev); + pci_realize_and_unref(dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; @@ - dev = pci_create_multifunction(bus, args); + dev = pci_new_multifunction(args); ... when != dev = expr - qdev_init_nofail(DEVICE(dev)); + pci_realize_and_unref(dev, bus, &error_fatal); Missing #include "qapi/error.h" added manually, whitespace changes minimized manually, @pci_dev declarations moved manually. Cc: Michael S. Tsirkin Cc: Marcel Apfelbaum Signed-off-by: Markus Armbruster --- hw/acpi/piix4.c | 6 ++++-- hw/i386/pc_q35.c | 10 +++++----- hw/isa/vt82c686.c | 13 +++++++------ hw/mips/fuloong2e.c | 6 ++++-- hw/pci-bridge/dec.c | 6 +++--- hw/pci-host/bonito.c | 4 ++-- hw/pci-host/sabre.c | 13 +++++++------ hw/pci/pci.c | 8 ++++---- hw/ppc/mac_newworld.c | 4 ++-- hw/ppc/mac_oldworld.c | 4 ++-- hw/sparc64/sun4u.c | 8 ++++---- 11 files changed, 44 insertions(+), 38 deletions(-) diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 85c199b30d..9ab8ad5536 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -514,10 +514,12 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, qemu_irq sci_irq, qemu_irq smi_irq, int smm_enabled, DeviceState **piix4_pm) { + PCIDevice *pci_dev; DeviceState *dev; PIIX4PMState *s; - dev = DEVICE(pci_create(bus, devfn, TYPE_PIIX4_PM)); + pci_dev = pci_new(devfn, TYPE_PIIX4_PM); + dev = DEVICE(pci_dev); qdev_prop_set_uint32(dev, "smb_io_base", smb_io_base); if (piix4_pm) { *piix4_pm = dev; @@ -531,7 +533,7 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, s->use_acpi_pci_hotplug = false; } - qdev_init_nofail(dev); + pci_realize_and_unref(pci_dev, bus, &error_fatal); return s->smb.smbus; } diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index a2e7faccbc..af68ea1b69 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -98,16 +98,16 @@ static int ehci_create_ich9_with_companions(PCIBus *bus, int slot) return -1; } - ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name); - qdev_init_nofail(&ehci->qdev); + ehci = pci_new_multifunction(PCI_DEVFN(slot, 7), true, name); + pci_realize_and_unref(ehci, bus, &error_fatal); usbbus = QLIST_FIRST(&ehci->qdev.child_bus); for (i = 0; i < 3; i++) { - uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func), - true, comp[i].name); + uhci = pci_new_multifunction(PCI_DEVFN(slot, comp[i].func), true, + comp[i].name); qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name); qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port); - qdev_init_nofail(&uhci->qdev); + pci_realize_and_unref(uhci, bus, &error_fatal); } return 0; } diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index fac4e56b7d..18160ca445 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -23,6 +23,7 @@ #include "hw/isa/apm.h" #include "hw/acpi/acpi.h" #include "hw/i2c/pm_smbus.h" +#include "qapi/error.h" #include "qemu/module.h" #include "qemu/timer.h" #include "exec/address-spaces.h" @@ -276,8 +277,8 @@ void vt82c686b_ac97_init(PCIBus *bus, int devfn) { PCIDevice *dev; - dev = pci_create(bus, devfn, TYPE_VT82C686B_AC97_DEVICE); - qdev_init_nofail(&dev->qdev); + dev = pci_new(devfn, TYPE_VT82C686B_AC97_DEVICE); + pci_realize_and_unref(dev, bus, &error_fatal); } static void via_ac97_class_init(ObjectClass *klass, void *data) @@ -320,8 +321,8 @@ void vt82c686b_mc97_init(PCIBus *bus, int devfn) { PCIDevice *dev; - dev = pci_create(bus, devfn, TYPE_VT82C686B_MC97_DEVICE); - qdev_init_nofail(&dev->qdev); + dev = pci_new(devfn, TYPE_VT82C686B_MC97_DEVICE); + pci_realize_and_unref(dev, bus, &error_fatal); } static void via_mc97_class_init(ObjectClass *klass, void *data) @@ -388,12 +389,12 @@ I2CBus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, PCIDevice *dev; VT686PMState *s; - dev = pci_create(bus, devfn, TYPE_VT82C686B_PM_DEVICE); + dev = pci_new(devfn, TYPE_VT82C686B_PM_DEVICE); qdev_prop_set_uint32(&dev->qdev, "smb_io_base", smb_io_base); s = VT82C686B_PM_DEVICE(dev); - qdev_init_nofail(&dev->qdev); + pci_realize_and_unref(dev, bus, &error_fatal); return s->smb.smbus; } diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c index f583c44b79..feb10a5720 100644 --- a/hw/mips/fuloong2e.c +++ b/hw/mips/fuloong2e.c @@ -297,6 +297,7 @@ static void mips_fuloong2e_init(MachineState *machine) long bios_size; uint8_t *spd_data; int64_t kernel_entry; + PCIDevice *pci_dev; PCIBus *pci_bus; ISABus *isa_bus; I2CBus *smbus; @@ -367,10 +368,11 @@ static void mips_fuloong2e_init(MachineState *machine) /* GPU */ if (vga_interface_type != VGA_NONE) { - dev = DEVICE(pci_create(pci_bus, -1, "ati-vga")); + pci_dev = pci_new(-1, "ati-vga"); + dev = DEVICE(pci_dev); qdev_prop_set_uint32(dev, "vgamem_mb", 16); qdev_prop_set_uint16(dev, "x-device-id", 0x5159); - qdev_init_nofail(dev); + pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); } /* Populate SPD eeprom data */ diff --git a/hw/pci-bridge/dec.c b/hw/pci-bridge/dec.c index 952bc71122..677a310b96 100644 --- a/hw/pci-bridge/dec.c +++ b/hw/pci-bridge/dec.c @@ -26,6 +26,7 @@ #include "qemu/osdep.h" #include "dec.h" #include "hw/sysbus.h" +#include "qapi/error.h" #include "qemu/module.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" @@ -81,11 +82,10 @@ PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn) PCIDevice *dev; PCIBridge *br; - dev = pci_create_multifunction(parent_bus, devfn, false, - "dec-21154-p2p-bridge"); + dev = pci_new_multifunction(devfn, false, "dec-21154-p2p-bridge"); br = PCI_BRIDGE(dev); pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq); - qdev_init_nofail(&dev->qdev); + pci_realize_and_unref(dev, parent_bus, &error_fatal); return pci_bridge_get_sec_bus(br); } diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 546ac84cf4..7bb032f005 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -750,11 +750,11 @@ PCIBus *bonito_init(qemu_irq *pic) pcihost->pic = pic; qdev_realize_and_unref(dev, NULL, &error_fatal); - d = pci_create(phb->bus, PCI_DEVFN(0, 0), TYPE_PCI_BONITO); + d = pci_new(PCI_DEVFN(0, 0), TYPE_PCI_BONITO); s = PCI_BONITO(d); s->pcihost = pcihost; pcihost->pci_dev = s; - qdev_init_nofail(DEVICE(d)); + pci_realize_and_unref(d, phb->bus, &error_fatal); return phb->bus; } diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index 475bcb01d7..0cc68585f8 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -35,6 +35,7 @@ #include "hw/pci-bridge/simba.h" #include "hw/pci-host/sabre.h" #include "exec/address-spaces.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" #include "sysemu/runstate.h" @@ -405,17 +406,17 @@ static void sabre_realize(DeviceState *dev, Error **errp) pci_setup_iommu(phb->bus, sabre_pci_dma_iommu, s->iommu); /* APB secondary busses */ - pci_dev = pci_create_multifunction(phb->bus, PCI_DEVFN(1, 0), true, - TYPE_SIMBA_PCI_BRIDGE); + pci_dev = pci_new_multifunction(PCI_DEVFN(1, 0), true, + TYPE_SIMBA_PCI_BRIDGE); s->bridgeB = PCI_BRIDGE(pci_dev); pci_bridge_map_irq(s->bridgeB, "pciB", pci_simbaB_map_irq); - qdev_init_nofail(&pci_dev->qdev); + pci_realize_and_unref(pci_dev, phb->bus, &error_fatal); - pci_dev = pci_create_multifunction(phb->bus, PCI_DEVFN(1, 1), true, - TYPE_SIMBA_PCI_BRIDGE); + pci_dev = pci_new_multifunction(PCI_DEVFN(1, 1), true, + TYPE_SIMBA_PCI_BRIDGE); s->bridgeA = PCI_BRIDGE(pci_dev); pci_bridge_map_irq(s->bridgeA, "pciA", pci_simbaA_map_irq); - qdev_init_nofail(&pci_dev->qdev); + pci_realize_and_unref(pci_dev, phb->bus, &error_fatal); } static void sabre_init(Object *obj) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 92f3f0f134..ab8b71fe72 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1937,10 +1937,10 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus, exit(1); } - pci_dev = pci_create(bus, devfn, nd->model); + pci_dev = pci_new(devfn, nd->model); dev = &pci_dev->qdev; qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + pci_realize_and_unref(pci_dev, bus, &error_fatal); g_ptr_array_free(pci_nic_models, true); return pci_dev; } @@ -2183,8 +2183,8 @@ PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn, bool multifunction, const char *name) { - PCIDevice *dev = pci_create_multifunction(bus, devfn, multifunction, name); - qdev_init_nofail(&dev->qdev); + PCIDevice *dev = pci_new_multifunction(devfn, multifunction, name); + pci_realize_and_unref(dev, bus, &error_fatal); return dev; } diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 2d069dcc59..baa17cdce7 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -375,14 +375,14 @@ static void ppc_core99_init(MachineState *machine) pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus; /* MacIO */ - macio = pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO); + macio = pci_new(-1, TYPE_NEWWORLD_MACIO); dev = DEVICE(macio); qdev_prop_set_uint64(dev, "frequency", tbfreq); qdev_prop_set_bit(dev, "has-pmu", has_pmu); qdev_prop_set_bit(dev, "has-adb", has_adb); object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic", &error_abort); - qdev_init_nofail(dev); + pci_realize_and_unref(macio, pci_bus, &error_fatal); /* We only emulate 2 out of 3 IDE controllers for now */ ide_drive_get(hd, ARRAY_SIZE(hd)); diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index f73ec5f3a9..903483079e 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -278,12 +278,12 @@ static void ppc_heathrow_init(MachineState *machine) ide_drive_get(hd, ARRAY_SIZE(hd)); /* MacIO */ - macio = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO); + macio = pci_new(-1, TYPE_OLDWORLD_MACIO); dev = DEVICE(macio); qdev_prop_set_uint64(dev, "frequency", tbfreq); object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic", &error_abort); - qdev_init_nofail(dev); + pci_realize_and_unref(macio, pci_bus, &error_fatal); macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), "ide[0]")); diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index ade9c22825..6f29a013ca 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -605,10 +605,10 @@ static void sun4uv_init(MemoryRegion *address_space_mem, pci_busA->slot_reserved_mask = 0xfffffff1; pci_busB->slot_reserved_mask = 0xfffffff0; - ebus = pci_create_multifunction(pci_busA, PCI_DEVFN(1, 0), true, TYPE_EBUS); + ebus = pci_new_multifunction(PCI_DEVFN(1, 0), true, TYPE_EBUS); qdev_prop_set_uint64(DEVICE(ebus), "console-serial-base", hwdef->console_serial_base); - qdev_init_nofail(DEVICE(ebus)); + pci_realize_and_unref(ebus, pci_busA, &error_fatal); /* Wire up "well-known" ISA IRQs to PBM legacy obio IRQs */ qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", 7, @@ -661,9 +661,9 @@ static void sun4uv_init(MemoryRegion *address_space_mem, qemu_macaddr_default_if_unset(&macaddr); } - pci_dev = pci_create(pci_busA, PCI_DEVFN(3, 0), "cmd646-ide"); + pci_dev = pci_new(PCI_DEVFN(3, 0), "cmd646-ide"); qdev_prop_set_uint32(&pci_dev->qdev, "secondary", 1); - qdev_init_nofail(&pci_dev->qdev); + pci_realize_and_unref(pci_dev, pci_busA, &error_fatal); pci_ide_create_devs(pci_dev); /* Map NVRAM into I/O (ebus) space */ From patchwork Fri May 29 13:44:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578861 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9E93C912 for ; Fri, 29 May 2020 14:04:45 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 75A0520707 for ; Fri, 29 May 2020 14:04:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="SJQTl5ES" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 75A0520707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:39200 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefcq-0000CR-Jt for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:04:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49296) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKZ-0003Dy-MK for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:51 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:51321 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00077h-TE for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:51 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759937; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DTrIcuQ18T+jDyxi7QCSDcn8mAWENmPoI1+nC0vw6KI=; b=SJQTl5EStzU6DsxxbrWFqKeZyMF/tv91aFij5oikOFdAX3AULhaRM61f2IA4u7f6h+uHyr zp5I+Wn9U8tLeR+BGyqoghM8U1nY649DtOW6S9g8mHwntB/0z+392qgJRDKAD9ojjIgpwx qWhkk7lwejv/fNjzHO5CLTJMjwzHgDA= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-179-w3WCv-nmNWip3Lk-TV8ehA-1; Fri, 29 May 2020 09:45:33 -0400 X-MC-Unique: w3WCv-nmNWip3Lk-TV8ehA-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 6BB7E1007271; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B11D060C80; Fri, 29 May 2020 13:45:29 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 120BF11358CB; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 16/58] pci: Convert uses of pci_create() etc. manually Date: Fri, 29 May 2020 15:44:41 +0200 Message-Id: <20200529134523.8477-17-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Same transformation as in the previous commit. Manual, because convincing Coccinelle to transform these cases is not worthwhile. Cc: Michael S. Tsirkin Cc: Marcel Apfelbaum Signed-off-by: Markus Armbruster --- hw/sparc64/sun4u.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 6f29a013ca..0b898d6e3d 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -635,24 +635,28 @@ static void sun4uv_init(MemoryRegion *address_space_mem, memset(&macaddr, 0, sizeof(MACAddr)); onboard_nic = false; for (i = 0; i < nb_nics; i++) { + PCIBus *bus; nd = &nd_table[i]; if (!nd->model || strcmp(nd->model, "sunhme") == 0) { if (!onboard_nic) { - pci_dev = pci_create_multifunction(pci_busA, PCI_DEVFN(1, 1), + pci_dev = pci_new_multifunction(PCI_DEVFN(1, 1), true, "sunhme"); + bus = pci_busA; memcpy(&macaddr, &nd->macaddr.a, sizeof(MACAddr)); onboard_nic = true; } else { - pci_dev = pci_create(pci_busB, -1, "sunhme"); + pci_dev = pci_new(-1, "sunhme"); + bus = pci_busB; } } else { - pci_dev = pci_create(pci_busB, -1, nd->model); + pci_dev = pci_new(-1, nd->model); + bus = pci_busB; } dev = &pci_dev->qdev; qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + pci_realize_and_unref(pci_dev, bus, &error_fatal); } /* If we don't have an onboard NIC, grab a default MAC address so that From patchwork Fri May 29 13:44:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578853 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2B4EC912 for ; Fri, 29 May 2020 14:03:49 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0136020707 for ; Fri, 29 May 2020 14:03:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="Ut3MazkJ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0136020707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:34306 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefbv-0006gg-V4 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:03:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49240) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKQ-0002pX-EB for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:42 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:24237 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKL-000752-6J for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:42 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759935; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LMx6IoNLOEwHaQ5CAzcTrSE0oOVyNFaSLpNLWFqDcS4=; b=Ut3MazkJb6qg2g/FPqbMN1g2vjAB99m04QT1Tx5JaPIRvP+1l5qzl3S6ZuubG1RrMT1Wzr ViP+2fH7hsFI+hMhEAPiqIX/KDdRStrex4r/QWkk3/PFKmAeIK32fFNYkockkplQyWhvvg 5f2FAq9ijOd0bNxmsA0s7IRH8ITpkm8= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-445-096XDX4LPcq1uHjxTnhuUw-1; Fri, 29 May 2020 09:45:33 -0400 X-MC-Unique: 096XDX4LPcq1uHjxTnhuUw-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id DE61080183C; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 10504707A0; Fri, 29 May 2020 13:45:30 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 155D411358CF; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 17/58] pci: pci_create(), pci_create_multifunction() are now unused, drop Date: Fri, 29 May 2020 15:44:42 +0200 Message-Id: <20200529134523.8477-18-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Cc: Michael S. Tsirkin Cc: Marcel Apfelbaum Signed-off-by: Markus Armbruster --- include/hw/pci/pci.h | 3 --- hw/pci/pci.c | 16 ---------------- 2 files changed, 19 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 66f8ba519b..a4e9c33416 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -717,12 +717,9 @@ PCIDevice *pci_new_multifunction(int devfn, bool multifunction, PCIDevice *pci_new(int devfn, const char *name); bool pci_realize_and_unref(PCIDevice *dev, PCIBus *bus, Error **errp); -PCIDevice *pci_create_multifunction(PCIBus *bus, int devfn, bool multifunction, - const char *name); PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn, bool multifunction, const char *name); -PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name); PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name); void lsi53c8xx_handle_legacy_cmdline(DeviceState *lsi_dev); diff --git a/hw/pci/pci.c b/hw/pci/pci.c index ab8b71fe72..aaffbd7f94 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2168,17 +2168,6 @@ bool pci_realize_and_unref(PCIDevice *dev, PCIBus *bus, Error **errp) return qdev_realize_and_unref(&dev->qdev, &bus->qbus, errp); } -PCIDevice *pci_create_multifunction(PCIBus *bus, int devfn, bool multifunction, - const char *name) -{ - DeviceState *dev; - - dev = qdev_create(&bus->qbus, name); - qdev_prop_set_int32(dev, "addr", devfn); - qdev_prop_set_bit(dev, "multifunction", multifunction); - return PCI_DEVICE(dev); -} - PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn, bool multifunction, const char *name) @@ -2188,11 +2177,6 @@ PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn, return dev; } -PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name) -{ - return pci_create_multifunction(bus, devfn, false, name); -} - PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name) { return pci_create_simple_multifunction(bus, devfn, false, name); From patchwork Fri May 29 13:44:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578769 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B87CC739 for ; Fri, 29 May 2020 13:49:20 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8ED8C207BC for ; Fri, 29 May 2020 13:49:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="dxwtvzkM" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8ED8C207BC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:54210 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefNv-000170-KL for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:49:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49084) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKI-0002XL-GG for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:34 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:52378 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKH-0006zM-BI for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:34 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759932; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WYs/0T9UPs/fSVf/TkUVU/5UOwEBrsaLwY4545j0MJQ=; b=dxwtvzkM2mN6YTrw4Bm9X4KBZf1D2ouZTAcf+Of3iQ2+m2vY59dF712CKTnVEIfuiBQsJo 9CYfpFCz7gjCU1Bz0i/ScW1fOsHt2Pzrb1r9H57362cD9X/V3+DrJwoTVa4fpOwAoADPW0 7UD0IWIUJfWDChiglNanWQDBhbTfid0= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-205-IkoV1-IoOdiAgaOE3K4Jcw-1; Fri, 29 May 2020 09:45:30 -0400 X-MC-Unique: IkoV1-IoOdiAgaOE3K4Jcw-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 0ED5A460 for ; Fri, 29 May 2020 13:45:30 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D677D5C1C8 for ; Fri, 29 May 2020 13:45:29 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 187C711358D0; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 18/58] isa: New isa_new(), isa_realize_and_unref() etc. Date: Fri, 29 May 2020 15:44:43 +0200 Message-Id: <20200529134523.8477-19-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" I'm converting from qdev_create()/qdev_init_nofail() to qdev_new()/qdev_realize_and_unref(); recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. ISA devices use qdev_create() through isa_create() and isa_try_create(). Provide isa_new(), isa_try_new(), and isa_realize_and_unref() for converting ISA devices. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- include/hw/isa/isa.h | 3 +++ hw/isa/isa-bus.c | 15 +++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 02c2350274..3b6215fafe 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -105,6 +105,9 @@ MemoryRegion *isa_address_space(ISADevice *dev); MemoryRegion *isa_address_space_io(ISADevice *dev); ISADevice *isa_create(ISABus *bus, const char *name); ISADevice *isa_try_create(ISABus *bus, const char *name); +ISADevice *isa_new(const char *name); +ISADevice *isa_try_new(const char *name); +bool isa_realize_and_unref(ISADevice *dev, ISABus *bus, Error **errp); ISADevice *isa_create_simple(ISABus *bus, const char *name); ISADevice *isa_vga_init(ISABus *bus); diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index 1c9d7e19ab..e6412d39b4 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -176,6 +176,16 @@ ISADevice *isa_try_create(ISABus *bus, const char *name) return ISA_DEVICE(dev); } +ISADevice *isa_new(const char *name) +{ + return ISA_DEVICE(qdev_new(name)); +} + +ISADevice *isa_try_new(const char *name) +{ + return ISA_DEVICE(qdev_try_new(name)); +} + ISADevice *isa_create_simple(ISABus *bus, const char *name) { ISADevice *dev; @@ -185,6 +195,11 @@ ISADevice *isa_create_simple(ISABus *bus, const char *name) return dev; } +bool isa_realize_and_unref(ISADevice *dev, ISABus *bus, Error **errp) +{ + return qdev_realize_and_unref(&dev->parent_obj, &bus->parent_obj, errp); +} + ISADevice *isa_vga_init(ISABus *bus) { switch (vga_interface_type) { From patchwork Fri May 29 13:44:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578765 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CC897739 for ; Fri, 29 May 2020 13:48:47 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 92FAE207BC for ; Fri, 29 May 2020 13:48:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="TXySseTu" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 92FAE207BC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:51436 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefNO-0008Op-PT for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:48:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49138) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKL-0002dX-4m for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:37 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:26535 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKI-00070I-9t for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:36 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759933; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yjBiZr01BOHeqF27fk7D/XvP7rYHi3WtnUH4hnCH27I=; b=TXySseTuhkz9wi1awNu4uU5x94qTz57qfkHjjzgYEn+jc/dWGXuS+exnYm6MJL6IBR3XkY 2FTEJ87/+QfQu+D1svNU4m/zI9VjoLizjAH94ST5gcg8F66unkcyFvXgCkXlu+stEQMyT4 BfJaL9n4399qHElBD2AvSZwiyY/tldI= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-20-FI3x_zKOM2iJwozLrtB7JA-1; Fri, 29 May 2020 09:45:31 -0400 X-MC-Unique: FI3x_zKOM2iJwozLrtB7JA-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 9D8E9835B40 for ; Fri, 29 May 2020 13:45:30 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 227DD10013D4 for ; Fri, 29 May 2020 13:45:30 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 1BE9C11358D2; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 19/58] isa: Convert uses of isa_create() with Coccinelle Date: Fri, 29 May 2020 15:44:44 +0200 Message-Id: <20200529134523.8477-20-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/28 23:43:13 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Replace dev = isa_create(bus, type_name); ... qdev_init_nofail(dev); by dev = isa_new(type_name); ... isa_realize_and_unref(dev, bus, &error_fatal); Recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. Coccinelle script: @@ expression dev, bus, expr; expression list args; expression d; @@ - dev = isa_create(bus, args); + dev = isa_new(args); ( d = &dev->qdev; | d = DEVICE(dev); ) ... when != dev = expr - qdev_init_nofail(d); + isa_realize_and_unref(dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; @@ - dev = isa_create(bus, args); + dev = isa_new(args); ... when != dev = expr - qdev_init_nofail(DEVICE(dev)); + isa_realize_and_unref(dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; @@ - dev = DEVICE(isa_create(bus, args)); + ISADevice *isa_dev; // TODO move + isa_dev = isa_new(args); + dev = DEVICE(isa_dev); ... when != dev = expr - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, bus, &error_fatal); Missing #include "qapi/error.h" added manually, whitespace changes minimized manually. Signed-off-by: Markus Armbruster --- include/hw/audio/pcspk.h | 5 +++-- include/hw/timer/i8254.h | 9 +++++---- hw/char/parallel-isa.c | 5 +++-- hw/char/serial-isa.c | 4 ++-- hw/dma/i8257.c | 9 +++++---- hw/ide/isa.c | 5 +++-- hw/intc/i8259_common.c | 5 +++-- hw/isa/isa-bus.c | 4 ++-- hw/isa/isa-superio.c | 20 ++++++++++---------- hw/ppc/prep.c | 26 ++++++++++++++++---------- hw/rtc/m48t59-isa.c | 7 +++++-- hw/rtc/mc146818rtc.c | 4 ++-- hw/sparc64/sun4u.c | 6 ++++-- 13 files changed, 63 insertions(+), 46 deletions(-) diff --git a/include/hw/audio/pcspk.h b/include/hw/audio/pcspk.h index 632cce9f68..7e7f5f49dc 100644 --- a/include/hw/audio/pcspk.h +++ b/include/hw/audio/pcspk.h @@ -27,6 +27,7 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" +#include "qapi/error.h" #define TYPE_PC_SPEAKER "isa-pcspk" @@ -35,11 +36,11 @@ static inline ISADevice *pcspk_init(ISABus *bus, ISADevice *pit) DeviceState *dev; ISADevice *isadev; - isadev = isa_create(bus, TYPE_PC_SPEAKER); + isadev = isa_new(TYPE_PC_SPEAKER); dev = DEVICE(isadev); qdev_prop_set_uint32(dev, "iobase", 0x61); object_property_set_link(OBJECT(dev), OBJECT(pit), "pit", NULL); - qdev_init_nofail(dev); + isa_realize_and_unref(isadev, bus, &error_fatal); return isadev; } diff --git a/include/hw/timer/i8254.h b/include/hw/timer/i8254.h index 45cb42571f..e75b4a5a08 100644 --- a/include/hw/timer/i8254.h +++ b/include/hw/timer/i8254.h @@ -27,6 +27,7 @@ #include "hw/qdev-properties.h" #include "hw/isa/isa.h" +#include "qapi/error.h" #define PIT_FREQ 1193182 @@ -54,10 +55,10 @@ static inline ISADevice *i8254_pit_init(ISABus *bus, int base, int isa_irq, DeviceState *dev; ISADevice *d; - d = isa_create(bus, TYPE_I8254); + d = isa_new(TYPE_I8254); dev = DEVICE(d); qdev_prop_set_uint32(dev, "iobase", base); - qdev_init_nofail(dev); + isa_realize_and_unref(d, bus, &error_fatal); qdev_connect_gpio_out(dev, 0, isa_irq >= 0 ? isa_get_irq(d, isa_irq) : alt_irq); @@ -69,10 +70,10 @@ static inline ISADevice *kvm_pit_init(ISABus *bus, int base) DeviceState *dev; ISADevice *d; - d = isa_create(bus, TYPE_KVM_I8254); + d = isa_new(TYPE_KVM_I8254); dev = DEVICE(d); qdev_prop_set_uint32(dev, "iobase", base); - qdev_init_nofail(dev); + isa_realize_and_unref(d, bus, &error_fatal); return d; } diff --git a/hw/char/parallel-isa.c b/hw/char/parallel-isa.c index bcc577f61c..1ccbb96e70 100644 --- a/hw/char/parallel-isa.c +++ b/hw/char/parallel-isa.c @@ -14,17 +14,18 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "hw/char/parallel.h" +#include "qapi/error.h" static void parallel_init(ISABus *bus, int index, Chardev *chr) { DeviceState *dev; ISADevice *isadev; - isadev = isa_create(bus, "isa-parallel"); + isadev = isa_new("isa-parallel"); dev = DEVICE(isadev); qdev_prop_set_uint32(dev, "index", index); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + isa_realize_and_unref(isadev, bus, &error_fatal); } void parallel_hds_isa_init(ISABus *bus, int n) diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index f9b6eed783..f13dd98c60 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -138,11 +138,11 @@ static void serial_isa_init(ISABus *bus, int index, Chardev *chr) DeviceState *dev; ISADevice *isadev; - isadev = isa_create(bus, TYPE_ISA_SERIAL); + isadev = isa_new(TYPE_ISA_SERIAL); dev = DEVICE(isadev); qdev_prop_set_uint32(dev, "index", index); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + isa_realize_and_unref(isadev, bus, &error_fatal); } void serial_hds_isa_init(ISABus *bus, int from, int to) diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c index 1b3435ab58..db808029b0 100644 --- a/hw/dma/i8257.c +++ b/hw/dma/i8257.c @@ -27,6 +27,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "hw/dma/i8257.h" +#include "qapi/error.h" #include "qemu/main-loop.h" #include "qemu/module.h" #include "qemu/log.h" @@ -638,21 +639,21 @@ void i8257_dma_init(ISABus *bus, bool high_page_enable) ISADevice *isa1, *isa2; DeviceState *d; - isa1 = isa_create(bus, TYPE_I8257); + isa1 = isa_new(TYPE_I8257); d = DEVICE(isa1); qdev_prop_set_int32(d, "base", 0x00); qdev_prop_set_int32(d, "page-base", 0x80); qdev_prop_set_int32(d, "pageh-base", high_page_enable ? 0x480 : -1); qdev_prop_set_int32(d, "dshift", 0); - qdev_init_nofail(d); + isa_realize_and_unref(isa1, bus, &error_fatal); - isa2 = isa_create(bus, TYPE_I8257); + isa2 = isa_new(TYPE_I8257); d = DEVICE(isa2); qdev_prop_set_int32(d, "base", 0xc0); qdev_prop_set_int32(d, "page-base", 0x88); qdev_prop_set_int32(d, "pageh-base", high_page_enable ? 0x488 : -1); qdev_prop_set_int32(d, "dshift", 1); - qdev_init_nofail(d); + isa_realize_and_unref(isa2, bus, &error_fatal); isa_bus_dma(bus, ISADMA(isa1), ISADMA(isa2)); } diff --git a/hw/ide/isa.c b/hw/ide/isa.c index 8395807b08..f28c8fba6c 100644 --- a/hw/ide/isa.c +++ b/hw/ide/isa.c @@ -27,6 +27,7 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qapi/error.h" #include "qemu/module.h" #include "sysemu/dma.h" @@ -86,12 +87,12 @@ ISADevice *isa_ide_init(ISABus *bus, int iobase, int iobase2, int isairq, ISADevice *isadev; ISAIDEState *s; - isadev = isa_create(bus, TYPE_ISA_IDE); + isadev = isa_new(TYPE_ISA_IDE); dev = DEVICE(isadev); qdev_prop_set_uint32(dev, "iobase", iobase); qdev_prop_set_uint32(dev, "iobase2", iobase2); qdev_prop_set_uint32(dev, "irq", isairq); - qdev_init_nofail(dev); + isa_realize_and_unref(isadev, bus, &error_fatal); s = ISA_IDE(dev); if (hd0) { diff --git a/hw/intc/i8259_common.c b/hw/intc/i8259_common.c index 99f8f6abd5..d90b40fe4c 100644 --- a/hw/intc/i8259_common.c +++ b/hw/intc/i8259_common.c @@ -29,6 +29,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "monitor/monitor.h" +#include "qapi/error.h" static int irq_level[16]; static uint64_t irq_count[16]; @@ -94,13 +95,13 @@ ISADevice *i8259_init_chip(const char *name, ISABus *bus, bool master) DeviceState *dev; ISADevice *isadev; - isadev = isa_create(bus, name); + isadev = isa_new(name); dev = DEVICE(isadev); qdev_prop_set_uint32(dev, "iobase", master ? 0x20 : 0xa0); qdev_prop_set_uint32(dev, "elcr_addr", master ? 0x4d0 : 0x4d1); qdev_prop_set_uint8(dev, "elcr_mask", master ? 0xf8 : 0xde); qdev_prop_set_bit(dev, "master", master); - qdev_init_nofail(dev); + isa_realize_and_unref(isadev, bus, &error_fatal); return isadev; } diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index e6412d39b4..9a95ac3f96 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -190,8 +190,8 @@ ISADevice *isa_create_simple(ISABus *bus, const char *name) { ISADevice *dev; - dev = isa_create(bus, name); - qdev_init_nofail(DEVICE(dev)); + dev = isa_new(name); + isa_realize_and_unref(dev, bus, &error_fatal); return dev; } diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c index 3dcdc234a4..d3d58f9f16 100644 --- a/hw/isa/isa-superio.c +++ b/hw/isa/isa-superio.c @@ -51,7 +51,7 @@ static void isa_superio_realize(DeviceState *dev, Error **errp) } else { name = g_strdup_printf("parallel%d", i); } - isa = isa_create(bus, "isa-parallel"); + isa = isa_new("isa-parallel"); d = DEVICE(isa); qdev_prop_set_uint32(d, "index", i); if (k->parallel.get_iobase) { @@ -63,7 +63,7 @@ static void isa_superio_realize(DeviceState *dev, Error **errp) } qdev_prop_set_chr(d, "chardev", chr); object_property_add_child(OBJECT(dev), name, OBJECT(isa)); - qdev_init_nofail(d); + isa_realize_and_unref(isa, bus, &error_fatal); sio->parallel[i] = isa; trace_superio_create_parallel(i, k->parallel.get_iobase ? @@ -90,7 +90,7 @@ static void isa_superio_realize(DeviceState *dev, Error **errp) } else { name = g_strdup_printf("serial%d", i); } - isa = isa_create(bus, TYPE_ISA_SERIAL); + isa = isa_new(TYPE_ISA_SERIAL); d = DEVICE(isa); qdev_prop_set_uint32(d, "index", i); if (k->serial.get_iobase) { @@ -102,7 +102,7 @@ static void isa_superio_realize(DeviceState *dev, Error **errp) } qdev_prop_set_chr(d, "chardev", chr); object_property_add_child(OBJECT(dev), name, OBJECT(isa)); - qdev_init_nofail(d); + isa_realize_and_unref(isa, bus, &error_fatal); sio->serial[i] = isa; trace_superio_create_serial(i, k->serial.get_iobase ? @@ -115,7 +115,7 @@ static void isa_superio_realize(DeviceState *dev, Error **errp) /* Floppy disc */ if (!k->floppy.is_enabled || k->floppy.is_enabled(sio, 0)) { - isa = isa_create(bus, "isa-fdc"); + isa = isa_new("isa-fdc"); d = DEVICE(isa); if (k->floppy.get_iobase) { qdev_prop_set_uint32(d, "iobase", k->floppy.get_iobase(sio, 0)); @@ -136,7 +136,7 @@ static void isa_superio_realize(DeviceState *dev, Error **errp) &error_fatal); } object_property_add_child(OBJECT(sio), "isa-fdc", OBJECT(isa)); - qdev_init_nofail(d); + isa_realize_and_unref(isa, bus, &error_fatal); sio->floppy = isa; trace_superio_create_floppy(0, k->floppy.get_iobase ? @@ -146,14 +146,14 @@ static void isa_superio_realize(DeviceState *dev, Error **errp) } /* Keyboard, mouse */ - isa = isa_create(bus, TYPE_I8042); + isa = isa_new(TYPE_I8042); object_property_add_child(OBJECT(sio), TYPE_I8042, OBJECT(isa)); - qdev_init_nofail(DEVICE(isa)); + isa_realize_and_unref(isa, bus, &error_fatal); sio->kbc = isa; /* IDE */ if (k->ide.count && (!k->ide.is_enabled || k->ide.is_enabled(sio, 0))) { - isa = isa_create(bus, "isa-ide"); + isa = isa_new("isa-ide"); d = DEVICE(isa); if (k->ide.get_iobase) { qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(sio, 0)); @@ -164,7 +164,7 @@ static void isa_superio_realize(DeviceState *dev, Error **errp) if (k->ide.get_irq) { qdev_prop_set_uint32(d, "irq", k->ide.get_irq(sio, 0)); } - qdev_init_nofail(d); + isa_realize_and_unref(isa, bus, &error_fatal); object_property_add_child(OBJECT(sio), "isa-ide", OBJECT(isa)); sio->ide = isa; trace_superio_create_ide(0, diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index c7af0e16c3..73a40b2cbe 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -244,6 +244,7 @@ static void ibm_40p_init(MachineState *machine) SysBusDevice *pcihost, *s; Nvram *m48t59 = NULL; PCIBus *pci_bus; + ISADevice *isa_dev; ISABus *isa_bus; void *fw_cfg; int i; @@ -292,14 +293,16 @@ static void ibm_40p_init(MachineState *machine) isa_bus = ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0")); /* Memory controller */ - dev = DEVICE(isa_create(isa_bus, "rs6000-mc")); + isa_dev = isa_new("rs6000-mc"); + dev = DEVICE(isa_dev); qdev_prop_set_uint32(dev, "ram-size", machine->ram_size); - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); /* RTC */ - dev = DEVICE(isa_create(isa_bus, TYPE_MC146818_RTC)); + isa_dev = isa_new(TYPE_MC146818_RTC); + dev = DEVICE(isa_dev); qdev_prop_set_int32(dev, "base_year", 1900); - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); /* initialize CMOS checksums */ cmos_checksum = 0x6aa9; @@ -310,19 +313,22 @@ static void ibm_40p_init(MachineState *machine) if (defaults_enabled()) { m48t59 = NVRAM(isa_create_simple(isa_bus, "isa-m48t59")); - dev = DEVICE(isa_create(isa_bus, "cs4231a")); + isa_dev = isa_new("cs4231a"); + dev = DEVICE(isa_dev); qdev_prop_set_uint32(dev, "iobase", 0x830); qdev_prop_set_uint32(dev, "irq", 10); - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); - dev = DEVICE(isa_create(isa_bus, "pc87312")); + isa_dev = isa_new("pc87312"); + dev = DEVICE(isa_dev); qdev_prop_set_uint32(dev, "config", 12); - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); - dev = DEVICE(isa_create(isa_bus, "prep-systemio")); + isa_dev = isa_new("prep-systemio"); + dev = DEVICE(isa_dev); qdev_prop_set_uint32(dev, "ibm-planar-id", 0xfc); qdev_prop_set_uint32(dev, "equipment", 0xc0); - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(1, 0), "lsi53c810")); diff --git a/hw/rtc/m48t59-isa.c b/hw/rtc/m48t59-isa.c index 131eb5b7d3..f641225301 100644 --- a/hw/rtc/m48t59-isa.c +++ b/hw/rtc/m48t59-isa.c @@ -28,6 +28,7 @@ #include "hw/qdev-properties.h" #include "hw/rtc/m48t59.h" #include "m48t59-internal.h" +#include "qapi/error.h" #include "qemu/module.h" #define TYPE_M48TXX_ISA "isa-m48txx" @@ -70,10 +71,12 @@ Nvram *m48t59_init_isa(ISABus *bus, uint32_t io_base, uint16_t size, continue; } - dev = DEVICE(isa_create(bus, m48txx_isa_info[i].bus_name)); + ISADevice *isa_dev; // TODO move + isa_dev = isa_new(m48txx_isa_info[i].bus_name); + dev = DEVICE(isa_dev); qdev_prop_set_uint32(dev, "iobase", io_base); qdev_prop_set_int32(dev, "base-year", base_year); - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, bus, &error_fatal); return NVRAM(dev); } diff --git a/hw/rtc/mc146818rtc.c b/hw/rtc/mc146818rtc.c index 9c30cbdcd7..1a31d71b5e 100644 --- a/hw/rtc/mc146818rtc.c +++ b/hw/rtc/mc146818rtc.c @@ -973,10 +973,10 @@ ISADevice *mc146818_rtc_init(ISABus *bus, int base_year, qemu_irq intercept_irq) DeviceState *dev; ISADevice *isadev; - isadev = isa_create(bus, TYPE_MC146818_RTC); + isadev = isa_new(TYPE_MC146818_RTC); dev = DEVICE(isadev); qdev_prop_set_int32(dev, "base_year", base_year); - qdev_init_nofail(dev); + isa_realize_and_unref(isadev, bus, &error_fatal); if (intercept_irq) { qdev_connect_gpio_out(dev, 0, intercept_irq); } else { diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 0b898d6e3d..e791fb514a 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -338,7 +338,9 @@ static void ebus_realize(PCIDevice *pci_dev, Error **errp) for (i = 0; i < MAX_FD; i++) { fd[i] = drive_get(IF_FLOPPY, 0, i); } - dev = DEVICE(isa_create(s->isa_bus, TYPE_ISA_FDC)); + ISADevice *isa_dev; // TODO move + isa_dev = isa_new(TYPE_ISA_FDC); + dev = DEVICE(isa_dev); if (fd[0]) { qdev_prop_set_drive(dev, "driveA", blk_by_legacy_dinfo(fd[0]), &error_abort); @@ -348,7 +350,7 @@ static void ebus_realize(PCIDevice *pci_dev, Error **errp) &error_abort); } qdev_prop_set_uint32(dev, "dma", -1); - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, s->isa_bus, &error_fatal); /* Power */ dev = qdev_new(TYPE_SUN4U_POWER); From patchwork Fri May 29 13:44:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578847 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 103B8912 for ; Fri, 29 May 2020 14:02:13 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D6FBC20707 for ; Fri, 29 May 2020 14:02:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="AHHn9t/U" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D6FBC20707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:56584 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefaN-0002IE-Tp for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:02:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49260) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKS-0002vG-Qq for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:44 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:44330 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKL-00075Z-Pv for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:44 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VKPyLhBbxmHbz87ztUwKi8sVXbHe1Gzl3RzNmXwgQsA=; b=AHHn9t/UuoymZ/C4tSxx/kH9NrlXA75sNZnBzLnBy1kaaKck99sMgwyZFeEwQUkYBwoDh/ 01DhRy+iaa2v50rsDL1BEDg2wyw0rthPBh92RlmBMOdXpHc7eZaUtG7YS82y6u0ENPFPh8 ee1vXGgrNujPufNMBWnIK7hfQTUEA7E= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-414-WLniNmOOP022nUY_t2EnAA-1; Fri, 29 May 2020 09:45:31 -0400 X-MC-Unique: WLniNmOOP022nUY_t2EnAA-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 71ED0107ACCA for ; Fri, 29 May 2020 13:45:30 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 465615C1C8 for ; Fri, 29 May 2020 13:45:30 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 1F31711358D3; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 20/58] isa: Convert uses of isa_create(), isa_try_create() manually Date: Fri, 29 May 2020 15:44:45 +0200 Message-Id: <20200529134523.8477-21-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Same transformation as in the previous commit. Manual, because convincing Coccinelle to transform these cases is not worthwhile. Signed-off-by: Markus Armbruster --- include/hw/net/ne2000-isa.h | 5 +++-- hw/block/fdc.c | 4 ++-- hw/i386/pc.c | 4 ++-- hw/ppc/pnv.c | 9 ++++----- 4 files changed, 11 insertions(+), 11 deletions(-) diff --git a/include/hw/net/ne2000-isa.h b/include/hw/net/ne2000-isa.h index eef17a680d..af59ee0b02 100644 --- a/include/hw/net/ne2000-isa.h +++ b/include/hw/net/ne2000-isa.h @@ -13,6 +13,7 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "net/net.h" +#include "qapi/error.h" #define TYPE_ISA_NE2000 "ne2k_isa" @@ -23,14 +24,14 @@ static inline ISADevice *isa_ne2000_init(ISABus *bus, int base, int irq, qemu_check_nic_model(nd, "ne2k_isa"); - d = isa_try_create(bus, TYPE_ISA_NE2000); + d = isa_try_new(TYPE_ISA_NE2000); if (d) { DeviceState *dev = DEVICE(d); qdev_prop_set_uint32(dev, "iobase", base); qdev_prop_set_uint32(dev, "irq", irq); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + isa_realize_and_unref(d, bus, &error_fatal); } return d; } diff --git a/hw/block/fdc.c b/hw/block/fdc.c index 1feb398875..a3250f6fdb 100644 --- a/hw/block/fdc.c +++ b/hw/block/fdc.c @@ -2544,7 +2544,7 @@ ISADevice *fdctrl_init_isa(ISABus *bus, DriveInfo **fds) DeviceState *dev; ISADevice *isadev; - isadev = isa_try_create(bus, TYPE_ISA_FDC); + isadev = isa_try_new(TYPE_ISA_FDC); if (!isadev) { return NULL; } @@ -2558,7 +2558,7 @@ ISADevice *fdctrl_init_isa(ISABus *bus, DriveInfo **fds) qdev_prop_set_drive(dev, "driveB", blk_by_legacy_dinfo(fds[1]), &error_fatal); } - qdev_init_nofail(dev); + isa_realize_and_unref(isadev, bus, &error_fatal); return isadev; } diff --git a/hw/i386/pc.c b/hw/i386/pc.c index b549d0bbfc..280560f790 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1157,14 +1157,14 @@ static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl, bool no_vmport) i8042 = isa_create_simple(isa_bus, "i8042"); if (!no_vmport) { isa_create_simple(isa_bus, TYPE_VMPORT); - vmmouse = isa_try_create(isa_bus, "vmmouse"); + vmmouse = isa_try_new("vmmouse"); } else { vmmouse = NULL; } if (vmmouse) { object_property_set_link(OBJECT(vmmouse), OBJECT(i8042), "i8042", &error_abort); - qdev_init_nofail(DEVICE(vmmouse)); + isa_realize_and_unref(vmmouse, isa_bus, &error_fatal); } port92 = isa_create_simple(isa_bus, TYPE_PORT92); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index e0588285a2..ffaf12b006 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -694,12 +694,11 @@ static bool pnv_match_cpu(const char *default_type, const char *cpu_type) static void pnv_ipmi_bt_init(ISABus *bus, IPMIBmc *bmc, uint32_t irq) { - Object *obj; + ISADevice *dev = isa_new("isa-ipmi-bt"); - obj = OBJECT(isa_create(bus, "isa-ipmi-bt")); - object_property_set_link(obj, OBJECT(bmc), "bmc", &error_fatal); - object_property_set_int(obj, irq, "irq", &error_fatal); - object_property_set_bool(obj, true, "realized", &error_fatal); + object_property_set_link(OBJECT(dev), OBJECT(bmc), "bmc", &error_fatal); + object_property_set_int(OBJECT(dev), irq, "irq", &error_fatal); + isa_realize_and_unref(dev, bus, &error_fatal); } static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon) From patchwork Fri May 29 13:44:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578779 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7B888139A for ; Fri, 29 May 2020 13:51:06 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 504E8206A1 for ; Fri, 29 May 2020 13:51:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="atmMdUhI" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 504E8206A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:34610 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefPd-0004gu-EK for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:51:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49108) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKJ-0002ZA-Be for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:35 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:43936 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKI-00071N-BW for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:34 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759933; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5VTl7TXODL/XliioKkpwYOl0yhnmRReQFsgo487Hg6o=; b=atmMdUhIhAhN9fg1FaXCaK7n2HP39tLHUGU+vhKqJoi4Z86HPD7nXrlcSD02xgVYsdyzV8 L6syx7YrL6B0ryJkb6xMEZwztDvnkYi0s8x8zsi5ZhpKen4ORYIijOxvEviwY2bBmZNlkF DAat9xu7oJcS/APCV2RGL75KiIPR0mY= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-145-eNxNqZlwNuWFqFP9ZuLjAw-1; Fri, 29 May 2020 09:45:31 -0400 X-MC-Unique: eNxNqZlwNuWFqFP9ZuLjAw-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id C87DF1005510 for ; Fri, 29 May 2020 13:45:30 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9C9905D9F3 for ; Fri, 29 May 2020 13:45:30 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 2271B11358D4; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 21/58] isa: isa_create(), isa_try_create() are now unused, drop Date: Fri, 29 May 2020 15:44:46 +0200 Message-Id: <20200529134523.8477-22-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:27:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Markus Armbruster --- include/hw/isa/isa.h | 2 -- hw/isa/isa-bus.c | 16 ---------------- 2 files changed, 18 deletions(-) diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 3b6215fafe..52b61eed88 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -103,8 +103,6 @@ void isa_bus_dma(ISABus *bus, IsaDma *dma8, IsaDma *dma16); IsaDma *isa_get_dma(ISABus *bus, int nchan); MemoryRegion *isa_address_space(ISADevice *dev); MemoryRegion *isa_address_space_io(ISADevice *dev); -ISADevice *isa_create(ISABus *bus, const char *name); -ISADevice *isa_try_create(ISABus *bus, const char *name); ISADevice *isa_new(const char *name); ISADevice *isa_try_new(const char *name); bool isa_realize_and_unref(ISADevice *dev, ISABus *bus, Error **errp); diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index 9a95ac3f96..630985604d 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -160,22 +160,6 @@ static void isa_device_init(Object *obj) dev->isairq[1] = -1; } -ISADevice *isa_create(ISABus *bus, const char *name) -{ - DeviceState *dev; - - dev = qdev_create(BUS(bus), name); - return ISA_DEVICE(dev); -} - -ISADevice *isa_try_create(ISABus *bus, const char *name) -{ - DeviceState *dev; - - dev = qdev_try_create(BUS(bus), name); - return ISA_DEVICE(dev); -} - ISADevice *isa_new(const char *name) { return ISA_DEVICE(qdev_new(name)); From patchwork Fri May 29 13:44:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578811 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 43781912 for ; Fri, 29 May 2020 13:54:41 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1A3FA206A1 for ; Fri, 29 May 2020 13:54:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="Q0q2g/d/" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1A3FA206A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:51614 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefT6-0003AE-8Z for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:54:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49124) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKK-0002cW-Is for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:36 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:51707 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKI-00071q-K3 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:35 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759933; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BKucqzmz3M9fzHt50LGTVKrd4OguqAv1GA9qbMtwZXo=; b=Q0q2g/d/+5Shiy1A4zT3NmsUQ1IOIK9g1OZXQ5eGcH+vtidwCdbi2THbtFEh0DplicjW27 u8SvwILFXKPo/G0Ib+TIzlyw7BguwVYwFyfBNCrvJartMjeFvrsJK+fvPSeO29RkxFyHrW 5RTaF07uKiMEIVSNul+06jjfrhSP67A= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-421-ToVS3KOAOmScwkezTqdmMw-1; Fri, 29 May 2020 09:45:32 -0400 X-MC-Unique: ToVS3KOAOmScwkezTqdmMw-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 1021818FE860; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A54AB60C81; Fri, 29 May 2020 13:45:30 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 25C4911358D5; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 22/58] ssi: ssi_auto_connect_slaves() never does anything, drop Date: Fri, 29 May 2020 15:44:47 +0200 Message-Id: <20200529134523.8477-23-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Alistair Francis Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" ssi_auto_connect_slaves(parent, cs_line, bus) iterates over @parent's QOM children @dev of type TYPE_SSI_SLAVE. It puts these on @bus, and sets cs_line[] to qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0). Suspicious: there is no protection against overrunning cs_line[]. Turns out it's safe because ssi_auto_connect_slaves() never finds any such children. Its called by realize methods of some (but not all) devices providing an SSI bus, and gets passed the device. SSI slave devices are always created with ssi_create_slave_no_init(), optionally via ssi_create_slave(). This adds them to their SSI bus. It doesn't set their QOM parent. ssi_create_slave_no_init() is always immediately followed by qdev_init_nofail(), with no QOM parent assigned, so device_set_realized() puts the device into the /machine/unattached/ orphanage. None become QOM children of a device providing an SSI bus. ssi_auto_connect_slaves() was added in commit b4ae3cfa57 "ssi: Add slave autoconnect helper". I can't see which slaves it was supposed to connect back then. Cc: Alistair Francis Signed-off-by: Markus Armbruster Acked-by: Alistair Francis --- include/hw/ssi/ssi.h | 4 ---- hw/ssi/aspeed_smc.c | 1 - hw/ssi/imx_spi.c | 2 -- hw/ssi/mss-spi.c | 1 - hw/ssi/ssi.c | 33 --------------------------------- hw/ssi/xilinx_spi.c | 1 - hw/ssi/xilinx_spips.c | 4 ---- 7 files changed, 46 deletions(-) diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h index 1107cb89ee..1725b13c32 100644 --- a/include/hw/ssi/ssi.h +++ b/include/hw/ssi/ssi.h @@ -86,10 +86,6 @@ SSIBus *ssi_create_bus(DeviceState *parent, const char *name); uint32_t ssi_transfer(SSIBus *bus, uint32_t val); -/* Automatically connect all children nodes a spi controller as slaves */ -void ssi_auto_connect_slaves(DeviceState *parent, qemu_irq *cs_lines, - SSIBus *bus); - /* max111x.c */ void max111x_set_input(DeviceState *dev, int line, uint8_t value); diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index 2edccef2d5..4fab1f5f85 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -1356,7 +1356,6 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp) /* Setup cs_lines for slaves */ s->cs_lines = g_new0(qemu_irq, s->num_cs); - ssi_auto_connect_slaves(dev, s->cs_lines, s->spi); for (i = 0; i < s->num_cs; ++i) { sysbus_init_irq(sbd, &s->cs_lines[i]); diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c index 2dd9a631e1..2f09f15892 100644 --- a/hw/ssi/imx_spi.c +++ b/hw/ssi/imx_spi.c @@ -424,8 +424,6 @@ static void imx_spi_realize(DeviceState *dev, Error **errp) sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem); sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq); - ssi_auto_connect_slaves(dev, s->cs_lines, s->bus); - for (i = 0; i < 4; ++i) { sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->cs_lines[i]); } diff --git a/hw/ssi/mss-spi.c b/hw/ssi/mss-spi.c index 3050fabb69..b2432c5a13 100644 --- a/hw/ssi/mss-spi.c +++ b/hw/ssi/mss-spi.c @@ -376,7 +376,6 @@ static void mss_spi_realize(DeviceState *dev, Error **errp) s->spi = ssi_create_bus(dev, "spi"); sysbus_init_irq(sbd, &s->irq); - ssi_auto_connect_slaves(dev, &s->cs_line, s->spi); sysbus_init_irq(sbd, &s->cs_line); memory_region_init_io(&s->mmio, OBJECT(s), &spi_ops, s, diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c index c6415eb6e3..54106f5ef8 100644 --- a/hw/ssi/ssi.c +++ b/hw/ssi/ssi.c @@ -142,36 +142,3 @@ static void ssi_slave_register_types(void) } type_init(ssi_slave_register_types) - -typedef struct SSIAutoConnectArg { - qemu_irq **cs_linep; - SSIBus *bus; -} SSIAutoConnectArg; - -static int ssi_auto_connect_slave(Object *child, void *opaque) -{ - SSIAutoConnectArg *arg = opaque; - SSISlave *dev = (SSISlave *)object_dynamic_cast(child, TYPE_SSI_SLAVE); - qemu_irq cs_line; - - if (!dev) { - return 0; - } - - cs_line = qdev_get_gpio_in_named(DEVICE(dev), SSI_GPIO_CS, 0); - qdev_set_parent_bus(DEVICE(dev), BUS(arg->bus)); - **arg->cs_linep = cs_line; - (*arg->cs_linep)++; - return 0; -} - -void ssi_auto_connect_slaves(DeviceState *parent, qemu_irq *cs_line, - SSIBus *bus) -{ - SSIAutoConnectArg arg = { - .cs_linep = &cs_line, - .bus = bus - }; - - object_child_foreach(OBJECT(parent), ssi_auto_connect_slave, &arg); -} diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c index eba7ccd46a..80d1488dc7 100644 --- a/hw/ssi/xilinx_spi.c +++ b/hw/ssi/xilinx_spi.c @@ -334,7 +334,6 @@ static void xilinx_spi_realize(DeviceState *dev, Error **errp) sysbus_init_irq(sbd, &s->irq); s->cs_lines = g_new0(qemu_irq, s->num_cs); - ssi_auto_connect_slaves(dev, s->cs_lines, s->spi); for (i = 0; i < s->num_cs; ++i) { sysbus_init_irq(sbd, &s->cs_lines[i]); } diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index e76cf290c8..b9371dbf8d 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -1270,7 +1270,6 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp) XilinxSPIPS *s = XILINX_SPIPS(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); XilinxSPIPSClass *xsc = XILINX_SPIPS_GET_CLASS(s); - qemu_irq *cs; int i; DB_PRINT_L(0, "realized spips\n"); @@ -1297,9 +1296,6 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp) s->cs_lines = g_new0(qemu_irq, s->num_cs * s->num_busses); s->cs_lines_state = g_new0(bool, s->num_cs * s->num_busses); - for (i = 0, cs = s->cs_lines; i < s->num_busses; ++i, cs += s->num_cs) { - ssi_auto_connect_slaves(DEVICE(s), cs, s->spi[i]); - } sysbus_init_irq(sbd, &s->irq); for (i = 0; i < s->num_cs * s->num_busses; ++i) { From patchwork Fri May 29 13:44:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578881 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2A4F81392 for ; Fri, 29 May 2020 14:08:50 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0072620707 for ; Fri, 29 May 2020 14:08:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="FP8w2FtR" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0072620707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:59768 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefgn-0001wU-6C for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:08:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49268) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKT-0002xe-SV for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:45 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:46153 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00075x-66 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:45 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9RZd3JS+Wx1/sbCEEucDkwqJSE9aXuAG8Bc3TbBetCE=; b=FP8w2FtRTpv2hDF0dxhQ94bGbJ1kVeY6v3/a+lw7/2gpCL3U3QwD+NnC5dCGbKPwk369hn QqeUJ2QDDTrpKvu2kp0LPS39fGkEpXqefvApzFwi0x4VDv4THo0mBkX9KTs1G4ysgA+fdG S1vKD267dnepL+PVoLZNCJBfkKH4SHo= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-141-5pf67p5YPISyXbX_eWextg-1; Fri, 29 May 2020 09:45:32 -0400 X-MC-Unique: 5pf67p5YPISyXbX_eWextg-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 69B3D8015D2; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 1631C6298C; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 29B2F11358D6; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 23/58] ssi: Convert uses of ssi_create_slave_no_init() with Coccinelle Date: Fri, 29 May 2020 15:44:48 +0200 Message-Id: <20200529134523.8477-24-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Alistair Francis Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Replace dev = ssi_create_slave_no_init(bus, type_name); ... qdev_init_nofail(dev); by dev = qdev_new(type_name); ... qdev_realize_and_unref(dev, bus, &error_fatal); Recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. @@ type SSIBus; identifier bus; expression dev, qbus, expr; expression list args; @@ - bus = (SSIBus *)qbus; + bus = qbus; // TODO fix up decl ... - dev = ssi_create_slave_no_init(bus, args); + dev = qdev_new(args); ... when != dev = expr - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; @@ - dev = ssi_create_slave_no_init(bus, args); + dev = qdev_new(args); ... when != dev = expr - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, BUS(bus), &error_fatal); Bus declarations fixed up manually. Cc: Alistair Francis Signed-off-by: Markus Armbruster Reviewed-by: Alistair Francis --- hw/arm/aspeed.c | 4 ++-- hw/arm/msf2-som.c | 8 ++++---- hw/arm/sabrelite.c | 4 ++-- hw/arm/xilinx_zynq.c | 4 ++-- hw/arm/xlnx-zcu102.c | 16 ++++++++-------- hw/microblaze/petalogix_ml605_mmu.c | 4 ++-- 6 files changed, 20 insertions(+), 20 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 63a7105e8b..9c25d5da96 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -225,12 +225,12 @@ static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, DriveInfo *dinfo = drive_get_next(IF_MTD); qemu_irq cs_line; - fl->flash = ssi_create_slave_no_init(s->spi, flashtype); + fl->flash = qdev_new(flashtype); if (dinfo) { qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo), errp); } - qdev_init_nofail(fl->flash); + qdev_realize_and_unref(fl->flash, BUS(s->spi), &error_fatal); cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0); sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line); diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c index e398703742..ca9cbe1acb 100644 --- a/hw/arm/msf2-som.c +++ b/hw/arm/msf2-som.c @@ -47,7 +47,7 @@ static void emcraft_sf2_s2s010_init(MachineState *machine) MachineClass *mc = MACHINE_GET_CLASS(machine); DriveInfo *dinfo = drive_get_next(IF_MTD); qemu_irq cs_line; - SSIBus *spi_bus; + BusState *spi_bus; MemoryRegion *sysmem = get_system_memory(); MemoryRegion *ddr = g_new(MemoryRegion, 1); @@ -82,14 +82,14 @@ static void emcraft_sf2_s2s010_init(MachineState *machine) soc = MSF2_SOC(dev); /* Attach SPI flash to SPI0 controller */ - spi_bus = (SSIBus *)qdev_get_child_bus(dev, "spi0"); - spi_flash = ssi_create_slave_no_init(spi_bus, "s25sl12801"); + spi_bus = qdev_get_child_bus(dev, "spi0"); + spi_flash = qdev_new("s25sl12801"); qdev_prop_set_uint8(spi_flash, "spansion-cr2nv", 1); if (dinfo) { qdev_prop_set_drive(spi_flash, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); } - qdev_init_nofail(spi_flash); + qdev_realize_and_unref(spi_flash, spi_bus, &error_fatal); cs_line = qdev_get_gpio_in_named(spi_flash, SSI_GPIO_CS, 0); sysbus_connect_irq(SYS_BUS_DEVICE(&soc->spi[0]), 1, cs_line); diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c index 96cb30aa3c..33d731549d 100644 --- a/hw/arm/sabrelite.c +++ b/hw/arm/sabrelite.c @@ -75,13 +75,13 @@ static void sabrelite_init(MachineState *machine) qemu_irq cs_line; DriveInfo *dinfo = drive_get_next(IF_MTD); - flash_dev = ssi_create_slave_no_init(spi_bus, "sst25vf016b"); + flash_dev = qdev_new("sst25vf016b"); if (dinfo) { qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); } - qdev_init_nofail(flash_dev); + qdev_realize_and_unref(flash_dev, BUS(spi_bus), &error_fatal); cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); sysbus_connect_irq(SYS_BUS_DEVICE(spi_dev), 1, cs_line); diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 5fbd2b2e31..0e0f0976c4 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -157,12 +157,12 @@ static inline void zynq_init_spi_flashes(uint32_t base_addr, qemu_irq irq, for (j = 0; j < num_ss; ++j) { DriveInfo *dinfo = drive_get_next(IF_MTD); - flash_dev = ssi_create_slave_no_init(spi, "n25q128"); + flash_dev = qdev_new("n25q128"); if (dinfo) { qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); } - qdev_init_nofail(flash_dev); + qdev_realize_and_unref(flash_dev, BUS(spi), &error_fatal); cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); sysbus_connect_irq(busdev, i * num_ss + j + 1, cs_line); diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 4229b2d936..77c84b82ab 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -149,21 +149,21 @@ static void xlnx_zcu102_init(MachineState *machine) } for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) { - SSIBus *spi_bus; + BusState *spi_bus; DeviceState *flash_dev; qemu_irq cs_line; DriveInfo *dinfo = drive_get_next(IF_MTD); gchar *bus_name = g_strdup_printf("spi%d", i); - spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name); + spi_bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name); g_free(bus_name); - flash_dev = ssi_create_slave_no_init(spi_bus, "sst25wf080"); + flash_dev = qdev_new("sst25wf080"); if (dinfo) { qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); } - qdev_init_nofail(flash_dev); + qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal); cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); @@ -171,22 +171,22 @@ static void xlnx_zcu102_init(MachineState *machine) } for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_FLASH; i++) { - SSIBus *spi_bus; + BusState *spi_bus; DeviceState *flash_dev; qemu_irq cs_line; DriveInfo *dinfo = drive_get_next(IF_MTD); int bus = i / XLNX_ZYNQMP_NUM_QSPI_BUS_CS; gchar *bus_name = g_strdup_printf("qspi%d", bus); - spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name); + spi_bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name); g_free(bus_name); - flash_dev = ssi_create_slave_no_init(spi_bus, "n25q512a11"); + flash_dev = qdev_new("n25q512a11"); if (dinfo) { qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); } - qdev_init_nofail(flash_dev); + qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal); cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c index 2e7a3fa119..d4bfa233c9 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -186,12 +186,12 @@ petalogix_ml605_init(MachineState *machine) DriveInfo *dinfo = drive_get_next(IF_MTD); qemu_irq cs_line; - dev = ssi_create_slave_no_init(spi, "n25q128"); + dev = qdev_new("n25q128"); if (dinfo) { qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, BUS(spi), &error_fatal); cs_line = qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0); sysbus_connect_irq(busdev, i+1, cs_line); From patchwork Fri May 29 13:44:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578865 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4E02214F6 for ; Fri, 29 May 2020 14:05:26 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 249AA207F9 for ; Fri, 29 May 2020 14:05:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="aF0FBw2E" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 249AA207F9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:42834 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefdV-0001n7-3V for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:05:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49250) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKR-0002rF-Fo for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:43 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:48087 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKI-000726-W5 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:43 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759934; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pXI+EB3cAT5GKotMcn/5/3S0rTrVh4AkTgV2CNn2MZE=; b=aF0FBw2EpOv0f/dLZKbNEoDwI6nZtM4Cb0HJlqHRTWAM3Rfn4K7usG5tuvsLeKj+Vd9c0l TEUwNbsI/oZ5NtR7T8zZ1pssabcThRRKfTkI/ctipciQpA70OTN+JCAoSzOZNE3jqwFVnF 1cHF/UuMZ9b/OO6Kj8+X6EbQsd6UviA= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-277-kmdmtx9RPkyha2gNmco0ag-1; Fri, 29 May 2020 09:45:32 -0400 X-MC-Unique: kmdmtx9RPkyha2gNmco0ag-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 619A78014D4; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 277217A8C5; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 2CF0E11358D8; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 24/58] ssi: Convert last use of ssi_create_slave_no_init() manually Date: Fri, 29 May 2020 15:44:49 +0200 Message-Id: <20200529134523.8477-25-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Alistair Francis Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Same transformation as in the previous commit. Manual, because convincing Coccinelle to transform this case is not worthwhile. Cc: Alistair Francis Signed-off-by: Markus Armbruster Acked-by: Alistair Francis --- hw/ssi/ssi.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c index 54106f5ef8..58e7d904db 100644 --- a/hw/ssi/ssi.c +++ b/hw/ssi/ssi.c @@ -16,6 +16,7 @@ #include "hw/ssi/ssi.h" #include "migration/vmstate.h" #include "qemu/module.h" +#include "qapi/error.h" struct SSIBus { BusState parent_obj; @@ -96,9 +97,9 @@ DeviceState *ssi_create_slave_no_init(SSIBus *bus, const char *name) DeviceState *ssi_create_slave(SSIBus *bus, const char *name) { - DeviceState *dev = ssi_create_slave_no_init(bus, name); + DeviceState *dev = qdev_new(name); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, &bus->parent_obj, &error_fatal); return dev; } From patchwork Fri May 29 13:44:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578815 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F2B75139A for ; Fri, 29 May 2020 13:55:49 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C65E6214D8 for ; Fri, 29 May 2020 13:55:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="SeGFfTA4" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C65E6214D8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:57466 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefUC-0005ek-Pq for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:55:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49118) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKK-0002c6-7x for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:36 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:27888 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKI-00071v-SJ for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:35 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759934; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jkawstJ+eTtlrC7l+Q1NnZOD+/PLJHhlF7FVFA1/FQM=; b=SeGFfTA4WfXsHT0IiPH0t8cQicSt0CqIRZOg9DxxdHtlBYDFXkRk9sY6G186rJRSRGIeKK Yn55GTEHrt0qjN7o19/RiLB0uDKd7WsqS3G9NSFLm5lSTXWMB7jPzAsqgSJekLjb8DtWJN QP50TJYZLkVljiidOi2IOQyV2n5m8qs= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-430-ezKnBbR0NEW8DNrLjRE6BQ-1; Fri, 29 May 2020 09:45:32 -0400 X-MC-Unique: ezKnBbR0NEW8DNrLjRE6BQ-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 6257218FE864; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 287AF5C1B0; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 30D1411358D9; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 25/58] ssi: ssi_create_slave_no_init() is now unused, drop Date: Fri, 29 May 2020 15:44:50 +0200 Message-Id: <20200529134523.8477-26-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/28 23:43:13 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Alistair Francis Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Cc: Alistair Francis Signed-off-by: Markus Armbruster Reviewed-by: Alistair Francis --- include/hw/ssi/ssi.h | 1 - hw/ssi/ssi.c | 5 ----- 2 files changed, 6 deletions(-) diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h index 1725b13c32..93f2b8b0be 100644 --- a/include/hw/ssi/ssi.h +++ b/include/hw/ssi/ssi.h @@ -79,7 +79,6 @@ extern const VMStateDescription vmstate_ssi_slave; } DeviceState *ssi_create_slave(SSIBus *bus, const char *name); -DeviceState *ssi_create_slave_no_init(SSIBus *bus, const char *name); /* Master interface. */ SSIBus *ssi_create_bus(DeviceState *parent, const char *name); diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c index 58e7d904db..67b48c31cd 100644 --- a/hw/ssi/ssi.c +++ b/hw/ssi/ssi.c @@ -90,11 +90,6 @@ static const TypeInfo ssi_slave_info = { .abstract = true, }; -DeviceState *ssi_create_slave_no_init(SSIBus *bus, const char *name) -{ - return qdev_create(BUS(bus), name); -} - DeviceState *ssi_create_slave(SSIBus *bus, const char *name) { DeviceState *dev = qdev_new(name); From patchwork Fri May 29 13:44:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578887 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 632C914F6 for ; Fri, 29 May 2020 14:10:47 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3A2CC20707 for ; Fri, 29 May 2020 14:10:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="g3AAA5ES" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3A2CC20707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:40082 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefig-0005YU-FC for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:10:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49272) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKW-00034g-CY for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:48 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:20174 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00076Q-Gs for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:47 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RzUfjTeiVVBWaDglLGp//oKx+vHDe7ioBDgbVfUvLMs=; b=g3AAA5ESjQtRDvIqZRAy9CC6XJi6fKL0koLbIya0OhGG/ypUHhxQ6BBNW7bcewsQxMWt4w xikaP3uUMIx09hpLDrY+TnQi9s07Ighg4LcTuWr6QEHMkEnwoEflcj9aY+mHMXPO73NU0r aB4btTG97gJy2M2bv0mzO9crzuCZRkU= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-312-Q9V19hLcN-CH0yWNWyI9HA-1; Fri, 29 May 2020 09:45:34 -0400 X-MC-Unique: Q9V19hLcN-CH0yWNWyI9HA-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id EB5C28014D4 for ; Fri, 29 May 2020 13:45:33 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 28A395C1C8; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 340E711358DA; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 26/58] usb: New usb_new(), usb_realize_and_unref() Date: Fri, 29 May 2020 15:44:51 +0200 Message-Id: <20200529134523.8477-27-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/28 23:43:13 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" I'm converting from qdev_create()/qdev_init_nofail() to qdev_new()/qdev_realize_and_unref(); recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. USB devices use qdev_create() through usb_create(). Provide usb_new() and usb_realize_and_unref() for converting USB devices. Cc: Gerd Hoffmann Signed-off-by: Markus Armbruster Reviewed-by: Gerd Hoffmann Reviewed-by: Philippe Mathieu-Daudé --- include/hw/usb.h | 2 ++ hw/usb/bus.c | 10 ++++++++++ 2 files changed, 12 insertions(+) diff --git a/include/hw/usb.h b/include/hw/usb.h index 1cf1cd9584..2d2730f161 100644 --- a/include/hw/usb.h +++ b/include/hw/usb.h @@ -534,6 +534,8 @@ USBBus *usb_bus_find(int busnr); void usb_legacy_register(const char *typename, const char *usbdevice_name, USBDevice *(*usbdevice_init)(USBBus *bus, const char *params)); +USBDevice *usb_new(const char *name); +bool usb_realize_and_unref(USBDevice *dev, USBBus *bus, Error **errp); USBDevice *usb_create(USBBus *bus, const char *name); USBDevice *usb_create_simple(USBBus *bus, const char *name); USBDevice *usbdevice_create(const char *cmdline); diff --git a/hw/usb/bus.c b/hw/usb/bus.c index d28eff1b5c..6b0d9f9e4d 100644 --- a/hw/usb/bus.c +++ b/hw/usb/bus.c @@ -314,6 +314,16 @@ void usb_legacy_register(const char *typename, const char *usbdevice_name, } } +USBDevice *usb_new(const char *name) +{ + return USB_DEVICE(qdev_new(name)); +} + +bool usb_realize_and_unref(USBDevice *dev, USBBus *bus, Error **errp) +{ + return qdev_realize_and_unref(&dev->qdev, &bus->qbus, errp); +} + USBDevice *usb_create(USBBus *bus, const char *name) { DeviceState *dev; From patchwork Fri May 29 13:44:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578877 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B01A91391 for ; Fri, 29 May 2020 14:07:27 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 86FE7208B8 for ; Fri, 29 May 2020 14:07:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="i9plrdzp" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 86FE7208B8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:53662 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jeffS-0007vp-LC for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:07:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49280) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKX-00037X-FK for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:49 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:27398 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00076s-Jf for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:48 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EY0IYZFpghb6voAWM5wxO8MeU3j2Y+3q7s0cB00vgyQ=; b=i9plrdzpcg0jcIJT1zujnO1XGTNU5usj9me02osR7TWp08Rqrcm//vLeidwSURPe0RP0oa HvSHvDYGoeC5WIxbLYm22TaA8aJE+ZaFqSGKTASLGr6ZgTWEIg7mAsSdn36G6Nv8+xkaJd E33ojLkm60JCZ4J8N0DUs9p3uIOUTC8= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-228-88pcWjbhO1OGqHF9RiFDPg-1; Fri, 29 May 2020 09:45:35 -0400 X-MC-Unique: 88pcWjbhO1OGqHF9RiFDPg-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 54C4EEC1A1 for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 4E82910013D4; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 3796511358DC; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 27/58] usb: Convert uses of usb_create() Date: Fri, 29 May 2020 15:44:52 +0200 Message-Id: <20200529134523.8477-28-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Replace dev = usb_create(bus, type_name); ... object_property_set_bool(OBJECT(dev), true, "realized", &err); by dev = isa_new(type_name); ... usb_realize_and_unref(dev, bus, &err); Recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. Cc: Gerd Hoffmann Signed-off-by: Markus Armbruster Reviewed-by: Gerd Hoffmann --- include/hw/usb.h | 3 +-- hw/usb/bus.c | 11 +++++------ hw/usb/dev-serial.c | 4 ++-- 3 files changed, 8 insertions(+), 10 deletions(-) diff --git a/include/hw/usb.h b/include/hw/usb.h index 2d2730f161..86093d941a 100644 --- a/include/hw/usb.h +++ b/include/hw/usb.h @@ -532,8 +532,7 @@ void usb_bus_new(USBBus *bus, size_t bus_size, void usb_bus_release(USBBus *bus); USBBus *usb_bus_find(int busnr); void usb_legacy_register(const char *typename, const char *usbdevice_name, - USBDevice *(*usbdevice_init)(USBBus *bus, - const char *params)); + USBDevice *(*usbdevice_init)(const char *params)); USBDevice *usb_new(const char *name); bool usb_realize_and_unref(USBDevice *dev, USBBus *bus, Error **errp); USBDevice *usb_create(USBBus *bus, const char *name); diff --git a/hw/usb/bus.c b/hw/usb/bus.c index 6b0d9f9e4d..da85b8b005 100644 --- a/hw/usb/bus.c +++ b/hw/usb/bus.c @@ -296,14 +296,13 @@ typedef struct LegacyUSBFactory { const char *name; const char *usbdevice_name; - USBDevice *(*usbdevice_init)(USBBus *bus, const char *params); + USBDevice *(*usbdevice_init)(const char *params); } LegacyUSBFactory; static GSList *legacy_usb_factory; void usb_legacy_register(const char *typename, const char *usbdevice_name, - USBDevice *(*usbdevice_init)(USBBus *bus, - const char *params)) + USBDevice *(*usbdevice_init)(const char *params)) { if (usbdevice_name) { LegacyUSBFactory *f = g_malloc0(sizeof(*f)); @@ -710,19 +709,19 @@ USBDevice *usbdevice_create(const char *cmdline) } if (f->usbdevice_init) { - dev = f->usbdevice_init(bus, params); + dev = f->usbdevice_init(params); } else { if (*params) { error_report("usbdevice %s accepts no params", driver); return NULL; } - dev = usb_create(bus, f->name); + dev = usb_new(f->name); } if (!dev) { error_report("Failed to create USB device '%s'", f->name); return NULL; } - object_property_set_bool(OBJECT(dev), true, "realized", &err); + usb_realize_and_unref(dev, bus, &err); if (err) { error_reportf_err(err, "Failed to initialize USB device '%s': ", f->name); diff --git a/hw/usb/dev-serial.c b/hw/usb/dev-serial.c index d2c03681b7..7e50e3ba47 100644 --- a/hw/usb/dev-serial.c +++ b/hw/usb/dev-serial.c @@ -542,7 +542,7 @@ static void usb_serial_realize(USBDevice *dev, Error **errp) s->intr = usb_ep_get(dev, USB_TOKEN_IN, 1); } -static USBDevice *usb_braille_init(USBBus *bus, const char *unused) +static USBDevice *usb_braille_init(const char *unused) { USBDevice *dev; Chardev *cdrv; @@ -551,7 +551,7 @@ static USBDevice *usb_braille_init(USBBus *bus, const char *unused) if (!cdrv) return NULL; - dev = usb_create(bus, "usb-braille"); + dev = usb_new("usb-braille"); qdev_prop_set_chr(&dev->qdev, "chardev", cdrv); return dev; } From patchwork Fri May 29 13:44:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578841 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C7DE7912 for ; Fri, 29 May 2020 14:00:27 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9E52D20707 for ; Fri, 29 May 2020 14:00:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="QcqveYA5" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9E52D20707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:50332 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefYg-0006Zo-Nw for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:00:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49282) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKX-00038N-La for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:49 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:44647 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00076g-MT for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:49 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+3HwdQ/vrS+EzUTy7Re0yu+XdKukHh0BNQWMv9zUDLg=; b=QcqveYA546wuoQ9ruEZlmU/WtF4klMgJpMJha8s7pqE9Y01fz1lWl8zZhSkwoMM8jRdOkV tLECksVXBw3u34KIsONmHzn5DKGVSgb5cRHme+ueKxIyAWoNFocOgRbWJBAlRnZnE+sQm0 hjlqt7uoipcpy2LRjr/yEhfsJCRqHHw= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-212-_aSq9WZGM0CmiTwF4j8jUA-1; Fri, 29 May 2020 09:45:35 -0400 X-MC-Unique: _aSq9WZGM0CmiTwF4j8jUA-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 23902835B44 for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 4EE46768B1; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 3BAF611358DD; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 28/58] usb: usb_create() is now unused, drop Date: Fri, 29 May 2020 15:44:53 +0200 Message-Id: <20200529134523.8477-29-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Cc: Gerd Hoffmann Signed-off-by: Markus Armbruster Reviewed-by: Gerd Hoffmann --- include/hw/usb.h | 1 - hw/usb/bus.c | 8 -------- 2 files changed, 9 deletions(-) diff --git a/include/hw/usb.h b/include/hw/usb.h index 86093d941a..817dcebbef 100644 --- a/include/hw/usb.h +++ b/include/hw/usb.h @@ -535,7 +535,6 @@ void usb_legacy_register(const char *typename, const char *usbdevice_name, USBDevice *(*usbdevice_init)(const char *params)); USBDevice *usb_new(const char *name); bool usb_realize_and_unref(USBDevice *dev, USBBus *bus, Error **errp); -USBDevice *usb_create(USBBus *bus, const char *name); USBDevice *usb_create_simple(USBBus *bus, const char *name); USBDevice *usbdevice_create(const char *cmdline); void usb_register_port(USBBus *bus, USBPort *port, void *opaque, int index, diff --git a/hw/usb/bus.c b/hw/usb/bus.c index da85b8b005..5c4d31614e 100644 --- a/hw/usb/bus.c +++ b/hw/usb/bus.c @@ -323,14 +323,6 @@ bool usb_realize_and_unref(USBDevice *dev, USBBus *bus, Error **errp) return qdev_realize_and_unref(&dev->qdev, &bus->qbus, errp); } -USBDevice *usb_create(USBBus *bus, const char *name) -{ - DeviceState *dev; - - dev = qdev_create(&bus->qbus, name); - return USB_DEVICE(dev); -} - static USBDevice *usb_try_create_simple(USBBus *bus, const char *name, Error **errp) { From patchwork Fri May 29 13:44:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578907 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BC0001392 for ; Fri, 29 May 2020 14:14:22 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8EAC820707 for ; Fri, 29 May 2020 14:14:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="Yvf9g4aA" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8EAC820707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:54358 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefm9-0003Sh-Gq for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:14:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49310) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKb-0003Hu-5q for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:53 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:56287 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKN-00079S-LP for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:52 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759938; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=P6ei+aO6naCGPkC88fAgnApcwVhA1I29cDgQ5A2CG1U=; b=Yvf9g4aAUMMRWJdbSGBm1VV9sIz64YNX060GZeHcJMlnEyyB91+ZQajDVNB8jPFMkRJ6e4 83Jk0y+3IstOSZi11VzxPg+RGG5pdzce9MwpcjbdJaycAiiWmxZXeKGBDFO4XiPRboJY76 kvGBOqYsRZWBe/FzIelE/Y0WZ5XG4bU= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-124-lCds9nHpN5KiawtEELu-zQ-1; Fri, 29 May 2020 09:45:35 -0400 X-MC-Unique: lCds9nHpN5KiawtEELu-zQ-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 3AC62107ACF8 for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 7ADF72B6F7; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 3F0C01135221; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 29/58] usb: Eliminate usb_try_create_simple() Date: Fri, 29 May 2020 15:44:54 +0200 Message-Id: <20200529134523.8477-30-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/28 23:43:13 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" usb_try_create_simple() is qdev_try_new() and qdev_realize_and_unref() with more verbose error messages. Of its two users, one ignores errors, and the other asserts they are impossible. Make them use qdev_try_new() and qdev_realize_and_unref() directly, and eliminate usb_try_create_simple Cc: Gerd Hoffmann Signed-off-by: Markus Armbruster Reviewed-by: Gerd Hoffmann --- hw/usb/bus.c | 37 ++++++++++++++----------------------- 1 file changed, 14 insertions(+), 23 deletions(-) diff --git a/hw/usb/bus.c b/hw/usb/bus.c index 5c4d31614e..a81aee2051 100644 --- a/hw/usb/bus.c +++ b/hw/usb/bus.c @@ -318,35 +318,22 @@ USBDevice *usb_new(const char *name) return USB_DEVICE(qdev_new(name)); } +static USBDevice *usb_try_new(const char *name) +{ + return USB_DEVICE(qdev_try_new(name)); +} + bool usb_realize_and_unref(USBDevice *dev, USBBus *bus, Error **errp) { return qdev_realize_and_unref(&dev->qdev, &bus->qbus, errp); } -static USBDevice *usb_try_create_simple(USBBus *bus, const char *name, - Error **errp) -{ - Error *err = NULL; - DeviceState *dev; - - dev = qdev_try_new(name); - if (!dev) { - error_setg(errp, "Failed to create USB device '%s'", name); - return NULL; - } - qdev_realize_and_unref(dev, &bus->qbus, &err); - if (err) { - error_propagate_prepend(errp, err, - "Failed to initialize USB device '%s': ", - name); - return NULL; - } - return USB_DEVICE(dev); -} - USBDevice *usb_create_simple(USBBus *bus, const char *name) { - return usb_try_create_simple(bus, name, &error_abort); + USBDevice *dev = usb_new(name); + + usb_realize_and_unref(dev, bus, &error_abort); + return dev; } static void usb_fill_port(USBPort *port, void *opaque, int index, @@ -426,6 +413,7 @@ void usb_claim_port(USBDevice *dev, Error **errp) { USBBus *bus = usb_bus_from_device(dev); USBPort *port; + USBDevice *hub; assert(dev->port == NULL); @@ -443,7 +431,10 @@ void usb_claim_port(USBDevice *dev, Error **errp) } else { if (bus->nfree == 1 && strcmp(object_get_typename(OBJECT(dev)), "usb-hub") != 0) { /* Create a new hub and chain it on */ - usb_try_create_simple(bus, "usb-hub", NULL); + hub = usb_try_new("usb-hub"); + if (hub) { + usb_realize_and_unref(hub, bus, NULL); + } } if (bus->nfree == 0) { error_setg(errp, "tried to attach usb device %s to a bus " From patchwork Fri May 29 13:44:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578767 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B7D99739 for ; Fri, 29 May 2020 13:48:51 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8C0AD207BC for ; Fri, 29 May 2020 13:48:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="N6SHMrof" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8C0AD207BC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:51732 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefNS-0008WN-JG for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:48:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49172) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-0002gi-JK for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:38 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:48099 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKI-00071t-SI for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:37 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759933; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/6ax/It/7EESBC6GF5vLuFiNjx3YeT+aubQf6cvRDpg=; b=N6SHMrof0nGhO4K0R/fChigcjIX+Ye2rAEY5DNSTSQAeyxTcGcL4R8CJVmJM81TKZkGzwP nypVe4ZHHtVWI06l6dxMdXGgTWz2Xkx8gnw7kKSouTFTAUx57ASpnftG2aQuLAuKuyFF5u YUW3uB5PJBYaT+rnlEzWRmR02H4QbcU= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-476-TMjE1F_ENH6FCIDD1rPjcw-1; Fri, 29 May 2020 09:45:32 -0400 X-MC-Unique: TMjE1F_ENH6FCIDD1rPjcw-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id A862D107ACF4 for ; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 7B47E2B6F8 for ; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 426AD1135222; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 30/58] qdev: qdev_create(), qdev_try_create() are now unused, drop Date: Fri, 29 May 2020 15:44:55 +0200 Message-Id: <20200529134523.8477-31-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/28 23:43:13 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Markus Armbruster --- include/hw/qdev-core.h | 2 -- hw/core/qdev.c | 48 ------------------------------------------ hw/core/sysbus.c | 1 - migration/migration.c | 2 +- 4 files changed, 1 insertion(+), 52 deletions(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index be6f7c4736..ef6137b6a8 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -320,8 +320,6 @@ compat_props_add(GPtrArray *arr, /*** Board API. This should go away once we have a machine config file. ***/ -DeviceState *qdev_create(BusState *bus, const char *name); -DeviceState *qdev_try_create(BusState *bus, const char *name); DeviceState *qdev_new(const char *name); DeviceState *qdev_try_new(const char *name); void qdev_init_nofail(DeviceState *dev); diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 4768244f31..a1fdebb3aa 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -128,54 +128,6 @@ void qdev_set_parent_bus(DeviceState *dev, BusState *bus) } } -/* Create a new device. This only initializes the device state - structure and allows properties to be set. The device still needs - to be realized. See qdev-core.h. */ -DeviceState *qdev_create(BusState *bus, const char *name) -{ - DeviceState *dev; - - dev = qdev_try_create(bus, name); - if (!dev) { - if (bus) { - error_report("Unknown device '%s' for bus '%s'", name, - object_get_typename(OBJECT(bus))); - } else { - error_report("Unknown device '%s' for default sysbus", name); - } - abort(); - } - - return dev; -} - -DeviceState *qdev_try_create(BusState *bus, const char *type) -{ - DeviceState *dev; - - if (object_class_by_name(type) == NULL) { - return NULL; - } - dev = DEVICE(object_new(type)); - if (!dev) { - return NULL; - } - - if (!bus) { - /* Assert that the device really is a SysBusDevice before - * we put it onto the sysbus. Non-sysbus devices which aren't - * being put onto a bus should be created with object_new(TYPE_FOO), - * not qdev_create(NULL, TYPE_FOO). - */ - g_assert(object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)); - bus = sysbus_get_default(); - } - - qdev_set_parent_bus(dev, bus); - object_unref(OBJECT(dev)); - return dev; -} - /* * Create a device on the heap. * A type @name must exist. diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index b5db0d179f..7ff1b5f2de 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -325,7 +325,6 @@ static const TypeInfo sysbus_device_type_info = { .class_init = sysbus_device_class_init, }; -/* This is a nasty hack to allow passing a NULL bus to qdev_create. */ static BusState *main_system_bus; static void main_system_bus_create(void) diff --git a/migration/migration.c b/migration/migration.c index 0bb042a0f7..66c04caa18 100644 --- a/migration/migration.c +++ b/migration/migration.c @@ -3774,7 +3774,7 @@ static const TypeInfo migration_type = { .name = TYPE_MIGRATION, /* * NOTE: TYPE_MIGRATION is not really a device, as the object is - * not created using qdev_create(), it is not attached to the qdev + * not created using qdev_new(), it is not attached to the qdev * device tree, and it is never realized. * * TODO: Make this TYPE_OBJECT once QOM provides something like From patchwork Fri May 29 13:44:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578783 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 44607912 for ; Fri, 29 May 2020 13:52:15 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1A23C206F1 for ; Fri, 29 May 2020 13:52:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="ennAb1vW" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1A23C206F1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:40408 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefQk-00074S-1A for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:52:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49196) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKN-0002hs-6h for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:39 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:59535 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKJ-00072E-1M for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:38 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759934; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=b+xq2Bbv6cnyXBLe9hW8XvEXj2lOcW1J/oXTgBPgmF8=; b=ennAb1vWe2UkjM0Tno1HPGiFW0cgC2oogT7jOGepSka/TdSQzasJjTckb/NGy2vqbpR3zP sTqrTMk45IiRmaENFZyOE1roDjKr1hkpsk3V5Q0sWFK35a4DdoFOkuJ2x0ZfUlzOa13H56 WEOL3CLIla06Mtq2AbT2kovkrRXf9b0= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-271-Smi31wnGP7mVkbCD7yh4yQ-1; Fri, 29 May 2020 09:45:32 -0400 X-MC-Unique: Smi31wnGP7mVkbCD7yh4yQ-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id B0B1A107ACF5 for ; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 83AEE6298C; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 45DF81135224; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 31/58] auxbus: Rename aux_init_bus() to aux_bus_init() Date: Fri, 29 May 2020 15:44:56 +0200 Message-Id: <20200529134523.8477-32-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:27:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Suggested-by: Philippe Mathieu-Daudé Signed-off-by: Markus Armbruster --- include/hw/misc/auxbus.h | 4 ++-- hw/display/xlnx_dp.c | 2 +- hw/misc/auxbus.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/include/hw/misc/auxbus.h b/include/hw/misc/auxbus.h index a539a98c4b..5cfd7a9284 100644 --- a/include/hw/misc/auxbus.h +++ b/include/hw/misc/auxbus.h @@ -84,14 +84,14 @@ struct AUXSlave { }; /** - * aux_init_bus: Initialize an AUX bus. + * aux_bus_init: Initialize an AUX bus. * * Returns the new AUX bus created. * * @parent The device where this bus is located. * @name The name of the bus. */ -AUXBus *aux_init_bus(DeviceState *parent, const char *name); +AUXBus *aux_bus_init(DeviceState *parent, const char *name); /* * aux_request: Make a request on the bus. diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index dd6aa172f3..6122167771 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -1242,7 +1242,7 @@ static void xlnx_dp_init(Object *obj) /* * Initialize AUX Bus. */ - s->aux_bus = aux_init_bus(DEVICE(obj), "aux"); + s->aux_bus = aux_bus_init(DEVICE(obj), "aux"); /* * Initialize DPCD and EDID.. diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index 7fb020086f..2e1c27e842 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -62,7 +62,7 @@ static void aux_bus_class_init(ObjectClass *klass, void *data) k->print_dev = aux_slave_dev_print; } -AUXBus *aux_init_bus(DeviceState *parent, const char *name) +AUXBus *aux_bus_init(DeviceState *parent, const char *name) { AUXBus *bus; Object *auxtoi2c; @@ -225,7 +225,7 @@ static void aux_bridge_class_init(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); /* This device is private and is created only once for each - * aux-bus in aux_init_bus(..). So don't allow the user to add one. + * aux-bus in aux_bus_init(..). So don't allow the user to add one. */ dc->user_creatable = false; } From patchwork Fri May 29 13:44:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578827 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 032A7912 for ; Fri, 29 May 2020 13:57:38 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CED08206A1 for ; Fri, 29 May 2020 13:57:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="RWBiGkBC" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CED08206A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:37636 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefVw-0000vw-UC for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:57:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49206) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKN-0002iY-GD for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:39 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:36314 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKJ-00073K-Gk for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:39 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759934; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=nNeZLg02kHizW5oArB/BGfOomX5md7H65Qta24lxAhU=; b=RWBiGkBCO0YKQvt7BkU9UKcTt+058AWOhcey3MPlxJq+RHxLd56HUwP8+16VK5I7DGESqF iHG+BmMF2bSm8ZqCiXsGsR1QiqOA5M81Kxwa8zbYWuhWENe3DefuxWoaKNryCwPVLR40EE BvPzSsLCcI48S3LlmDdm/BSfWDy4jYE= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-277-EBO5PSxBPR2v0HRq8tTIqw-1; Fri, 29 May 2020 09:45:32 -0400 X-MC-Unique: EBO5PSxBPR2v0HRq8tTIqw-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id B4EBF8015CF for ; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 88685100164C; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 4942B1135226; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 32/58] auxbus: New aux_bus_realize(), pairing with aux_bus_init() Date: Fri, 29 May 2020 15:44:57 +0200 Message-Id: <20200529134523.8477-33-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:27:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" aux_bus_init() encapsulates the creation of an aux-bus and its aux-to-i2c-bridge device. Create aux_bus_realize() to similarly encapsulate their realization. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- include/hw/misc/auxbus.h | 7 +++++++ hw/display/xlnx_dp.c | 2 +- hw/misc/auxbus.c | 5 +++++ 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/include/hw/misc/auxbus.h b/include/hw/misc/auxbus.h index 5cfd7a9284..0d849d9d89 100644 --- a/include/hw/misc/auxbus.h +++ b/include/hw/misc/auxbus.h @@ -93,6 +93,13 @@ struct AUXSlave { */ AUXBus *aux_bus_init(DeviceState *parent, const char *name); +/** + * aux_bus_realize: Realize an AUX bus. + * + * @bus: The AUX bus. + */ +void aux_bus_realize(AUXBus *bus); + /* * aux_request: Make a request on the bus. * diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index 6122167771..900d95fc93 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -1264,7 +1264,7 @@ static void xlnx_dp_realize(DeviceState *dev, Error **errp) DisplaySurface *surface; struct audsettings as; - qdev_init_nofail(DEVICE(s->aux_bus->bridge)); + aux_bus_realize(s->aux_bus); qdev_init_nofail(DEVICE(s->dpcd)); aux_map_slave(AUX_SLAVE(s->dpcd), 0x0000); diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index 2e1c27e842..113f4278aa 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -81,6 +81,11 @@ AUXBus *aux_bus_init(DeviceState *parent, const char *name) return bus; } +void aux_bus_realize(AUXBus *bus) +{ + qdev_init_nofail(DEVICE(bus->bridge)); +} + void aux_map_slave(AUXSlave *aux_dev, hwaddr addr) { DeviceState *dev = DEVICE(aux_dev); From patchwork Fri May 29 13:44:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578837 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AC19D912 for ; Fri, 29 May 2020 13:59:26 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8258F206A4 for ; Fri, 29 May 2020 13:59:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="SmucAy5c" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8258F206A4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:45956 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefXh-0004XK-KE for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:59:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49214) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKO-0002jc-42 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:40 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:31405 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKK-00074F-8q for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:39 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759935; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dqPwyZh3FK8m5bThNglYYWXU9cvhfHsRsD5rDfED8dI=; b=SmucAy5cU15Pe6ORcs6eJ62WzT1snOjXVD55YyQep4H/Z8f/wq5TTxMmxjpMSYW0SOom1X UgIb63CxpeGT8kGdkWDZd4OkFIOYrzBiag6fUHZRqv0OC89fNDWVY1BdNulv1r+/grFALH oSSSOcQgEnBZGj2s7jC8pTp+ELhRpkU= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-506-WKqdTrh9MyOBn32H_Xcs0g-1; Fri, 29 May 2020 09:45:32 -0400 X-MC-Unique: WKqdTrh9MyOBn32H_Xcs0g-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id D9764460 for ; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id ADBF65D9D5 for ; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 4D3211135229; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 33/58] auxbus: Convert a use of qdev_set_parent_bus() Date: Fri, 29 May 2020 15:44:58 +0200 Message-Id: <20200529134523.8477-34-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Convert qdev_set_parent_bus()/qdev_init_nofail() to qdev_realize(); recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- hw/display/xlnx_dp.c | 2 +- hw/misc/auxbus.c | 4 +--- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index 900d95fc93..e6e7f0037f 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -1266,7 +1266,7 @@ static void xlnx_dp_realize(DeviceState *dev, Error **errp) aux_bus_realize(s->aux_bus); - qdev_init_nofail(DEVICE(s->dpcd)); + qdev_realize(DEVICE(s->dpcd), BUS(s->aux_bus), &error_fatal); aux_map_slave(AUX_SLAVE(s->dpcd), 0x0000); qdev_realize_and_unref(DEVICE(s->edid), BUS(aux_get_i2c_bus(s->aux_bus)), diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index 113f4278aa..e7a5d26158 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -70,7 +70,6 @@ AUXBus *aux_bus_init(DeviceState *parent, const char *name) bus = AUX_BUS(qbus_create(TYPE_AUX_BUS, parent, name)); auxtoi2c = object_new_with_props(TYPE_AUXTOI2C, OBJECT(bus), "i2c", &error_abort, NULL); - qdev_set_parent_bus(DEVICE(auxtoi2c), BUS(bus)); bus->bridge = AUXTOI2C(auxtoi2c); @@ -83,7 +82,7 @@ AUXBus *aux_bus_init(DeviceState *parent, const char *name) void aux_bus_realize(AUXBus *bus) { - qdev_init_nofail(DEVICE(bus->bridge)); + qdev_realize(DEVICE(bus->bridge), BUS(bus), &error_fatal); } void aux_map_slave(AUXSlave *aux_dev, hwaddr addr) @@ -280,7 +279,6 @@ DeviceState *aux_create_slave(AUXBus *bus, const char *type) dev = qdev_new(type); assert(dev); - qdev_set_parent_bus(dev, &bus->qbus); return dev; } From patchwork Fri May 29 13:44:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578777 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 63B94139A for ; Fri, 29 May 2020 13:50:27 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 39828206A1 for ; Fri, 29 May 2020 13:50:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="JL8j4W+9" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 39828206A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:60158 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefP0-0003VF-8e for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:50:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49194) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKN-0002hj-1y for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:39 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:36470 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKJ-00072h-7U for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:38 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759934; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yWRSH4/N4GjugNYyAOlTmd1YdiMf79ynZ4LMx/O9gLc=; b=JL8j4W+9R+W2Jp89uC+pe43dY3WXS5/nYXg26Ubop272tZQ9hEtMHT9VnuAdDuVSKygnbA 4JJgAon/p/39oS2A4+UrTXcqPjdGJHXR3lyb2EQjx5zFDiKkLPkoRoDEYmo7k6+PDHqLRB BS5Qphi9AUjXt4QC1IgvZl135f01spA= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-271-6jdlBx4FM6mn2w5A5wHWEQ-1; Fri, 29 May 2020 09:45:32 -0400 X-MC-Unique: 6jdlBx4FM6mn2w5A5wHWEQ-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id DF191EC1A1 for ; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B1D8519C79; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 5091A113522A; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 34/58] auxbus: Eliminate aux_create_slave() Date: Fri, 29 May 2020 15:44:59 +0200 Message-Id: <20200529134523.8477-35-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" aux_create_slave() has become a trivial wrapper around qdev_new(). There's just one user. Eliminate. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- include/hw/misc/auxbus.h | 7 ------- hw/display/xlnx_dp.c | 2 +- hw/misc/auxbus.c | 9 --------- 3 files changed, 1 insertion(+), 17 deletions(-) diff --git a/include/hw/misc/auxbus.h b/include/hw/misc/auxbus.h index 0d849d9d89..15a8973517 100644 --- a/include/hw/misc/auxbus.h +++ b/include/hw/misc/auxbus.h @@ -131,13 +131,6 @@ I2CBus *aux_get_i2c_bus(AUXBus *bus); */ void aux_init_mmio(AUXSlave *aux_slave, MemoryRegion *mmio); -/* aux_create_slave: Create a new device on an AUX bus - * - * @bus The AUX bus for the new device. - * @name The type of the device to be created. - */ -DeviceState *aux_create_slave(AUXBus *bus, const char *name); - /* aux_map_slave: Map the mmio for an AUX slave on the bus. * * @dev The AUX slave. diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index e6e7f0037f..d1f9dc7595 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -1247,7 +1247,7 @@ static void xlnx_dp_init(Object *obj) /* * Initialize DPCD and EDID.. */ - s->dpcd = DPCD(aux_create_slave(s->aux_bus, "dpcd")); + s->dpcd = DPCD(qdev_new("dpcd")); object_property_add_child(OBJECT(s), "dpcd", OBJECT(s->dpcd)); s->edid = I2CDDC(qdev_new("i2c-ddc")); diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index e7a5d26158..d631266903 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -273,15 +273,6 @@ static void aux_slave_dev_print(Monitor *mon, DeviceState *dev, int indent) memory_region_size(s->mmio)); } -DeviceState *aux_create_slave(AUXBus *bus, const char *type) -{ - DeviceState *dev; - - dev = qdev_new(type); - assert(dev); - return dev; -} - void aux_init_mmio(AUXSlave *aux_slave, MemoryRegion *mmio) { assert(!aux_slave->mmio); From patchwork Fri May 29 13:45:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578819 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CC146139A for ; Fri, 29 May 2020 13:56:19 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A2B1A206A4 for ; Fri, 29 May 2020 13:56:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="T5jDvDVp" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A2B1A206A4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:60268 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefUg-0006ua-OZ for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:56:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49210) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKN-0002jS-U0 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:39 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:60427 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKK-00074E-8A for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:39 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759935; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6S7+JPJ8j8tzkG+v/sTWN/FMS0x9NSD7BNkzFuRFdL4=; b=T5jDvDVpn6w3ZpHbOLtsziW6IadKPqQfuhTlYwK/1BkCFirpCwzt7tiZ7v7dEvR9ZMJIKD VvhYz0Vlt65adw85UgqvWVg81+wShk6fQcmQ4m19nuTBPll/nCZOo2lbzvv5xhgkd3Co7j md//bsufivngm8jG/sXHnPirC6hknkM= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-302-YRpNZdHNOT2CwExmPbejaA-1; Fri, 29 May 2020 09:45:33 -0400 X-MC-Unique: YRpNZdHNOT2CwExmPbejaA-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 126C818FE866; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D7B637A8D3; Fri, 29 May 2020 13:45:31 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 543A0113522B; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 35/58] qom: Tidy up a few object_initialize_child() calls Date: Fri, 29 May 2020 15:45:00 +0200 Message-Id: <20200529134523.8477-36-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/28 23:43:13 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Alistair Francis Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The callers of object_initialize_child() commonly pass either &child, sizeof(child), or pchild, sizeof(*pchild). Tidy up the few that don't, mostly to keep the next commit simpler. Signed-off-by: Markus Armbruster Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/aspeed.c | 2 +- hw/microblaze/xlnx-zynqmp-pmu.c | 3 +-- hw/pci-host/pnv_phb4.c | 2 +- hw/riscv/riscv_hart.c | 2 +- 4 files changed, 4 insertions(+), 5 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 9c25d5da96..296057b1ab 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -268,7 +268,7 @@ static void aspeed_machine_init(MachineState *machine) memory_region_add_subregion(&bmc->ram_container, 0, machine->ram); object_initialize_child(OBJECT(machine), "soc", &bmc->soc, - (sizeof(bmc->soc)), amc->soc_name, &error_abort, + sizeof(bmc->soc), amc->soc_name, &error_abort, NULL); sc = ASPEED_SOC_GET_CLASS(&bmc->soc); diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c index 028f31894d..aa90b9d1be 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -174,8 +174,7 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine) pmu_ram); /* Create the PMU device */ - object_initialize_child(OBJECT(machine), "pmu", pmu, - sizeof(XlnxZynqMPPMUSoCState), + object_initialize_child(OBJECT(machine), "pmu", pmu, sizeof(*pmu), TYPE_XLNX_ZYNQMP_PMU_SOC, &error_abort, NULL); object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal); diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index e30ae9ad5b..aba710fd1f 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1155,7 +1155,7 @@ static void pnv_phb4_instance_init(Object *obj) QLIST_INIT(&phb->dma_spaces); /* XIVE interrupt source object */ - object_initialize_child(obj, "source", &phb->xsrc, sizeof(XiveSource), + object_initialize_child(obj, "source", &phb->xsrc, sizeof(phb->xsrc), TYPE_XIVE_SOURCE, &error_abort, NULL); /* Root Port */ diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c index 276a9baca0..61e88e2e37 100644 --- a/hw/riscv/riscv_hart.c +++ b/hw/riscv/riscv_hart.c @@ -46,7 +46,7 @@ static void riscv_hart_realize(RISCVHartArrayState *s, int idx, Error *err = NULL; object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx], - sizeof(RISCVCPU), cpu_type, + sizeof(s->harts[idx]), cpu_type, &error_abort, NULL); s->harts[idx].env.mhartid = s->hartid_base + idx; qemu_register_reset(riscv_harts_cpu_reset, &s->harts[idx]); From patchwork Fri May 29 13:45:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578835 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A7898912 for ; Fri, 29 May 2020 13:58:44 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5A5D6206A4 for ; Fri, 29 May 2020 13:58:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="fE0W4Kpg" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5A5D6206A4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:41730 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefX1-0002oB-Ic for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:58:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49266) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKT-0002xP-PK for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:45 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:48411 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKL-000758-7z for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:45 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759935; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=uIsG3kKuAJbkC6+Pmyg5nYJSg1TvMIzCoGmIqRhBUhg=; b=fE0W4KpgFUa1ZLfiwtQuIM7sSpNixgEadvB5bj0j1vL9AGGK2doTLUyDsBU0e1t2g+ZjE+ OYQJ4xYvSLuMmmBZxnNXoK/y6/JsWG3LU7dISWuscdnJ/u/5VM94Bz+QhxixbNTu6k6W4c JYc7+4BsWIW6W4+E/6u6hPDKYfWzxFE= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-306-yz-aZrecM7OF0Y-10FIcZA-1; Fri, 29 May 2020 09:45:33 -0400 X-MC-Unique: yz-aZrecM7OF0Y-10FIcZA-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id B3A6B107ACCA; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 0D597768DE; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 58639113522C; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 36/58] qom: Less verbose object_initialize_child() Date: Fri, 29 May 2020 15:45:01 +0200 Message-Id: <20200529134523.8477-37-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" All users of object_initialize_child() pass the obvious child size argument. Almost all pass &error_abort and no properties. Tiresome. Rename object_initialize_child() to object_initialize_child_with_props() to free the name. New convenience wrapper object_initialize_child() automates the size argument, and passes &error_abort and no properties. Rename object_initialize_childv() to object_initialize_child_with_propsv() for consistency. Convert callers with this Coccinelle script: @@ expression parent, propname, type; expression child, size; symbol error_abort; @@ - object_initialize_child(parent, propname, OBJECT(child), size, type, &error_abort, NULL) + object_initialize_child(parent, propname, child, size, type, &error_abort, NULL) @@ expression parent, propname, type; expression child; symbol error_abort; @@ - object_initialize_child(parent, propname, child, sizeof(*child), type, &error_abort, NULL) + object_initialize_child(parent, propname, child, type) @@ expression parent, propname, type; expression child; symbol error_abort; @@ - object_initialize_child(parent, propname, &child, sizeof(child), type, &error_abort, NULL) + object_initialize_child(parent, propname, &child, type) @@ expression parent, propname, type; expression child, size, err; expression list props; @@ - object_initialize_child(parent, propname, child, size, type, err, props) + object_initialize_child_with_props(parent, propname, child, size, type, err, props) Note that Coccinelle chokes on ARMSSE typedef vs. macro in hw/arm/armsse.c. Worked around by temporarily renaming the macro for the spatch run. Signed-off-by: Markus Armbruster Acked-by: Alistair Francis --- include/qom/object.h | 30 +++++++++++++++++++---- hw/arm/allwinner-a10.c | 5 ++-- hw/arm/allwinner-h3.c | 5 ++-- hw/arm/armsse.c | 26 +++++++------------- hw/arm/aspeed.c | 4 +--- hw/arm/aspeed_ast2600.c | 4 +--- hw/arm/aspeed_soc.c | 4 +--- hw/arm/bcm2836.c | 3 +-- hw/arm/digic.c | 4 +--- hw/arm/exynos4210.c | 3 +-- hw/arm/fsl-imx25.c | 4 +--- hw/arm/fsl-imx31.c | 4 +--- hw/arm/fsl-imx6.c | 5 ++-- hw/arm/fsl-imx6ul.c | 4 ++-- hw/arm/fsl-imx7.c | 5 ++-- hw/arm/imx25_pdk.c | 3 +-- hw/arm/kzm.c | 3 +-- hw/arm/mps2-tz.c | 14 +++++------ hw/arm/musca.c | 14 +++++------ hw/arm/raspi.c | 4 ++-- hw/arm/stm32f405_soc.c | 6 ++--- hw/arm/xlnx-versal.c | 5 ++-- hw/arm/xlnx-zcu102.c | 3 +-- hw/arm/xlnx-zynqmp.c | 16 +++++-------- hw/char/serial-isa.c | 3 +-- hw/char/serial-pci-multi.c | 4 +--- hw/char/serial-pci.c | 3 +-- hw/char/serial.c | 6 ++--- hw/core/sysbus.c | 4 ++-- hw/dma/xilinx_axidma.c | 9 +++---- hw/intc/pnv_xive.c | 6 ++--- hw/intc/spapr_xive.c | 6 ++--- hw/microblaze/xlnx-zynqmp-pmu.c | 7 +++--- hw/misc/macio/macio.c | 10 ++++---- hw/net/xilinx_axienet.c | 9 +++---- hw/pci-host/designware.c | 3 +-- hw/pci-host/gpex.c | 3 +-- hw/pci-host/pnv_phb3.c | 12 ++++------ hw/pci-host/pnv_phb4.c | 6 ++--- hw/pci-host/pnv_phb4_pec.c | 6 ++--- hw/pci-host/q35.c | 3 +-- hw/pci-host/xilinx-pcie.c | 3 +-- hw/ppc/pnv.c | 42 ++++++++++++--------------------- hw/ppc/pnv_psi.c | 6 ++--- hw/ppc/spapr.c | 6 ++--- hw/riscv/riscv_hart.c | 4 +--- hw/riscv/sifive_e.c | 4 +--- hw/riscv/sifive_u.c | 12 +++------- hw/virtio/virtio.c | 5 ++-- qom/object.c | 19 +++++++++++---- 50 files changed, 160 insertions(+), 219 deletions(-) diff --git a/include/qom/object.h b/include/qom/object.h index b3eb05d65d..9ce6c9c460 100644 --- a/include/qom/object.h +++ b/include/qom/object.h @@ -783,7 +783,7 @@ int object_set_propv(Object *obj, void object_initialize(void *obj, size_t size, const char *typename); /** - * object_initialize_child: + * object_initialize_child_with_props: * @parentobj: The parent object to add a property to * @propname: The name of the property * @childobj: A pointer to the memory to be used for the object. @@ -803,12 +803,13 @@ void object_initialize(void *obj, size_t size, const char *typename); * If the object implements the user creatable interface, the object will * be marked complete once all the properties have been processed. */ -void object_initialize_child(Object *parentobj, const char *propname, +void object_initialize_child_with_props(Object *parentobj, + const char *propname, void *childobj, size_t size, const char *type, Error **errp, ...) QEMU_SENTINEL; /** - * object_initialize_childv: + * object_initialize_child_with_propsv: * @parentobj: The parent object to add a property to * @propname: The name of the property * @childobj: A pointer to the memory to be used for the object. @@ -819,10 +820,31 @@ void object_initialize_child(Object *parentobj, const char *propname, * * See object_initialize_child() for documentation. */ -void object_initialize_childv(Object *parentobj, const char *propname, +void object_initialize_child_with_propsv(Object *parentobj, + const char *propname, void *childobj, size_t size, const char *type, Error **errp, va_list vargs); +/** + * object_initialize_child: + * @parent: The parent object to add a property to + * @propname: The name of the property + * @child: A precisely typed pointer to the memory to be used for the + * object. + * @type: The name of the type of the object to instantiate. + * + * This is like + * object_initialize_child_with_props(parent, propname, + * child, sizeof(*child), type, + * &error_abort, NULL) + */ +#define object_initialize_child(parent, propname, child, type) \ + object_initialize_child_internal((parent), (propname), \ + (child), sizeof(*(child)), (type)) +void object_initialize_child_internal(Object *parent, const char *propname, + void *child, size_t size, + const char *type); + /** * object_dynamic_cast: * @obj: The object to cast. diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c index 6e1329a4a2..49c51463e1 100644 --- a/hw/arm/allwinner-a10.c +++ b/hw/arm/allwinner-a10.c @@ -41,9 +41,8 @@ static void aw_a10_init(Object *obj) { AwA10State *s = AW_A10(obj); - object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu), - ARM_CPU_TYPE_NAME("cortex-a8"), - &error_abort, NULL); + object_initialize_child(obj, "cpu", &s->cpu, + ARM_CPU_TYPE_NAME("cortex-a8")); sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc), TYPE_AW_A10_PIC); diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c index f10674da5a..7dc3671155 100644 --- a/hw/arm/allwinner-h3.c +++ b/hw/arm/allwinner-h3.c @@ -194,9 +194,8 @@ static void allwinner_h3_init(Object *obj) s->memmap = allwinner_h3_memmap; for (int i = 0; i < AW_H3_NUM_CPUS; i++) { - object_initialize_child(obj, "cpu[*]", &s->cpus[i], sizeof(s->cpus[i]), - ARM_CPU_TYPE_NAME("cortex-a7"), - &error_abort, NULL); + object_initialize_child(obj, "cpu[*]", &s->cpus[i], + ARM_CPU_TYPE_NAME("cortex-a7")); } sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index c1953a41b3..20bedbe044 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -252,9 +252,7 @@ static void armsse_init(Object *obj) char *name; name = g_strdup_printf("cluster%d", i); - object_initialize_child(obj, name, &s->cluster[i], - sizeof(s->cluster[i]), TYPE_CPU_CLUSTER, - &error_abort, NULL); + object_initialize_child(obj, name, &s->cluster[i], TYPE_CPU_CLUSTER); qdev_prop_set_uint32(DEVICE(&s->cluster[i]), "cluster-id", i); g_free(name); @@ -288,15 +286,13 @@ static void armsse_init(Object *obj) g_free(name); } object_initialize_child(obj, "mpc-irq-orgate", &s->mpc_irq_orgate, - sizeof(s->mpc_irq_orgate), TYPE_OR_IRQ, - &error_abort, NULL); + TYPE_OR_IRQ); for (i = 0; i < IOTS_NUM_EXP_MPC + info->sram_banks; i++) { char *name = g_strdup_printf("mpc-irq-splitter-%d", i); SplitIRQ *splitter = &s->mpc_irq_splitter[i]; - object_initialize_child(obj, name, splitter, sizeof(*splitter), - TYPE_SPLIT_IRQ, &error_abort, NULL); + object_initialize_child(obj, name, splitter, TYPE_SPLIT_IRQ); g_free(name); } sysbus_init_child_obj(obj, "timer0", &s->timer0, sizeof(s->timer0), @@ -376,21 +372,16 @@ static void armsse_init(Object *obj) g_free(name); } } - object_initialize_child(obj, "nmi-orgate", &s->nmi_orgate, - sizeof(s->nmi_orgate), TYPE_OR_IRQ, - &error_abort, NULL); + object_initialize_child(obj, "nmi-orgate", &s->nmi_orgate, TYPE_OR_IRQ); object_initialize_child(obj, "ppc-irq-orgate", &s->ppc_irq_orgate, - sizeof(s->ppc_irq_orgate), TYPE_OR_IRQ, - &error_abort, NULL); + TYPE_OR_IRQ); object_initialize_child(obj, "sec-resp-splitter", &s->sec_resp_splitter, - sizeof(s->sec_resp_splitter), TYPE_SPLIT_IRQ, - &error_abort, NULL); + TYPE_SPLIT_IRQ); for (i = 0; i < ARRAY_SIZE(s->ppc_irq_splitter); i++) { char *name = g_strdup_printf("ppc-irq-splitter-%d", i); SplitIRQ *splitter = &s->ppc_irq_splitter[i]; - object_initialize_child(obj, name, splitter, sizeof(*splitter), - TYPE_SPLIT_IRQ, &error_abort, NULL); + object_initialize_child(obj, name, splitter, TYPE_SPLIT_IRQ); g_free(name); } if (info->num_cpus > 1) { @@ -399,8 +390,7 @@ static void armsse_init(Object *obj) char *name = g_strdup_printf("cpu-irq-splitter%d", i); SplitIRQ *splitter = &s->cpu_irq_splitter[i]; - object_initialize_child(obj, name, splitter, sizeof(*splitter), - TYPE_SPLIT_IRQ, &error_abort, NULL); + object_initialize_child(obj, name, splitter, TYPE_SPLIT_IRQ); g_free(name); } } diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 296057b1ab..c548d24621 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -267,9 +267,7 @@ static void aspeed_machine_init(MachineState *machine) UINT32_MAX); memory_region_add_subregion(&bmc->ram_container, 0, machine->ram); - object_initialize_child(OBJECT(machine), "soc", &bmc->soc, - sizeof(bmc->soc), amc->soc_name, &error_abort, - NULL); + object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name); sc = ASPEED_SOC_GET_CLASS(&bmc->soc); diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index b912d19f80..beb688fd8f 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -127,9 +127,7 @@ static void aspeed_soc_ast2600_init(Object *obj) } for (i = 0; i < sc->num_cpus; i++) { - object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]), - sizeof(s->cpu[i]), sc->cpu_type, - &error_abort, NULL); + object_initialize_child(obj, "cpu[*]", &s->cpu[i], sc->cpu_type); } snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 3ec1257c14..18d1763aba 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -142,9 +142,7 @@ static void aspeed_soc_init(Object *obj) } for (i = 0; i < sc->num_cpus; i++) { - object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]), - sizeof(s->cpu[i]), sc->cpu_type, - &error_abort, NULL); + object_initialize_child(obj, "cpu[*]", &s->cpu[i], sc->cpu_type); } snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index e51b4e0c43..82cd1d2df8 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -53,8 +53,7 @@ static void bcm2836_init(Object *obj) for (n = 0; n < BCM283X_NCPUS; n++) { object_initialize_child(obj, "cpu[*]", &s->cpu[n].core, - sizeof(s->cpu[n].core), info->cpu_type, - &error_abort, NULL); + info->cpu_type); } sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control), diff --git a/hw/arm/digic.c b/hw/arm/digic.c index 22434a65a2..6153d5f108 100644 --- a/hw/arm/digic.c +++ b/hw/arm/digic.c @@ -36,9 +36,7 @@ static void digic_init(Object *obj) DigicState *s = DIGIC(obj); int i; - object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu), - ARM_CPU_TYPE_NAME("arm946"), - &error_abort, NULL); + object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm946")); for (i = 0; i < DIGIC4_NB_TIMERS; i++) { #define DIGIC_TIMER_NAME_MLEN 11 diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 9ff1a11f80..86cbd63857 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -482,8 +482,7 @@ static void exynos4210_init(Object *obj) char *name = g_strdup_printf("pl330-irq-orgate%d", i); qemu_or_irq *orgate = &s->pl330_irq_orgate[i]; - object_initialize_child(obj, name, orgate, sizeof(*orgate), - TYPE_OR_IRQ, &error_abort, NULL); + object_initialize_child(obj, name, orgate, TYPE_OR_IRQ); g_free(name); } } diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index cdaa79c26b..d8340e3527 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -38,9 +38,7 @@ static void fsl_imx25_init(Object *obj) FslIMX25State *s = FSL_IMX25(obj); int i; - object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu), - ARM_CPU_TYPE_NAME("arm926"), - &error_abort, NULL); + object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm926")); sysbus_init_child_obj(obj, "avic", &s->avic, sizeof(s->avic), TYPE_IMX_AVIC); diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index 1e7959863d..54eec89701 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -33,9 +33,7 @@ static void fsl_imx31_init(Object *obj) FslIMX31State *s = FSL_IMX31(obj); int i; - object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu), - ARM_CPU_TYPE_NAME("arm1136"), - &error_abort, NULL); + object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm1136")); sysbus_init_child_obj(obj, "avic", &s->avic, sizeof(s->avic), TYPE_IMX_AVIC); diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index f58c85aa8c..88fbba84a4 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -43,9 +43,8 @@ static void fsl_imx6_init(Object *obj) for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) { snprintf(name, NAME_SIZE, "cpu%d", i); - object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]), - ARM_CPU_TYPE_NAME("cortex-a9"), - &error_abort, NULL); + object_initialize_child(obj, name, &s->cpu[i], + ARM_CPU_TYPE_NAME("cortex-a9")); } sysbus_init_child_obj(obj, "a9mpcore", &s->a9mpcore, sizeof(s->a9mpcore), diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index 3ecb212da6..491f1b7f73 100644 --- a/hw/arm/fsl-imx6ul.c +++ b/hw/arm/fsl-imx6ul.c @@ -34,8 +34,8 @@ static void fsl_imx6ul_init(Object *obj) char name[NAME_SIZE]; int i; - object_initialize_child(obj, "cpu0", &s->cpu, sizeof(s->cpu), - ARM_CPU_TYPE_NAME("cortex-a7"), &error_abort, NULL); + object_initialize_child(obj, "cpu0", &s->cpu, + ARM_CPU_TYPE_NAME("cortex-a7")); /* * A7MPCORE diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index 89c3b64c06..5cf2b7a808 100644 --- a/hw/arm/fsl-imx7.c +++ b/hw/arm/fsl-imx7.c @@ -38,9 +38,8 @@ static void fsl_imx7_init(Object *obj) for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX7_NUM_CPUS); i++) { snprintf(name, NAME_SIZE, "cpu%d", i); - object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]), - ARM_CPU_TYPE_NAME("cortex-a7"), &error_abort, - NULL); + object_initialize_child(obj, name, &s->cpu[i], + ARM_CPU_TYPE_NAME("cortex-a7")); } /* diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c index 75076f2ea4..69b95711e4 100644 --- a/hw/arm/imx25_pdk.c +++ b/hw/arm/imx25_pdk.c @@ -73,8 +73,7 @@ static void imx25_pdk_init(MachineState *machine) unsigned int alias_offset; int i; - object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), - TYPE_FSL_IMX25, &error_abort, NULL); + object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX25); object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c index 34f6bcb491..0275d63079 100644 --- a/hw/arm/kzm.c +++ b/hw/arm/kzm.c @@ -71,8 +71,7 @@ static void kzm_init(MachineState *machine) unsigned int alias_offset; unsigned int i; - object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), - TYPE_FSL_IMX31, &error_abort, NULL); + object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX31); object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 07d11e439f..8a050228d0 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -414,9 +414,10 @@ static void mps2tz_common_init(MachineState *machine) char *name = g_strdup_printf("mps2-irq-splitter%d", i); SplitIRQ *splitter = &mms->cpu_irq_splitter[i]; - object_initialize_child(OBJECT(machine), name, - splitter, sizeof(*splitter), - TYPE_SPLIT_IRQ, &error_fatal, NULL); + object_initialize_child_with_props(OBJECT(machine), name, + splitter, sizeof(*splitter), + TYPE_SPLIT_IRQ, &error_fatal, + NULL); g_free(name); object_property_set_int(OBJECT(splitter), 2, "num-lines", @@ -436,9 +437,7 @@ static void mps2tz_common_init(MachineState *machine) * lines, one for each of the PPCs we create here, plus one per MSC. */ object_initialize_child(OBJECT(machine), "sec-resp-splitter", - &mms->sec_resp_splitter, - sizeof(mms->sec_resp_splitter), - TYPE_SPLIT_IRQ, &error_abort, NULL); + &mms->sec_resp_splitter, TYPE_SPLIT_IRQ); object_property_set_int(OBJECT(&mms->sec_resp_splitter), ARRAY_SIZE(mms->ppc) + ARRAY_SIZE(mms->msc), "num-lines", &error_fatal); @@ -472,8 +471,7 @@ static void mps2tz_common_init(MachineState *machine) * Create the OR gate for this. */ object_initialize_child(OBJECT(mms), "uart-irq-orgate", - &mms->uart_irq_orgate, sizeof(mms->uart_irq_orgate), - TYPE_OR_IRQ, &error_abort, NULL); + &mms->uart_irq_orgate, TYPE_OR_IRQ); object_property_set_int(OBJECT(&mms->uart_irq_orgate), 10, "num-lines", &error_fatal); object_property_set_bool(OBJECT(&mms->uart_irq_orgate), true, diff --git a/hw/arm/musca.c b/hw/arm/musca.c index ba99dd1941..cd7df7c191 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -404,9 +404,9 @@ static void musca_init(MachineState *machine) char *name = g_strdup_printf("musca-irq-splitter%d", i); SplitIRQ *splitter = &mms->cpu_irq_splitter[i]; - object_initialize_child(OBJECT(machine), name, - splitter, sizeof(*splitter), - TYPE_SPLIT_IRQ, &error_fatal, NULL); + object_initialize_child_with_props(OBJECT(machine), name, splitter, + sizeof(*splitter), TYPE_SPLIT_IRQ, + &error_fatal, NULL); g_free(name); object_property_set_int(OBJECT(splitter), 2, "num-lines", @@ -424,10 +424,10 @@ static void musca_init(MachineState *machine) * The sec_resp_cfg output from the SSE-200 must be split into multiple * lines, one for each of the PPCs we create here. */ - object_initialize_child(OBJECT(machine), "sec-resp-splitter", - &mms->sec_resp_splitter, - sizeof(mms->sec_resp_splitter), - TYPE_SPLIT_IRQ, &error_fatal, NULL); + object_initialize_child_with_props(OBJECT(machine), "sec-resp-splitter", + &mms->sec_resp_splitter, + sizeof(mms->sec_resp_splitter), + TYPE_SPLIT_IRQ, &error_fatal, NULL); object_property_set_int(OBJECT(&mms->sec_resp_splitter), ARRAY_SIZE(mms->ppc), "num-lines", &error_fatal); diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index a8e26a70bb..78cb995251 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -282,8 +282,8 @@ static void raspi_machine_init(MachineState *machine) machine->ram, 0); /* Setup the SOC */ - object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), - board_soc_type(board_rev), &error_abort, NULL); + object_initialize_child(OBJECT(machine), "soc", &s->soc, + board_soc_type(board_rev)); object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(machine->ram)); object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev", &error_abort); diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c index c9a530eecf..33a83bd1d4 100644 --- a/hw/arm/stm32f405_soc.c +++ b/hw/arm/stm32f405_soc.c @@ -169,9 +169,9 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) } /* ADC device, the IRQs are ORed together */ - object_initialize_child(OBJECT(s), "adc-orirq", &s->adc_irqs, - sizeof(s->adc_irqs), TYPE_OR_IRQ, - &err, NULL); + object_initialize_child_with_props(OBJECT(s), "adc-orirq", &s->adc_irqs, + sizeof(s->adc_irqs), TYPE_OR_IRQ, &err, + NULL); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index c3d47bb9e9..12e4469cf4 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -32,9 +32,8 @@ static void versal_create_apu_cpus(Versal *s) for (i = 0; i < ARRAY_SIZE(s->fpd.apu.cpu); i++) { Object *obj; - object_initialize_child(OBJECT(s), "apu-cpu[*]", - &s->fpd.apu.cpu[i], sizeof(s->fpd.apu.cpu[i]), - XLNX_VERSAL_ACPU_TYPE, &error_abort, NULL); + object_initialize_child(OBJECT(s), "apu-cpu[*]", &s->fpd.apu.cpu[i], + XLNX_VERSAL_ACPU_TYPE); obj = OBJECT(&s->fpd.apu.cpu[i]); object_property_set_int(obj, s->cfg.psci_conduit, "psci-conduit", &error_abort); diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 77c84b82ab..822e24af65 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -116,8 +116,7 @@ static void xlnx_zcu102_init(MachineState *machine) ram_size); } - object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), - TYPE_XLNX_ZYNQMP, &error_abort, NULL); + object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_XLNX_ZYNQMP); object_property_set_link(OBJECT(&s->soc), OBJECT(machine->ram), "ddr-ram", &error_abort); diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index f08abf60d7..890139d6a2 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -187,17 +187,15 @@ static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s, } object_initialize_child(OBJECT(s), "rpu-cluster", &s->rpu_cluster, - sizeof(s->rpu_cluster), TYPE_CPU_CLUSTER, - &error_abort, NULL); + TYPE_CPU_CLUSTER); qdev_prop_set_uint32(DEVICE(&s->rpu_cluster), "cluster-id", 1); for (i = 0; i < num_rpus; i++) { char *name; object_initialize_child(OBJECT(&s->rpu_cluster), "rpu-cpu[*]", - &s->rpu_cpu[i], sizeof(s->rpu_cpu[i]), - ARM_CPU_TYPE_NAME("cortex-r5f"), - &error_abort, NULL); + &s->rpu_cpu[i], + ARM_CPU_TYPE_NAME("cortex-r5f")); name = object_get_canonical_path_component(OBJECT(&s->rpu_cpu[i])); if (strcmp(name, boot_cpu)) { @@ -230,15 +228,13 @@ static void xlnx_zynqmp_init(Object *obj) int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS); object_initialize_child(obj, "apu-cluster", &s->apu_cluster, - sizeof(s->apu_cluster), TYPE_CPU_CLUSTER, - &error_abort, NULL); + TYPE_CPU_CLUSTER); qdev_prop_set_uint32(DEVICE(&s->apu_cluster), "cluster-id", 0); for (i = 0; i < num_apus; i++) { object_initialize_child(OBJECT(&s->apu_cluster), "apu-cpu[*]", - &s->apu_cpu[i], sizeof(s->apu_cpu[i]), - ARM_CPU_TYPE_NAME("cortex-a53"), - &error_abort, NULL); + &s->apu_cpu[i], + ARM_CPU_TYPE_NAME("cortex-a53")); } sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index f13dd98c60..7630a874a8 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -114,8 +114,7 @@ static void serial_isa_initfn(Object *o) { ISASerialState *self = ISA_SERIAL(o); - object_initialize_child(o, "serial", &self->state, sizeof(self->state), - TYPE_SERIAL, &error_abort, NULL); + object_initialize_child(o, "serial", &self->state, TYPE_SERIAL); } static const TypeInfo serial_isa_info = { diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 23d0ebe2cd..1d65d64c4e 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -187,9 +187,7 @@ static void multi_serial_init(Object *o) size_t i, nports = multi_serial_get_port_count(PCI_DEVICE_GET_CLASS(dev)); for (i = 0; i < nports; i++) { - object_initialize_child(o, "serial[*]", &pms->state[i], - sizeof(pms->state[i]), - TYPE_SERIAL, &error_abort, NULL); + object_initialize_child(o, "serial[*]", &pms->state[i], TYPE_SERIAL); } } diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index 65eacfae0e..5f5ff10a75 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -108,8 +108,7 @@ static void serial_pci_init(Object *o) { PCISerialState *ps = PCI_SERIAL(o); - object_initialize_child(o, "serial", &ps->state, sizeof(ps->state), - TYPE_SERIAL, &error_abort, NULL); + object_initialize_child(o, "serial", &ps->state, TYPE_SERIAL); } static const TypeInfo serial_pci_info = { diff --git a/hw/char/serial.c b/hw/char/serial.c index a0cab38fb0..57c299e993 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1014,8 +1014,7 @@ static void serial_io_instance_init(Object *o) { SerialIO *sio = SERIAL_IO(o); - object_initialize_child(o, "serial", &sio->serial, sizeof(sio->serial), - TYPE_SERIAL, &error_abort, NULL); + object_initialize_child(o, "serial", &sio->serial, TYPE_SERIAL); qdev_alias_all_properties(DEVICE(&sio->serial), o); } @@ -1148,8 +1147,7 @@ static void serial_mm_instance_init(Object *o) { SerialMM *smm = SERIAL_MM(o); - object_initialize_child(o, "serial", &smm->serial, sizeof(smm->serial), - TYPE_SERIAL, &error_abort, NULL); + object_initialize_child(o, "serial", &smm->serial, TYPE_SERIAL); qdev_alias_all_properties(DEVICE(&smm->serial), o); } diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index 7ff1b5f2de..e8d08d349b 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -348,8 +348,8 @@ BusState *sysbus_get_default(void) void sysbus_init_child_obj(Object *parent, const char *childname, void *child, size_t childsize, const char *childtype) { - object_initialize_child(parent, childname, child, childsize, childtype, - &error_abort, NULL); + object_initialize_child_with_props(parent, childname, child, childsize, + childtype, &error_abort, NULL); qdev_set_parent_bus(DEVICE(child), sysbus_get_default()); } diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index 460102b142..6a9df2c4db 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -579,13 +579,10 @@ static void xilinx_axidma_init(Object *obj) SysBusDevice *sbd = SYS_BUS_DEVICE(obj); object_initialize_child(OBJECT(s), "axistream-connected-target", - &s->rx_data_dev, sizeof(s->rx_data_dev), - TYPE_XILINX_AXI_DMA_DATA_STREAM, &error_abort, - NULL); + &s->rx_data_dev, TYPE_XILINX_AXI_DMA_DATA_STREAM); object_initialize_child(OBJECT(s), "axistream-control-connected-target", - &s->rx_control_dev, sizeof(s->rx_control_dev), - TYPE_XILINX_AXI_DMA_CONTROL_STREAM, &error_abort, - NULL); + &s->rx_control_dev, + TYPE_XILINX_AXI_DMA_CONTROL_STREAM); object_property_add_link(obj, "dma", TYPE_MEMORY_REGION, (Object **)&s->dma_mr, qdev_prop_allow_set_link_before_realize, diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index aeda488bd1..892c78069d 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -1796,11 +1796,9 @@ static void pnv_xive_init(Object *obj) PnvXive *xive = PNV_XIVE(obj); object_initialize_child(obj, "ipi_source", &xive->ipi_source, - sizeof(xive->ipi_source), TYPE_XIVE_SOURCE, - &error_abort, NULL); + TYPE_XIVE_SOURCE); object_initialize_child(obj, "end_source", &xive->end_source, - sizeof(xive->end_source), TYPE_XIVE_END_SOURCE, - &error_abort, NULL); + TYPE_XIVE_END_SOURCE); } /* diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 6608d7220a..263cd1253c 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -272,12 +272,10 @@ static void spapr_xive_instance_init(Object *obj) { SpaprXive *xive = SPAPR_XIVE(obj); - object_initialize_child(obj, "source", &xive->source, sizeof(xive->source), - TYPE_XIVE_SOURCE, &error_abort, NULL); + object_initialize_child(obj, "source", &xive->source, TYPE_XIVE_SOURCE); object_initialize_child(obj, "end_source", &xive->end_source, - sizeof(xive->end_source), TYPE_XIVE_END_SOURCE, - &error_abort, NULL); + TYPE_XIVE_END_SOURCE); /* Not connected to the KVM XIVE device */ xive->fd = -1; diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c index aa90b9d1be..bd56eccd66 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -61,8 +61,7 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj) { XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(obj); - object_initialize_child(obj, "pmu-cpu", &s->cpu, sizeof(s->cpu), - TYPE_MICROBLAZE_CPU, &error_abort, NULL); + object_initialize_child(obj, "pmu-cpu", &s->cpu, TYPE_MICROBLAZE_CPU); sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc), TYPE_XLNX_PMU_IO_INTC); @@ -174,8 +173,8 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine) pmu_ram); /* Create the PMU device */ - object_initialize_child(OBJECT(machine), "pmu", pmu, sizeof(*pmu), - TYPE_XLNX_ZYNQMP_PMU_SOC, &error_abort, NULL); + object_initialize_child(OBJECT(machine), "pmu", pmu, + TYPE_XLNX_ZYNQMP_PMU_SOC); object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal); /* Load the kernel */ diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index 216bdc69c0..a2698e4a20 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -98,8 +98,8 @@ static void macio_init_child_obj(MacIOState *s, const char *childname, void *child, size_t childsize, const char *childtype) { - object_initialize_child(OBJECT(s), childname, child, childsize, childtype, - &error_abort, NULL); + object_initialize_child_with_props(OBJECT(s), childname, child, childsize, + childtype, &error_abort, NULL); qdev_set_parent_bus(DEVICE(child), BUS(&s->macio_bus)); } @@ -351,8 +351,7 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp) object_property_set_bool(OBJECT(&ns->gpio), true, "realized", &err); /* PMU */ - object_initialize_child(OBJECT(s), "pmu", &s->pmu, sizeof(s->pmu), - TYPE_VIA_PMU, &error_abort, NULL); + object_initialize_child(OBJECT(s), "pmu", &s->pmu, TYPE_VIA_PMU); object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio", &error_abort); qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb); @@ -370,8 +369,7 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp) object_unparent(OBJECT(&ns->gpio)); /* CUDA */ - object_initialize_child(OBJECT(s), "cuda", &s->cuda, sizeof(s->cuda), - TYPE_CUDA, &error_abort, NULL); + object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA); qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", s->frequency); diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c index 44fe04d889..c2f40b8ea9 100644 --- a/hw/net/xilinx_axienet.c +++ b/hw/net/xilinx_axienet.c @@ -1020,13 +1020,10 @@ static void xilinx_enet_init(Object *obj) SysBusDevice *sbd = SYS_BUS_DEVICE(obj); object_initialize_child(OBJECT(s), "axistream-connected-target", - &s->rx_data_dev, sizeof(s->rx_data_dev), - TYPE_XILINX_AXI_ENET_DATA_STREAM, &error_abort, - NULL); + &s->rx_data_dev, TYPE_XILINX_AXI_ENET_DATA_STREAM); object_initialize_child(OBJECT(s), "axistream-control-connected-target", - &s->rx_control_dev, sizeof(s->rx_control_dev), - TYPE_XILINX_AXI_ENET_CONTROL_STREAM, &error_abort, - NULL); + &s->rx_control_dev, + TYPE_XILINX_AXI_ENET_CONTROL_STREAM); sysbus_init_irq(sbd, &s->irq); memory_region_init_io(&s->iomem, OBJECT(s), &enet_ops, s, "enet", 0x40000); diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index 2e97d6b17f..8492c18991 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -722,8 +722,7 @@ static void designware_pcie_host_init(Object *obj) DesignwarePCIEHost *s = DESIGNWARE_PCIE_HOST(obj); DesignwarePCIERoot *root = &s->root; - object_initialize_child(obj, "root", root, sizeof(*root), - TYPE_DESIGNWARE_PCIE_ROOT, &error_abort, NULL); + object_initialize_child(obj, "root", root, TYPE_DESIGNWARE_PCIE_ROOT); qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(root), "multifunction", false); } diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c index 3dfb3bf599..2bdbe7b456 100644 --- a/hw/pci-host/gpex.c +++ b/hw/pci-host/gpex.c @@ -124,8 +124,7 @@ static void gpex_host_initfn(Object *obj) GPEXHost *s = GPEX_HOST(obj); GPEXRootState *root = &s->gpex_root; - object_initialize_child(obj, "gpex_root", root, sizeof(*root), - TYPE_GPEX_ROOT_DEVICE, &error_abort, NULL); + object_initialize_child(obj, "gpex_root", root, TYPE_GPEX_ROOT_DEVICE); qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(root), "multifunction", false); } diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 8dcfe4a2fd..6e2b0174f6 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -968,23 +968,19 @@ static void pnv_phb3_instance_init(Object *obj) QLIST_INIT(&phb->dma_spaces); /* LSI sources */ - object_initialize_child(obj, "lsi", &phb->lsis, sizeof(phb->lsis), - TYPE_ICS, &error_abort, NULL); + object_initialize_child(obj, "lsi", &phb->lsis, TYPE_ICS); /* Default init ... will be fixed by HW inits */ phb->lsis.offset = 0; /* MSI sources */ - object_initialize_child(obj, "msi", &phb->msis, sizeof(phb->msis), - TYPE_PHB3_MSI, &error_abort, NULL); + object_initialize_child(obj, "msi", &phb->msis, TYPE_PHB3_MSI); /* Power Bus Common Queue */ - object_initialize_child(obj, "pbcq", &phb->pbcq, sizeof(phb->pbcq), - TYPE_PNV_PBCQ, &error_abort, NULL); + object_initialize_child(obj, "pbcq", &phb->pbcq, TYPE_PNV_PBCQ); /* Root Port */ - object_initialize_child(obj, "root", &phb->root, sizeof(phb->root), - TYPE_PNV_PHB3_ROOT_PORT, &error_abort, NULL); + object_initialize_child(obj, "root", &phb->root, TYPE_PNV_PHB3_ROOT_PORT); qdev_prop_set_int32(DEVICE(&phb->root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(&phb->root), "multifunction", false); } diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index aba710fd1f..368ae9eacd 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1155,12 +1155,10 @@ static void pnv_phb4_instance_init(Object *obj) QLIST_INIT(&phb->dma_spaces); /* XIVE interrupt source object */ - object_initialize_child(obj, "source", &phb->xsrc, sizeof(phb->xsrc), - TYPE_XIVE_SOURCE, &error_abort, NULL); + object_initialize_child(obj, "source", &phb->xsrc, TYPE_XIVE_SOURCE); /* Root Port */ - object_initialize_child(obj, "root", &phb->root, sizeof(phb->root), - TYPE_PNV_PHB4_ROOT_PORT, &error_abort, NULL); + object_initialize_child(obj, "root", &phb->root, TYPE_PNV_PHB4_ROOT_PORT); qdev_prop_set_int32(DEVICE(&phb->root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(&phb->root), "multifunction", false); diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c index 565345a018..f9b41c5042 100644 --- a/hw/pci-host/pnv_phb4_pec.c +++ b/hw/pci-host/pnv_phb4_pec.c @@ -370,8 +370,7 @@ static void pnv_pec_instance_init(Object *obj) for (i = 0; i < PHB4_PEC_MAX_STACKS; i++) { object_initialize_child(obj, "stack[*]", &pec->stacks[i], - sizeof(pec->stacks[i]), TYPE_PNV_PHB4_PEC_STACK, - &error_abort, NULL); + TYPE_PNV_PHB4_PEC_STACK); } } @@ -522,8 +521,7 @@ static void pnv_pec_stk_instance_init(Object *obj) { PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(obj); - object_initialize_child(obj, "phb", &stack->phb, sizeof(stack->phb), - TYPE_PNV_PHB4, &error_abort, NULL); + object_initialize_child(obj, "phb", &stack->phb, TYPE_PNV_PHB4); } static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 8d526457f4..d6028543d2 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -212,8 +212,7 @@ static void q35_host_initfn(Object *obj) memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb, "pci-conf-data", 4); - object_initialize_child(OBJECT(s), "mch", &s->mch, sizeof(s->mch), - TYPE_MCH_PCI_DEVICE, &error_abort, NULL); + object_initialize_child(OBJECT(s), "mch", &s->mch, TYPE_MCH_PCI_DEVICE); qdev_prop_set_int32(DEVICE(&s->mch), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(&s->mch), "multifunction", false); /* mch's object_initialize resets the default value, set it again */ diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c index e4fc8abb6a..3b321421b6 100644 --- a/hw/pci-host/xilinx-pcie.c +++ b/hw/pci-host/xilinx-pcie.c @@ -151,8 +151,7 @@ static void xilinx_pcie_host_init(Object *obj) XilinxPCIEHost *s = XILINX_PCIE_HOST(obj); XilinxPCIERoot *root = &s->root; - object_initialize_child(obj, "root", root, sizeof(*root), - TYPE_XILINX_PCIE_ROOT, &error_abort, NULL); + object_initialize_child(obj, "root", root, TYPE_XILINX_PCIE_ROOT); qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(root), "multifunction", false); } diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index ffaf12b006..8cf097ae7c 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1061,22 +1061,16 @@ static void pnv_chip_power8_instance_init(Object *obj) object_property_allow_set_link, OBJ_PROP_LINK_STRONG); - object_initialize_child(obj, "psi", &chip8->psi, sizeof(chip8->psi), - TYPE_PNV8_PSI, &error_abort, NULL); + object_initialize_child(obj, "psi", &chip8->psi, TYPE_PNV8_PSI); - object_initialize_child(obj, "lpc", &chip8->lpc, sizeof(chip8->lpc), - TYPE_PNV8_LPC, &error_abort, NULL); + object_initialize_child(obj, "lpc", &chip8->lpc, TYPE_PNV8_LPC); - object_initialize_child(obj, "occ", &chip8->occ, sizeof(chip8->occ), - TYPE_PNV8_OCC, &error_abort, NULL); + object_initialize_child(obj, "occ", &chip8->occ, TYPE_PNV8_OCC); - object_initialize_child(obj, "homer", &chip8->homer, sizeof(chip8->homer), - TYPE_PNV8_HOMER, &error_abort, NULL); + object_initialize_child(obj, "homer", &chip8->homer, TYPE_PNV8_HOMER); for (i = 0; i < pcc->num_phbs; i++) { - object_initialize_child(obj, "phb[*]", &chip8->phbs[i], - sizeof(chip8->phbs[i]), TYPE_PNV_PHB3, - &error_abort, NULL); + object_initialize_child(obj, "phb[*]", &chip8->phbs[i], TYPE_PNV_PHB3); } /* @@ -1320,22 +1314,17 @@ static void pnv_chip_power9_instance_init(Object *obj) object_property_add_alias(obj, "xive-fabric", OBJECT(&chip9->xive), "xive-fabric"); - object_initialize_child(obj, "psi", &chip9->psi, sizeof(chip9->psi), - TYPE_PNV9_PSI, &error_abort, NULL); + object_initialize_child(obj, "psi", &chip9->psi, TYPE_PNV9_PSI); - object_initialize_child(obj, "lpc", &chip9->lpc, sizeof(chip9->lpc), - TYPE_PNV9_LPC, &error_abort, NULL); + object_initialize_child(obj, "lpc", &chip9->lpc, TYPE_PNV9_LPC); - object_initialize_child(obj, "occ", &chip9->occ, sizeof(chip9->occ), - TYPE_PNV9_OCC, &error_abort, NULL); + object_initialize_child(obj, "occ", &chip9->occ, TYPE_PNV9_OCC); - object_initialize_child(obj, "homer", &chip9->homer, sizeof(chip9->homer), - TYPE_PNV9_HOMER, &error_abort, NULL); + object_initialize_child(obj, "homer", &chip9->homer, TYPE_PNV9_HOMER); for (i = 0; i < PNV9_CHIP_MAX_PEC; i++) { object_initialize_child(obj, "pec[*]", &chip9->pecs[i], - sizeof(chip9->pecs[i]), TYPE_PNV_PHB4_PEC, - &error_abort, NULL); + TYPE_PNV_PHB4_PEC); } /* @@ -1359,8 +1348,9 @@ static void pnv_chip_quad_realize(Pnv9Chip *chip9, Error **errp) int core_id = CPU_CORE(pnv_core)->core_id; snprintf(eq_name, sizeof(eq_name), "eq[%d]", core_id); - object_initialize_child(OBJECT(chip), eq_name, eq, sizeof(*eq), - TYPE_PNV_QUAD, &error_fatal, NULL); + object_initialize_child_with_props(OBJECT(chip), eq_name, eq, + sizeof(*eq), TYPE_PNV_QUAD, + &error_fatal, NULL); object_property_set_int(OBJECT(eq), core_id, "id", &error_fatal); object_property_set_bool(OBJECT(eq), true, "realized", &error_fatal); @@ -1586,10 +1576,8 @@ static void pnv_chip_power10_instance_init(Object *obj) { Pnv10Chip *chip10 = PNV10_CHIP(obj); - object_initialize_child(obj, "psi", &chip10->psi, sizeof(chip10->psi), - TYPE_PNV10_PSI, &error_abort, NULL); - object_initialize_child(obj, "lpc", &chip10->lpc, sizeof(chip10->lpc), - TYPE_PNV10_LPC, &error_abort, NULL); + object_initialize_child(obj, "psi", &chip10->psi, TYPE_PNV10_PSI); + object_initialize_child(obj, "lpc", &chip10->lpc, TYPE_PNV10_LPC); } static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 82f0769465..20e54ad5ac 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -483,8 +483,7 @@ static void pnv_psi_power8_instance_init(Object *obj) { Pnv8Psi *psi8 = PNV8_PSI(obj); - object_initialize_child(obj, "ics-psi", &psi8->ics, sizeof(psi8->ics), - TYPE_ICS, &error_abort, NULL); + object_initialize_child(obj, "ics-psi", &psi8->ics, TYPE_ICS); object_property_add_alias(obj, ICS_PROP_XICS, OBJECT(&psi8->ics), ICS_PROP_XICS); } @@ -836,8 +835,7 @@ static void pnv_psi_power9_instance_init(Object *obj) { Pnv9Psi *psi = PNV9_PSI(obj); - object_initialize_child(obj, "source", &psi->source, sizeof(psi->source), - TYPE_XIVE_SOURCE, &error_abort, NULL); + object_initialize_child(obj, "source", &psi->source, TYPE_XIVE_SOURCE); } static void pnv_psi_power9_realize(DeviceState *dev, Error **errp) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 1228aeb4b0..7ef24ea2a1 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1727,9 +1727,9 @@ static void spapr_create_nvram(SpaprMachineState *spapr) static void spapr_rtc_create(SpaprMachineState *spapr) { - object_initialize_child(OBJECT(spapr), "rtc", - &spapr->rtc, sizeof(spapr->rtc), TYPE_SPAPR_RTC, - &error_fatal, NULL); + object_initialize_child_with_props(OBJECT(spapr), "rtc", &spapr->rtc, + sizeof(spapr->rtc), TYPE_SPAPR_RTC, + &error_fatal, NULL); object_property_set_bool(OBJECT(&spapr->rtc), true, "realized", &error_fatal); object_property_add_alias(OBJECT(spapr), "rtc-time", OBJECT(&spapr->rtc), diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c index 61e88e2e37..56c2be5312 100644 --- a/hw/riscv/riscv_hart.c +++ b/hw/riscv/riscv_hart.c @@ -45,9 +45,7 @@ static void riscv_hart_realize(RISCVHartArrayState *s, int idx, { Error *err = NULL; - object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx], - sizeof(s->harts[idx]), cpu_type, - &error_abort, NULL); + object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx], cpu_type); s->harts[idx].env.mhartid = s->hartid_base + idx; qemu_register_reset(riscv_harts_cpu_reset, &s->harts[idx]); object_property_set_bool(OBJECT(&s->harts[idx]), true, diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index 8831e6728e..0369cb5d53 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -85,9 +85,7 @@ static void riscv_sifive_e_init(MachineState *machine) int i; /* Initialize SoC */ - object_initialize_child(OBJECT(machine), "soc", &s->soc, - sizeof(s->soc), TYPE_RISCV_E_SOC, - &error_abort, NULL); + object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_E_SOC); object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abort); diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index bb69fd8e48..1cecd28514 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -328,9 +328,7 @@ static void sifive_u_machine_init(MachineState *machine) int i; /* Initialize SoC */ - object_initialize_child(OBJECT(machine), "soc", &s->soc, - sizeof(s->soc), TYPE_RISCV_U_SOC, - &error_abort, NULL); + object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_U_SOC); object_property_set_uint(OBJECT(&s->soc), s->serial, "serial", &error_abort); object_property_set_bool(OBJECT(&s->soc), true, "realized", @@ -486,9 +484,7 @@ static void riscv_sifive_u_soc_init(Object *obj) MachineState *ms = MACHINE(qdev_get_machine()); SiFiveUSoCState *s = RISCV_U_SOC(obj); - object_initialize_child(obj, "e-cluster", &s->e_cluster, - sizeof(s->e_cluster), TYPE_CPU_CLUSTER, - &error_abort, NULL); + object_initialize_child(obj, "e-cluster", &s->e_cluster, TYPE_CPU_CLUSTER); qdev_prop_set_uint32(DEVICE(&s->e_cluster), "cluster-id", 0); sysbus_init_child_obj(OBJECT(&s->e_cluster), "e-cpus", @@ -498,9 +494,7 @@ static void riscv_sifive_u_soc_init(Object *obj) qdev_prop_set_uint32(DEVICE(&s->e_cpus), "hartid-base", 0); qdev_prop_set_string(DEVICE(&s->e_cpus), "cpu-type", SIFIVE_E_CPU); - object_initialize_child(obj, "u-cluster", &s->u_cluster, - sizeof(s->u_cluster), TYPE_CPU_CLUSTER, - &error_abort, NULL); + object_initialize_child(obj, "u-cluster", &s->u_cluster, TYPE_CPU_CLUSTER); qdev_prop_set_uint32(DEVICE(&s->u_cluster), "cluster-id", 1); sysbus_init_child_obj(OBJECT(&s->u_cluster), "u-cpus", diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 850fcce5e7..cc9c9dc162 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -3230,8 +3230,9 @@ void virtio_instance_init_common(Object *proxy_obj, void *data, { DeviceState *vdev = data; - object_initialize_child(proxy_obj, "virtio-backend", vdev, vdev_size, - vdev_name, &error_abort, NULL); + object_initialize_child_with_props(proxy_obj, "virtio-backend", vdev, + vdev_size, vdev_name, &error_abort, + NULL); qdev_alias_all_properties(vdev, proxy_obj); } diff --git a/qom/object.c b/qom/object.c index c02487ec1a..41848ba7eb 100644 --- a/qom/object.c +++ b/qom/object.c @@ -529,19 +529,21 @@ void object_initialize(void *data, size_t size, const char *typename) object_initialize_with_type(data, size, type); } -void object_initialize_child(Object *parentobj, const char *propname, +void object_initialize_child_with_props(Object *parentobj, + const char *propname, void *childobj, size_t size, const char *type, Error **errp, ...) { va_list vargs; va_start(vargs, errp); - object_initialize_childv(parentobj, propname, childobj, size, type, errp, - vargs); + object_initialize_child_with_propsv(parentobj, propname, + childobj, size, type, errp, vargs); va_end(vargs); } -void object_initialize_childv(Object *parentobj, const char *propname, +void object_initialize_child_with_propsv(Object *parentobj, + const char *propname, void *childobj, size_t size, const char *type, Error **errp, va_list vargs) { @@ -582,6 +584,15 @@ out: error_propagate(errp, local_err); } +void object_initialize_child_internal(Object *parent, + const char *propname, + void *child, size_t size, + const char *type) +{ + object_initialize_child_with_props(parent, propname, child, size, type, + &error_abort, NULL); +} + static inline bool object_property_is_child(ObjectProperty *prop) { return strstart(prop->type, "child<", NULL); From patchwork Fri May 29 13:45:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578829 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 595A0912 for ; Fri, 29 May 2020 13:58:32 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2F7E7206A4 for ; Fri, 29 May 2020 13:58:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="BRBXayr8" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2F7E7206A4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:40452 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefWp-0002JN-9v for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:58:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49226) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKO-0002ky-OS for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:40 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:24606 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKK-00074X-IV for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:40 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759935; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/C51sz6kN8Dl9nJVv/juT1AHIuhZa4ddvOKIoPgiSEs=; b=BRBXayr8s4Nzkyy1qN1Nhb5vxt5knvBsqg7iqym76Vh2q+Xyo/UlHIN9Vxqy21vkDLEnaJ UsAO/VZRji3fJg2bDeazp7CY6ri//37Qxz1rNsmVLMfck72ZynbmsZCkZcXYTia+llhNzm b13E00mvU8/wM/R9IYSJMT5hz0riGiI= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-84-oBoSoZCuPUeYl37hQBIAvA-1; Fri, 29 May 2020 09:45:33 -0400 X-MC-Unique: oBoSoZCuPUeYl37hQBIAvA-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id C608918FE868; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 97F49100164C; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 5CAC0113522E; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 37/58] macio: Convert use of qdev_set_parent_bus() Date: Fri, 29 May 2020 15:45:02 +0200 Message-Id: <20200529134523.8477-38-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Convert qdev_set_parent_bus()/realize to qdev_realize(); recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. Cc: Mark Cave-Ayland Cc: David Gibson Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- hw/misc/macio/macio.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index a2698e4a20..1a07ca2ca5 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -100,7 +100,6 @@ static void macio_init_child_obj(MacIOState *s, const char *childname, { object_initialize_child_with_props(OBJECT(s), childname, child, childsize, childtype, &error_abort, NULL); - qdev_set_parent_bus(DEVICE(child), BUS(&s->macio_bus)); } static void macio_common_realize(PCIDevice *d, Error **errp) @@ -109,7 +108,7 @@ static void macio_common_realize(PCIDevice *d, Error **errp) SysBusDevice *sysbus_dev; Error *err = NULL; - object_property_set_bool(OBJECT(&s->dbdma), true, "realized", &err); + qdev_realize(DEVICE(&s->dbdma), BUS(&s->macio_bus), &err); if (err) { error_propagate(errp, err); return; @@ -125,7 +124,7 @@ static void macio_common_realize(PCIDevice *d, Error **errp) qdev_prop_set_chr(DEVICE(&s->escc), "chrB", serial_hd(1)); qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial); qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial); - object_property_set_bool(OBJECT(&s->escc), true, "realized", &err); + qdev_realize(DEVICE(&s->escc), BUS(&s->macio_bus), &err); if (err) { error_propagate(errp, err); return; @@ -148,7 +147,7 @@ static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide, object_property_set_link(OBJECT(ide), OBJECT(&s->dbdma), "dbdma", errp); macio_ide_register_dma(ide); - object_property_set_bool(OBJECT(ide), true, "realized", errp); + qdev_realize(DEVICE(ide), BUS(&s->macio_bus), errp); } static void macio_oldworld_realize(PCIDevice *d, Error **errp) @@ -167,7 +166,7 @@ static void macio_oldworld_realize(PCIDevice *d, Error **errp) qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", s->frequency); - object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err); + qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), &err); if (err) { error_propagate(errp, err); return; @@ -184,7 +183,7 @@ static void macio_oldworld_realize(PCIDevice *d, Error **errp) sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev, OLDWORLD_ESCCA_IRQ)); - object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err); + qdev_realize(DEVICE(&os->nvram), BUS(&s->macio_bus), &err); if (err) { error_propagate(errp, err); return; @@ -348,7 +347,7 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp) &error_abort); memory_region_add_subregion(&s->bar, 0x50, sysbus_mmio_get_region(sysbus_dev, 0)); - object_property_set_bool(OBJECT(&ns->gpio), true, "realized", &err); + qdev_realize(DEVICE(&ns->gpio), BUS(&s->macio_bus), &err); /* PMU */ object_initialize_child(OBJECT(s), "pmu", &s->pmu, TYPE_VIA_PMU); From patchwork Fri May 29 13:45:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578813 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CF21B139A for ; Fri, 29 May 2020 13:54:45 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A5D0A206A1 for ; Fri, 29 May 2020 13:54:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="fiekUtTg" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A5D0A206A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:52136 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefTA-0003N6-K4 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:54:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49238) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKQ-0002pH-9D for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:42 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:51688 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKK-00074q-Rw for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:41 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759935; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VC3iWxC5cHejzquo9EOrkAWenZ5Dd7GkOEj2r7AQLyU=; b=fiekUtTgM7AzAH4MJEdYNjTSgslawmKsZheZIXiOMAySTSWKZTSF26fMKyCvIOYvu0wHLy rEf/PKCsVTUN/5YAxWjVnVmLs+phHuHNcPD+pwdT21kp+bNuhjorUnqDaFbL90z4gVhCIt /wmlcwzZjNoFDmdMez7iZojI1/8RbI8= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-36-_JUngpKJPmOnEsQlvgvfBA-1; Fri, 29 May 2020 09:45:33 -0400 X-MC-Unique: _JUngpKJPmOnEsQlvgvfBA-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 9A6EF8005AA; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 6D5CD5C1B0; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 602DF1135230; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 38/58] macio: Eliminate macio_init_child_obj() Date: Fri, 29 May 2020 15:45:03 +0200 Message-Id: <20200529134523.8477-39-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" macio_init_child_obj() has become a trivial wrapper around object_initialize_child_with_props(). Eliminate it, since the general convenience wrapper object_initialize_child() is just as convenient already. Cc: Mark Cave-Ayland Cc: David Gibson Signed-off-by: Markus Armbruster --- hw/misc/macio/macio.c | 30 +++++++++--------------------- 1 file changed, 9 insertions(+), 21 deletions(-) diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index 1a07ca2ca5..8ba7af073c 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -94,14 +94,6 @@ static void macio_bar_setup(MacIOState *s) macio_escc_legacy_setup(s); } -static void macio_init_child_obj(MacIOState *s, const char *childname, - void *child, size_t childsize, - const char *childtype) -{ - object_initialize_child_with_props(OBJECT(s), childname, child, childsize, - childtype, &error_abort, NULL); -} - static void macio_common_realize(PCIDevice *d, Error **errp) { MacIOState *s = MACIO(d); @@ -218,13 +210,12 @@ static void macio_oldworld_realize(PCIDevice *d, Error **errp) } } -static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size, - int index) +static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, int index) { gchar *name = g_strdup_printf("ide[%i]", index); uint32_t addr = 0x1f000 + ((index + 1) * 0x1000); - macio_init_child_obj(s, name, ide, ide_size, TYPE_MACIO_IDE); + object_initialize_child(OBJECT(s), name, ide, TYPE_MACIO_IDE); qdev_prop_set_uint32(DEVICE(ide), "addr", addr); memory_region_add_subregion(&s->bar, addr, &ide->mem); g_free(name); @@ -242,16 +233,15 @@ static void macio_oldworld_init(Object *obj) qdev_prop_allow_set_link_before_realize, 0); - macio_init_child_obj(s, "cuda", &s->cuda, sizeof(s->cuda), TYPE_CUDA); + object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA); - macio_init_child_obj(s, "nvram", &os->nvram, sizeof(os->nvram), - TYPE_MACIO_NVRAM); + object_initialize_child(OBJECT(s), "nvram", &os->nvram, TYPE_MACIO_NVRAM); dev = DEVICE(&os->nvram); qdev_prop_set_uint32(dev, "size", 0x2000); qdev_prop_set_uint32(dev, "it_shift", 4); for (i = 0; i < 2; i++) { - macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i); + macio_init_ide(s, &os->ide[i], i); } } @@ -396,11 +386,10 @@ static void macio_newworld_init(Object *obj) qdev_prop_allow_set_link_before_realize, 0); - macio_init_child_obj(s, "gpio", &ns->gpio, sizeof(ns->gpio), - TYPE_MACIO_GPIO); + object_initialize_child(OBJECT(s), "gpio", &ns->gpio, TYPE_MACIO_GPIO); for (i = 0; i < 2; i++) { - macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i); + macio_init_ide(s, &ns->ide[i], i); } } @@ -413,10 +402,9 @@ static void macio_instance_init(Object *obj) qbus_create_inplace(&s->macio_bus, sizeof(s->macio_bus), TYPE_MACIO_BUS, DEVICE(obj), "macio.0"); - macio_init_child_obj(s, "dbdma", &s->dbdma, sizeof(s->dbdma), - TYPE_MAC_DBDMA); + object_initialize_child(OBJECT(s), "dbdma", &s->dbdma, TYPE_MAC_DBDMA); - macio_init_child_obj(s, "escc", &s->escc, sizeof(s->escc), TYPE_ESCC); + object_initialize_child(OBJECT(s), "escc", &s->escc, TYPE_ESCC); } static const VMStateDescription vmstate_macio_oldworld = { From patchwork Fri May 29 13:45:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578817 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A4299912 for ; Fri, 29 May 2020 13:55:53 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6AFF9206A1 for ; Fri, 29 May 2020 13:55:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="hOfR3CQl" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6AFF9206A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:57742 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefUG-0005nB-DQ for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:55:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49254) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKS-0002u4-Eg for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:44 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:26418 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKL-00075o-NP for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:43 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NsU2x0StkmCl+yuNneGh3ig7AN9xqOKfCTjNH5lz1Qs=; b=hOfR3CQl8lVsx2D+LB0TFJvjPaGnwCAr6H/dKwii8s01v8rUHlqnAaAT/9PBTJQJAjOnrj DTW/J4qADyPtH0mqpxGheYJQoTlsYXshBohs+BedqHG5belClP6yB65Lj4Ef+nLcYj3Re1 eLJA9DT4pkZvHP85hkk9kzjqQ6ynutg= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-239-vfjSO_0_NK6bPXBeprAoNA-1; Fri, 29 May 2020 09:45:33 -0400 X-MC-Unique: vfjSO_0_NK6bPXBeprAoNA-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 19986835B40 for ; Fri, 29 May 2020 13:45:33 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 95E795D9D5; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 646691135231; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 39/58] sysbus: Drop useless OBJECT() in sysbus_init_child_obj() calls Date: Fri, 29 May 2020 15:45:04 +0200 Message-Id: <20200529134523.8477-40-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" OBJECT(child) expands to ((Object *)(child)). sysbus_init_child_obj() parameter @child is void *. Pass child instead of OBJECT(child). Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/allwinner-a10.c | 4 ++-- hw/arm/aspeed_ast2600.c | 40 +++++++++++++++++----------------------- hw/arm/aspeed_soc.c | 35 +++++++++++++++-------------------- hw/arm/nrf51_soc.c | 2 +- hw/mips/boston.c | 4 ++-- hw/mips/malta.c | 2 +- 6 files changed, 38 insertions(+), 49 deletions(-) diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c index 49c51463e1..64449416de 100644 --- a/hw/arm/allwinner-a10.c +++ b/hw/arm/allwinner-a10.c @@ -59,9 +59,9 @@ static void aw_a10_init(Object *obj) int i; for (i = 0; i < AW_A10_NUM_USB; i++) { - sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]), + sysbus_init_child_obj(obj, "ehci[*]", &s->ehci[i], sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI); - sysbus_init_child_obj(obj, "ohci[*]", OBJECT(&s->ohci[i]), + sysbus_init_child_obj(obj, "ohci[*]", &s->ohci[i], sizeof(s->ohci[i]), TYPE_SYSBUS_OHCI); } } diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index beb688fd8f..b7fdffff20 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -131,8 +131,7 @@ static void aspeed_soc_ast2600_init(Object *obj) } snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); - sysbus_init_child_obj(obj, "scu", OBJECT(&s->scu), sizeof(s->scu), - typename); + sysbus_init_child_obj(obj, "scu", &s->scu, sizeof(s->scu), typename); qdev_prop_set_uint32(DEVICE(&s->scu), "silicon-rev", sc->silicon_rev); object_property_add_alias(obj, "hw-strap1", OBJECT(&s->scu), @@ -145,36 +144,33 @@ static void aspeed_soc_ast2600_init(Object *obj) sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore, sizeof(s->a7mpcore), TYPE_A15MPCORE_PRIV); - sysbus_init_child_obj(obj, "rtc", OBJECT(&s->rtc), sizeof(s->rtc), + sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc), TYPE_ASPEED_RTC); snprintf(typename, sizeof(typename), "aspeed.timer-%s", socname); - sysbus_init_child_obj(obj, "timerctrl", OBJECT(&s->timerctrl), + sysbus_init_child_obj(obj, "timerctrl", &s->timerctrl, sizeof(s->timerctrl), typename); snprintf(typename, sizeof(typename), "aspeed.i2c-%s", socname); - sysbus_init_child_obj(obj, "i2c", OBJECT(&s->i2c), sizeof(s->i2c), - typename); + sysbus_init_child_obj(obj, "i2c", &s->i2c, sizeof(s->i2c), typename); snprintf(typename, sizeof(typename), "aspeed.fmc-%s", socname); - sysbus_init_child_obj(obj, "fmc", OBJECT(&s->fmc), sizeof(s->fmc), - typename); + sysbus_init_child_obj(obj, "fmc", &s->fmc, sizeof(s->fmc), typename); object_property_add_alias(obj, "num-cs", OBJECT(&s->fmc), "num-cs"); for (i = 0; i < sc->spis_num; i++) { snprintf(typename, sizeof(typename), "aspeed.spi%d-%s", i + 1, socname); - sysbus_init_child_obj(obj, "spi[*]", OBJECT(&s->spi[i]), + sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]), typename); } for (i = 0; i < sc->ehcis_num; i++) { - sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]), + sysbus_init_child_obj(obj, "ehci[*]", &s->ehci[i], sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI); } snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname); - sysbus_init_child_obj(obj, "sdmc", OBJECT(&s->sdmc), sizeof(s->sdmc), - typename); + sysbus_init_child_obj(obj, "sdmc", &s->sdmc, sizeof(s->sdmc), typename); object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc), "ram-size"); object_property_add_alias(obj, "max-ram-size", OBJECT(&s->sdmc), @@ -182,30 +178,29 @@ static void aspeed_soc_ast2600_init(Object *obj) for (i = 0; i < sc->wdts_num; i++) { snprintf(typename, sizeof(typename), "aspeed.wdt-%s", socname); - sysbus_init_child_obj(obj, "wdt[*]", OBJECT(&s->wdt[i]), + sysbus_init_child_obj(obj, "wdt[*]", &s->wdt[i], sizeof(s->wdt[i]), typename); } for (i = 0; i < sc->macs_num; i++) { - sysbus_init_child_obj(obj, "ftgmac100[*]", OBJECT(&s->ftgmac100[i]), + sysbus_init_child_obj(obj, "ftgmac100[*]", &s->ftgmac100[i], sizeof(s->ftgmac100[i]), TYPE_FTGMAC100); sysbus_init_child_obj(obj, "mii[*]", &s->mii[i], sizeof(s->mii[i]), TYPE_ASPEED_MII); } - sysbus_init_child_obj(obj, "xdma", OBJECT(&s->xdma), sizeof(s->xdma), + sysbus_init_child_obj(obj, "xdma", &s->xdma, sizeof(s->xdma), TYPE_ASPEED_XDMA); snprintf(typename, sizeof(typename), "aspeed.gpio-%s", socname); - sysbus_init_child_obj(obj, "gpio", OBJECT(&s->gpio), sizeof(s->gpio), - typename); + sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio), typename); snprintf(typename, sizeof(typename), "aspeed.gpio-%s-1_8v", socname); - sysbus_init_child_obj(obj, "gpio_1_8v", OBJECT(&s->gpio_1_8v), + sysbus_init_child_obj(obj, "gpio_1_8v", &s->gpio_1_8v, sizeof(s->gpio_1_8v), typename); - sysbus_init_child_obj(obj, "sd-controller", OBJECT(&s->sdhci), + sysbus_init_child_obj(obj, "sd-controller", &s->sdhci, sizeof(s->sdhci), TYPE_ASPEED_SDHCI); object_property_set_int(OBJECT(&s->sdhci), 2, "num-slots", &error_abort); @@ -213,18 +208,17 @@ static void aspeed_soc_ast2600_init(Object *obj) /* Init sd card slot class here so that they're under the correct parent */ for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { sysbus_init_child_obj(obj, "sd-controller.sdhci[*]", - OBJECT(&s->sdhci.slots[i]), + &s->sdhci.slots[i], sizeof(s->sdhci.slots[i]), TYPE_SYSBUS_SDHCI); } - sysbus_init_child_obj(obj, "emmc-controller", OBJECT(&s->emmc), + sysbus_init_child_obj(obj, "emmc-controller", &s->emmc, sizeof(s->emmc), TYPE_ASPEED_SDHCI); object_property_set_int(OBJECT(&s->emmc), 1, "num-slots", &error_abort); sysbus_init_child_obj(obj, "emmc-controller.sdhci", - OBJECT(&s->emmc.slots[0]), sizeof(s->emmc.slots[0]), - TYPE_SYSBUS_SDHCI); + &s->emmc.slots[0], sizeof(s->emmc.slots[0]), TYPE_SYSBUS_SDHCI); } /* diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 18d1763aba..5806e5c9b4 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -146,8 +146,7 @@ static void aspeed_soc_init(Object *obj) } snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); - sysbus_init_child_obj(obj, "scu", OBJECT(&s->scu), sizeof(s->scu), - typename); + sysbus_init_child_obj(obj, "scu", &s->scu, sizeof(s->scu), typename); qdev_prop_set_uint32(DEVICE(&s->scu), "silicon-rev", sc->silicon_rev); object_property_add_alias(obj, "hw-strap1", OBJECT(&s->scu), @@ -157,39 +156,36 @@ static void aspeed_soc_init(Object *obj) object_property_add_alias(obj, "hw-prot-key", OBJECT(&s->scu), "hw-prot-key"); - sysbus_init_child_obj(obj, "vic", OBJECT(&s->vic), sizeof(s->vic), + sysbus_init_child_obj(obj, "vic", &s->vic, sizeof(s->vic), TYPE_ASPEED_VIC); - sysbus_init_child_obj(obj, "rtc", OBJECT(&s->rtc), sizeof(s->rtc), + sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc), TYPE_ASPEED_RTC); snprintf(typename, sizeof(typename), "aspeed.timer-%s", socname); - sysbus_init_child_obj(obj, "timerctrl", OBJECT(&s->timerctrl), + sysbus_init_child_obj(obj, "timerctrl", &s->timerctrl, sizeof(s->timerctrl), typename); snprintf(typename, sizeof(typename), "aspeed.i2c-%s", socname); - sysbus_init_child_obj(obj, "i2c", OBJECT(&s->i2c), sizeof(s->i2c), - typename); + sysbus_init_child_obj(obj, "i2c", &s->i2c, sizeof(s->i2c), typename); snprintf(typename, sizeof(typename), "aspeed.fmc-%s", socname); - sysbus_init_child_obj(obj, "fmc", OBJECT(&s->fmc), sizeof(s->fmc), - typename); + sysbus_init_child_obj(obj, "fmc", &s->fmc, sizeof(s->fmc), typename); object_property_add_alias(obj, "num-cs", OBJECT(&s->fmc), "num-cs"); for (i = 0; i < sc->spis_num; i++) { snprintf(typename, sizeof(typename), "aspeed.spi%d-%s", i + 1, socname); - sysbus_init_child_obj(obj, "spi[*]", OBJECT(&s->spi[i]), + sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]), typename); } for (i = 0; i < sc->ehcis_num; i++) { - sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]), + sysbus_init_child_obj(obj, "ehci[*]", &s->ehci[i], sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI); } snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname); - sysbus_init_child_obj(obj, "sdmc", OBJECT(&s->sdmc), sizeof(s->sdmc), - typename); + sysbus_init_child_obj(obj, "sdmc", &s->sdmc, sizeof(s->sdmc), typename); object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc), "ram-size"); object_property_add_alias(obj, "max-ram-size", OBJECT(&s->sdmc), @@ -197,30 +193,29 @@ static void aspeed_soc_init(Object *obj) for (i = 0; i < sc->wdts_num; i++) { snprintf(typename, sizeof(typename), "aspeed.wdt-%s", socname); - sysbus_init_child_obj(obj, "wdt[*]", OBJECT(&s->wdt[i]), + sysbus_init_child_obj(obj, "wdt[*]", &s->wdt[i], sizeof(s->wdt[i]), typename); } for (i = 0; i < sc->macs_num; i++) { - sysbus_init_child_obj(obj, "ftgmac100[*]", OBJECT(&s->ftgmac100[i]), + sysbus_init_child_obj(obj, "ftgmac100[*]", &s->ftgmac100[i], sizeof(s->ftgmac100[i]), TYPE_FTGMAC100); } - sysbus_init_child_obj(obj, "xdma", OBJECT(&s->xdma), sizeof(s->xdma), + sysbus_init_child_obj(obj, "xdma", &s->xdma, sizeof(s->xdma), TYPE_ASPEED_XDMA); snprintf(typename, sizeof(typename), "aspeed.gpio-%s", socname); - sysbus_init_child_obj(obj, "gpio", OBJECT(&s->gpio), sizeof(s->gpio), - typename); + sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio), typename); - sysbus_init_child_obj(obj, "sdc", OBJECT(&s->sdhci), sizeof(s->sdhci), + sysbus_init_child_obj(obj, "sdc", &s->sdhci, sizeof(s->sdhci), TYPE_ASPEED_SDHCI); object_property_set_int(OBJECT(&s->sdhci), 2, "num-slots", &error_abort); /* Init sd card slot class here so that they're under the correct parent */ for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { - sysbus_init_child_obj(obj, "sdhci[*]", OBJECT(&s->sdhci.slots[i]), + sysbus_init_child_obj(obj, "sdhci[*]", &s->sdhci.slots[i], sizeof(s->sdhci.slots[i]), TYPE_SYSBUS_SDHCI); } } diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index fe126581e4..c278827b09 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -189,7 +189,7 @@ static void nrf51_soc_init(Object *obj) memory_region_init(&s->container, obj, "nrf51-container", UINT64_MAX); - sysbus_init_child_obj(OBJECT(s), "armv6m", OBJECT(&s->cpu), sizeof(s->cpu), + sysbus_init_child_obj(OBJECT(s), "armv6m", &s->cpu, sizeof(s->cpu), TYPE_ARMV7M); qdev_prop_set_string(DEVICE(&s->cpu), "cpu-type", ARM_CPU_TYPE_NAME("cortex-m0")); diff --git a/hw/mips/boston.c b/hw/mips/boston.c index a34ccdf616..d90f3a463b 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -454,8 +454,8 @@ static void boston_mach_init(MachineState *machine) is_64b = cpu_supports_isa(machine->cpu_type, ISA_MIPS64); - sysbus_init_child_obj(OBJECT(machine), "cps", OBJECT(&s->cps), - sizeof(s->cps), TYPE_MIPS_CPS); + sysbus_init_child_obj(OBJECT(machine), "cps", &s->cps, sizeof(s->cps), + TYPE_MIPS_CPS); object_property_set_str(OBJECT(&s->cps), machine->cpu_type, "cpu-type", &error_fatal); object_property_set_int(OBJECT(&s->cps), machine->smp.cpus, "num-vp", diff --git a/hw/mips/malta.c b/hw/mips/malta.c index d03e1c3e49..be0b4d3195 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1183,7 +1183,7 @@ static void create_cpu_without_cps(MachineState *ms, static void create_cps(MachineState *ms, MaltaState *s, qemu_irq *cbus_irq, qemu_irq *i8259_irq) { - sysbus_init_child_obj(OBJECT(s), "cps", OBJECT(&s->cps), sizeof(s->cps), + sysbus_init_child_obj(OBJECT(s), "cps", &s->cps, sizeof(s->cps), TYPE_MIPS_CPS); object_property_set_str(OBJECT(&s->cps), ms->cpu_type, "cpu-type", &error_fatal); From patchwork Fri May 29 13:45:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578839 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EF5F4912 for ; Fri, 29 May 2020 13:59:53 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C5015206A4 for ; Fri, 29 May 2020 13:59:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="QAQTyY6j" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C5015206A4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:48652 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefY8-0005bG-WB for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:59:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49236) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKQ-0002oI-1k for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:42 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:47508 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKK-00074i-PJ for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:41 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759935; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=c4gA2VhRpcNayUDq5XGnLwcMe9WmGatWAtOLY5fvC6A=; b=QAQTyY6jlOJx4qOcTwlTQ5OXoLihuEXEF/kPh1NpCIAGLmk3HVMmNAor4VNR1NqMAid1Zl ut++2NnaCpuid3uejukgrVLcj2BY0FHXzYdblYMz75AxCXC8q7/kTmPm7Lw3/wg3lo0Gtn 8xY9fj3B2L2mbeXmSffb/9bjwkTegS4= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-147-_Vs3X3b5OfigfBzSRBfozw-1; Fri, 29 May 2020 09:45:33 -0400 X-MC-Unique: _Vs3X3b5OfigfBzSRBfozw-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id CC0C7107ACCD for ; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9F04860C05; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 6863A1135233; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 40/58] microbit: Tidy up sysbus_init_child_obj() @child argument Date: Fri, 29 May 2020 15:45:05 +0200 Message-Id: <20200529134523.8477-41-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The callers of sysbus_init_child_obj() commonly pass either &child, sizeof(child), or pchild, sizeof(*pchild). Tidy up two that don't, mostly to keep future commits simpler. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/microbit.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c index ef213695bd..72fab429c4 100644 --- a/hw/arm/microbit.c +++ b/hw/arm/microbit.c @@ -39,7 +39,7 @@ static void microbit_init(MachineState *machine) Object *soc = OBJECT(&s->nrf51); Object *i2c = OBJECT(&s->i2c); - sysbus_init_child_obj(OBJECT(machine), "nrf51", soc, sizeof(s->nrf51), + sysbus_init_child_obj(OBJECT(machine), "nrf51", &s->nrf51, sizeof(s->nrf51), TYPE_NRF51_SOC); qdev_prop_set_chr(DEVICE(&s->nrf51), "serial0", serial_hd(0)); object_property_set_link(soc, OBJECT(system_memory), "memory", @@ -51,7 +51,7 @@ static void microbit_init(MachineState *machine) * hack until we implement the nRF51 TWI controller properly and the * magnetometer/accelerometer devices. */ - sysbus_init_child_obj(OBJECT(machine), "microbit.twi", i2c, + sysbus_init_child_obj(OBJECT(machine), "microbit.twi", &s->i2c, sizeof(s->i2c), TYPE_MICROBIT_I2C); object_property_set_bool(i2c, true, "realized", &error_fatal); mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(i2c), 0); From patchwork Fri May 29 13:45:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578807 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 24937912 for ; Fri, 29 May 2020 13:54:07 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EF0E5206A1 for ; Fri, 29 May 2020 13:54:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="beMvJOm6" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EF0E5206A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:49066 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefSY-00027t-1P for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:54:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49244) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKR-0002qP-50 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:43 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:57189 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKL-00075G-9v for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:42 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759935; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1BmRzzR4B/icJaMdaxAj+NMUo8OYuwUtcSwGKHfjvnM=; b=beMvJOm613MDbVa2dHvJNe7IuqyJF53LfAjcqOYotkFUZjRL96FHlf+6cIDS6HxFO9A7f2 Vlq6pjoVd0y1MH3EQLy8SG1qP8wUkfpUy679uZGhMzgPQjUof4CI54zRHMmyofcyy/b6cG pOR4Suqm5VnO8szx1Puz+5lNh6+fCwc= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-499-6-HFAUcvMcSBR8TTndnsBw-1; Fri, 29 May 2020 09:45:33 -0400 X-MC-Unique: 6-HFAUcvMcSBR8TTndnsBw-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 01EB818FE861 for ; Fri, 29 May 2020 13:45:33 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A3528A1048 for ; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 6BE7F1135235; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 41/58] sysbus: Tidy up sysbus_init_child_obj()'s @childsize arg, part 1 Date: Fri, 29 May 2020 15:45:06 +0200 Message-Id: <20200529134523.8477-42-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:27:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The callers of sysbus_init_child_obj() commonly pass either &child, sizeof(child), or pchild, sizeof(*pchild). Tidy up the few that use sizeof(child_type) instead, mostly to keep future commits simpler. Coccinelle script: @@ expression parent, propname, type; type T; T child; @@ - sysbus_init_child_obj(parent, propname, &child, sizeof(T), type) + sysbus_init_child_obj(parent, propname, &child, sizeof(child), type) @@ expression parent, propname, type; type T; T *child; @@ - sysbus_init_child_obj(parent, propname, child, sizeof(T), type) + sysbus_init_child_obj(parent, propname, child, sizeof(*child), type) Signed-off-by: Markus Armbruster --- hw/arm/bcm2835_peripherals.c | 3 +-- hw/arm/mps2-tz.c | 5 ++--- hw/arm/musca.c | 8 +++----- hw/display/sm501.c | 2 +- hw/microblaze/xlnx-zynqmp-pmu.c | 4 ++-- 5 files changed, 9 insertions(+), 13 deletions(-) diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c index f1bcc14f55..49bfabee9b 100644 --- a/hw/arm/bcm2835_peripherals.c +++ b/hw/arm/bcm2835_peripherals.c @@ -27,8 +27,7 @@ static void create_unimp(BCM2835PeripheralState *ps, UnimplementedDeviceState *uds, const char *name, hwaddr ofs, hwaddr size) { - sysbus_init_child_obj(OBJECT(ps), name, uds, - sizeof(UnimplementedDeviceState), + sysbus_init_child_obj(OBJECT(ps), name, uds, sizeof(*uds), TYPE_UNIMPLEMENTED_DEVICE); qdev_prop_set_string(DEVICE(uds), "name", name); qdev_prop_set_uint64(DEVICE(uds), "size", size); diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 8a050228d0..ad0bc9365a 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -174,8 +174,7 @@ static MemoryRegion *make_unimp_dev(MPS2TZMachineState *mms, */ UnimplementedDeviceState *uds = opaque; - sysbus_init_child_obj(OBJECT(mms), name, uds, - sizeof(UnimplementedDeviceState), + sysbus_init_child_obj(OBJECT(mms), name, uds, sizeof(*uds), TYPE_UNIMPLEMENTED_DEVICE); qdev_prop_set_string(DEVICE(uds), "name", name); qdev_prop_set_uint64(DEVICE(uds), "size", size); @@ -552,7 +551,7 @@ static void mps2tz_common_init(MachineState *machine) char *gpioname; sysbus_init_child_obj(OBJECT(machine), ppcinfo->name, ppc, - sizeof(TZPPC), TYPE_TZ_PPC); + sizeof(*ppc), TYPE_TZ_PPC); ppcdev = DEVICE(ppc); for (port = 0; port < TZ_NUM_PORTS; port++) { diff --git a/hw/arm/musca.c b/hw/arm/musca.c index cd7df7c191..b7f1c4e128 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -142,8 +142,7 @@ static MemoryRegion *make_unimp_dev(MuscaMachineState *mms, */ UnimplementedDeviceState *uds = opaque; - sysbus_init_child_obj(OBJECT(mms), name, uds, - sizeof(UnimplementedDeviceState), + sysbus_init_child_obj(OBJECT(mms), name, uds, sizeof(*uds), TYPE_UNIMPLEMENTED_DEVICE); qdev_prop_set_string(DEVICE(uds), "name", name); qdev_prop_set_uint64(DEVICE(uds), "size", size); @@ -246,8 +245,7 @@ static MemoryRegion *make_mpc(MuscaMachineState *mms, void *opaque, case MPC_CRYPTOISLAND: /* We don't implement the CryptoIsland yet */ uds = &mms->cryptoisland; - sysbus_init_child_obj(OBJECT(mms), name, uds, - sizeof(UnimplementedDeviceState), + sysbus_init_child_obj(OBJECT(mms), name, uds, sizeof(*uds), TYPE_UNIMPLEMENTED_DEVICE); qdev_prop_set_string(DEVICE(uds), "name", mpcinfo[i].name); qdev_prop_set_uint64(DEVICE(uds), "size", mpcinfo[i].size); @@ -535,7 +533,7 @@ static void musca_init(MachineState *machine) char *gpioname; sysbus_init_child_obj(OBJECT(machine), ppcinfo->name, ppc, - sizeof(TZPPC), TYPE_TZ_PPC); + sizeof(*ppc), TYPE_TZ_PPC); ppcdev = DEVICE(ppc); for (port = 0; port < TZ_NUM_PORTS; port++) { diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 0eb259fb98..6d1e314a0a 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -2006,7 +2006,7 @@ static void sm501_sysbus_init(Object *o) SM501SysBusState *sm501 = SYSBUS_SM501(o); SerialMM *smm = &sm501->serial; - sysbus_init_child_obj(o, "serial", smm, sizeof(SerialMM), TYPE_SERIAL_MM); + sysbus_init_child_obj(o, "serial", smm, sizeof(*smm), TYPE_SERIAL_MM); qdev_set_legacy_instance_id(DEVICE(smm), SM501_UART0, 2); qdev_prop_set_uint8(DEVICE(smm), "regshift", 2); qdev_prop_set_uint8(DEVICE(smm), "endianness", DEVICE_LITTLE_ENDIAN); diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c index bd56eccd66..30ad133ec3 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -69,8 +69,8 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj) /* Create the IPI device */ for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { char *name = g_strdup_printf("ipi%d", i); - sysbus_init_child_obj(obj, name, &s->ipi[i], - sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI); + sysbus_init_child_obj(obj, name, &s->ipi[i], sizeof(s->ipi[i]), + TYPE_XLNX_ZYNQMP_IPI); g_free(name); } } From patchwork Fri May 29 13:45:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578787 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A6547912 for ; Fri, 29 May 2020 13:52:51 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7B66C206A1 for ; Fri, 29 May 2020 13:52:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="UC/7iOIG" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7B66C206A1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:43518 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefRK-0008I2-FD for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:52:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49234) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKP-0002mp-Ip for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:41 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:60767 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKK-00074s-US for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:40 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759935; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=l1fdlxzbgEVUAkJtbQ6zyyenGg5fkfSvQgtliZBVpxk=; b=UC/7iOIGdOksoNcOJ4KczAL+HiKjKxHdhN+P+c1Ia2aJ4OaXAOGitFV33AEGqjMdE/d9NK T6nRUu4FYW5EzcGMsmIoLQ1xGcY7CTo1m/eiawOVWGuZQGWZeXBVImn3yPmwEnx0y9wpgB SQeVgySdttVi6tYo9QpJvSHIuK1NweA= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-181-vMazzX73PgyzMyMpAabiLw-1; Fri, 29 May 2020 09:45:33 -0400 X-MC-Unique: vMazzX73PgyzMyMpAabiLw-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id D81A98015CE for ; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A989CA1888; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 6FEF81135238; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 42/58] hw/arm/armsse: Pass correct child size to sysbus_init_child_obj() Date: Fri, 29 May 2020 15:45:07 +0200 Message-Id: <20200529134523.8477-43-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:27:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" armsse_init() initializes s->armv7m[i] for all i. It passes the size of the entire array instead of the array element to sysbus_init_child_obj(). Harmless, but fix it anyway. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/armsse.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 20bedbe044..b6276b7327 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -258,7 +258,8 @@ static void armsse_init(Object *obj) name = g_strdup_printf("armv7m%d", i); sysbus_init_child_obj(OBJECT(&s->cluster[i]), name, - &s->armv7m[i], sizeof(s->armv7m), TYPE_ARMV7M); + &s->armv7m[i], sizeof(s->armv7m[i]), + TYPE_ARMV7M); qdev_prop_set_string(DEVICE(&s->armv7m[i]), "cpu-type", ARM_CPU_TYPE_NAME("cortex-m33")); g_free(name); From patchwork Fri May 29 13:45:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578831 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 61383139A for ; Fri, 29 May 2020 13:58:36 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 38346206A4 for ; Fri, 29 May 2020 13:58:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="HpDC2lsZ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 38346206A4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:40890 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefWt-0002U0-DE for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 09:58:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49270) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKU-0002zp-L3 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:46 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:28096 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00075h-4F for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:46 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Y7AyJHBuQ2UVoD6I48DoFqTRqnNqpYVAUB50IcVhpLU=; b=HpDC2lsZYycb4+RWY8GGMf6khQAKD+HxpXVrPxL8natKC42lco1g5dCwQfAgRnVfWvZwY3 AUuxGInr/nODX2Ix+NG5Jsl7TS2y/fgYK66pg/Y40ZCNpFEnJgbU4q2bz/mmSx3N7xZ/Qr J1p+Kz9RDIjAwxCd687HCEaTLT4IGfc= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-321-zx95UiRcNQOQKkS-pk5Xvg-1; Fri, 29 May 2020 09:45:34 -0400 X-MC-Unique: zx95UiRcNQOQKkS-pk5Xvg-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 3EF2EEC1A4 for ; Fri, 29 May 2020 13:45:33 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id E23AB5C1B0 for ; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 74077113523B; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 43/58] sysbus: Tidy up sysbus_init_child_obj()'s @childsize arg, part 2 Date: Fri, 29 May 2020 15:45:08 +0200 Message-Id: <20200529134523.8477-44-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:27:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The callers of sysbus_init_child_obj() commonly pass either &child, sizeof(child), or pchild, sizeof(*pchild). Tidy up the few that use something else instead, mostly to keep future commits simpler. Coccinelle script: @@ expression parent, propname, type; expression child; type T; T proxy; @@ ( sysbus_init_child_obj(parent, propname, &child, sizeof(child), type) | sysbus_init_child_obj(parent, propname, child, sizeof(*child), type) | - sysbus_init_child_obj(parent, propname, child, sizeof(proxy), type) + sysbus_init_child_obj(parent, propname, child, sizeof(*child), type) ) This script is *unsound*: for each change we need to verify the @childsize argument stays the same. I did. Signed-off-by: Markus Armbruster --- hw/arm/mps2-tz.c | 15 +++++++-------- hw/arm/musca.c | 7 +++---- 2 files changed, 10 insertions(+), 12 deletions(-) diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index ad0bc9365a..90f4449b9d 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -193,7 +193,7 @@ static MemoryRegion *make_uart(MPS2TZMachineState *mms, void *opaque, SysBusDevice *s; DeviceState *orgate_dev = DEVICE(&mms->uart_irq_orgate); - sysbus_init_child_obj(OBJECT(mms), name, uart, sizeof(mms->uart[0]), + sysbus_init_child_obj(OBJECT(mms), name, uart, sizeof(*uart), TYPE_CMSDK_APB_UART); qdev_prop_set_chr(DEVICE(uart), "chardev", serial_hd(i)); qdev_prop_set_uint32(DEVICE(uart), "pclk-frq", SYSCLK_FRQ); @@ -214,8 +214,8 @@ static MemoryRegion *make_scc(MPS2TZMachineState *mms, void *opaque, DeviceState *sccdev; MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms); - sysbus_init_child_obj(OBJECT(mms), "scc", scc, - sizeof(mms->scc), TYPE_MPS2_SCC); + sysbus_init_child_obj(OBJECT(mms), "scc", scc, sizeof(*scc), + TYPE_MPS2_SCC); sccdev = DEVICE(scc); qdev_prop_set_uint32(sccdev, "scc-cfg4", 0x2); qdev_prop_set_uint32(sccdev, "scc-aid", 0x00200008); @@ -229,8 +229,8 @@ static MemoryRegion *make_fpgaio(MPS2TZMachineState *mms, void *opaque, { MPS2FPGAIO *fpgaio = opaque; - sysbus_init_child_obj(OBJECT(mms), "fpgaio", fpgaio, - sizeof(mms->fpgaio), TYPE_MPS2_FPGAIO); + sysbus_init_child_obj(OBJECT(mms), "fpgaio", fpgaio, sizeof(*fpgaio), + TYPE_MPS2_FPGAIO); object_property_set_bool(OBJECT(fpgaio), true, "realized", &error_fatal); return sysbus_mmio_get_region(SYS_BUS_DEVICE(fpgaio), 0); } @@ -267,7 +267,7 @@ static MemoryRegion *make_mpc(MPS2TZMachineState *mms, void *opaque, memory_region_init_ram(ssram, NULL, name, ramsize[i], &error_fatal); - sysbus_init_child_obj(OBJECT(mms), mpcname, mpc, sizeof(mms->ssram_mpc[0]), + sysbus_init_child_obj(OBJECT(mms), mpcname, mpc, sizeof(*mpc), TYPE_TZ_MPC); object_property_set_link(OBJECT(mpc), OBJECT(ssram), "downstream", &error_fatal); @@ -363,8 +363,7 @@ static MemoryRegion *make_spi(MPS2TZMachineState *mms, void *opaque, int i = spi - &mms->spi[0]; SysBusDevice *s; - sysbus_init_child_obj(OBJECT(mms), name, spi, sizeof(mms->spi[0]), - TYPE_PL022); + sysbus_init_child_obj(OBJECT(mms), name, spi, sizeof(*spi), TYPE_PL022); object_property_set_bool(OBJECT(spi), true, "realized", &error_fatal); s = SYS_BUS_DEVICE(spi); sysbus_connect_irq(s, 0, get_sse_irq_in(mms, 51 + i)); diff --git a/hw/arm/musca.c b/hw/arm/musca.c index b7f1c4e128..a1a6e887ed 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -256,7 +256,7 @@ static MemoryRegion *make_mpc(MuscaMachineState *mms, void *opaque, g_assert_not_reached(); } - sysbus_init_child_obj(OBJECT(mms), mpcname, mpc, sizeof(mms->mpc[0]), + sysbus_init_child_obj(OBJECT(mms), mpcname, mpc, sizeof(*mpc), TYPE_TZ_MPC); object_property_set_link(OBJECT(mpc), OBJECT(downstream), "downstream", &error_fatal); @@ -279,7 +279,7 @@ static MemoryRegion *make_rtc(MuscaMachineState *mms, void *opaque, { PL031State *rtc = opaque; - sysbus_init_child_obj(OBJECT(mms), name, rtc, sizeof(mms->rtc), TYPE_PL031); + sysbus_init_child_obj(OBJECT(mms), name, rtc, sizeof(*rtc), TYPE_PL031); object_property_set_bool(OBJECT(rtc), true, "realized", &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(rtc), 0, get_sse_irq_in(mms, 39)); return sysbus_mmio_get_region(SYS_BUS_DEVICE(rtc), 0); @@ -293,8 +293,7 @@ static MemoryRegion *make_uart(MuscaMachineState *mms, void *opaque, int irqbase = 7 + i * 6; SysBusDevice *s; - sysbus_init_child_obj(OBJECT(mms), name, uart, sizeof(mms->uart[0]), - TYPE_PL011); + sysbus_init_child_obj(OBJECT(mms), name, uart, sizeof(*uart), TYPE_PL011); qdev_prop_set_chr(DEVICE(uart), "chardev", serial_hd(i)); object_property_set_bool(OBJECT(uart), true, "realized", &error_fatal); s = SYS_BUS_DEVICE(uart); From patchwork Fri May 29 13:45:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578859 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BEAE614C0 for ; Fri, 29 May 2020 14:04:17 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 95BA8207F5 for ; Fri, 29 May 2020 14:04:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="M0EP6sCR" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 95BA8207F5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:36692 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefcO-0007e5-M4 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:04:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49256) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKS-0002ub-RR for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:44 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:24451 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKL-000755-2R for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:44 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759935; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RvAy3dVdmrMiUWu2PHN91Todr0yQ51n3Ev83Ac5Bu9I=; b=M0EP6sCRoGoKN/oOz4zeHkEsGqf0yQUlV4t989MiZxq5gm/NXINalq0ka/v0gnxMQx+uoi psXHGNahAGYlTnitjDwV+G2XUHlHHaTmGRxuBgOOhgFPGH3uI0PtfT545f98xLPOtJVt0a DDKWF8obVR3AV8hogHP3+4Zp0gJL3vo= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-480-1YqZzjR6MEOFyygphPOBVA-1; Fri, 29 May 2020 09:45:33 -0400 X-MC-Unique: 1YqZzjR6MEOFyygphPOBVA-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 29923835B41 for ; Fri, 29 May 2020 13:45:33 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id F11737A8C5 for ; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 7760E113523C; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 44/58] sysbus: New sysbus_realize(), sysbus_realize_and_unref() Date: Fri, 29 May 2020 15:45:09 +0200 Message-Id: <20200529134523.8477-45-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Sysbus devices almost always plug into the main system bus. qdev_create() even has a convenience feature to make that easy: a null bus argument gets replaced by the main system bus. qdev_realize() and qdev_realize_and_unref() do the same. We can do better. Provide convenience wrappers around qdev_realize() and qdev_realize_and_unref() that don't take a @bus argument. They always pass the main system bus. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- include/hw/sysbus.h | 4 +++- hw/core/sysbus.c | 14 ++++++++++++-- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h index c4a1c0adfa..606095ba35 100644 --- a/include/hw/sysbus.h +++ b/include/hw/sysbus.h @@ -90,6 +90,9 @@ void sysbus_add_io(SysBusDevice *dev, hwaddr addr, MemoryRegion *mem); MemoryRegion *sysbus_address_space(SysBusDevice *dev); +bool sysbus_realize(SysBusDevice *dev, Error **errp); +bool sysbus_realize_and_unref(SysBusDevice *dev, Error **errp); + /** * sysbus_init_child_obj: * @parent: The parent object @@ -121,5 +124,4 @@ static inline DeviceState *sysbus_create_simple(const char *name, return sysbus_create_varargs(name, addr, irq, NULL); } - #endif /* HW_SYSBUS_H */ diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index e8d08d349b..68b837ac85 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -217,7 +217,7 @@ void sysbus_init_ioports(SysBusDevice *dev, uint32_t ioport, uint32_t size) * from being set to NULL to break the normal init/realize * of some devices. */ -static void sysbus_realize(DeviceState *dev, Error **errp) +static void sysbus_device_realize(DeviceState *dev, Error **errp) { } @@ -250,6 +250,16 @@ DeviceState *sysbus_create_varargs(const char *name, return dev; } +bool sysbus_realize(SysBusDevice *dev, Error **errp) +{ + return qdev_realize(DEVICE(dev), sysbus_get_default(), errp); +} + +bool sysbus_realize_and_unref(SysBusDevice *dev, Error **errp) +{ + return qdev_realize_and_unref(DEVICE(dev), sysbus_get_default(), errp); +} + static void sysbus_dev_print(Monitor *mon, DeviceState *dev, int indent) { SysBusDevice *s = SYS_BUS_DEVICE(dev); @@ -301,7 +311,7 @@ MemoryRegion *sysbus_address_space(SysBusDevice *dev) static void sysbus_device_class_init(ObjectClass *klass, void *data) { DeviceClass *k = DEVICE_CLASS(klass); - k->realize = sysbus_realize; + k->realize = sysbus_device_realize; k->bus_type = TYPE_SYSTEM_BUS; /* * device_add plugs devices into a suitable bus. For "real" buses, From patchwork Fri May 29 13:45:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578915 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F138B1392 for ; Fri, 29 May 2020 14:19:18 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8AE0C20707 for ; Fri, 29 May 2020 14:19:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="MbGZ/TdW" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8AE0C20707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:39988 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefqv-0000up-LA for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:19:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49348) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKi-0003dY-LY for qemu-devel@nongnu.org; Fri, 29 May 2020 09:46:00 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:47292 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKN-00077l-1s for qemu-devel@nongnu.org; Fri, 29 May 2020 09:46:00 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759937; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=S683DGIxmcprh+5rpmmy1Vn+6BgDH/psOZr9r7XTLGo=; b=MbGZ/TdWa/GSmUV3psfWV7ZJYGKRw2hpTp3yZBveXSmunbh05NsQ8BK1rLkT8Tv7yNvjm4 /ND+OyY+VeqSzIVxhid3r2toIHqiVgDngepnndjfaaPhB/+IaJwPceEPpddVeWk2OSFVG6 q/ITWRirHsfIULvMulsJlnpUDYnnVgE= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-354-CNfewjULN66uo58b0inoXQ-1; Fri, 29 May 2020 09:45:35 -0400 X-MC-Unique: CNfewjULN66uo58b0inoXQ-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 1DC04107ACF7; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id F3F426298C; Fri, 29 May 2020 13:45:32 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 7DFAF1135240; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 45/58] sysbus: Convert to sysbus_realize() etc. with Coccinelle Date: Fri, 29 May 2020 15:45:10 +0200 Message-Id: <20200529134523.8477-46-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Convert from qdev_realize(), qdev_realize_and_unref() with null @bus argument to sysbus_realize(), sysbus_realize_and_unref(). Coccinelle script: @@ expression dev, errp; @@ - qdev_realize(DEVICE(dev), NULL, errp); + sysbus_realize(SYS_BUS_DEVICE(dev), errp); @@ expression sysbus_dev, dev, errp; @@ + sysbus_dev = SYS_BUS_DEVICE(dev); - qdev_realize_and_unref(dev, NULL, errp); + sysbus_realize_and_unref(sysbus_dev, errp); - sysbus_dev = SYS_BUS_DEVICE(dev); @@ expression sysbus_dev, dev, errp; expression expr; @@ sysbus_dev = SYS_BUS_DEVICE(dev); ... when != dev = expr; - qdev_realize_and_unref(dev, NULL, errp); + sysbus_realize_and_unref(sysbus_dev, errp); @@ expression dev, errp; @@ - qdev_realize_and_unref(DEVICE(dev), NULL, errp); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp); @@ expression dev, errp; @@ - qdev_realize_and_unref(dev, NULL, errp); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp); Whitespace changes minimized manually. Signed-off-by: Markus Armbruster Acked-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé --- hw/lm32/lm32.h | 6 ++--- hw/lm32/milkymist-hw.h | 18 ++++++------- include/hw/char/cadence_uart.h | 2 +- include/hw/char/cmsdk-apb-uart.h | 2 +- include/hw/char/pl011.h | 4 +-- include/hw/char/xilinx_uartlite.h | 2 +- include/hw/cris/etraxfs.h | 2 +- include/hw/misc/unimp.h | 2 +- include/hw/timer/cmsdk-apb-timer.h | 2 +- hw/alpha/typhoon.c | 2 +- hw/arm/exynos4210.c | 18 ++++++------- hw/arm/exynos4_boards.c | 2 +- hw/arm/highbank.c | 12 ++++----- hw/arm/integratorcp.c | 2 +- hw/arm/mps2-tz.c | 2 +- hw/arm/msf2-som.c | 2 +- hw/arm/musicpal.c | 4 +-- hw/arm/netduino2.c | 2 +- hw/arm/netduinoplus2.c | 2 +- hw/arm/nseries.c | 4 +-- hw/arm/omap1.c | 8 +++--- hw/arm/omap2.c | 8 +++--- hw/arm/pxa2xx.c | 4 +-- hw/arm/pxa2xx_gpio.c | 2 +- hw/arm/pxa2xx_pic.c | 2 +- hw/arm/realview.c | 10 ++++---- hw/arm/sbsa-ref.c | 12 ++++----- hw/arm/spitz.c | 2 +- hw/arm/stellaris.c | 6 ++--- hw/arm/strongarm.c | 4 +-- hw/arm/versatilepb.c | 8 +++--- hw/arm/vexpress.c | 8 +++--- hw/arm/virt.c | 18 ++++++------- hw/arm/xilinx_zynq.c | 16 ++++++------ hw/arm/xlnx-versal-virt.c | 2 +- hw/arm/xlnx-versal.c | 2 +- hw/block/fdc.c | 4 +-- hw/block/pflash_cfi01.c | 2 +- hw/block/pflash_cfi02.c | 2 +- hw/char/exynos4210_uart.c | 2 +- hw/char/mcf_uart.c | 2 +- hw/char/serial.c | 2 +- hw/core/empty_slot.c | 2 +- hw/core/sysbus.c | 2 +- hw/cris/axis_dev88.c | 2 +- hw/display/milkymist-tmu2.c | 2 +- hw/display/sm501.c | 2 +- hw/dma/pxa2xx_dma.c | 4 +-- hw/dma/rc4030.c | 2 +- hw/dma/sparc32_dma.c | 8 +++--- hw/hppa/dino.c | 2 +- hw/hppa/lasi.c | 2 +- hw/hppa/machine.c | 2 +- hw/i386/pc.c | 2 +- hw/i386/pc_q35.c | 2 +- hw/i386/pc_sysfw.c | 2 +- hw/i386/x86.c | 2 +- hw/intc/exynos4210_gic.c | 2 +- hw/intc/s390_flic.c | 2 +- hw/isa/isa-bus.c | 2 +- hw/m68k/mcf5208.c | 2 +- hw/m68k/mcf_intc.c | 2 +- hw/m68k/next-cube.c | 6 ++--- hw/m68k/q800.c | 12 ++++----- hw/microblaze/petalogix_ml605_mmu.c | 10 ++++---- hw/microblaze/petalogix_s3adsp1800_mmu.c | 6 ++--- hw/mips/boston.c | 4 +-- hw/mips/gt64xxx_pci.c | 2 +- hw/mips/jazz.c | 8 +++--- hw/mips/malta.c | 2 +- hw/mips/mipssim.c | 4 +-- hw/net/etraxfs_eth.c | 2 +- hw/net/fsl_etsec/etsec.c | 2 +- hw/net/lan9118.c | 2 +- hw/net/lasi_i82596.c | 2 +- hw/net/smc91c111.c | 2 +- hw/nios2/10m50_devboard.c | 6 ++--- hw/nvram/fw_cfg.c | 4 +-- hw/openrisc/openrisc_sim.c | 4 +-- hw/pci-bridge/pci_expander_bridge.c | 2 +- hw/pci-host/bonito.c | 2 +- hw/pci-host/i440fx.c | 2 +- hw/pcmcia/pxa2xx.c | 2 +- hw/ppc/e500.c | 16 ++++++------ hw/ppc/mac_newworld.c | 16 ++++++------ hw/ppc/mac_oldworld.c | 6 ++--- hw/ppc/pnv.c | 8 +++--- hw/ppc/ppc440_uc.c | 4 +-- hw/ppc/prep.c | 4 +-- hw/ppc/sam460ex.c | 2 +- hw/ppc/spapr.c | 2 +- hw/ppc/spapr_irq.c | 2 +- hw/ppc/spapr_vio.c | 2 +- hw/ppc/virtex_ml507.c | 4 +-- hw/riscv/sifive_clint.c | 2 +- hw/riscv/sifive_e_prci.c | 2 +- hw/riscv/sifive_plic.c | 2 +- hw/riscv/sifive_test.c | 2 +- hw/riscv/virt.c | 4 +-- hw/rtc/m48t59.c | 2 +- hw/rtc/sun4v-rtc.c | 2 +- hw/s390x/ap-bridge.c | 2 +- hw/s390x/css-bridge.c | 2 +- hw/s390x/s390-virtio-ccw.c | 2 +- hw/s390x/sclp.c | 2 +- hw/sd/pxa2xx_mmci.c | 2 +- hw/sh4/r2d.c | 6 ++--- hw/sparc/leon3.c | 10 ++++---- hw/sparc/sun4m.c | 32 ++++++++++++------------ hw/sparc64/sun4u.c | 12 ++++----- hw/xen/xen-bus.c | 2 +- hw/xen/xen-legacy-backend.c | 2 +- hw/xtensa/virt.c | 2 +- hw/xtensa/xtfpga.c | 4 +-- 114 files changed, 257 insertions(+), 257 deletions(-) diff --git a/hw/lm32/lm32.h b/hw/lm32/lm32.h index 326238d859..7b4f6255b9 100644 --- a/hw/lm32/lm32.h +++ b/hw/lm32/lm32.h @@ -11,8 +11,8 @@ static inline DeviceState *lm32_pic_init(qemu_irq cpu_irq) SysBusDevice *d; dev = qdev_new("lm32-pic"); - qdev_realize_and_unref(dev, NULL, &error_fatal); d = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(d, &error_fatal); sysbus_connect_irq(d, 0, cpu_irq); return dev; @@ -24,7 +24,7 @@ static inline DeviceState *lm32_juart_init(Chardev *chr) dev = qdev_new(TYPE_LM32_JUART); qdev_prop_set_chr(dev, "chardev", chr); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); return dev; } @@ -39,7 +39,7 @@ static inline DeviceState *lm32_uart_create(hwaddr addr, dev = qdev_new("lm32-uart"); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); return dev; diff --git a/hw/lm32/milkymist-hw.h b/hw/lm32/milkymist-hw.h index d5f15a30a1..05e2c2a5a7 100644 --- a/hw/lm32/milkymist-hw.h +++ b/hw/lm32/milkymist-hw.h @@ -13,7 +13,7 @@ static inline DeviceState *milkymist_uart_create(hwaddr base, dev = qdev_new("milkymist-uart"); qdev_prop_set_chr(dev, "chardev", chr); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); @@ -25,7 +25,7 @@ static inline DeviceState *milkymist_hpdmc_create(hwaddr base) DeviceState *dev; dev = qdev_new("milkymist-hpdmc"); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return dev; @@ -36,7 +36,7 @@ static inline DeviceState *milkymist_memcard_create(hwaddr base) DeviceState *dev; dev = qdev_new("milkymist-memcard"); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return dev; @@ -50,7 +50,7 @@ static inline DeviceState *milkymist_vgafb_create(hwaddr base, dev = qdev_new("milkymist-vgafb"); qdev_prop_set_uint32(dev, "fb_offset", fb_offset); qdev_prop_set_uint32(dev, "fb_mask", fb_mask); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return dev; @@ -68,7 +68,7 @@ static inline DeviceState *milkymist_sysctl_create(hwaddr base, qdev_prop_set_uint32(dev, "systemid", system_id); qdev_prop_set_uint32(dev, "capabilities", capabilities); qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, gpio_irq); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, timer0_irq); @@ -83,7 +83,7 @@ static inline DeviceState *milkymist_pfpu_create(hwaddr base, DeviceState *dev; dev = qdev_new("milkymist-pfpu"); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); return dev; @@ -96,7 +96,7 @@ static inline DeviceState *milkymist_ac97_create(hwaddr base, DeviceState *dev; dev = qdev_new("milkymist-ac97"); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, crrequest_irq); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, crreply_irq); @@ -114,7 +114,7 @@ static inline DeviceState *milkymist_minimac2_create(hwaddr base, qemu_check_nic_model(&nd_table[0], "minimac2"); dev = qdev_new("milkymist-minimac2"); qdev_set_nic_properties(dev, &nd_table[0]); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, buffers_base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, rx_irq); @@ -132,7 +132,7 @@ static inline DeviceState *milkymist_softusb_create(hwaddr base, dev = qdev_new("milkymist-softusb"); qdev_prop_set_uint32(dev, "pmem_size", pmem_size); qdev_prop_set_uint32(dev, "dmem_size", dmem_size); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, pmem_base); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, dmem_base); diff --git a/include/hw/char/cadence_uart.h b/include/hw/char/cadence_uart.h index af80b6083b..ed7b58d31d 100644 --- a/include/hw/char/cadence_uart.h +++ b/include/hw/char/cadence_uart.h @@ -63,7 +63,7 @@ static inline DeviceState *cadence_uart_create(hwaddr addr, dev = qdev_new(TYPE_CADENCE_UART); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); diff --git a/include/hw/char/cmsdk-apb-uart.h b/include/hw/char/cmsdk-apb-uart.h index a51471ff74..bc9069f9fd 100644 --- a/include/hw/char/cmsdk-apb-uart.h +++ b/include/hw/char/cmsdk-apb-uart.h @@ -66,7 +66,7 @@ static inline DeviceState *cmsdk_apb_uart_create(hwaddr addr, s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); qdev_prop_set_uint32(dev, "pclk-frq", pclk_frq); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, txint); sysbus_connect_irq(s, 1, rxint); diff --git a/include/hw/char/pl011.h b/include/hw/char/pl011.h index 18e701b65d..bed758350f 100644 --- a/include/hw/char/pl011.h +++ b/include/hw/char/pl011.h @@ -61,7 +61,7 @@ static inline DeviceState *pl011_create(hwaddr addr, dev = qdev_new("pl011"); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); @@ -78,7 +78,7 @@ static inline DeviceState *pl011_luminary_create(hwaddr addr, dev = qdev_new("pl011_luminary"); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); diff --git a/include/hw/char/xilinx_uartlite.h b/include/hw/char/xilinx_uartlite.h index 007b84575f..bb32d0fcb3 100644 --- a/include/hw/char/xilinx_uartlite.h +++ b/include/hw/char/xilinx_uartlite.h @@ -28,7 +28,7 @@ static inline DeviceState *xilinx_uartlite_create(hwaddr addr, dev = qdev_new("xlnx.xps-uartlite"); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); diff --git a/include/hw/cris/etraxfs.h b/include/hw/cris/etraxfs.h index 19b903facf..9e99380e0c 100644 --- a/include/hw/cris/etraxfs.h +++ b/include/hw/cris/etraxfs.h @@ -44,7 +44,7 @@ static inline DeviceState *etraxfs_ser_create(hwaddr addr, dev = qdev_new("etraxfs,serial"); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); return dev; diff --git a/include/hw/misc/unimp.h b/include/hw/misc/unimp.h index e71ec17e13..4c1d13c9bf 100644 --- a/include/hw/misc/unimp.h +++ b/include/hw/misc/unimp.h @@ -45,7 +45,7 @@ static inline void create_unimplemented_device(const char *name, qdev_prop_set_string(dev, "name", name); qdev_prop_set_uint64(dev, "size", size); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map_overlap(SYS_BUS_DEVICE(dev), 0, base, -1000); } diff --git a/include/hw/timer/cmsdk-apb-timer.h b/include/hw/timer/cmsdk-apb-timer.h index eee175eaa4..f24bda6a46 100644 --- a/include/hw/timer/cmsdk-apb-timer.h +++ b/include/hw/timer/cmsdk-apb-timer.h @@ -51,7 +51,7 @@ static inline DeviceState *cmsdk_apb_timer_create(hwaddr addr, dev = qdev_new(TYPE_CMSDK_APB_TIMER); s = SYS_BUS_DEVICE(dev); qdev_prop_set_uint32(dev, "pclk-frq", pclk_frq); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, timerint); return dev; diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 480d866c77..29d44dfb06 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -889,7 +889,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bus, qemu_irq *p_rtc_irq, &s->pchip.reg_mem, &s->pchip.reg_io, 0, 64, TYPE_PCI_BUS); phb->bus = b; - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Host memory as seen from the PCI side, via the IOMMU. */ memory_region_init_iommu(&s->pchip.iommu, sizeof(s->pchip.iommu), diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 86cbd63857..2afeb73776 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -184,8 +184,8 @@ static DeviceState *pl330_create(uint32_t base, qemu_or_irq *orgate, qdev_prop_set_uint8(dev, "rd_q_dep", 8); qdev_prop_set_uint8(dev, "data_width", width); qdev_prop_set_uint16(dev, "data_buffer_dep", width); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, base); object_property_set_int(OBJECT(orgate), nevents + 1, "num-lines", @@ -234,7 +234,7 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) for (i = 0; i < EXYNOS4210_NCPUS; i++) { dev = qdev_new("exynos4210.irq_gate"); qdev_prop_set_uint32(dev, "n_in", EXYNOS4210_IRQ_GATE_NINPUTS); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Get IRQ Gate input in gate_irq */ for (n = 0; n < EXYNOS4210_IRQ_GATE_NINPUTS; n++) { gate_irq[i][n] = qdev_get_gpio_in(dev, n); @@ -249,8 +249,8 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) /* Private memory region and Internal GIC */ dev = qdev_new(TYPE_A9MPCORE_PRIV); qdev_prop_set_uint32(dev, "num-cpu", EXYNOS4210_NCPUS); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, EXYNOS4210_SMP_PRIVATE_BASE_ADDR); for (n = 0; n < EXYNOS4210_NCPUS; n++) { sysbus_connect_irq(busdev, n, gate_irq[n][0]); @@ -265,8 +265,8 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) /* External GIC */ dev = qdev_new("exynos4210.gic"); qdev_prop_set_uint32(dev, "num-cpu", EXYNOS4210_NCPUS); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); /* Map CPU interface */ sysbus_mmio_map(busdev, 0, EXYNOS4210_EXT_GIC_CPU_BASE_ADDR); /* Map Distributer interface */ @@ -280,8 +280,8 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) /* Internal Interrupt Combiner */ dev = qdev_new("exynos4210.combiner"); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) { sysbus_connect_irq(busdev, n, s->irqs.int_gic_irq[n]); } @@ -291,8 +291,8 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) /* External Interrupt Combiner */ dev = qdev_new("exynos4210.combiner"); qdev_prop_set_uint32(dev, "external", 1); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); for (n = 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) { sysbus_connect_irq(busdev, n, s->irqs.ext_gic_irq[n]); } @@ -354,8 +354,8 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) /* Multi Core Timer */ dev = qdev_new("exynos4210.mct"); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); for (n = 0; n < 4; n++) { /* Connect global timer interrupts to Combiner gpio_in */ sysbus_connect_irq(busdev, n, @@ -380,8 +380,8 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) } dev = qdev_new("exynos4210.i2c"); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_connect_irq(busdev, 0, i2c_irq); sysbus_mmio_map(busdev, 0, addr); s->i2c_if[n] = (I2CBus *)qdev_get_child_bus(dev, "i2c"); @@ -425,9 +425,9 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) */ dev = qdev_new(TYPE_S3C_SDHCI); qdev_prop_set_uint64(dev, "capareg", EXYNOS4210_SDHCI_CAPABILITIES); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, EXYNOS4210_SDHCI_ADDR(n)); sysbus_connect_irq(busdev, 0, s->irq_table[exynos4210_get_irq(29, n)]); diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index d4fe9c6128..326122abff 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -84,8 +84,8 @@ static void lan9215_init(uint32_t base, qemu_irq irq) dev = qdev_new(TYPE_LAN9118); qdev_set_nic_properties(dev, &nd_table[0]); qdev_prop_set_uint32(dev, "mode_16bit", 1); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, base); sysbus_connect_irq(s, 0, irq); } diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index 1bed540011..7f279d7f93 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -312,8 +312,8 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) switch (machine_id) { case CALXEDA_HIGHBANK: dev = qdev_new("l2x0"); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, 0xfff12000); dev = qdev_new(TYPE_A9MPCORE_PRIV); @@ -324,8 +324,8 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) } qdev_prop_set_uint32(dev, "num-cpu", smp_cpus); qdev_prop_set_uint32(dev, "num-irq", NIRQ_GIC); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, MPCORE_PERIPHBASE); for (n = 0; n < smp_cpus; n++) { sysbus_connect_irq(busdev, n, cpu_irq[n]); @@ -341,15 +341,15 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) dev = qdev_new("sp804"); qdev_prop_set_uint32(dev, "freq0", 150000000); qdev_prop_set_uint32(dev, "freq1", 150000000); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, 0xfff34000); sysbus_connect_irq(busdev, 0, pic[18]); pl011_create(0xfff36000, pic[20], serial_hd(0)); dev = qdev_new(TYPE_HIGHBANK_REGISTERS); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, 0xfff3c000); sysbus_create_simple("pl061", 0xfff30000, pic[14]); @@ -365,7 +365,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) qemu_check_nic_model(&nd_table[0], "xgmac"); dev = qdev_new("xgmac"); qdev_set_nic_properties(dev, &nd_table[0]); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xfff50000); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[77]); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, pic[78]); @@ -374,7 +374,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) qemu_check_nic_model(&nd_table[1], "xgmac"); dev = qdev_new("xgmac"); qdev_set_nic_properties(dev, &nd_table[1]); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xfff51000); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[80]); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, pic[81]); diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index 45698307f1..a55d2c31e3 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -622,7 +622,7 @@ static void integratorcp_init(MachineState *machine) dev = qdev_new(TYPE_INTEGRATOR_CM); qdev_prop_set_uint32(dev, "memsz", ram_size >> 20); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map((SysBusDevice *)dev, 0, 0x10000000); dev = sysbus_create_varargs(TYPE_INTEGRATOR_PIC, 0x14000000, diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 90f4449b9d..4c49512e0b 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -247,9 +247,9 @@ static MemoryRegion *make_eth_dev(MPS2TZMachineState *mms, void *opaque, qemu_check_nic_model(nd, "lan9118"); mms->lan9118 = qdev_new(TYPE_LAN9118); qdev_set_nic_properties(mms->lan9118, nd); - qdev_realize_and_unref(mms->lan9118, NULL, &error_fatal); s = SYS_BUS_DEVICE(mms->lan9118); + sysbus_realize_and_unref(s, &error_fatal); sysbus_connect_irq(s, 0, get_sse_irq_in(mms, 16)); return sysbus_mmio_get_region(s, 0); } diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c index ca9cbe1acb..355966c073 100644 --- a/hw/arm/msf2-som.c +++ b/hw/arm/msf2-som.c @@ -77,7 +77,7 @@ static void emcraft_sf2_s2s010_init(MachineState *machine) qdev_prop_set_uint32(dev, "apb0div", 2); qdev_prop_set_uint32(dev, "apb1div", 2); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); soc = MSF2_SOC(dev); diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index d03351e5fa..394a3345bd 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1653,7 +1653,7 @@ static void musicpal_init(MachineState *machine) qemu_check_nic_model(&nd_table[0], "mv88w8618"); dev = qdev_new(TYPE_MV88W8618_ETH); qdev_set_nic_properties(dev, &nd_table[0]); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MP_ETH_BASE); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[MP_ETH_IRQ]); @@ -1692,7 +1692,7 @@ static void musicpal_init(MachineState *machine) s = SYS_BUS_DEVICE(dev); object_property_set_link(OBJECT(dev), OBJECT(wm8750_dev), "wm8750", NULL); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, MP_AUDIO_BASE); sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]); diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c index 6bd8e4e197..79e19392b5 100644 --- a/hw/arm/netduino2.c +++ b/hw/arm/netduino2.c @@ -36,7 +36,7 @@ static void netduino2_init(MachineState *machine) dev = qdev_new(TYPE_STM32F205_SOC); qdev_prop_set_string(dev, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3")); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, FLASH_SIZE); diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c index 8d4b3d7c43..958d21dd9f 100644 --- a/hw/arm/netduinoplus2.c +++ b/hw/arm/netduinoplus2.c @@ -36,7 +36,7 @@ static void netduinoplus2_init(MachineState *machine) dev = qdev_new(TYPE_STM32F405_SOC); qdev_prop_set_string(dev, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m4")); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c index 856fa565a4..02678dda2d 100644 --- a/hw/arm/nseries.c +++ b/hw/arm/nseries.c @@ -185,7 +185,7 @@ static void n8x0_nand_setup(struct n800_s *s) qdev_prop_set_drive(s->nand, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); } - qdev_realize_and_unref(s->nand, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(s->nand), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(s->nand), 0, qdev_get_gpio_in(s->mpu->gpio, N8X0_ONENAND_GPIO)); omap_gpmc_attach(s->mpu->gpmc, N8X0_ONENAND_CS, @@ -804,7 +804,7 @@ static void n8x0_usb_setup(struct n800_s *s) SysBusDevice *dev; s->usb = qdev_new("tusb6010"); dev = SYS_BUS_DEVICE(s->usb); - qdev_realize_and_unref(s->usb, NULL, &error_fatal); + sysbus_realize_and_unref(dev, &error_fatal); sysbus_connect_irq(dev, 0, qdev_get_gpio_in(s->mpu->gpio, N8X0_TUSB_INT_GPIO)); /* Using the NOR interface */ diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index c11d6da9d5..6ba0df6b6d 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -3890,8 +3890,8 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, s->ih[0] = qdev_new("omap-intc"); qdev_prop_set_uint32(s->ih[0], "size", 0x100); omap_intc_set_iclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "arminth_ck")); - qdev_realize_and_unref(s->ih[0], NULL, &error_fatal); busdev = SYS_BUS_DEVICE(s->ih[0]); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ)); sysbus_connect_irq(busdev, 1, @@ -3900,8 +3900,8 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, s->ih[1] = qdev_new("omap-intc"); qdev_prop_set_uint32(s->ih[1], "size", 0x800); omap_intc_set_iclk(OMAP_INTC(s->ih[1]), omap_findclk(s, "arminth_ck")); - qdev_realize_and_unref(s->ih[1], NULL, &error_fatal); busdev = SYS_BUS_DEVICE(s->ih[1]); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_15XX_IH2_IRQ)); /* The second interrupt controller's FIQ output is not wired up */ @@ -4013,7 +4013,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, s->gpio = qdev_new("omap-gpio"); qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); omap_gpio_set_clk(OMAP1_GPIO(s->gpio), omap_findclk(s, "arm_gpio_ck")); - qdev_realize_and_unref(s->gpio, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(s->gpio), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(s->gpio), 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_GPIO_BANK1)); sysbus_mmio_map(SYS_BUS_DEVICE(s->gpio), 0, 0xfffce000); @@ -4031,8 +4031,8 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, s->i2c[0] = qdev_new("omap_i2c"); qdev_prop_set_uint8(s->i2c[0], "revision", 0x11); omap_i2c_set_fclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "mpuper_ck")); - qdev_realize_and_unref(s->i2c[0], NULL, &error_fatal); busdev = SYS_BUS_DEVICE(s->i2c[0]); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[1], OMAP_INT_I2C)); sysbus_connect_irq(busdev, 1, s->drq[OMAP_DMA_I2C_TX]); sysbus_connect_irq(busdev, 2, s->drq[OMAP_DMA_I2C_RX]); diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index b45ed5c9ec..16d388fc79 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -2310,8 +2310,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, qdev_prop_set_uint8(s->ih[0], "revision", 0x21); omap_intc_set_fclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "mpu_intc_fclk")); omap_intc_set_iclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "mpu_intc_iclk")); - qdev_realize_and_unref(s->ih[0], NULL, &error_fatal); busdev = SYS_BUS_DEVICE(s->ih[0]); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ)); sysbus_connect_irq(busdev, 1, @@ -2427,8 +2427,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, qdev_prop_set_uint8(s->i2c[0], "revision", 0x34); omap_i2c_set_iclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "i2c1.iclk")); omap_i2c_set_fclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "i2c1.fclk")); - qdev_realize_and_unref(s->i2c[0], NULL, &error_fatal); busdev = SYS_BUS_DEVICE(s->i2c[0]); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_I2C1_IRQ)); sysbus_connect_irq(busdev, 1, s->drq[OMAP24XX_DMA_I2C1_TX]); @@ -2439,8 +2439,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, qdev_prop_set_uint8(s->i2c[1], "revision", 0x34); omap_i2c_set_iclk(OMAP_I2C(s->i2c[1]), omap_findclk(s, "i2c2.iclk")); omap_i2c_set_fclk(OMAP_I2C(s->i2c[1]), omap_findclk(s, "i2c2.fclk")); - qdev_realize_and_unref(s->i2c[1], NULL, &error_fatal); busdev = SYS_BUS_DEVICE(s->i2c[1]); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_I2C2_IRQ)); sysbus_connect_irq(busdev, 1, s->drq[OMAP24XX_DMA_I2C2_TX]); @@ -2458,8 +2458,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 4, omap_findclk(s, "gpio5_dbclk")); } - qdev_realize_and_unref(s->gpio, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(s->gpio); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_GPIO_BANK1)); sysbus_connect_irq(busdev, 3, diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 8d8b06d920..beaedaae10 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -1489,9 +1489,9 @@ PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base, dev = qdev_new(TYPE_PXA2XX_I2C); qdev_prop_set_uint32(dev, "size", region_size + 1); qdev_prop_set_uint32(dev, "offset", base & region_size); - qdev_realize_and_unref(dev, NULL, &error_fatal); i2c_dev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(i2c_dev, &error_fatal); sysbus_mmio_map(i2c_dev, 0, base & ~region_size); sysbus_connect_irq(i2c_dev, 0, irq); @@ -2043,8 +2043,8 @@ static PXA2xxFIrState *pxa2xx_fir_init(MemoryRegion *sysmem, dev = qdev_new(TYPE_PXA2XX_FIR); qdev_prop_set_chr(dev, "chardev", chr); - qdev_realize_and_unref(dev, NULL, &error_fatal); sbd = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sbd, &error_fatal); sysbus_mmio_map(sbd, 0, base); sysbus_connect_irq(sbd, 0, irq); sysbus_connect_irq(sbd, 1, rx_dma); diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c index 27199af43c..d6d0d0b08e 100644 --- a/hw/arm/pxa2xx_gpio.c +++ b/hw/arm/pxa2xx_gpio.c @@ -273,7 +273,7 @@ DeviceState *pxa2xx_gpio_init(hwaddr base, dev = qdev_new(TYPE_PXA2XX_GPIO); qdev_prop_set_int32(dev, "lines", lines); qdev_prop_set_int32(dev, "ncpu", cs->cpu_index); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c index 4c451cf540..105c5e63f2 100644 --- a/hw/arm/pxa2xx_pic.c +++ b/hw/arm/pxa2xx_pic.c @@ -280,7 +280,7 @@ DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu) s->is_fiq[0] = 0; s->is_fiq[1] = 0; - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); qdev_init_gpio_in(dev, pxa2xx_pic_set_irq, PXA2XX_PIC_SRCS); diff --git a/hw/arm/realview.c b/hw/arm/realview.c index 128146448c..aee7989037 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -164,14 +164,14 @@ static void realview_init(MachineState *machine, sysctl = qdev_new("realview_sysctl"); qdev_prop_set_uint32(sysctl, "sys_id", sys_id); qdev_prop_set_uint32(sysctl, "proc_id", proc_id); - qdev_realize_and_unref(sysctl, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(sysctl), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000); if (is_mpcore) { dev = qdev_new(is_pb ? TYPE_A9MPCORE_PRIV : "realview_mpcore"); qdev_prop_set_uint32(dev, "num-cpu", smp_cpus); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, periphbase); for (n = 0; n < smp_cpus; n++) { sysbus_connect_irq(busdev, n, cpu_irq[n]); @@ -190,7 +190,7 @@ static void realview_init(MachineState *machine, pl041 = qdev_new("pl041"); qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512); - qdev_realize_and_unref(pl041, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(pl041), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000); sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, pic[19]); @@ -206,8 +206,8 @@ static void realview_init(MachineState *machine, dev = qdev_new("pl081"); object_property_set_link(OBJECT(dev), OBJECT(sysmem), "downstream", &error_fatal); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, 0x10030000); sysbus_connect_irq(busdev, 0, pic[24]); @@ -241,7 +241,7 @@ static void realview_init(MachineState *machine, if (!is_pb) { dev = qdev_new("realview_pci"); busdev = SYS_BUS_DEVICE(dev); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, 0x10019000); /* PCI controller registers */ sysbus_mmio_map(busdev, 1, 0x60000000); /* PCI self-config */ sysbus_mmio_map(busdev, 2, 0x61000000); /* PCI config */ diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index fe24567333..3fd3536796 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -243,7 +243,7 @@ static void sbsa_flash_map1(PFlashCFI01 *flash, assert(QEMU_IS_ALIGNED(size, SBSA_FLASH_SECTOR_SIZE)); assert(size / SBSA_FLASH_SECTOR_SIZE <= UINT32_MAX); qdev_prop_set_uint32(dev, "num-blocks", size / SBSA_FLASH_SECTOR_SIZE); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), @@ -356,8 +356,8 @@ static void create_gic(SBSAMachineState *sms) qdev_prop_set_uint32(sms->gic, "len-redist-region-count", 1); qdev_prop_set_uint32(sms->gic, "redist-region-count[0]", redist0_count); - qdev_realize_and_unref(sms->gic, NULL, &error_fatal); gicbusdev = SYS_BUS_DEVICE(sms->gic); + sysbus_realize_and_unref(gicbusdev, &error_fatal); sysbus_mmio_map(gicbusdev, 0, sbsa_ref_memmap[SBSA_GIC_DIST].base); sysbus_mmio_map(gicbusdev, 1, sbsa_ref_memmap[SBSA_GIC_REDIST].base); @@ -413,7 +413,7 @@ static void create_uart(const SBSAMachineState *sms, int uart, SysBusDevice *s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0)); sysbus_connect_irq(s, 0, qdev_get_gpio_in(sms->gic, irq)); @@ -466,7 +466,7 @@ static void create_ahci(const SBSAMachineState *sms) dev = qdev_new("sysbus-ahci"); qdev_prop_set_uint32(dev, "num-ports", NUM_SATA_PORTS); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(sms->gic, irq)); @@ -501,7 +501,7 @@ static void create_smmu(const SBSAMachineState *sms, PCIBus *bus) object_property_set_link(OBJECT(dev), OBJECT(bus), "primary-bus", &error_abort); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i = 0; i < NUM_SMMU_IRQS; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, @@ -526,7 +526,7 @@ static void create_pcie(SBSAMachineState *sms) int i; dev = qdev_new(TYPE_GPEX_HOST); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Map ECAM space */ ecam_alias = g_new0(MemoryRegion, 1); diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index edae6bf8be..fc18212e68 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -163,7 +163,7 @@ static void sl_flash_register(PXA2xxState *cpu, int size) else if (size == FLASH_1024M) qdev_prop_set_uint8(dev, "chip_id", 0xf1); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); } diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index f824cbd498..97ef566c12 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -1315,7 +1315,7 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board) object_property_set_link(OBJECT(nvic), OBJECT(get_system_memory()), "memory", &error_abort); /* This will exit with an error if the user passed us a bad cpu_type */ - qdev_realize_and_unref(nvic, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(nvic), &error_fatal); qdev_connect_gpio_out_named(nvic, "SYSRESETREQ", 0, qemu_allocate_irq(&do_sys_reset, NULL, 0)); @@ -1353,7 +1353,7 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board) uint32_t mainclk = NANOSECONDS_PER_SECOND / system_clock_scale; qdev_prop_set_uint32(dev, "wdogclk-frq", mainclk); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x40000000u); @@ -1427,7 +1427,7 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board) enet = qdev_new("stellaris_enet"); qdev_set_nic_properties(enet, &nd_table[0]); - qdev_realize_and_unref(enet, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(enet), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(enet), 0, 0x40048000); sysbus_connect_irq(SYS_BUS_DEVICE(enet), 0, qdev_get_gpio_in(nvic, 42)); } diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 108ed8d147..2639b9ae55 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -646,7 +646,7 @@ static DeviceState *strongarm_gpio_init(hwaddr base, int i; dev = qdev_new(TYPE_STRONGARM_GPIO); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i = 0; i < 12; i++) @@ -1629,7 +1629,7 @@ StrongARMState *sa1110_init(const char *cpu_type) for (i = 0; sa_serial[i].io_base; i++) { DeviceState *dev = qdev_new(TYPE_STRONGARM_UART); qdev_prop_set_chr(dev, "chardev", serial_hd(i)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, sa_serial[i].io_base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 154fa72f33..29e3bc6bd0 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -226,7 +226,7 @@ static void versatile_init(MachineState *machine, int board_id) sysctl = qdev_new("realview_sysctl"); qdev_prop_set_uint32(sysctl, "sys_id", 0x41007004); qdev_prop_set_uint32(sysctl, "proc_id", 0x02000000); - qdev_realize_and_unref(sysctl, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(sysctl), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000); dev = sysbus_create_varargs("pl190", 0x10140000, @@ -247,7 +247,7 @@ static void versatile_init(MachineState *machine, int board_id) dev = qdev_new("versatile_pci"); busdev = SYS_BUS_DEVICE(dev); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, 0x10001000); /* PCI controller regs */ sysbus_mmio_map(busdev, 1, 0x41000000); /* PCI self-config */ sysbus_mmio_map(busdev, 2, 0x42000000); /* PCI config */ @@ -289,8 +289,8 @@ static void versatile_init(MachineState *machine, int board_id) dev = qdev_new("pl080"); object_property_set_link(OBJECT(dev), OBJECT(sysmem), "downstream", &error_fatal); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, 0x10130000); sysbus_connect_irq(busdev, 0, pic[17]); @@ -321,7 +321,7 @@ static void versatile_init(MachineState *machine, int board_id) /* Add PL041 AACI Interface to the LM4549 codec */ pl041 = qdev_new("pl041"); qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512); - qdev_realize_and_unref(pl041, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(pl041), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000); sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, sic[24]); diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index ef29e9f5ae..bebb0ed5a4 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -238,8 +238,8 @@ static void init_cpus(MachineState *ms, const char *cpu_type, */ dev = qdev_new(privdev); qdev_prop_set_uint32(dev, "num-cpu", smp_cpus); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, periphbase); /* Interrupts [42:0] are from the motherboard; @@ -532,7 +532,7 @@ static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name, qdev_prop_set_uint16(dev, "id2", 0x00); qdev_prop_set_uint16(dev, "id3", 0x00); qdev_prop_set_string(dev, "name", name); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return PFLASH_CFI01(dev); @@ -610,7 +610,7 @@ static void vexpress_common_init(MachineState *machine) qdev_prop_set_uint32(sysctl, propname, daughterboard->clocks[i]); g_free(propname); } - qdev_realize_and_unref(sysctl, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(sysctl), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, map[VE_SYSREGS]); /* VE_SP810: not modelled */ @@ -618,7 +618,7 @@ static void vexpress_common_init(MachineState *machine) pl041 = qdev_new("pl041"); qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512); - qdev_realize_and_unref(pl041, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(pl041), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, map[VE_PL041]); sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, pic[11]); diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ca151435ae..c3e80bcbce 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -579,7 +579,7 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms) sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, vms->memmap[VIRT_PCDIMM_ACPI].base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(vms->gic, irq)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); return dev; } @@ -598,7 +598,7 @@ static void create_its(VirtMachineState *vms) object_property_set_link(OBJECT(dev), OBJECT(vms->gic), "parent-gicv3", &error_abort); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_GIC_ITS].base); fdt_add_its_gic_node(vms); @@ -614,7 +614,7 @@ static void create_v2m(VirtMachineState *vms) sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_GIC_V2M].base); qdev_prop_set_uint32(dev, "base-spi", irq); qdev_prop_set_uint32(dev, "num-spi", NUM_GICV2M_SPIS); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); for (i = 0; i < NUM_GICV2M_SPIS; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, @@ -671,8 +671,8 @@ static void create_gic(VirtMachineState *vms) vms->virt); } } - qdev_realize_and_unref(vms->gic, NULL, &error_fatal); gicbusdev = SYS_BUS_DEVICE(vms->gic); + sysbus_realize_and_unref(gicbusdev, &error_fatal); sysbus_mmio_map(gicbusdev, 0, vms->memmap[VIRT_GIC_DIST].base); if (type == 3) { sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_REDIST].base); @@ -758,7 +758,7 @@ static void create_uart(const VirtMachineState *vms, int uart, SysBusDevice *s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0)); sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq)); @@ -980,7 +980,7 @@ static void virt_flash_map1(PFlashCFI01 *flash, assert(QEMU_IS_ALIGNED(size, VIRT_FLASH_SECTOR_SIZE)); assert(size / VIRT_FLASH_SECTOR_SIZE <= UINT32_MAX); qdev_prop_set_uint32(dev, "num-blocks", size / VIRT_FLASH_SECTOR_SIZE); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), @@ -1177,7 +1177,7 @@ static void create_smmu(const VirtMachineState *vms, object_property_set_link(OBJECT(dev), OBJECT(bus), "primary-bus", &error_abort); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i = 0; i < NUM_SMMU_IRQS; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, @@ -1254,7 +1254,7 @@ static void create_pcie(VirtMachineState *vms) PCIHostState *pci; dev = qdev_new(TYPE_GPEX_HOST); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); ecam_id = VIRT_ECAM_ID(vms->highmem_ecam); base_ecam = vms->memmap[ecam_id].base; @@ -1376,7 +1376,7 @@ static void create_platform_bus(VirtMachineState *vms) dev->id = TYPE_PLATFORM_BUS_DEVICE; qdev_prop_set_uint32(dev, "num_irqs", PLATFORM_BUS_NUM_IRQS); qdev_prop_set_uint32(dev, "mmio_size", vms->memmap[VIRT_PLATFORM_BUS].size); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); vms->platform_bus_dev = dev; s = SYS_BUS_DEVICE(dev); diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 0e0f0976c4..69d62ee24b 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -119,8 +119,8 @@ static void gem_init(NICInfo *nd, uint32_t base, qemu_irq irq) qemu_check_nic_model(nd, TYPE_CADENCE_GEM); qdev_set_nic_properties(dev, nd); } - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, base); sysbus_connect_irq(s, 0, irq); } @@ -140,8 +140,8 @@ static inline void zynq_init_spi_flashes(uint32_t base_addr, qemu_irq irq, qdev_prop_set_uint8(dev, "num-txrx-bytes", is_qspi ? 4 : 1); qdev_prop_set_uint8(dev, "num-ss-bits", num_ss); qdev_prop_set_uint8(dev, "num-busses", num_busses); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, base_addr); if (is_qspi) { sysbus_mmio_map(busdev, 1, 0xFC000000); @@ -223,7 +223,7 @@ static void zynq_init(MachineState *machine) /* Create slcr, keep a pointer to connect clocks */ slcr = qdev_new("xilinx,zynq_slcr"); - qdev_realize_and_unref(slcr, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(slcr), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(slcr), 0, 0xF8000000); /* Create the main clock source, and feed slcr with it */ @@ -236,8 +236,8 @@ static void zynq_init(MachineState *machine) dev = qdev_new(TYPE_A9MPCORE_PRIV); qdev_prop_set_uint32(dev, "num-cpu", 1); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, MPCORE_PERIPHBASE); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ)); @@ -283,7 +283,7 @@ static void zynq_init(MachineState *machine) dev = qdev_new(TYPE_SYSBUS_SDHCI); qdev_prop_set_uint8(dev, "sd-spec-version", 2); qdev_prop_set_uint64(dev, "capareg", ZYNQ_SDHCI_CAPABILITIES); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, hci_addr); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[hci_irq - IRQ_OFFSET]); @@ -296,7 +296,7 @@ static void zynq_init(MachineState *machine) } dev = qdev_new(TYPE_ZYNQ_XADC); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xF8007100); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[39-IRQ_OFFSET]); @@ -312,8 +312,8 @@ static void zynq_init(MachineState *machine) qdev_prop_set_uint8(dev, "rd_q_dep", 16); qdev_prop_set_uint16(dev, "data_buffer_dep", 256); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, 0xF8003000); sysbus_connect_irq(busdev, 0, pic[45-IRQ_OFFSET]); /* abort irq line */ for (n = 0; n < ARRAY_SIZE(dma_irqs); ++n) { /* event irqs */ @@ -321,8 +321,8 @@ static void zynq_init(MachineState *machine) } dev = qdev_new("xlnx.ps7-dev-cfg"); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_connect_irq(busdev, 0, pic[40 - IRQ_OFFSET]); sysbus_mmio_map(busdev, 0, 0xF8007000); diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index fb37b235fe..3d8431dbcf 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -434,7 +434,7 @@ static void create_virtio_regions(VersalVirt *s) pic_irq = qdev_get_gpio_in(DEVICE(&s->soc.fpd.apu.gic), irq); dev = qdev_new("virtio-mmio"); object_property_add_child(OBJECT(&s->soc), name, OBJECT(dev)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic_irq); mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion(&s->soc.mr_ps, base, mr); diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 12e4469cf4..38d6b91d15 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -309,7 +309,7 @@ static void versal_unimp_area(Versal *s, const char *name, qdev_prop_set_string(dev, "name", name); qdev_prop_set_uint64(dev, "size", size); object_property_add_child(OBJECT(s), name, OBJECT(dev)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); mr_dev = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion(mr, base, mr_dev); diff --git a/hw/block/fdc.c b/hw/block/fdc.c index a3250f6fdb..8528b9a3c7 100644 --- a/hw/block/fdc.c +++ b/hw/block/fdc.c @@ -2583,8 +2583,8 @@ void fdctrl_init_sysbus(qemu_irq irq, int dma_chann, qdev_prop_set_drive(dev, "driveB", blk_by_legacy_dinfo(fds[1]), &error_fatal); } - qdev_realize_and_unref(dev, NULL, &error_fatal); sbd = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sbd, &error_fatal); sysbus_connect_irq(sbd, 0, irq); sysbus_mmio_map(sbd, 0, mmio_base); } @@ -2600,7 +2600,7 @@ void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base, qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(fds[0]), &error_fatal); } - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sys = SYSBUS_FDC(dev); sysbus_connect_irq(SYS_BUS_DEVICE(sys), 0, irq); sysbus_mmio_map(SYS_BUS_DEVICE(sys), 0, io_base); diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index d2a647d2b8..9f0c1d61ca 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -974,7 +974,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, qdev_prop_set_uint16(dev, "id2", id2); qdev_prop_set_uint16(dev, "id3", id3); qdev_prop_set_string(dev, "name", name); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return PFLASH_CFI01(dev); diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index ed9e9eef0c..6eb66e7bb0 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -1016,7 +1016,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, qdev_prop_set_uint16(dev, "unlock-addr0", unlock_addr0); qdev_prop_set_uint16(dev, "unlock-addr1", unlock_addr1); qdev_prop_set_string(dev, "name", name); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return PFLASH_CFI02(dev); diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c index b86bd7b2e6..9c8ab3a77d 100644 --- a/hw/char/exynos4210_uart.c +++ b/hw/char/exynos4210_uart.c @@ -661,7 +661,7 @@ DeviceState *exynos4210_uart_create(hwaddr addr, qdev_prop_set_uint32(dev, "tx-size", fifo_size); bus = SYS_BUS_DEVICE(dev); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(bus, &error_fatal); if (addr != (hwaddr)-1) { sysbus_mmio_map(bus, 0, addr); } diff --git a/hw/char/mcf_uart.c b/hw/char/mcf_uart.c index 2ac0a195f3..8d1b7f2bca 100644 --- a/hw/char/mcf_uart.c +++ b/hw/char/mcf_uart.c @@ -348,7 +348,7 @@ void *mcf_uart_init(qemu_irq irq, Chardev *chrdrv) if (chrdrv) { qdev_prop_set_chr(dev, "chardev", chrdrv); } - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); diff --git a/hw/char/serial.c b/hw/char/serial.c index 57c299e993..4582d488d0 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1134,7 +1134,7 @@ SerialMM *serial_mm_init(MemoryRegion *address_space, qdev_prop_set_chr(DEVICE(smm), "chardev", chr); qdev_set_legacy_instance_id(DEVICE(smm), base, 2); qdev_prop_set_uint8(DEVICE(smm), "endianness", end); - qdev_realize_and_unref(DEVICE(smm), NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(smm), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(smm), 0, irq); mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(smm), 0); diff --git a/hw/core/empty_slot.c b/hw/core/empty_slot.c index 725e5fd998..d0bdd01b9d 100644 --- a/hw/core/empty_slot.c +++ b/hw/core/empty_slot.c @@ -66,7 +66,7 @@ void empty_slot_init(hwaddr addr, uint64_t slot_size) e = EMPTY_SLOT(dev); e->size = slot_size; - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); } diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index 68b837ac85..1220298e8f 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -232,7 +232,7 @@ DeviceState *sysbus_create_varargs(const char *name, dev = qdev_new(name); s = SYS_BUS_DEVICE(dev); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); if (addr != (hwaddr)-1) { sysbus_mmio_map(s, 0, addr); } diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c index 5db667d518..dab7423c73 100644 --- a/hw/cris/axis_dev88.c +++ b/hw/cris/axis_dev88.c @@ -290,8 +290,8 @@ void axisdev88_init(MachineState *machine) dev = qdev_new("etraxfs,pic"); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, 0x3001c000); sysbus_connect_irq(s, 0, qdev_get_gpio_in(DEVICE(cpu), CRIS_CPU_IRQ)); sysbus_connect_irq(s, 1, qdev_get_gpio_in(DEVICE(cpu), CRIS_CPU_NMI)); diff --git a/hw/display/milkymist-tmu2.c b/hw/display/milkymist-tmu2.c index e54fd85777..c34ef1a1bf 100644 --- a/hw/display/milkymist-tmu2.c +++ b/hw/display/milkymist-tmu2.c @@ -544,7 +544,7 @@ DeviceState *milkymist_tmu2_create(hwaddr base, qemu_irq irq) XCloseDisplay(d); dev = qdev_new(TYPE_MILKYMIST_TMU2); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 6d1e314a0a..1dadfca5c0 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1954,7 +1954,7 @@ static void sm501_realize_sysbus(DeviceState *dev, Error **errp) usb_dev = qdev_new("sysbus-ohci"); qdev_prop_set_uint32(usb_dev, "num-ports", 2); qdev_prop_set_uint64(usb_dev, "dma-offset", s->base); - qdev_realize_and_unref(usb_dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(usb_dev), &error_fatal); memory_region_add_subregion(&s->state.mmio_region, SM501_USB_HOST, sysbus_mmio_get_region(SYS_BUS_DEVICE(usb_dev), 0)); sysbus_pass_irq(sbd, SYS_BUS_DEVICE(usb_dev)); diff --git a/hw/dma/pxa2xx_dma.c b/hw/dma/pxa2xx_dma.c index 6b761af701..78b2849bcb 100644 --- a/hw/dma/pxa2xx_dma.c +++ b/hw/dma/pxa2xx_dma.c @@ -497,7 +497,7 @@ DeviceState *pxa27x_dma_init(hwaddr base, qemu_irq irq) dev = qdev_new("pxa2xx-dma"); qdev_prop_set_int32(dev, "channels", PXA27X_DMA_NUM_CHANNELS); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); @@ -511,7 +511,7 @@ DeviceState *pxa255_dma_init(hwaddr base, qemu_irq irq) dev = qdev_new("pxa2xx-dma"); qdev_prop_set_int32(dev, "channels", PXA27X_DMA_NUM_CHANNELS); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 21c9706bf3..7eddc9a776 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -746,7 +746,7 @@ DeviceState *rc4030_init(rc4030_dma **dmas, IOMMUMemoryRegion **dma_mr) DeviceState *dev; dev = qdev_new(TYPE_RC4030); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); *dmas = rc4030_allocate_dmas(dev, 4); *dma_mr = &RC4030(dev)->dma_mr; diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index 77cf41e591..f02aca6f40 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -310,7 +310,7 @@ static void sparc32_espdma_device_realize(DeviceState *dev, Error **errp) esp->dma_opaque = SPARC32_DMA_DEVICE(dev); sysbus->it_shift = 2; esp->dma_enabled = 1; - qdev_realize_and_unref(d, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(d), &error_fatal); } static void sparc32_espdma_device_class_init(ObjectClass *klass, void *data) @@ -347,7 +347,7 @@ static void sparc32_ledma_device_realize(DeviceState *dev, Error **errp) object_property_add_child(OBJECT(dev), "lance", OBJECT(d)); qdev_set_nic_properties(d, nd); object_property_set_link(OBJECT(d), OBJECT(dev), "dma", errp); - qdev_realize_and_unref(d, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(d), &error_fatal); } static void sparc32_ledma_device_class_init(ObjectClass *klass, void *data) @@ -381,7 +381,7 @@ static void sparc32_dma_realize(DeviceState *dev, Error **errp) espdma = qdev_new(TYPE_SPARC32_ESPDMA_DEVICE); object_property_set_link(OBJECT(espdma), iommu, "iommu", errp); object_property_add_child(OBJECT(s), "espdma", OBJECT(espdma)); - qdev_realize_and_unref(espdma, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(espdma), &error_fatal); esp = DEVICE(object_resolve_path_component(OBJECT(espdma), "esp")); sbd = SYS_BUS_DEVICE(esp); @@ -396,7 +396,7 @@ static void sparc32_dma_realize(DeviceState *dev, Error **errp) ledma = qdev_new(TYPE_SPARC32_LEDMA_DEVICE); object_property_set_link(OBJECT(ledma), iommu, "iommu", errp); object_property_add_child(OBJECT(s), "ledma", OBJECT(ledma)); - qdev_realize_and_unref(ledma, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(ledma), &error_fatal); lance = DEVICE(object_resolve_path_component(OBJECT(ledma), "lance")); sbd = SYS_BUS_DEVICE(lance); diff --git a/hw/hppa/dino.c b/hw/hppa/dino.c index 50ba26737b..533b39f8d2 100644 --- a/hw/hppa/dino.c +++ b/hw/hppa/dino.c @@ -548,7 +548,7 @@ PCIBus *dino_init(MemoryRegion *addr_space, &s->pci_mem, get_system_io(), PCI_DEVFN(0, 0), 32, TYPE_PCI_BUS); s->parent_obj.bus = b; - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Set up windows into PCI bus memory. */ for (i = 1; i < 31; i++) { diff --git a/hw/hppa/lasi.c b/hw/hppa/lasi.c index 4539022c5b..19974034f3 100644 --- a/hw/hppa/lasi.c +++ b/hw/hppa/lasi.c @@ -309,7 +309,7 @@ DeviceState *lasi_init(MemoryRegion *address_space) s, "lasi", 0x100000); memory_region_add_subregion(address_space, LASI_HPA, &s->this_mem); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* LAN */ if (enable_lasi_lan()) { diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index d828b4fb94..49155537cd 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -125,8 +125,8 @@ static void machine_hppa_init(MachineState *machine) /* Graphics setup. */ if (machine->enable_graphics && vga_interface_type != VGA_NONE) { dev = qdev_new("artist"); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, LASI_GFX_HPA); sysbus_mmio_map(s, 1, ARTIST_FB_ADDR); } diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 280560f790..0cffb67c2f 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1215,7 +1215,7 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, if (!compat) { qdev_prop_set_uint32(hpet, HPET_INTCAP, hpet_irqs); } - qdev_realize_and_unref(hpet, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(hpet), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(hpet), 0, HPET_BASE); for (i = 0; i < GSI_NUM_PINS; i++) { diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index af68ea1b69..b5775fc18d 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -228,7 +228,7 @@ static void pc_q35_init(MachineState *machine) object_property_set_int(OBJECT(q35_host), x86ms->above_4g_mem_size, PCI_HOST_ABOVE_4G_MEM_SIZE, NULL); /* pci */ - qdev_realize_and_unref(DEVICE(q35_host), NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(q35_host), &error_fatal); phb = PCI_HOST_BRIDGE(q35_host); host_bus = phb->bus; /* create ISA bus */ diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index 2e414d1934..ec2a3b3e7e 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -187,7 +187,7 @@ static void pc_system_flash_map(PCMachineState *pcms, total_size += size; qdev_prop_set_uint32(DEVICE(system_flash), "num-blocks", size / FLASH_SECTOR_SIZE); - qdev_realize_and_unref(DEVICE(system_flash), NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(system_flash), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(system_flash), 0, 0x100000000ULL - total_size); diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 85ab52b316..9b6ebd92b5 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -351,8 +351,8 @@ void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name) } object_property_add_child(object_resolve_path(parent_name, NULL), "ioapic", OBJECT(dev)); - qdev_realize_and_unref(dev, NULL, &error_fatal); d = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(d, &error_fatal); sysbus_mmio_map(d, 0, IO_APIC_DEFAULT_ADDRESS); for (i = 0; i < IOAPIC_NUM_PINS; i++) { diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c index a261ab2401..0aa3b843a9 100644 --- a/hw/intc/exynos4210_gic.c +++ b/hw/intc/exynos4210_gic.c @@ -300,8 +300,8 @@ static void exynos4210_gic_realize(DeviceState *dev, Error **errp) s->gic = qdev_new("arm_gic"); qdev_prop_set_uint32(s->gic, "num-cpu", s->num_cpu); qdev_prop_set_uint32(s->gic, "num-irq", EXYNOS4210_GIC_NIRQ); - qdev_realize_and_unref(s->gic, NULL, &error_fatal); gicbusdev = SYS_BUS_DEVICE(s->gic); + sysbus_realize_and_unref(gicbusdev, &error_fatal); /* Pass through outbound IRQ lines from the GIC */ sysbus_pass_irq(sbd, gicbusdev); diff --git a/hw/intc/s390_flic.c b/hw/intc/s390_flic.c index b2a247dd15..aacdb1bbc2 100644 --- a/hw/intc/s390_flic.c +++ b/hw/intc/s390_flic.c @@ -71,7 +71,7 @@ void s390_flic_init(void) object_property_add_child(qdev_get_machine(), TYPE_QEMU_S390_FLIC, OBJECT(dev)); } - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); } static int qemu_s390_register_io_adapter(S390FLICState *fs, uint32_t id, diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index 630985604d..58fde178f9 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -62,7 +62,7 @@ ISABus *isa_bus_new(DeviceState *dev, MemoryRegion* address_space, } if (!dev) { dev = qdev_new("isabus-bridge"); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); } isabus = ISA_BUS(qbus_create(TYPE_ISA_BUS, dev, NULL)); diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c index 53020033cb..db732bc468 100644 --- a/hw/m68k/mcf5208.c +++ b/hw/m68k/mcf5208.c @@ -212,9 +212,9 @@ static void mcf_fec_init(MemoryRegion *sysmem, NICInfo *nd, hwaddr base, qemu_check_nic_model(nd, TYPE_MCF_FEC_NET); dev = qdev_new(TYPE_MCF_FEC_NET); qdev_set_nic_properties(dev, nd); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); for (i = 0; i < FEC_NUM_IRQ; i++) { sysbus_connect_irq(s, i, irqs[i]); } diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c index c575021577..44418e9197 100644 --- a/hw/m68k/mcf_intc.c +++ b/hw/m68k/mcf_intc.c @@ -202,7 +202,7 @@ qemu_irq *mcf_intc_init(MemoryRegion *sysmem, mcf_intc_state *s; dev = qdev_new(TYPE_MCF_INTC); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); s = MCF_INTC(dev); s->cpu = cpu; diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index e1e16bf9af..d3f25cd6d7 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -848,9 +848,9 @@ static void next_escc_init(M68kCPU *cpu) qdev_prop_set_chr(dev, "chrA", serial_hd(0)); qdev_prop_set_uint32(dev, "chnBtype", escc_serial); qdev_prop_set_uint32(dev, "chnAtype", escc_serial); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_connect_irq(s, 0, ser_irq[0]); sysbus_connect_irq(s, 1, ser_irq[1]); sysbus_mmio_map(s, 0, 0x2118000); @@ -896,7 +896,7 @@ static void next_cube_init(MachineState *machine) /* Framebuffer */ dev = qdev_new(TYPE_NEXTFB); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x0B000000); /* MMIO */ @@ -919,7 +919,7 @@ static void next_cube_init(MachineState *machine) /* KBD */ dev = qdev_new(TYPE_NEXTKBD); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x0200e000); /* Load ROM here */ diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 15b7eb719a..503ec54f5d 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -224,8 +224,8 @@ static void q800_init(MachineState *machine) qdev_prop_set_drive(via_dev, "drive", blk_by_legacy_dinfo(dinfo), &error_abort); } - qdev_realize_and_unref(via_dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(via_dev); + sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_mmio_map(sysbus, 0, VIA_BASE); qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, pic[0]); qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 1, pic[1]); @@ -265,8 +265,8 @@ static void q800_init(MachineState *machine) qdev_prop_set_bit(dev, "big_endian", true); object_property_set_link(OBJECT(dev), OBJECT(get_system_memory()), "dma_mr", &error_abort); - qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_mmio_map(sysbus, 0, SONIC_BASE); sysbus_mmio_map(sysbus, 1, SONIC_PROM_BASE); sysbus_connect_irq(sysbus, 0, pic[2]); @@ -282,8 +282,8 @@ static void q800_init(MachineState *machine) qdev_prop_set_chr(dev, "chrB", serial_hd(1)); qdev_prop_set_uint32(dev, "chnBtype", 0); qdev_prop_set_uint32(dev, "chnAtype", 0); - qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_connect_irq(sysbus, 0, pic[3]); sysbus_connect_irq(sysbus, 1, pic[3]); sysbus_mmio_map(sysbus, 0, SCC_BASE); @@ -298,9 +298,9 @@ static void q800_init(MachineState *machine) esp->dma_opaque = NULL; sysbus_esp->it_shift = 4; esp->dma_enabled = 1; - qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in_named(via_dev, "via2-irq", VIA2_IRQ_SCSI_BIT)); @@ -315,13 +315,13 @@ static void q800_init(MachineState *machine) /* SWIM floppy controller */ dev = qdev_new(TYPE_SWIM); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE); /* NuBus */ dev = qdev_new(TYPE_MAC_NUBUS_BRIDGE); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, NUBUS_SUPER_SLOT_BASE); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE); diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c index d4bfa233c9..4d80a691bc 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -112,7 +112,7 @@ petalogix_ml605_init(MachineState *machine) dev = qdev_new("xlnx.xps-intc"); qdev_prop_set_uint32(dev, "kind-of-intr", 1 << TIMER_IRQ); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ)); @@ -128,7 +128,7 @@ petalogix_ml605_init(MachineState *machine) dev = qdev_new("xlnx.xps-timer"); qdev_prop_set_uint32(dev, "one-timer-only", 0); qdev_prop_set_uint32(dev, "clock-frequency", 100 * 1000000); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]); @@ -152,7 +152,7 @@ petalogix_ml605_init(MachineState *machine) "axistream-connected", &error_abort); object_property_set_link(OBJECT(eth0), cs, "axistream-control-connected", &error_abort); - qdev_realize_and_unref(eth0, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(eth0), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(eth0), 0, AXIENET_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(eth0), 0, irq[AXIENET_IRQ]); @@ -165,7 +165,7 @@ petalogix_ml605_init(MachineState *machine) "axistream-connected", &error_abort); object_property_set_link(OBJECT(dma), cs, "axistream-control-connected", &error_abort); - qdev_realize_and_unref(dma, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dma), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, AXIDMA_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dma), 0, irq[AXIDMA_IRQ0]); sysbus_connect_irq(SYS_BUS_DEVICE(dma), 1, irq[AXIDMA_IRQ1]); @@ -175,8 +175,8 @@ petalogix_ml605_init(MachineState *machine) dev = qdev_new("xlnx.xps-spi"); qdev_prop_set_uint8(dev, "num-ss-bits", NUM_SPI_FLASHES); - qdev_realize_and_unref(dev, NULL, &error_fatal); busdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, SPI_BASEADDR); sysbus_connect_irq(busdev, 0, irq[SPI_IRQ]); diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c index aecee2f5f3..793006a822 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -92,7 +92,7 @@ petalogix_s3adsp1800_init(MachineState *machine) dev = qdev_new("xlnx.xps-intc"); qdev_prop_set_uint32(dev, "kind-of-intr", 1 << ETHLITE_IRQ | 1 << UARTLITE_IRQ); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ)); @@ -107,7 +107,7 @@ petalogix_s3adsp1800_init(MachineState *machine) dev = qdev_new("xlnx.xps-timer"); qdev_prop_set_uint32(dev, "one-timer-only", 0); qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]); @@ -116,7 +116,7 @@ petalogix_s3adsp1800_init(MachineState *machine) qdev_set_nic_properties(dev, &nd_table[0]); qdev_prop_set_uint32(dev, "tx-ping-pong", 0); qdev_prop_set_uint32(dev, "rx-ping-pong", 0); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, ETHLITE_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[ETHLITE_IRQ]); diff --git a/hw/mips/boston.c b/hw/mips/boston.c index d90f3a463b..03008b5581 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -409,7 +409,7 @@ xilinx_pcie_init(MemoryRegion *sys_mem, uint32_t bus_nr, qdev_prop_set_uint64(dev, "mmio_size", mmio_size); qdev_prop_set_bit(dev, "link_up", link_up); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); cfg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion_overlap(sys_mem, cfg_base, cfg, 0); @@ -442,7 +442,7 @@ static void boston_mach_init(MachineState *machine) } dev = qdev_new(TYPE_MIPS_BOSTON); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); s = BOSTON(dev); s->mach = machine; diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 37750b8037..756ac9ae12 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -1213,7 +1213,7 @@ PCIBus *gt64120_register(qemu_irq *pic) &d->pci0_mem, get_system_io(), PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, "isd-mem", 0x1000); diff --git a/hw/mips/jazz.c b/hw/mips/jazz.c index fb975bd1c7..c3b0da60cc 100644 --- a/hw/mips/jazz.c +++ b/hw/mips/jazz.c @@ -256,8 +256,8 @@ static void mips_jazz_init(MachineState *machine, switch (jazz_model) { case JAZZ_MAGNUM: dev = qdev_new("sysbus-g364"); - qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_mmio_map(sysbus, 0, 0x60080000); sysbus_mmio_map(sysbus, 1, 0x40000000); sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(rc4030, 3)); @@ -292,8 +292,8 @@ static void mips_jazz_init(MachineState *machine, qdev_prop_set_uint8(dev, "it_shift", 2); object_property_set_link(OBJECT(dev), OBJECT(rc4030_dma_mr), "dma_mr", &error_abort); - qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_mmio_map(sysbus, 0, 0x80001000); sysbus_mmio_map(sysbus, 1, 0x8000b000); sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(rc4030, 4)); @@ -317,9 +317,9 @@ static void mips_jazz_init(MachineState *machine, sysbus_esp->it_shift = 0; /* XXX for now until rc4030 has been changed to use DMA enable signal */ esp->dma_enabled = 1; - qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(rc4030, 5)); sysbus_mmio_map(sysbus, 0, 0x80002000); @@ -363,8 +363,8 @@ static void mips_jazz_init(MachineState *machine, /* NVRAM */ dev = qdev_new("ds1225y"); - qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_mmio_map(sysbus, 0, 0x80009000); /* LED indicator */ diff --git a/hw/mips/malta.c b/hw/mips/malta.c index be0b4d3195..5115adfa22 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1243,7 +1243,7 @@ void mips_malta_init(MachineState *machine) */ empty_slot_init(0, 0x20000000); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* create CPU */ mips_create_cpu(machine, s, &cbus_irq, &i8259_irq); diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c index 72b1e846af..1b3b762203 100644 --- a/hw/mips/mipssim.c +++ b/hw/mips/mipssim.c @@ -131,9 +131,9 @@ static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd) dev = qdev_new("mipsnet"); qdev_set_nic_properties(dev, nd); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_connect_irq(s, 0, irq); memory_region_add_subregion(get_system_io(), base, @@ -220,7 +220,7 @@ mips_mipssim_init(MachineState *machine) qdev_prop_set_chr(dev, "chardev", serial_hd(0)); qdev_set_legacy_instance_id(dev, 0x3f8, 2); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]); sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); diff --git a/hw/net/etraxfs_eth.c b/hw/net/etraxfs_eth.c index 7e98cbda87..3408ceacb5 100644 --- a/hw/net/etraxfs_eth.c +++ b/hw/net/etraxfs_eth.c @@ -668,7 +668,7 @@ etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr, */ ETRAX_FS_ETH(dev)->dma_out = dma_out; ETRAX_FS_ETH(dev)->dma_in = dma_in; - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return dev; diff --git a/hw/net/fsl_etsec/etsec.c b/hw/net/fsl_etsec/etsec.c index d0e9ff57ca..7035cf4eb9 100644 --- a/hw/net/fsl_etsec/etsec.c +++ b/hw/net/fsl_etsec/etsec.c @@ -455,7 +455,7 @@ DeviceState *etsec_create(hwaddr base, dev = qdev_new("eTSEC"); qdev_set_nic_properties(dev, nd); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, tx_irq); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, rx_irq); diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c index 81c32c8107..8e2a432179 100644 --- a/hw/net/lan9118.c +++ b/hw/net/lan9118.c @@ -1397,8 +1397,8 @@ void lan9118_init(NICInfo *nd, uint32_t base, qemu_irq irq) qemu_check_nic_model(nd, "lan9118"); dev = qdev_new(TYPE_LAN9118); qdev_set_nic_properties(dev, nd); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, base); sysbus_connect_irq(s, 0, irq); } diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c index 1870507727..820b63f350 100644 --- a/hw/net/lasi_i82596.c +++ b/hw/net/lasi_i82596.c @@ -131,7 +131,7 @@ SysBusI82596State *lasi_82596_init(MemoryRegion *addr_space, s = SYSBUS_I82596(dev); s->state.irq = lan_irq; qdev_set_nic_properties(dev, &nd_table[0]); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); s->state.conf.macaddr = HP_MAC; /* set HP MAC prefix */ /* LASI 82596 ports in main memory. */ diff --git a/hw/net/smc91c111.c b/hw/net/smc91c111.c index 9b616fe62a..a347b6a4d5 100644 --- a/hw/net/smc91c111.c +++ b/hw/net/smc91c111.c @@ -824,8 +824,8 @@ void smc91c111_init(NICInfo *nd, uint32_t base, qemu_irq irq) qemu_check_nic_model(nd, "smc91c111"); dev = qdev_new(TYPE_SMC91C111); qdev_set_nic_properties(dev, nd); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, base); sysbus_connect_irq(s, 0, irq); } diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c index 3d304d724a..5c13b74306 100644 --- a/hw/nios2/10m50_devboard.c +++ b/hw/nios2/10m50_devboard.c @@ -82,7 +82,7 @@ static void nios2_10m50_ghrd_init(MachineState *machine) /* Register: Internal Interrupt Controller (IIC) */ dev = qdev_new("altera,iic"); object_property_add_const_link(OBJECT(dev), "cpu", OBJECT(cpu)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq[0]); for (i = 0; i < 32; i++) { irq[i] = qdev_get_gpio_in(dev, i); @@ -95,14 +95,14 @@ static void nios2_10m50_ghrd_init(MachineState *machine) /* Register: Timer sys_clk_timer */ dev = qdev_new("ALTR.timer"); qdev_prop_set_uint32(dev, "clock-frequency", 75 * 1000000); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xf8001440); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[0]); /* Register: Timer sys_clk_timer_1 */ dev = qdev_new("ALTR.timer"); qdev_prop_set_uint32(dev, "clock-frequency", 75 * 1000000); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xe0000880); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[5]); diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index fbcaf66002..0408a31f8e 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -1106,9 +1106,9 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase, object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(dev)); - qdev_realize_and_unref(dev, NULL, &error_fatal); sbd = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sbd, &error_fatal); ios = FW_CFG_IO(dev); sysbus_add_io(sbd, iobase, &ios->comb_iomem); @@ -1146,9 +1146,9 @@ FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(dev)); - qdev_realize_and_unref(dev, NULL, &error_fatal); sbd = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sbd, &error_fatal); sysbus_mmio_map(sbd, 0, ctl_addr); sysbus_mmio_map(sbd, 1, data_addr); diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index 5c55c12b1d..29c107a7ca 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -61,9 +61,9 @@ static void openrisc_sim_net_init(hwaddr base, hwaddr descriptors, dev = qdev_new("open_eth"); qdev_set_nic_properties(dev, nd); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); for (i = 0; i < num_cpus; i++) { sysbus_connect_irq(s, 0, cpu_irqs[i][irq_pin]); } @@ -80,9 +80,9 @@ static void openrisc_sim_ompic_init(hwaddr base, int num_cpus, dev = qdev_new("or1k-ompic"); qdev_prop_set_uint32(dev, "num-cpus", num_cpus); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); for (i = 0; i < num_cpus; i++) { sysbus_connect_irq(s, i, cpu_irqs[i][irq_pin]); } diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c index 3a395ab2f0..22f9fc223b 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -255,7 +255,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp) goto err_register_bus; } - qdev_realize_and_unref(ds, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(ds), &error_fatal); if (bds) { qdev_realize_and_unref(bds, &bus->qbus, &error_fatal); } diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 7bb032f005..1405b3fc70 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -748,7 +748,7 @@ PCIBus *bonito_init(qemu_irq *pic) phb = PCI_HOST_BRIDGE(dev); pcihost = BONITO_PCI_HOST_BRIDGE(dev); pcihost->pic = pic; - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); d = pci_new(PCI_DEVFN(0, 0), TYPE_PCI_BONITO); s = PCI_BONITO(d); diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 873d334637..d47f03406a 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -276,7 +276,7 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type, address_space_io, 0, TYPE_PCI_BUS); s->bus = b; object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); d = pci_create_simple(b, 0, pci_type); *pi440fx_state = I440FX_PCI_DEVICE(d); diff --git a/hw/pcmcia/pxa2xx.c b/hw/pcmcia/pxa2xx.c index 90f540209d..5f4bf22a90 100644 --- a/hw/pcmcia/pxa2xx.c +++ b/hw/pcmcia/pxa2xx.c @@ -152,7 +152,7 @@ PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem, sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); s = PXA2XX_PCMCIA(dev); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); return s; } diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 06f4a38266..51bf95b303 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -748,8 +748,8 @@ static DeviceState *ppce500_init_mpic_qemu(PPCE500MachineState *pms, qdev_prop_set_uint32(dev, "model", pmc->mpic_version); qdev_prop_set_uint32(dev, "nb_cpus", smp_cpus); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); k = 0; for (i = 0; i < smp_cpus; i++) { @@ -771,7 +771,7 @@ static DeviceState *ppce500_init_mpic_kvm(const PPCE500MachineClass *pmc, dev = qdev_new(TYPE_KVM_OPENPIC); qdev_prop_set_uint32(dev, "model", pmc->mpic_version); - qdev_realize_and_unref(dev, NULL, &err); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &err); if (err) { error_propagate(errp, err); object_unparent(OBJECT(dev)); @@ -916,7 +916,7 @@ void ppce500_init(MachineState *machine) dev = qdev_new("e500-ccsr"); object_property_add_child(qdev_get_machine(), "e500-ccsr", OBJECT(dev)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); ccsr = CCSR(dev); ccsr_addr_space = &ccsr->ccsr_space; memory_region_add_subregion(address_space_mem, pmc->ccsrbar_base, @@ -939,7 +939,7 @@ void ppce500_init(MachineState *machine) /* I2C */ dev = qdev_new("mpc-i2c"); s = SYS_BUS_DEVICE(dev); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC8544_I2C_IRQ)); memory_region_add_subregion(ccsr_addr_space, MPC8544_I2C_REGS_OFFSET, sysbus_mmio_get_region(s, 0)); @@ -949,8 +949,8 @@ void ppce500_init(MachineState *machine) /* General Utility device */ dev = qdev_new("mpc8544-guts"); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); memory_region_add_subregion(ccsr_addr_space, MPC8544_UTIL_OFFSET, sysbus_mmio_get_region(s, 0)); @@ -959,8 +959,8 @@ void ppce500_init(MachineState *machine) object_property_add_child(qdev_get_machine(), "pci-host", OBJECT(dev)); qdev_prop_set_uint32(dev, "first_slot", pmc->pci_first_slot); qdev_prop_set_uint32(dev, "first_pin_irq", pci_irq_nrs[0]); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); for (i = 0; i < PCI_NUM_PINS; i++) { sysbus_connect_irq(s, i, qdev_get_gpio_in(mpicdev, pci_irq_nrs[i])); } @@ -987,7 +987,7 @@ void ppce500_init(MachineState *machine) dev = qdev_new("mpc8xxx_gpio"); s = SYS_BUS_DEVICE(dev); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC8XXX_GPIO_IRQ)); memory_region_add_subregion(ccsr_addr_space, MPC8XXX_GPIO_OFFSET, sysbus_mmio_get_region(s, 0)); @@ -1003,7 +1003,7 @@ void ppce500_init(MachineState *machine) dev->id = TYPE_PLATFORM_BUS_DEVICE; qdev_prop_set_uint32(dev, "num_irqs", pmc->platform_bus_num_irqs); qdev_prop_set_uint32(dev, "mmio_size", pmc->platform_bus_size); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); pms->pbus_dev = PLATFORM_BUS_DEVICE(dev); s = SYS_BUS_DEVICE(pms->pbus_dev); diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index baa17cdce7..5f3a028e6a 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -243,8 +243,8 @@ static void ppc_core99_init(MachineState *machine) /* UniN init */ dev = qdev_new(TYPE_UNI_NORTH); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); memory_region_add_subregion(get_system_memory(), 0xf8000000, sysbus_mmio_get_region(s, 0)); @@ -290,8 +290,8 @@ static void ppc_core99_init(MachineState *machine) pic_dev = qdev_new(TYPE_OPENPIC); qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO); - qdev_realize_and_unref(pic_dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(pic_dev); + sysbus_realize_and_unref(s, &error_fatal); k = 0; for (i = 0; i < smp_cpus; i++) { for (j = 0; j < OPENPIC_OUTPUT_NB; j++) { @@ -306,7 +306,7 @@ static void ppc_core99_init(MachineState *machine) dev = qdev_new(TYPE_U3_AGP_HOST_BRIDGE); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); uninorth_pci = U3_AGP_HOST_BRIDGE(dev); s = SYS_BUS_DEVICE(dev); /* PCI hole */ @@ -325,8 +325,8 @@ static void ppc_core99_init(MachineState *machine) dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, 0xf0800000); sysbus_mmio_map(s, 1, 0xf0c00000); @@ -334,8 +334,8 @@ static void ppc_core99_init(MachineState *machine) dev = qdev_new(TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, 0xf4800000); sysbus_mmio_map(s, 1, 0xf4c00000); @@ -344,7 +344,7 @@ static void ppc_core99_init(MachineState *machine) qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev); s = SYS_BUS_DEVICE(dev); /* PCI hole */ @@ -444,7 +444,7 @@ static void ppc_core99_init(MachineState *machine) dev = qdev_new(TYPE_MACIO_NVRAM); qdev_prop_set_uint32(dev, "size", 0x2000); qdev_prop_set_uint32(dev, "it_shift", 1); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr); nvr = MACIO_NVRAM(dev); pmac_format_nvram_partition(nvr, 0x2000); @@ -456,8 +456,8 @@ static void ppc_core99_init(MachineState *machine) qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(fw_cfg)); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, CFG_ADDR); sysbus_mmio_map(s, 1, CFG_ADDR + 2); diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 903483079e..f8c204ead7 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -223,7 +223,7 @@ static void ppc_heathrow_init(MachineState *machine) /* XXX: we register only 1 output pin for heathrow PIC */ pic_dev = qdev_new(TYPE_HEATHROW); - qdev_realize_and_unref(pic_dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(pic_dev), &error_fatal); /* Connect the heathrow PIC outputs to the 6xx bus */ for (i = 0; i < smp_cpus; i++) { @@ -256,8 +256,8 @@ static void ppc_heathrow_init(MachineState *machine) qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, GRACKLE_BASE); sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000); /* PCI hole */ @@ -315,8 +315,8 @@ static void ppc_heathrow_init(MachineState *machine) qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(fw_cfg)); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, CFG_ADDR); sysbus_mmio_map(s, 1, CFG_ADDR + 2); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 8cf097ae7c..3eb40ad8f8 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -733,7 +733,7 @@ static void pnv_init(MachineState *machine) qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(pnor), &error_abort); } - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); pnv->pnor = PNV_PNOR(dev); /* load skiboot firmware */ @@ -849,7 +849,7 @@ static void pnv_init(MachineState *machine) object_property_set_link(chip, OBJECT(pnv), "xive-fabric", &error_abort); } - qdev_realize_and_unref(DEVICE(chip), NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(chip), &error_fatal); } g_free(chip_typename); @@ -1205,7 +1205,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) object_property_set_int(OBJECT(phb), i, "index", &error_fatal); object_property_set_int(OBJECT(phb), chip->chip_id, "chip-id", &error_fatal); - qdev_realize(DEVICE(phb), NULL, &local_err); + sysbus_realize(SYS_BUS_DEVICE(phb), &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1410,7 +1410,7 @@ static void pnv_chip_power9_phb_realize(PnvChip *chip, Error **errp) object_property_set_int(obj, PNV_PHB4_DEVICE_ID, "device-id", &error_fatal); object_property_set_link(obj, OBJECT(stack), "stack", &error_abort); - qdev_realize(DEVICE(obj), NULL, &local_err); + sysbus_realize(SYS_BUS_DEVICE(obj), &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index c1cf8d0f46..38fc392438 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -1369,11 +1369,11 @@ void ppc460ex_pcie_init(CPUPPCState *env) dev = qdev_new(TYPE_PPC460EX_PCIE_HOST); qdev_prop_set_int32(dev, "dcrn-base", DCRN_PCIE0_BASE); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); ppc460ex_pcie_register_dcrs(PPC460EX_PCIE_HOST(dev), env); dev = qdev_new(TYPE_PPC460EX_PCIE_HOST); qdev_prop_set_int32(dev, "dcrn-base", DCRN_PCIE1_BASE); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); ppc460ex_pcie_register_dcrs(PPC460EX_PCIE_HOST(dev), env); } diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index 73a40b2cbe..4a0cb434a6 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -278,7 +278,7 @@ static void ibm_40p_init(MachineState *machine) qdev_prop_set_uint32(dev, "elf-machine", PPC_ELF_MACHINE); pcihost = SYS_BUS_DEVICE(dev); object_property_add_child(qdev_get_machine(), "raven", OBJECT(dev)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(pcihost, &error_fatal); pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci.0")); if (!pci_bus) { error_report("could not create PCI host controller"); @@ -351,8 +351,8 @@ static void ibm_40p_init(MachineState *machine) qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(fw_cfg)); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, CFG_ADDR); sysbus_mmio_map(s, 1, CFG_ADDR + 2); diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index 503bd21728..1a106a68de 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -373,8 +373,8 @@ static void sam460ex_init(MachineState *machine) dev = qdev_new("sysbus-ohci"); qdev_prop_set_string(dev, "masterbus", "usb-bus.0"); qdev_prop_set_uint32(dev, "num-ports", 6); - qdev_realize_and_unref(dev, NULL, &error_fatal); sbdev = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sbdev, &error_fatal); sysbus_mmio_map(sbdev, 0, 0x4bffd0000); sysbus_connect_irq(sbdev, 0, uic[2][30]); usb_create_simple(usb_bus_find(-1), "usb-kbd"); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 7ef24ea2a1..c381bb6fb5 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2642,7 +2642,7 @@ static PCIHostState *spapr_create_default_phb(void) dev = qdev_new(TYPE_SPAPR_PCI_HOST_BRIDGE); qdev_prop_set_uint32(dev, "index", 0); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); return PCI_HOST_BRIDGE(dev); } diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index f2ade64e7d..79b0e40b66 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -334,7 +334,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **errp) qdev_prop_set_uint32(dev, "nr-ends", nr_servers << 3); object_property_set_link(OBJECT(dev), OBJECT(spapr), "xive-fabric", &error_abort); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); spapr->xive = SPAPR_XIVE(dev); diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c index 61558db1bf..4318ed9638 100644 --- a/hw/ppc/spapr_vio.c +++ b/hw/ppc/spapr_vio.c @@ -577,7 +577,7 @@ SpaprVioBus *spapr_vio_bus_init(void) /* Create bridge device */ dev = qdev_new(TYPE_SPAPR_VIO_BRIDGE); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Create bus on bridge device */ qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio"); diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index f28a69c0f9..78c4901be1 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -231,7 +231,7 @@ static void virtex_init(MachineState *machine) cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT]; dev = qdev_new("xlnx.xps-intc"); qdev_prop_set_uint32(dev, "kind-of-intr", 0); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq[0]); for (i = 0; i < 32; i++) { @@ -245,7 +245,7 @@ static void virtex_init(MachineState *machine) dev = qdev_new("xlnx.xps-timer"); qdev_prop_set_uint32(dev, "one-timer-only", 0); qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]); diff --git a/hw/riscv/sifive_clint.c b/hw/riscv/sifive_clint.c index 729fce0a58..b11ffa0edc 100644 --- a/hw/riscv/sifive_clint.c +++ b/hw/riscv/sifive_clint.c @@ -252,7 +252,7 @@ DeviceState *sifive_clint_create(hwaddr addr, hwaddr size, uint32_t num_harts, qdev_prop_set_uint32(dev, "timecmp-base", timecmp_base); qdev_prop_set_uint32(dev, "time-base", time_base); qdev_prop_set_uint32(dev, "aperture-size", size); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); return dev; } diff --git a/hw/riscv/sifive_e_prci.c b/hw/riscv/sifive_e_prci.c index 423af22ecc..17dfa74715 100644 --- a/hw/riscv/sifive_e_prci.c +++ b/hw/riscv/sifive_e_prci.c @@ -119,7 +119,7 @@ type_init(sifive_e_prci_register_types) DeviceState *sifive_e_prci_create(hwaddr addr) { DeviceState *dev = qdev_new(TYPE_SIFIVE_E_PRCI); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); return dev; } diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c index 203fec8e48..4f216c5585 100644 --- a/hw/riscv/sifive_plic.c +++ b/hw/riscv/sifive_plic.c @@ -508,7 +508,7 @@ DeviceState *sifive_plic_create(hwaddr addr, char *hart_config, qdev_prop_set_uint32(dev, "context-base", context_base); qdev_prop_set_uint32(dev, "context-stride", context_stride); qdev_prop_set_uint32(dev, "aperture-size", aperture_size); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); return dev; } diff --git a/hw/riscv/sifive_test.c b/hw/riscv/sifive_test.c index 596757f714..0c78fb2c93 100644 --- a/hw/riscv/sifive_test.c +++ b/hw/riscv/sifive_test.c @@ -94,7 +94,7 @@ type_init(sifive_test_register_types) DeviceState *sifive_test_create(hwaddr addr) { DeviceState *dev = qdev_new(TYPE_SIFIVE_TEST); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); return dev; } diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 1ce88b7031..802da232df 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -114,7 +114,7 @@ static void virt_flash_map1(PFlashCFI01 *flash, assert(QEMU_IS_ALIGNED(size, VIRT_FLASH_SECTOR_SIZE)); assert(size / VIRT_FLASH_SECTOR_SIZE <= UINT32_MAX); qdev_prop_set_uint32(dev, "num-blocks", size / VIRT_FLASH_SECTOR_SIZE); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), @@ -445,7 +445,7 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem, dev = qdev_new(TYPE_GPEX_HOST); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); ecam_alias = g_new0(MemoryRegion, 1); ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); diff --git a/hw/rtc/m48t59.c b/hw/rtc/m48t59.c index f6acf416ff..b428a06045 100644 --- a/hw/rtc/m48t59.c +++ b/hw/rtc/m48t59.c @@ -582,8 +582,8 @@ Nvram *m48t59_init(qemu_irq IRQ, hwaddr mem_base, dev = qdev_new(m48txx_sysbus_info[i].bus_name); qdev_prop_set_int32(dev, "base-year", base_year); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_connect_irq(s, 0, IRQ); if (io_base != 0) { memory_region_add_subregion(get_system_io(), io_base, diff --git a/hw/rtc/sun4v-rtc.c b/hw/rtc/sun4v-rtc.c index ed1c10832f..52caea8654 100644 --- a/hw/rtc/sun4v-rtc.c +++ b/hw/rtc/sun4v-rtc.c @@ -59,7 +59,7 @@ void sun4v_rtc_init(hwaddr addr) dev = qdev_new(TYPE_SUN4V_RTC); s = SYS_BUS_DEVICE(dev); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); } diff --git a/hw/s390x/ap-bridge.c b/hw/s390x/ap-bridge.c index 974c97f454..c4e3188ad6 100644 --- a/hw/s390x/ap-bridge.c +++ b/hw/s390x/ap-bridge.c @@ -52,7 +52,7 @@ void s390_init_ap(void) dev = qdev_new(TYPE_AP_BRIDGE); object_property_add_child(qdev_get_machine(), TYPE_AP_BRIDGE, OBJECT(dev)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Create bus on bridge device */ bus = qbus_create(TYPE_AP_BUS, dev, TYPE_AP_BUS); diff --git a/hw/s390x/css-bridge.c b/hw/s390x/css-bridge.c index a0dd2da0b8..e37a54d3f2 100644 --- a/hw/s390x/css-bridge.c +++ b/hw/s390x/css-bridge.c @@ -104,7 +104,7 @@ VirtualCssBus *virtual_css_bus_init(void) dev = qdev_new(TYPE_VIRTUAL_CSS_BRIDGE); object_property_add_child(qdev_get_machine(), TYPE_VIRTUAL_CSS_BRIDGE, OBJECT(dev)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Create bus on bridge device */ bus = qbus_create(TYPE_VIRTUAL_CSS_BUS, dev, "virtual-css"); diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index 65e9d9a9cd..3429d9f82a 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -272,7 +272,7 @@ static void ccw_init(MachineState *machine) dev = qdev_new(TYPE_S390_PCI_HOST_BRIDGE); object_property_add_child(qdev_get_machine(), TYPE_S390_PCI_HOST_BRIDGE, OBJECT(dev)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* register hypercalls */ virtio_ccw_register_hcalls(); diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c index 40e27a8cb4..b66afb35c8 100644 --- a/hw/s390x/sclp.c +++ b/hw/s390x/sclp.c @@ -338,7 +338,7 @@ static void sclp_realize(DeviceState *dev, Error **errp) * as we can't find a fitting bus via the qom tree, we have to add the * event facility to the sysbus, so e.g. a sclp console can be created. */ - qdev_realize(DEVICE(sclp->event_facility), NULL, &err); + sysbus_realize(SYS_BUS_DEVICE(sclp->event_facility), &err); if (err) { goto out; } diff --git a/hw/sd/pxa2xx_mmci.c b/hw/sd/pxa2xx_mmci.c index 89784407b9..623be70b26 100644 --- a/hw/sd/pxa2xx_mmci.c +++ b/hw/sd/pxa2xx_mmci.c @@ -492,7 +492,7 @@ PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysmem, sysbus_connect_irq(sbd, 0, irq); qdev_connect_gpio_out_named(dev, "rx-dma", 0, rx_dma); qdev_connect_gpio_out_named(dev, "tx-dma", 0, tx_dma); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(sbd, &error_fatal); /* Create and plug in the sd card */ carddev = qdev_new(TYPE_SD_CARD); diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index d9592280bc..443820901d 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -259,7 +259,7 @@ static void r2d_init(MachineState *machine) dev = qdev_new("sh_pci"); busdev = SYS_BUS_DEVICE(dev); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(busdev, &error_fatal); pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci")); sysbus_mmio_map(busdev, 0, P4ADDR(0x1e200000)); sysbus_mmio_map(busdev, 1, A7ADDR(0x1e200000)); @@ -273,7 +273,7 @@ static void r2d_init(MachineState *machine) qdev_prop_set_uint32(dev, "vram-size", SM501_VRAM_SIZE); qdev_prop_set_uint32(dev, "base", 0x10000000); qdev_prop_set_chr(dev, "chardev", serial_hd(2)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, 0x10000000); sysbus_mmio_map(busdev, 1, 0x13e00000); sysbus_connect_irq(busdev, 0, irq[SM501]); @@ -284,7 +284,7 @@ static void r2d_init(MachineState *machine) busdev = SYS_BUS_DEVICE(dev); sysbus_connect_irq(busdev, 0, irq[CF_IDE]); qdev_prop_set_uint32(dev, "shift", 1); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, 0x14001000); sysbus_mmio_map(busdev, 1, 0x1400080c); mmio_ide_init_drives(dev, dinfo, NULL); diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index b1d8f25dcc..82fcf9c4cc 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -214,14 +214,14 @@ static void leon3_generic_hw_init(MachineState *machine) qemu_register_reset(main_cpu_reset, reset_info); ahb_pnp = GRLIB_AHB_PNP(qdev_new(TYPE_GRLIB_AHB_PNP)); - qdev_realize_and_unref(DEVICE(ahb_pnp), NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(ahb_pnp), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(ahb_pnp), 0, LEON3_AHB_PNP_OFFSET); grlib_ahb_pnp_add_entry(ahb_pnp, 0, 0, GRLIB_VENDOR_GAISLER, GRLIB_LEON3_DEV, GRLIB_AHB_MASTER, GRLIB_CPU_AREA); apb_pnp = GRLIB_APB_PNP(qdev_new(TYPE_GRLIB_APB_PNP)); - qdev_realize_and_unref(DEVICE(apb_pnp), NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(apb_pnp), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(apb_pnp), 0, LEON3_APB_PNP_OFFSET); grlib_ahb_pnp_add_entry(ahb_pnp, LEON3_APB_PNP_OFFSET, 0xFFF, GRLIB_VENDOR_GAISLER, GRLIB_APBMST_DEV, @@ -233,7 +233,7 @@ static void leon3_generic_hw_init(MachineState *machine) env, "pil", 1); qdev_connect_gpio_out_named(dev, "grlib-irq", 0, qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); env->irq_manager = dev; env->qemu_irq_ack = leon3_irq_manager; @@ -326,7 +326,7 @@ static void leon3_generic_hw_init(MachineState *machine) qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT); qdev_prop_set_uint32(dev, "frequency", CPU_CLK); qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET); for (i = 0; i < LEON3_TIMER_COUNT; i++) { @@ -342,7 +342,7 @@ static void leon3_generic_hw_init(MachineState *machine) if (serial_hd(0)) { dev = qdev_new(TYPE_GRLIB_APB_UART); qdev_prop_set_chr(dev, "chrdev", serial_hd(0)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irqs[LEON3_UART_IRQ]); grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF, diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 61356946e9..df3c200d17 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -317,8 +317,8 @@ static void *iommu_init(hwaddr addr, uint32_t version, qemu_irq irq) dev = qdev_new(TYPE_SUN4M_IOMMU); qdev_prop_set_uint32(dev, "version", version); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_connect_irq(s, 0, irq); sysbus_mmio_map(s, 0, addr); @@ -336,7 +336,7 @@ static void *sparc32_dma_init(hwaddr dma_base, SysBusPCNetState *lance; dma = qdev_new(TYPE_SPARC32_DMA); - qdev_realize_and_unref(dma, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dma), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, dma_base); espdma = SPARC32_ESPDMA_DEVICE(object_resolve_path_component( @@ -367,9 +367,9 @@ static DeviceState *slavio_intctl_init(hwaddr addr, unsigned int i, j; dev = qdev_new("slavio_intctl"); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); for (i = 0; i < MAX_CPUS; i++) { for (j = 0; j < MAX_PILS; j++) { @@ -396,8 +396,8 @@ static void slavio_timer_init_all(hwaddr addr, qemu_irq master_irq, dev = qdev_new("slavio_timer"); qdev_prop_set_uint32(dev, "num_cpus", num_cpus); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_connect_irq(s, 0, master_irq); sysbus_mmio_map(s, 0, addr + SYS_TIMER_OFFSET); @@ -433,8 +433,8 @@ static void slavio_misc_init(hwaddr base, SysBusDevice *s; dev = qdev_new("slavio_misc"); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); if (base) { /* 8 bit registers */ /* Slavio control */ @@ -471,8 +471,8 @@ static void ecc_init(hwaddr base, qemu_irq irq, uint32_t version) dev = qdev_new("eccmemctl"); qdev_prop_set_uint32(dev, "version", version); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_connect_irq(s, 0, irq); sysbus_mmio_map(s, 0, base); if (version == 0) { // SS-600MP only @@ -486,8 +486,8 @@ static void apc_init(hwaddr power_base, qemu_irq cpu_halt) SysBusDevice *s; dev = qdev_new("apc"); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); /* Power management (APC) XXX: not a Slavio device */ sysbus_mmio_map(s, 0, power_base); sysbus_connect_irq(s, 0, cpu_halt); @@ -504,8 +504,8 @@ static void tcx_init(hwaddr addr, qemu_irq irq, int vram_size, int width, qdev_prop_set_uint16(dev, "width", width); qdev_prop_set_uint16(dev, "height", height); qdev_prop_set_uint16(dev, "depth", depth); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); /* 10/ROM : FCode ROM */ sysbus_mmio_map(s, 0, addr); @@ -556,8 +556,8 @@ static void cg3_init(hwaddr addr, qemu_irq irq, int vram_size, int width, qdev_prop_set_uint16(dev, "width", width); qdev_prop_set_uint16(dev, "height", height); qdev_prop_set_uint16(dev, "depth", depth); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); /* FCode ROM */ sysbus_mmio_map(s, 0, addr); @@ -581,8 +581,8 @@ static void idreg_init(hwaddr addr) SysBusDevice *s; dev = qdev_new(TYPE_MACIO_ID_REGISTER); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); address_space_write_rom(&address_space_memory, addr, @@ -647,8 +647,8 @@ static void afx_init(hwaddr addr) SysBusDevice *s; dev = qdev_new(TYPE_TCX_AFX); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); } @@ -708,8 +708,8 @@ static void prom_init(hwaddr addr, const char *bios_name) int ret; dev = qdev_new(TYPE_OPENPROM); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); @@ -878,7 +878,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, /* Create and map RAM frontend */ dev = qdev_new("memory"); object_property_set_link(OBJECT(dev), ram_memdev, "memdev", &error_fatal); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0); /* models without ECC don't trap when missing ram is accessed */ @@ -985,8 +985,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, qdev_prop_set_chr(dev, "chrA", NULL); qdev_prop_set_uint32(dev, "chnBtype", escc_mouse); qdev_prop_set_uint32(dev, "chnAtype", escc_kbd); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_connect_irq(s, 0, slavio_irq[14]); sysbus_connect_irq(s, 1, slavio_irq[14]); sysbus_mmio_map(s, 0, hwdef->ms_kb_base); @@ -999,9 +999,9 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, qdev_prop_set_chr(dev, "chrA", serial_hd(0)); qdev_prop_set_uint32(dev, "chnBtype", escc_serial); qdev_prop_set_uint32(dev, "chnAtype", escc_serial); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_connect_irq(s, 0, slavio_irq[15]); sysbus_connect_irq(s, 1, slavio_irq[15]); sysbus_mmio_map(s, 0, hwdef->serial_base); @@ -1061,8 +1061,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(fw_cfg)); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, CFG_ADDR); sysbus_mmio_map(s, 1, CFG_ADDR + 2); diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index e791fb514a..11440e7457 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -354,8 +354,8 @@ static void ebus_realize(PCIDevice *pci_dev, Error **errp) /* Power */ dev = qdev_new(TYPE_SUN4U_POWER); - qdev_realize_and_unref(dev, NULL, &error_fatal); sbd = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(sbd, &error_fatal); memory_region_add_subregion(pci_address_space_io(pci_dev), 0x7240, sysbus_mmio_get_region(sbd, 0)); @@ -429,8 +429,8 @@ static void prom_init(hwaddr addr, const char *bios_name) int ret; dev = qdev_new(TYPE_OPENPROM); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); @@ -527,7 +527,7 @@ static void ram_init(hwaddr addr, ram_addr_t RAM_size) d = SUN4U_RAM(dev); d->size = RAM_size; - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(s, &error_fatal); sysbus_mmio_map(s, 0, addr); } @@ -575,7 +575,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem, /* IOMMU */ iommu = qdev_new(TYPE_SUN4U_IOMMU); - qdev_realize_and_unref(iommu, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(iommu), &error_fatal); /* set up devices */ ram_init(0, machine->ram_size); @@ -588,7 +588,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem, qdev_prop_set_uint64(DEVICE(sabre), "mem-base", PBM_MEM_BASE); object_property_set_link(OBJECT(sabre), OBJECT(iommu), "iommu", &error_abort); - qdev_realize_and_unref(DEVICE(sabre), NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(sabre), &error_fatal); /* Wire up PCI interrupts to CPU */ for (i = 0; i < IVEC_MAX; i++) { @@ -698,7 +698,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem, dev = qdev_new(TYPE_FW_CFG_IO); qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(ebus), TYPE_FW_CFG, OBJECT(dev)); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); memory_region_add_subregion(pci_address_space_io(ebus), BIOS_CFG_IOPORT, &FW_CFG_IO(dev)->comb_iomem); diff --git a/hw/xen/xen-bus.c b/hw/xen/xen-bus.c index 532f73661b..4b00320f1c 100644 --- a/hw/xen/xen-bus.c +++ b/hw/xen/xen-bus.c @@ -1390,6 +1390,6 @@ void xen_bus_init(void) DeviceState *dev = qdev_new(TYPE_XEN_BRIDGE); BusState *bus = qbus_create(TYPE_XEN_BUS, dev, NULL); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); qbus_set_bus_hotplug_handler(bus, &error_abort); } diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c index ef7c832e2e..2335ee2e65 100644 --- a/hw/xen/xen-legacy-backend.c +++ b/hw/xen/xen-legacy-backend.c @@ -703,7 +703,7 @@ int xen_be_init(void) } xen_sysdev = qdev_new(TYPE_XENSYSDEV); - qdev_realize_and_unref(xen_sysdev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(xen_sysdev), &error_fatal); xen_sysbus = qbus_create(TYPE_XENSYSBUS, xen_sysdev, "xen-sysbus"); qbus_set_bus_hotplug_handler(xen_sysbus, &error_abort); diff --git a/hw/xtensa/virt.c b/hw/xtensa/virt.c index 4dbc1a1614..e47e1de676 100644 --- a/hw/xtensa/virt.c +++ b/hw/xtensa/virt.c @@ -63,7 +63,7 @@ static void create_pcie(CPUXtensaState *env, int irq_base, hwaddr addr_base) int i; dev = qdev_new(TYPE_GPEX_HOST); - qdev_realize_and_unref(dev, NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Map only the first size_ecam bytes of ECAM space. */ ecam_alias = g_new0(MemoryRegion, 1); diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index eab5c8062e..5d0834c1d9 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -150,9 +150,9 @@ static void xtfpga_net_init(MemoryRegion *address_space, dev = qdev_new("open_eth"); qdev_set_nic_properties(dev, nd); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); sysbus_connect_irq(s, 0, irq); memory_region_add_subregion(address_space, base, sysbus_mmio_get_region(s, 0)); @@ -181,8 +181,8 @@ static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *address_space, qdev_prop_set_uint8(dev, "width", 2); qdev_prop_set_bit(dev, "big-endian", be); qdev_prop_set_string(dev, "name", "xtfpga.io.flash"); - qdev_realize_and_unref(dev, NULL, &error_fatal); s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); memory_region_add_subregion(address_space, board->flash->base, sysbus_mmio_get_region(s, 0)); return PFLASH_CFI01(dev); From patchwork Fri May 29 13:45:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578875 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B12821391 for ; Fri, 29 May 2020 14:07:04 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8675320707 for ; Fri, 29 May 2020 14:07:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="UPHq1IEZ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8675320707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:51342 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jeff5-0006z5-MW for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:07:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49252) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKS-0002sj-0P for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:44 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:43015 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKL-00075U-PB for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:43 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Ly1pwAQSlqOFXa63u6MJ9+cn1/cIRAgA/pUievJl0iM=; b=UPHq1IEZnU8ZJ+zz3MDBCqUsf68jbpGMDwZM/0R0e8vRE+u0HlovoBY16e5kerVaOdGUO6 dkH3IuG109FahCqYWisuNBzw1FbLgyf/jQ/YdbodEU/2c4vxzxaES3+rxuc/EwkhYPutKo 4ZIxFtdyYxif11lQQVVOlN0nbsx7q78= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-501-8qO6IpWWMrilFZ2ruz-bmg-1; Fri, 29 May 2020 09:45:34 -0400 X-MC-Unique: 8qO6IpWWMrilFZ2ruz-bmg-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 4F6D5835B45 for ; Fri, 29 May 2020 13:45:33 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 242A55C1D0 for ; Fri, 29 May 2020 13:45:33 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 82E631135241; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 46/58] qdev: Drop qdev_realize() support for null bus Date: Fri, 29 May 2020 15:45:11 +0200 Message-Id: <20200529134523.8477-47-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:27:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The "null @bus means main system bus" convenience feature is no longer used. Drop it. Signed-off-by: Markus Armbruster --- hw/core/qdev.c | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/hw/core/qdev.c b/hw/core/qdev.c index a1fdebb3aa..78a06db76e 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -408,8 +408,7 @@ void qdev_init_nofail(DeviceState *dev) /* * Realize @dev. * @dev must not be plugged into a bus. - * Plug @dev into @bus if non-null, else into the main system bus. - * This takes a reference to @dev. + * Plug @dev into @bus. This takes a reference to @dev. * If @dev has no QOM parent, make one up, taking another reference. * On success, return true. * On failure, store an error through @errp and return false. @@ -419,18 +418,7 @@ bool qdev_realize(DeviceState *dev, BusState *bus, Error **errp) Error *err = NULL; assert(!dev->realized && !dev->parent_bus); - - if (!bus) { - /* - * Assert that the device really is a SysBusDevice before we - * put it onto the sysbus. Non-sysbus devices which aren't - * being put onto a bus should be realized with - * object_property_set_bool(OBJECT(dev), true, "realized", - * errp); - */ - g_assert(object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)); - bus = sysbus_get_default(); - } + assert(bus); qdev_set_parent_bus(dev, bus); From patchwork Fri May 29 13:45:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578885 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7D11B1392 for ; Fri, 29 May 2020 14:10:16 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 345572054F for ; Fri, 29 May 2020 14:10:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="DNsNj4kj" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 345572054F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:37932 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefiB-0004hf-Cq for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:10:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49322) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKc-0003MQ-NT for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:54 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:30411 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKN-00079T-Ob for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:54 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759938; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dez8N1nBjGK0F/XtZ9p/O0jTT81SAysn/zGA04vVbbU=; b=DNsNj4kjpU8HgjqaUPyyKUKY4QdWfAf45IQd7RhcJOIHZnhygF+VO/IInOFblWY/FD10Ck B5qntmCr5OXKS5Gt4GblYJtaLCxbNBTYwlSiKUB0uZRuMh6eRhxsEc80IlGzGy0E1tucAP heZDUrk71g3l9ahz/3lwP9OYChYnVr4= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-354-pPxQ2hU_MBePfFFR4qZusw-1; Fri, 29 May 2020 09:45:34 -0400 X-MC-Unique: pPxQ2hU_MBePfFFR4qZusw-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id D1214460; Fri, 29 May 2020 13:45:33 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 271E91001925; Fri, 29 May 2020 13:45:33 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 887C81135242; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 47/58] sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1 Date: Fri, 29 May 2020 15:45:12 +0200 Message-Id: <20200529134523.8477-48-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/28 23:43:13 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" I'm converting from qdev_set_parent_bus()/realize to qdev_realize(); recent commit "qdev: Convert uses of qdev_set_parent_bus() with Coccinelle" explains why. sysbus_init_child_obj() is a wrapper around object_initialize_child_with_props() and qdev_set_parent_bus(). It passes no properties. Convert sysbus_init_child_obj()/realize to object_initialize_child()/ qdev_realize(). Coccinelle script: @@ expression parent, name, size, type, errp; expression child; symbol true; @@ - sysbus_init_child_obj(parent, name, &child, size, type); + sysbus_init_child_XXX(parent, name, &child, size, type); ... - object_property_set_bool(OBJECT(&child), true, "realized", errp); + sysbus_realize(SYS_BUS_DEVICE(&child), errp); @@ expression parent, name, size, type, errp; expression child; symbol true; @@ - sysbus_init_child_obj(parent, name, child, size, type); + sysbus_init_child_XXX(parent, name, child, size, type); ... - object_property_set_bool(OBJECT(child), true, "realized", errp); + sysbus_realize(SYS_BUS_DEVICE(child), errp); @@ expression parent, name, size, type; expression child; expression dev; expression expr; @@ - sysbus_init_child_obj(parent, name, child, size, type); + sysbus_init_child_XXX(parent, name, child, size, type); ... dev = DEVICE(child); ... when != dev = expr; - qdev_init_nofail(dev); + sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); @@ expression parent, propname, type; expression child; @@ - sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type) + object_initialize_child(parent, propname, child, type) @@ expression parent, propname, type; expression child; @@ - sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type) + object_initialize_child(parent, propname, &child, type) Signed-off-by: Markus Armbruster Acked-by: Alistair Francis --- hw/arm/bcm2835_peripherals.c | 5 ++-- hw/arm/exynos4_boards.c | 7 +++-- hw/arm/mps2-tz.c | 50 ++++++++++++++++-------------------- hw/arm/mps2.c | 19 +++++--------- hw/arm/musca.c | 37 ++++++++++++-------------- hw/arm/xlnx-versal-virt.c | 6 ++--- hw/arm/xlnx-versal.c | 36 +++++++++++--------------- hw/intc/armv7m_nvic.c | 8 +++--- hw/mips/boston.c | 6 ++--- hw/mips/cps.c | 20 ++++++--------- hw/mips/malta.c | 6 ++--- hw/misc/mac_via.c | 14 +++++----- hw/riscv/spike.c | 21 +++++++-------- hw/riscv/virt.c | 7 +++-- 14 files changed, 102 insertions(+), 140 deletions(-) diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c index 49bfabee9b..9f2ecc25ed 100644 --- a/hw/arm/bcm2835_peripherals.c +++ b/hw/arm/bcm2835_peripherals.c @@ -27,11 +27,10 @@ static void create_unimp(BCM2835PeripheralState *ps, UnimplementedDeviceState *uds, const char *name, hwaddr ofs, hwaddr size) { - sysbus_init_child_obj(OBJECT(ps), name, uds, sizeof(*uds), - TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(OBJECT(ps), name, uds, TYPE_UNIMPLEMENTED_DEVICE); qdev_prop_set_string(DEVICE(uds), "name", name); qdev_prop_set_uint64(DEVICE(uds), "size", size); - object_property_set_bool(OBJECT(uds), true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal); memory_region_add_subregion_overlap(&ps->peri_mr, ofs, sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000); } diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index 326122abff..56b729141b 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -128,10 +128,9 @@ exynos4_boards_init_common(MachineState *machine, exynos4_boards_init_ram(s, get_system_memory(), exynos4_board_ram_size[board_type]); - sysbus_init_child_obj(OBJECT(machine), "soc", - &s->soc, sizeof(s->soc), TYPE_EXYNOS4210_SOC); - object_property_set_bool(OBJECT(&s->soc), true, "realized", - &error_fatal); + object_initialize_child(OBJECT(machine), "soc", &s->soc, + TYPE_EXYNOS4210_SOC); + sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal); return s; } diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 4c49512e0b..a2b20fff37 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -174,11 +174,10 @@ static MemoryRegion *make_unimp_dev(MPS2TZMachineState *mms, */ UnimplementedDeviceState *uds = opaque; - sysbus_init_child_obj(OBJECT(mms), name, uds, sizeof(*uds), - TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(OBJECT(mms), name, uds, TYPE_UNIMPLEMENTED_DEVICE); qdev_prop_set_string(DEVICE(uds), "name", name); qdev_prop_set_uint64(DEVICE(uds), "size", size); - object_property_set_bool(OBJECT(uds), true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal); return sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0); } @@ -193,11 +192,10 @@ static MemoryRegion *make_uart(MPS2TZMachineState *mms, void *opaque, SysBusDevice *s; DeviceState *orgate_dev = DEVICE(&mms->uart_irq_orgate); - sysbus_init_child_obj(OBJECT(mms), name, uart, sizeof(*uart), - TYPE_CMSDK_APB_UART); + object_initialize_child(OBJECT(mms), name, uart, TYPE_CMSDK_APB_UART); qdev_prop_set_chr(DEVICE(uart), "chardev", serial_hd(i)); qdev_prop_set_uint32(DEVICE(uart), "pclk-frq", SYSCLK_FRQ); - object_property_set_bool(OBJECT(uart), true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(uart), &error_fatal); s = SYS_BUS_DEVICE(uart); sysbus_connect_irq(s, 0, get_sse_irq_in(mms, txirqno)); sysbus_connect_irq(s, 1, get_sse_irq_in(mms, rxirqno)); @@ -214,13 +212,12 @@ static MemoryRegion *make_scc(MPS2TZMachineState *mms, void *opaque, DeviceState *sccdev; MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms); - sysbus_init_child_obj(OBJECT(mms), "scc", scc, sizeof(*scc), - TYPE_MPS2_SCC); + object_initialize_child(OBJECT(mms), "scc", scc, TYPE_MPS2_SCC); sccdev = DEVICE(scc); qdev_prop_set_uint32(sccdev, "scc-cfg4", 0x2); qdev_prop_set_uint32(sccdev, "scc-aid", 0x00200008); qdev_prop_set_uint32(sccdev, "scc-id", mmc->scc_id); - object_property_set_bool(OBJECT(scc), true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(scc), &error_fatal); return sysbus_mmio_get_region(SYS_BUS_DEVICE(sccdev), 0); } @@ -229,9 +226,8 @@ static MemoryRegion *make_fpgaio(MPS2TZMachineState *mms, void *opaque, { MPS2FPGAIO *fpgaio = opaque; - sysbus_init_child_obj(OBJECT(mms), "fpgaio", fpgaio, sizeof(*fpgaio), - TYPE_MPS2_FPGAIO); - object_property_set_bool(OBJECT(fpgaio), true, "realized", &error_fatal); + object_initialize_child(OBJECT(mms), "fpgaio", fpgaio, TYPE_MPS2_FPGAIO); + sysbus_realize(SYS_BUS_DEVICE(fpgaio), &error_fatal); return sysbus_mmio_get_region(SYS_BUS_DEVICE(fpgaio), 0); } @@ -267,11 +263,10 @@ static MemoryRegion *make_mpc(MPS2TZMachineState *mms, void *opaque, memory_region_init_ram(ssram, NULL, name, ramsize[i], &error_fatal); - sysbus_init_child_obj(OBJECT(mms), mpcname, mpc, sizeof(*mpc), - TYPE_TZ_MPC); + object_initialize_child(OBJECT(mms), mpcname, mpc, TYPE_TZ_MPC); object_property_set_link(OBJECT(mpc), OBJECT(ssram), "downstream", &error_fatal); - object_property_set_bool(OBJECT(mpc), true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(mpc), &error_fatal); /* Map the upstream end of the MPC into system memory */ upstream = sysbus_mmio_get_region(SYS_BUS_DEVICE(mpc), 1); memory_region_add_subregion(get_system_memory(), rambase[i], upstream); @@ -310,13 +305,13 @@ static MemoryRegion *make_dma(MPS2TZMachineState *mms, void *opaque, * the MSC connects to the IoTKit AHB Slave Expansion port, so the * DMA devices can see all devices and memory that the CPU does. */ - sysbus_init_child_obj(OBJECT(mms), mscname, msc, sizeof(*msc), TYPE_TZ_MSC); + object_initialize_child(OBJECT(mms), mscname, msc, TYPE_TZ_MSC); msc_downstream = sysbus_mmio_get_region(SYS_BUS_DEVICE(&mms->iotkit), 0); object_property_set_link(OBJECT(msc), OBJECT(msc_downstream), "downstream", &error_fatal); object_property_set_link(OBJECT(msc), OBJECT(mms), "idau", &error_fatal); - object_property_set_bool(OBJECT(msc), true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(msc), &error_fatal); qdev_connect_gpio_out_named(DEVICE(msc), "irq", 0, qdev_get_gpio_in_named(iotkitdev, @@ -333,10 +328,10 @@ static MemoryRegion *make_dma(MPS2TZMachineState *mms, void *opaque, "cfg_sec_resp", 0)); msc_upstream = sysbus_mmio_get_region(SYS_BUS_DEVICE(msc), 0); - sysbus_init_child_obj(OBJECT(mms), name, dma, sizeof(*dma), TYPE_PL081); + object_initialize_child(OBJECT(mms), name, dma, TYPE_PL081); object_property_set_link(OBJECT(dma), OBJECT(msc_upstream), "downstream", &error_fatal); - object_property_set_bool(OBJECT(dma), true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(dma), &error_fatal); s = SYS_BUS_DEVICE(dma); /* Wire up DMACINTR, DMACINTERR, DMACINTTC */ @@ -363,8 +358,8 @@ static MemoryRegion *make_spi(MPS2TZMachineState *mms, void *opaque, int i = spi - &mms->spi[0]; SysBusDevice *s; - sysbus_init_child_obj(OBJECT(mms), name, spi, sizeof(*spi), TYPE_PL022); - object_property_set_bool(OBJECT(spi), true, "realized", &error_fatal); + object_initialize_child(OBJECT(mms), name, spi, TYPE_PL022); + sysbus_realize(SYS_BUS_DEVICE(spi), &error_fatal); s = SYS_BUS_DEVICE(spi); sysbus_connect_irq(s, 0, get_sse_irq_in(mms, 51 + i)); return sysbus_mmio_get_region(s, 0); @@ -393,15 +388,14 @@ static void mps2tz_common_init(MachineState *machine) exit(EXIT_FAILURE); } - sysbus_init_child_obj(OBJECT(machine), TYPE_IOTKIT, &mms->iotkit, - sizeof(mms->iotkit), mmc->armsse_type); + object_initialize_child(OBJECT(machine), TYPE_IOTKIT, &mms->iotkit, + mmc->armsse_type); iotkitdev = DEVICE(&mms->iotkit); object_property_set_link(OBJECT(&mms->iotkit), OBJECT(system_memory), "memory", &error_abort); qdev_prop_set_uint32(iotkitdev, "EXP_NUMIRQ", MPS2TZ_NUMIRQ); qdev_prop_set_uint32(iotkitdev, "MAINCLK", SYSCLK_FRQ); - object_property_set_bool(OBJECT(&mms->iotkit), true, "realized", - &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&mms->iotkit), &error_fatal); /* * The AN521 needs us to create splitters to feed the IRQ inputs @@ -549,8 +543,8 @@ static void mps2tz_common_init(MachineState *machine) int port; char *gpioname; - sysbus_init_child_obj(OBJECT(machine), ppcinfo->name, ppc, - sizeof(*ppc), TYPE_TZ_PPC); + object_initialize_child(OBJECT(machine), ppcinfo->name, ppc, + TYPE_TZ_PPC); ppcdev = DEVICE(ppc); for (port = 0; port < TZ_NUM_PORTS; port++) { @@ -569,7 +563,7 @@ static void mps2tz_common_init(MachineState *machine) g_free(portname); } - object_property_set_bool(OBJECT(ppc), true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(ppc), &error_fatal); for (port = 0; port < TZ_NUM_PORTS; port++) { const PPCPortInfo *pinfo = &ppcinfo->ports[port]; diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index f246213206..735f44c7a3 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -180,8 +180,7 @@ static void mps2_common_init(MachineState *machine) g_assert_not_reached(); } - sysbus_init_child_obj(OBJECT(mms), "armv7m", &mms->armv7m, - sizeof(mms->armv7m), TYPE_ARMV7M); + object_initialize_child(OBJECT(mms), "armv7m", &mms->armv7m, TYPE_ARMV7M); armv7m = DEVICE(&mms->armv7m); switch (mmc->fpga_type) { case FPGA_AN385: @@ -197,8 +196,7 @@ static void mps2_common_init(MachineState *machine) qdev_prop_set_bit(armv7m, "enable-bitband", true); object_property_set_link(OBJECT(&mms->armv7m), OBJECT(system_memory), "memory", &error_abort); - object_property_set_bool(OBJECT(&mms->armv7m), true, "realized", - &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&mms->armv7m), &error_fatal); create_unimplemented_device("zbtsmram mirror", 0x00400000, 0x00400000); create_unimplemented_device("RESERVED 1", 0x00800000, 0x00800000); @@ -305,23 +303,20 @@ static void mps2_common_init(MachineState *machine) cmsdk_apb_timer_create(0x40000000, qdev_get_gpio_in(armv7m, 8), SYSCLK_FRQ); cmsdk_apb_timer_create(0x40001000, qdev_get_gpio_in(armv7m, 9), SYSCLK_FRQ); - sysbus_init_child_obj(OBJECT(mms), "dualtimer", &mms->dualtimer, - sizeof(mms->dualtimer), TYPE_CMSDK_APB_DUALTIMER); + object_initialize_child(OBJECT(mms), "dualtimer", &mms->dualtimer, + TYPE_CMSDK_APB_DUALTIMER); qdev_prop_set_uint32(DEVICE(&mms->dualtimer), "pclk-frq", SYSCLK_FRQ); - object_property_set_bool(OBJECT(&mms->dualtimer), true, "realized", - &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&mms->dualtimer), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(&mms->dualtimer), 0, qdev_get_gpio_in(armv7m, 10)); sysbus_mmio_map(SYS_BUS_DEVICE(&mms->dualtimer), 0, 0x40002000); - sysbus_init_child_obj(OBJECT(mms), "scc", &mms->scc, - sizeof(mms->scc), TYPE_MPS2_SCC); + object_initialize_child(OBJECT(mms), "scc", &mms->scc, TYPE_MPS2_SCC); sccdev = DEVICE(&mms->scc); qdev_prop_set_uint32(sccdev, "scc-cfg4", 0x2); qdev_prop_set_uint32(sccdev, "scc-aid", 0x00200008); qdev_prop_set_uint32(sccdev, "scc-id", mmc->scc_id); - object_property_set_bool(OBJECT(&mms->scc), true, "realized", - &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&mms->scc), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(sccdev), 0, 0x4002f000); /* In hardware this is a LAN9220; the LAN9118 is software compatible diff --git a/hw/arm/musca.c b/hw/arm/musca.c index a1a6e887ed..d74042356d 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -142,11 +142,10 @@ static MemoryRegion *make_unimp_dev(MuscaMachineState *mms, */ UnimplementedDeviceState *uds = opaque; - sysbus_init_child_obj(OBJECT(mms), name, uds, sizeof(*uds), - TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(OBJECT(mms), name, uds, TYPE_UNIMPLEMENTED_DEVICE); qdev_prop_set_string(DEVICE(uds), "name", name); qdev_prop_set_uint64(DEVICE(uds), "size", size); - object_property_set_bool(OBJECT(uds), true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal); return sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0); } @@ -245,22 +244,21 @@ static MemoryRegion *make_mpc(MuscaMachineState *mms, void *opaque, case MPC_CRYPTOISLAND: /* We don't implement the CryptoIsland yet */ uds = &mms->cryptoisland; - sysbus_init_child_obj(OBJECT(mms), name, uds, sizeof(*uds), - TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(OBJECT(mms), name, uds, + TYPE_UNIMPLEMENTED_DEVICE); qdev_prop_set_string(DEVICE(uds), "name", mpcinfo[i].name); qdev_prop_set_uint64(DEVICE(uds), "size", mpcinfo[i].size); - object_property_set_bool(OBJECT(uds), true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal); downstream = sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0); break; default: g_assert_not_reached(); } - sysbus_init_child_obj(OBJECT(mms), mpcname, mpc, sizeof(*mpc), - TYPE_TZ_MPC); + object_initialize_child(OBJECT(mms), mpcname, mpc, TYPE_TZ_MPC); object_property_set_link(OBJECT(mpc), OBJECT(downstream), "downstream", &error_fatal); - object_property_set_bool(OBJECT(mpc), true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(mpc), &error_fatal); /* Map the upstream end of the MPC into system memory */ upstream = sysbus_mmio_get_region(SYS_BUS_DEVICE(mpc), 1); memory_region_add_subregion(get_system_memory(), mpcinfo[i].addr, upstream); @@ -279,8 +277,8 @@ static MemoryRegion *make_rtc(MuscaMachineState *mms, void *opaque, { PL031State *rtc = opaque; - sysbus_init_child_obj(OBJECT(mms), name, rtc, sizeof(*rtc), TYPE_PL031); - object_property_set_bool(OBJECT(rtc), true, "realized", &error_fatal); + object_initialize_child(OBJECT(mms), name, rtc, TYPE_PL031); + sysbus_realize(SYS_BUS_DEVICE(rtc), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(rtc), 0, get_sse_irq_in(mms, 39)); return sysbus_mmio_get_region(SYS_BUS_DEVICE(rtc), 0); } @@ -293,9 +291,9 @@ static MemoryRegion *make_uart(MuscaMachineState *mms, void *opaque, int irqbase = 7 + i * 6; SysBusDevice *s; - sysbus_init_child_obj(OBJECT(mms), name, uart, sizeof(*uart), TYPE_PL011); + object_initialize_child(OBJECT(mms), name, uart, TYPE_PL011); qdev_prop_set_chr(DEVICE(uart), "chardev", serial_hd(i)); - object_property_set_bool(OBJECT(uart), true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(uart), &error_fatal); s = SYS_BUS_DEVICE(uart); sysbus_connect_irq(s, 0, get_sse_irq_in(mms, irqbase + 5)); /* combined */ sysbus_connect_irq(s, 1, get_sse_irq_in(mms, irqbase + 0)); /* RX */ @@ -373,8 +371,8 @@ static void musca_init(MachineState *machine) exit(1); } - sysbus_init_child_obj(OBJECT(machine), "sse-200", &mms->sse, - sizeof(mms->sse), TYPE_SSE200); + object_initialize_child(OBJECT(machine), "sse-200", &mms->sse, + TYPE_SSE200); ssedev = DEVICE(&mms->sse); object_property_set_link(OBJECT(&mms->sse), OBJECT(system_memory), "memory", &error_fatal); @@ -390,8 +388,7 @@ static void musca_init(MachineState *machine) qdev_prop_set_bit(ssedev, "CPU0_FPU", true); qdev_prop_set_bit(ssedev, "CPU0_DSP", true); } - object_property_set_bool(OBJECT(&mms->sse), true, "realized", - &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&mms->sse), &error_fatal); /* * We need to create splitters to feed the IRQ inputs @@ -531,8 +528,8 @@ static void musca_init(MachineState *machine) int port; char *gpioname; - sysbus_init_child_obj(OBJECT(machine), ppcinfo->name, ppc, - sizeof(*ppc), TYPE_TZ_PPC); + object_initialize_child(OBJECT(machine), ppcinfo->name, ppc, + TYPE_TZ_PPC); ppcdev = DEVICE(ppc); for (port = 0; port < TZ_NUM_PORTS; port++) { @@ -551,7 +548,7 @@ static void musca_init(MachineState *machine) g_free(portname); } - object_property_set_bool(OBJECT(ppc), true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(ppc), &error_fatal); for (port = 0; port < TZ_NUM_PORTS; port++) { const PPCPortInfo *pinfo = &ppcinfo->ports[port]; diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 3d8431dbcf..5bcca7f95b 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -500,13 +500,13 @@ static void versal_virt_init(MachineState *machine) psci_conduit = QEMU_PSCI_CONDUIT_SMC; } - sysbus_init_child_obj(OBJECT(machine), "xlnx-versal", &s->soc, - sizeof(s->soc), TYPE_XLNX_VERSAL); + object_initialize_child(OBJECT(machine), "xlnx-versal", &s->soc, + TYPE_XLNX_VERSAL); object_property_set_link(OBJECT(&s->soc), OBJECT(machine->ram), "ddr", &error_abort); object_property_set_int(OBJECT(&s->soc), psci_conduit, "psci-conduit", &error_abort); - object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal); fdt_create(s); create_virtio_regions(s); diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 38d6b91d15..a27c315a6b 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -62,9 +62,8 @@ static void versal_create_apu_gic(Versal *s, qemu_irq *pic) int nr_apu_cpus = ARRAY_SIZE(s->fpd.apu.cpu); int i; - sysbus_init_child_obj(OBJECT(s), "apu-gic", - &s->fpd.apu.gic, sizeof(s->fpd.apu.gic), - gicv3_class_name()); + object_initialize_child(OBJECT(s), "apu-gic", &s->fpd.apu.gic, + gicv3_class_name()); gicbusdev = SYS_BUS_DEVICE(&s->fpd.apu.gic); gicdev = DEVICE(&s->fpd.apu.gic); qdev_prop_set_uint32(gicdev, "revision", 3); @@ -74,8 +73,7 @@ static void versal_create_apu_gic(Versal *s, qemu_irq *pic) qdev_prop_set_uint32(gicdev, "redist-region-count[0]", 2); qdev_prop_set_bit(gicdev, "has-security-extensions", true); - object_property_set_bool(OBJECT(&s->fpd.apu.gic), true, "realized", - &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&s->fpd.apu.gic), &error_fatal); for (i = 0; i < ARRAY_SIZE(addrs); i++) { MemoryRegion *mr; @@ -133,12 +131,11 @@ static void versal_create_uarts(Versal *s, qemu_irq *pic) DeviceState *dev; MemoryRegion *mr; - sysbus_init_child_obj(OBJECT(s), name, - &s->lpd.iou.uart[i], sizeof(s->lpd.iou.uart[i]), - TYPE_PL011); + object_initialize_child(OBJECT(s), name, &s->lpd.iou.uart[i], + TYPE_PL011); dev = DEVICE(&s->lpd.iou.uart[i]); qdev_prop_set_chr(dev, "chardev", serial_hd(i)); - qdev_init_nofail(dev); + sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion(&s->mr_ps, addrs[i], mr); @@ -160,9 +157,8 @@ static void versal_create_gems(Versal *s, qemu_irq *pic) DeviceState *dev; MemoryRegion *mr; - sysbus_init_child_obj(OBJECT(s), name, - &s->lpd.iou.gem[i], sizeof(s->lpd.iou.gem[i]), - TYPE_CADENCE_GEM); + object_initialize_child(OBJECT(s), name, &s->lpd.iou.gem[i], + TYPE_CADENCE_GEM); dev = DEVICE(&s->lpd.iou.gem[i]); if (nd->used) { qemu_check_nic_model(nd, "cadence_gem"); @@ -174,7 +170,7 @@ static void versal_create_gems(Versal *s, qemu_irq *pic) object_property_set_link(OBJECT(dev), OBJECT(&s->mr_ps), "dma", &error_abort); - qdev_init_nofail(dev); + sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion(&s->mr_ps, addrs[i], mr); @@ -193,12 +189,11 @@ static void versal_create_admas(Versal *s, qemu_irq *pic) DeviceState *dev; MemoryRegion *mr; - sysbus_init_child_obj(OBJECT(s), name, - &s->lpd.iou.adma[i], sizeof(s->lpd.iou.adma[i]), - TYPE_XLNX_ZDMA); + object_initialize_child(OBJECT(s), name, &s->lpd.iou.adma[i], + TYPE_XLNX_ZDMA); dev = DEVICE(&s->lpd.iou.adma[i]); object_property_set_int(OBJECT(dev), 128, "bus-width", &error_abort); - qdev_init_nofail(dev); + sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion(&s->mr_ps, @@ -218,9 +213,8 @@ static void versal_create_sds(Versal *s, qemu_irq *pic) DeviceState *dev; MemoryRegion *mr; - sysbus_init_child_obj(OBJECT(s), "sd[*]", - &s->pmc.iou.sd[i], sizeof(s->pmc.iou.sd[i]), - TYPE_SYSBUS_SDHCI); + object_initialize_child(OBJECT(s), "sd[*]", &s->pmc.iou.sd[i], + TYPE_SYSBUS_SDHCI); dev = DEVICE(&s->pmc.iou.sd[i]); object_property_set_uint(OBJECT(dev), @@ -228,7 +222,7 @@ static void versal_create_sds(Versal *s, qemu_irq *pic) object_property_set_uint(OBJECT(dev), SDHCI_CAPABILITIES, "capareg", &error_fatal); object_property_set_uint(OBJECT(dev), UHS_I, "uhs", &error_fatal); - qdev_init_nofail(dev); + sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion(&s->mr_ps, diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 1ad35e5529..f035079168 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -2655,12 +2655,10 @@ static void armv7m_nvic_realize(DeviceState *dev, Error **errp) * as we didn't know then if the CPU had the security extensions; * so we have to do it here. */ - sysbus_init_child_obj(OBJECT(dev), "systick-reg-s", - &s->systick[M_REG_S], - sizeof(s->systick[M_REG_S]), TYPE_SYSTICK); + object_initialize_child(OBJECT(dev), "systick-reg-s", + &s->systick[M_REG_S], TYPE_SYSTICK); - object_property_set_bool(OBJECT(&s->systick[M_REG_S]), true, - "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->systick[M_REG_S]), &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 03008b5581..f5d4ac8cd4 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -454,14 +454,12 @@ static void boston_mach_init(MachineState *machine) is_64b = cpu_supports_isa(machine->cpu_type, ISA_MIPS64); - sysbus_init_child_obj(OBJECT(machine), "cps", &s->cps, sizeof(s->cps), - TYPE_MIPS_CPS); + object_initialize_child(OBJECT(machine), "cps", &s->cps, TYPE_MIPS_CPS); object_property_set_str(OBJECT(&s->cps), machine->cpu_type, "cpu-type", &error_fatal); object_property_set_int(OBJECT(&s->cps), machine->smp.cpus, "num-vp", &error_fatal); - object_property_set_bool(OBJECT(&s->cps), true, "realized", - &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&s->cps), &error_fatal); sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1); diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 92b9b1a5f6..cdfab19826 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -99,8 +99,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) /* Inter-Thread Communication Unit */ if (itu_present) { - sysbus_init_child_obj(OBJECT(dev), "itu", &s->itu, sizeof(s->itu), - TYPE_MIPS_ITU); + object_initialize_child(OBJECT(dev), "itu", &s->itu, TYPE_MIPS_ITU); object_property_set_int(OBJECT(&s->itu), 16, "num-fifo", &err); object_property_set_int(OBJECT(&s->itu), 16, "num-semaphores", &err); object_property_set_bool(OBJECT(&s->itu), saar_present, "saar-present", @@ -108,7 +107,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) if (saar_present) { s->itu.saar = &env->CP0_SAAR; } - object_property_set_bool(OBJECT(&s->itu), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->itu), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -119,11 +118,10 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) } /* Cluster Power Controller */ - sysbus_init_child_obj(OBJECT(dev), "cpc", &s->cpc, sizeof(s->cpc), - TYPE_MIPS_CPC); + object_initialize_child(OBJECT(dev), "cpc", &s->cpc, TYPE_MIPS_CPC); object_property_set_int(OBJECT(&s->cpc), s->num_vp, "num-vp", &err); object_property_set_int(OBJECT(&s->cpc), 1, "vp-start-running", &err); - object_property_set_bool(OBJECT(&s->cpc), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->cpc), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -133,11 +131,10 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cpc), 0)); /* Global Interrupt Controller */ - sysbus_init_child_obj(OBJECT(dev), "gic", &s->gic, sizeof(s->gic), - TYPE_MIPS_GIC); + object_initialize_child(OBJECT(dev), "gic", &s->gic, TYPE_MIPS_GIC); object_property_set_int(OBJECT(&s->gic), s->num_vp, "num-vp", &err); object_property_set_int(OBJECT(&s->gic), 128, "num-irq", &err); - object_property_set_bool(OBJECT(&s->gic), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gic), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -149,14 +146,13 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) /* Global Configuration Registers */ gcr_base = env->CP0_CMGCRBase << 4; - sysbus_init_child_obj(OBJECT(dev), "gcr", &s->gcr, sizeof(s->gcr), - TYPE_MIPS_GCR); + object_initialize_child(OBJECT(dev), "gcr", &s->gcr, TYPE_MIPS_GCR); object_property_set_int(OBJECT(&s->gcr), s->num_vp, "num-vp", &err); object_property_set_int(OBJECT(&s->gcr), 0x800, "gcr-rev", &err); object_property_set_int(OBJECT(&s->gcr), gcr_base, "gcr-base", &err); object_property_set_link(OBJECT(&s->gcr), OBJECT(&s->gic.mr), "gic", &err); object_property_set_link(OBJECT(&s->gcr), OBJECT(&s->cpc.mr), "cpc", &err); - object_property_set_bool(OBJECT(&s->gcr), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gcr), &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 5115adfa22..29e6a2fa33 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1183,14 +1183,12 @@ static void create_cpu_without_cps(MachineState *ms, static void create_cps(MachineState *ms, MaltaState *s, qemu_irq *cbus_irq, qemu_irq *i8259_irq) { - sysbus_init_child_obj(OBJECT(s), "cps", &s->cps, sizeof(s->cps), - TYPE_MIPS_CPS); + object_initialize_child(OBJECT(s), "cps", &s->cps, TYPE_MIPS_CPS); object_property_set_str(OBJECT(&s->cps), ms->cpu_type, "cpu-type", &error_fatal); object_property_set_int(OBJECT(&s->cps), ms->smp.cpus, "num-vp", &error_fatal); - object_property_set_bool(OBJECT(&s->cps), true, "realized", - &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&s->cps), &error_fatal); sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1); diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c index 82614c155a..9cd313c812 100644 --- a/hw/misc/mac_via.c +++ b/hw/misc/mac_via.c @@ -876,11 +876,11 @@ static void mac_via_realize(DeviceState *dev, Error **errp) int ret; /* Init VIAs 1 and 2 */ - sysbus_init_child_obj(OBJECT(dev), "via1", &m->mos6522_via1, - sizeof(m->mos6522_via1), TYPE_MOS6522_Q800_VIA1); + object_initialize_child(OBJECT(dev), "via1", &m->mos6522_via1, + TYPE_MOS6522_Q800_VIA1); - sysbus_init_child_obj(OBJECT(dev), "via2", &m->mos6522_via2, - sizeof(m->mos6522_via2), TYPE_MOS6522_Q800_VIA2); + object_initialize_child(OBJECT(dev), "via2", &m->mos6522_via2, + TYPE_MOS6522_Q800_VIA2); /* Pass through mos6522 output IRQs */ ms = MOS6522(&m->mos6522_via1); @@ -890,10 +890,8 @@ static void mac_via_realize(DeviceState *dev, Error **errp) object_property_add_alias(OBJECT(dev), "irq[1]", OBJECT(ms), SYSBUS_DEVICE_GPIO_IRQ "[0]"); - object_property_set_bool(OBJECT(&m->mos6522_via1), true, "realized", - &error_abort); - object_property_set_bool(OBJECT(&m->mos6522_via2), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&m->mos6522_via1), &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&m->mos6522_via2), &error_abort); /* Pass through mos6522 input IRQs */ qdev_pass_gpios(DEVICE(&m->mos6522_via1), dev, "via1-irq"); diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 01d52e758e..841e20d4e4 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -169,14 +169,13 @@ static void spike_board_init(MachineState *machine) unsigned int smp_cpus = machine->smp.cpus; /* Initialize SOC */ - sysbus_init_child_obj(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), - TYPE_RISCV_HART_ARRAY); + object_initialize_child(OBJECT(machine), "soc", &s->soc, + TYPE_RISCV_HART_ARRAY); object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", &error_abort); - object_property_set_bool(OBJECT(&s->soc), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_abort); /* register system main memory (actual RAM) */ memory_region_init_ram(main_mem, NULL, "riscv.spike.ram", @@ -275,14 +274,13 @@ static void spike_v1_10_0_board_init(MachineState *machine) } /* Initialize SOC */ - sysbus_init_child_obj(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), - TYPE_RISCV_HART_ARRAY); + object_initialize_child(OBJECT(machine), "soc", &s->soc, + TYPE_RISCV_HART_ARRAY); object_property_set_str(OBJECT(&s->soc), SPIKE_V1_10_0_CPU, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", &error_abort); - object_property_set_bool(OBJECT(&s->soc), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_abort); /* register system main memory (actual RAM) */ memory_region_init_ram(main_mem, NULL, "riscv.spike.ram", @@ -365,14 +363,13 @@ static void spike_v1_09_1_board_init(MachineState *machine) } /* Initialize SOC */ - sysbus_init_child_obj(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), - TYPE_RISCV_HART_ARRAY); + object_initialize_child(OBJECT(machine), "soc", &s->soc, + TYPE_RISCV_HART_ARRAY); object_property_set_str(OBJECT(&s->soc), SPIKE_V1_09_1_CPU, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", &error_abort); - object_property_set_bool(OBJECT(&s->soc), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_abort); /* register system main memory (actual RAM) */ memory_region_init_ram(main_mem, NULL, "riscv.spike.ram", diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 802da232df..a88c8c4548 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -485,14 +485,13 @@ static void riscv_virt_board_init(MachineState *machine) unsigned int smp_cpus = machine->smp.cpus; /* Initialize SOC */ - sysbus_init_child_obj(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), - TYPE_RISCV_HART_ARRAY); + object_initialize_child(OBJECT(machine), "soc", &s->soc, + TYPE_RISCV_HART_ARRAY); object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", &error_abort); - object_property_set_bool(OBJECT(&s->soc), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_abort); /* register system main memory (actual RAM) */ memory_region_init_ram(main_mem, NULL, "riscv_virt_board.ram", From patchwork Fri May 29 13:45:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578911 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0FD881392 for ; Fri, 29 May 2020 14:17:13 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A07E020707 for ; Fri, 29 May 2020 14:17:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="eonc3ROn" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A07E020707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:60858 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefot-0006F9-Qr for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:17:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49346) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKh-0003av-Km for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:59 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:27830 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00077s-Uc for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:59 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759937; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GZM20qY2pehgeBI9R5ZhXw0KFH2iVby9vFnlXyOqmyk=; b=eonc3ROnIqLKCNtLiG6DtVP6LMgkm8RZRql2m/Al6EDuB2wEZaBBo1mmeoQ1rlIQ7QmxcH qn+Y6ro+ye0JMeRkn59L4Zk6eLO8KZTuY+Fz3EDpyMFaM8HuhTz+5PysOZHRTGIc+T9V17 dHxj5+CTlzsQ7+RUB89pj7JONtYA1xM= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-346-0VTpfEz0No-q7vHx5zOKbw-1; Fri, 29 May 2020 09:45:35 -0400 X-MC-Unique: 0VTpfEz0No-q7vHx5zOKbw-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 7BF62EC1A2; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 4FD3160C80; Fri, 29 May 2020 13:45:33 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 8FE8B1135244; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 48/58] sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 2 Date: Fri, 29 May 2020 15:45:13 +0200 Message-Id: <20200529134523.8477-49-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" This is the same transformation as in the previous commit, except sysbus_init_child_obj() and realize are too separated for the commit's Coccinelle script to handle, typically because sysbus_init_child_obj() is in a device's instance_init() method, and the matching realize is in its realize() method. Perhaps a Coccinelle wizard could make it transform that pattern, but I'm just a bungler, and the best I can do is transforming the two separate parts separately: @@ expression errp; expression child; symbol true; @@ - object_property_set_bool(OBJECT(child), true, "realized", errp); + sysbus_realize(SYS_BUS_DEVICE(child), errp); // only correct with a matching sysbus_init_child_obj() transformation! @@ expression errp; expression child; symbol true; @@ - object_property_set_bool(child, true, "realized", errp); + sysbus_realize(SYS_BUS_DEVICE(child), errp); // only correct with a matching sysbus_init_child_obj() transformation! @@ expression child; @@ - qdev_init_nofail(DEVICE(child)); + sysbus_realize(SYS_BUS_DEVICE(child), &error_fatal); // only correct with a matching sysbus_init_child_obj() transformation! @@ expression child; expression dev; @@ dev = DEVICE(child); ... - qdev_init_nofail(dev); + sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); // only correct with a matching sysbus_init_child_obj() transformation! @@ expression child; identifier dev; @@ DeviceState *dev = DEVICE(child); ... - qdev_init_nofail(dev); + sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); // only correct with a matching sysbus_init_child_obj() transformation! @@ expression parent, name, size, type; expression child; symbol true; @@ - sysbus_init_child_obj(parent, name, child, size, type); + sysbus_init_child_XXX(parent, name, child, size, type); @@ expression parent, propname, type; expression child; @@ - sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type) + object_initialize_child(parent, propname, child, type) @@ expression parent, propname, type; expression child; @@ - sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type) + object_initialize_child(parent, propname, &child, type) This script is *unsound*: we need to manually verify init and realize conversions are properly paired. This commit has only the pairs where object_initialize_child()'s @child and sysbus_realize()'s @dev argument text match exactly within the same source file. Note that Coccinelle chokes on ARMSSE typedef vs. macro in hw/arm/armsse.c. Worked around by temporarily renaming the macro for the spatch run. Signed-off-by: Markus Armbruster Acked-by: Alistair Francis --- hw/arm/allwinner-a10.c | 43 ++++++--------- hw/arm/allwinner-h3.c | 50 +++++++---------- hw/arm/armsse.c | 96 ++++++++++++++------------------ hw/arm/armv7m.c | 4 +- hw/arm/aspeed_ast2600.c | 89 +++++++++++++----------------- hw/arm/aspeed_soc.c | 69 ++++++++++------------- hw/arm/bcm2835_peripherals.c | 65 ++++++++++------------ hw/arm/bcm2836.c | 11 ++-- hw/arm/digic.c | 10 ++-- hw/arm/fsl-imx25.c | 58 ++++++++----------- hw/arm/fsl-imx31.c | 37 ++++++------- hw/arm/fsl-imx6.c | 69 ++++++++++------------- hw/arm/fsl-imx6ul.c | 98 ++++++++++++--------------------- hw/arm/fsl-imx7.c | 93 +++++++++++-------------------- hw/arm/msf2-soc.c | 25 ++++----- hw/arm/nrf51_soc.c | 30 +++++----- hw/arm/stm32f205_soc.c | 32 +++++------ hw/arm/stm32f405_soc.c | 37 ++++++------- hw/arm/xlnx-zynqmp.c | 60 +++++++++----------- hw/cpu/a15mpcore.c | 5 +- hw/cpu/a9mpcore.c | 23 ++++---- hw/cpu/arm11mpcore.c | 18 +++--- hw/cpu/realview_mpcore.c | 5 +- hw/intc/realview_gic.c | 4 +- hw/microblaze/xlnx-zynqmp-pmu.c | 11 ++-- hw/misc/macio/cuda.c | 8 +-- hw/misc/macio/pmu.c | 8 +-- hw/ppc/pnv.c | 6 +- hw/riscv/sifive_e.c | 13 ++--- hw/riscv/sifive_u.c | 31 ++++------- 30 files changed, 457 insertions(+), 651 deletions(-) diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c index 64449416de..e05099c757 100644 --- a/hw/arm/allwinner-a10.c +++ b/hw/arm/allwinner-a10.c @@ -44,33 +44,28 @@ static void aw_a10_init(Object *obj) object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("cortex-a8")); - sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc), - TYPE_AW_A10_PIC); + object_initialize_child(obj, "intc", &s->intc, TYPE_AW_A10_PIC); - sysbus_init_child_obj(obj, "timer", &s->timer, sizeof(s->timer), - TYPE_AW_A10_PIT); + object_initialize_child(obj, "timer", &s->timer, TYPE_AW_A10_PIT); - sysbus_init_child_obj(obj, "emac", &s->emac, sizeof(s->emac), TYPE_AW_EMAC); + object_initialize_child(obj, "emac", &s->emac, TYPE_AW_EMAC); - sysbus_init_child_obj(obj, "sata", &s->sata, sizeof(s->sata), - TYPE_ALLWINNER_AHCI); + object_initialize_child(obj, "sata", &s->sata, TYPE_ALLWINNER_AHCI); if (machine_usb(current_machine)) { int i; for (i = 0; i < AW_A10_NUM_USB; i++) { - sysbus_init_child_obj(obj, "ehci[*]", &s->ehci[i], - sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI); - sysbus_init_child_obj(obj, "ohci[*]", &s->ohci[i], - sizeof(s->ohci[i]), TYPE_SYSBUS_OHCI); + object_initialize_child(obj, "ehci[*]", &s->ehci[i], + TYPE_PLATFORM_EHCI); + object_initialize_child(obj, "ohci[*]", &s->ohci[i], + TYPE_SYSBUS_OHCI); } } - sysbus_init_child_obj(obj, "mmc0", &s->mmc0, sizeof(s->mmc0), - TYPE_AW_SDHOST_SUN4I); + object_initialize_child(obj, "mmc0", &s->mmc0, TYPE_AW_SDHOST_SUN4I); - sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc), - TYPE_AW_RTC_SUN4I); + object_initialize_child(obj, "rtc", &s->rtc, TYPE_AW_RTC_SUN4I); } static void aw_a10_realize(DeviceState *dev, Error **errp) @@ -85,7 +80,7 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) return; } - object_property_set_bool(OBJECT(&s->intc), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->intc), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -98,7 +93,7 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ)); qdev_pass_gpios(DEVICE(&s->intc), dev, NULL); - object_property_set_bool(OBJECT(&s->timer), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->timer), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -122,7 +117,7 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC); qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]); } - object_property_set_bool(OBJECT(&s->emac), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->emac), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -131,7 +126,7 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(sysbusdev, 0, AW_A10_EMAC_BASE); sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 55)); - object_property_set_bool(OBJECT(&s->sata), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->sata), &err); if (err) { error_propagate(errp, err); return; @@ -154,8 +149,7 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) object_property_set_bool(OBJECT(&s->ehci[i]), true, "companion-enable", &error_fatal); - object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized", - &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, AW_A10_EHCI_BASE + i * 0x8000); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, @@ -163,8 +157,7 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus", &error_fatal); - object_property_set_bool(OBJECT(&s->ohci[i]), true, "realized", - &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&s->ohci[i]), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0, AW_A10_OHCI_BASE + i * 0x8000); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0, @@ -173,14 +166,14 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) } /* SD/MMC */ - qdev_init_nofail(DEVICE(&s->mmc0)); + sysbus_realize(SYS_BUS_DEVICE(&s->mmc0), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc0), 0, AW_A10_MMC0_BASE); sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc0), 0, qdev_get_gpio_in(dev, 32)); object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->mmc0), "sd-bus"); /* RTC */ - qdev_init_nofail(DEVICE(&s->rtc)); + sysbus_realize(SYS_BUS_DEVICE(&s->rtc), &error_fatal); sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->rtc), 0, AW_A10_RTC_BASE, 10); } diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c index 7dc3671155..91d22640e4 100644 --- a/hw/arm/allwinner-h3.c +++ b/hw/arm/allwinner-h3.c @@ -198,45 +198,35 @@ static void allwinner_h3_init(Object *obj) ARM_CPU_TYPE_NAME("cortex-a7")); } - sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), - TYPE_ARM_GIC); + object_initialize_child(obj, "gic", &s->gic, TYPE_ARM_GIC); - sysbus_init_child_obj(obj, "timer", &s->timer, sizeof(s->timer), - TYPE_AW_A10_PIT); + object_initialize_child(obj, "timer", &s->timer, TYPE_AW_A10_PIT); object_property_add_alias(obj, "clk0-freq", OBJECT(&s->timer), "clk0-freq"); object_property_add_alias(obj, "clk1-freq", OBJECT(&s->timer), "clk1-freq"); - sysbus_init_child_obj(obj, "ccu", &s->ccu, sizeof(s->ccu), - TYPE_AW_H3_CCU); + object_initialize_child(obj, "ccu", &s->ccu, TYPE_AW_H3_CCU); - sysbus_init_child_obj(obj, "sysctrl", &s->sysctrl, sizeof(s->sysctrl), - TYPE_AW_H3_SYSCTRL); + object_initialize_child(obj, "sysctrl", &s->sysctrl, TYPE_AW_H3_SYSCTRL); - sysbus_init_child_obj(obj, "cpucfg", &s->cpucfg, sizeof(s->cpucfg), - TYPE_AW_CPUCFG); + object_initialize_child(obj, "cpucfg", &s->cpucfg, TYPE_AW_CPUCFG); - sysbus_init_child_obj(obj, "sid", &s->sid, sizeof(s->sid), - TYPE_AW_SID); + object_initialize_child(obj, "sid", &s->sid, TYPE_AW_SID); object_property_add_alias(obj, "identifier", OBJECT(&s->sid), "identifier"); - sysbus_init_child_obj(obj, "mmc0", &s->mmc0, sizeof(s->mmc0), - TYPE_AW_SDHOST_SUN5I); + object_initialize_child(obj, "mmc0", &s->mmc0, TYPE_AW_SDHOST_SUN5I); - sysbus_init_child_obj(obj, "emac", &s->emac, sizeof(s->emac), - TYPE_AW_SUN8I_EMAC); + object_initialize_child(obj, "emac", &s->emac, TYPE_AW_SUN8I_EMAC); - sysbus_init_child_obj(obj, "dramc", &s->dramc, sizeof(s->dramc), - TYPE_AW_H3_DRAMC); + object_initialize_child(obj, "dramc", &s->dramc, TYPE_AW_H3_DRAMC); object_property_add_alias(obj, "ram-addr", OBJECT(&s->dramc), "ram-addr"); object_property_add_alias(obj, "ram-size", OBJECT(&s->dramc), "ram-size"); - sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc), - TYPE_AW_RTC_SUN6I); + object_initialize_child(obj, "rtc", &s->rtc, TYPE_AW_RTC_SUN6I); } static void allwinner_h3_realize(DeviceState *dev, Error **errp) @@ -270,7 +260,7 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) qdev_prop_set_uint32(DEVICE(&s->gic), "num-cpu", AW_H3_NUM_CPUS); qdev_prop_set_bit(DEVICE(&s->gic), "has-security-extensions", false); qdev_prop_set_bit(DEVICE(&s->gic), "has-virtualization-extensions", true); - qdev_init_nofail(DEVICE(&s->gic)); + sysbus_realize(SYS_BUS_DEVICE(&s->gic), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 0, s->memmap[AW_H3_GIC_DIST]); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 1, s->memmap[AW_H3_GIC_CPU]); @@ -321,7 +311,7 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) } /* Timer */ - qdev_init_nofail(DEVICE(&s->timer)); + sysbus_realize(SYS_BUS_DEVICE(&s->timer), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->timer), 0, s->memmap[AW_H3_PIT]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer), 0, qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_TIMER0)); @@ -343,23 +333,23 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) &s->sram_c); /* Clock Control Unit */ - qdev_init_nofail(DEVICE(&s->ccu)); + sysbus_realize(SYS_BUS_DEVICE(&s->ccu), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccu), 0, s->memmap[AW_H3_CCU]); /* System Control */ - qdev_init_nofail(DEVICE(&s->sysctrl)); + sysbus_realize(SYS_BUS_DEVICE(&s->sysctrl), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->sysctrl), 0, s->memmap[AW_H3_SYSCTRL]); /* CPU Configuration */ - qdev_init_nofail(DEVICE(&s->cpucfg)); + sysbus_realize(SYS_BUS_DEVICE(&s->cpucfg), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->cpucfg), 0, s->memmap[AW_H3_CPUCFG]); /* Security Identifier */ - qdev_init_nofail(DEVICE(&s->sid)); + sysbus_realize(SYS_BUS_DEVICE(&s->sid), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->sid), 0, s->memmap[AW_H3_SID]); /* SD/MMC */ - qdev_init_nofail(DEVICE(&s->mmc0)); + sysbus_realize(SYS_BUS_DEVICE(&s->mmc0), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc0), 0, s->memmap[AW_H3_MMC0]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc0), 0, qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_MMC0)); @@ -372,7 +362,7 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) qemu_check_nic_model(&nd_table[0], TYPE_AW_SUN8I_EMAC); qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]); } - qdev_init_nofail(DEVICE(&s->emac)); + sysbus_realize(SYS_BUS_DEVICE(&s->emac), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->emac), 0, s->memmap[AW_H3_EMAC]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->emac), 0, qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_EMAC)); @@ -422,13 +412,13 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) 115200, serial_hd(3), DEVICE_NATIVE_ENDIAN); /* DRAMC */ - qdev_init_nofail(DEVICE(&s->dramc)); + sysbus_realize(SYS_BUS_DEVICE(&s->dramc), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->dramc), 0, s->memmap[AW_H3_DRAMCOM]); sysbus_mmio_map(SYS_BUS_DEVICE(&s->dramc), 1, s->memmap[AW_H3_DRAMCTL]); sysbus_mmio_map(SYS_BUS_DEVICE(&s->dramc), 2, s->memmap[AW_H3_DRAMPHY]); /* RTC */ - qdev_init_nofail(DEVICE(&s->rtc)); + sysbus_realize(SYS_BUS_DEVICE(&s->rtc), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, s->memmap[AW_H3_RTC]); /* Unimplemented devices */ diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index b6276b7327..a00764759f 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -274,16 +274,12 @@ static void armsse_init(Object *obj) } } - sysbus_init_child_obj(obj, "secctl", &s->secctl, sizeof(s->secctl), - TYPE_IOTKIT_SECCTL); - sysbus_init_child_obj(obj, "apb-ppc0", &s->apb_ppc0, sizeof(s->apb_ppc0), - TYPE_TZ_PPC); - sysbus_init_child_obj(obj, "apb-ppc1", &s->apb_ppc1, sizeof(s->apb_ppc1), - TYPE_TZ_PPC); + object_initialize_child(obj, "secctl", &s->secctl, TYPE_IOTKIT_SECCTL); + object_initialize_child(obj, "apb-ppc0", &s->apb_ppc0, TYPE_TZ_PPC); + object_initialize_child(obj, "apb-ppc1", &s->apb_ppc1, TYPE_TZ_PPC); for (i = 0; i < info->sram_banks; i++) { char *name = g_strdup_printf("mpc%d", i); - sysbus_init_child_obj(obj, name, &s->mpc[i], - sizeof(s->mpc[i]), TYPE_TZ_MPC); + object_initialize_child(obj, name, &s->mpc[i], TYPE_TZ_MPC); g_free(name); } object_initialize_child(obj, "mpc-irq-orgate", &s->mpc_irq_orgate, @@ -296,24 +292,22 @@ static void armsse_init(Object *obj) object_initialize_child(obj, name, splitter, TYPE_SPLIT_IRQ); g_free(name); } - sysbus_init_child_obj(obj, "timer0", &s->timer0, sizeof(s->timer0), - TYPE_CMSDK_APB_TIMER); - sysbus_init_child_obj(obj, "timer1", &s->timer1, sizeof(s->timer1), - TYPE_CMSDK_APB_TIMER); - sysbus_init_child_obj(obj, "s32ktimer", &s->s32ktimer, sizeof(s->s32ktimer), - TYPE_CMSDK_APB_TIMER); - sysbus_init_child_obj(obj, "dualtimer", &s->dualtimer, sizeof(s->dualtimer), - TYPE_CMSDK_APB_DUALTIMER); - sysbus_init_child_obj(obj, "s32kwatchdog", &s->s32kwatchdog, - sizeof(s->s32kwatchdog), TYPE_CMSDK_APB_WATCHDOG); - sysbus_init_child_obj(obj, "nswatchdog", &s->nswatchdog, - sizeof(s->nswatchdog), TYPE_CMSDK_APB_WATCHDOG); - sysbus_init_child_obj(obj, "swatchdog", &s->swatchdog, - sizeof(s->swatchdog), TYPE_CMSDK_APB_WATCHDOG); - sysbus_init_child_obj(obj, "armsse-sysctl", &s->sysctl, - sizeof(s->sysctl), TYPE_IOTKIT_SYSCTL); - sysbus_init_child_obj(obj, "armsse-sysinfo", &s->sysinfo, - sizeof(s->sysinfo), TYPE_IOTKIT_SYSINFO); + object_initialize_child(obj, "timer0", &s->timer0, TYPE_CMSDK_APB_TIMER); + object_initialize_child(obj, "timer1", &s->timer1, TYPE_CMSDK_APB_TIMER); + object_initialize_child(obj, "s32ktimer", &s->s32ktimer, + TYPE_CMSDK_APB_TIMER); + object_initialize_child(obj, "dualtimer", &s->dualtimer, + TYPE_CMSDK_APB_DUALTIMER); + object_initialize_child(obj, "s32kwatchdog", &s->s32kwatchdog, + TYPE_CMSDK_APB_WATCHDOG); + object_initialize_child(obj, "nswatchdog", &s->nswatchdog, + TYPE_CMSDK_APB_WATCHDOG); + object_initialize_child(obj, "swatchdog", &s->swatchdog, + TYPE_CMSDK_APB_WATCHDOG); + object_initialize_child(obj, "armsse-sysctl", &s->sysctl, + TYPE_IOTKIT_SYSCTL); + object_initialize_child(obj, "armsse-sysinfo", &s->sysinfo, + TYPE_IOTKIT_SYSINFO); if (info->has_mhus) { sysbus_init_child_obj(obj, "mhu0", &s->mhu[0], sizeof(s->mhu[0]), TYPE_ARMSSE_MHU); @@ -347,9 +341,8 @@ static void armsse_init(Object *obj) for (i = 0; i < info->num_cpus; i++) { char *name = g_strdup_printf("cachectrl%d", i); - sysbus_init_child_obj(obj, name, &s->cachectrl[i], - sizeof(s->cachectrl[i]), - TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(obj, name, &s->cachectrl[i], + TYPE_UNIMPLEMENTED_DEVICE); g_free(name); } } @@ -357,9 +350,8 @@ static void armsse_init(Object *obj) for (i = 0; i < info->num_cpus; i++) { char *name = g_strdup_printf("cpusecctrl%d", i); - sysbus_init_child_obj(obj, name, &s->cpusecctrl[i], - sizeof(s->cpusecctrl[i]), - TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(obj, name, &s->cpusecctrl[i], + TYPE_UNIMPLEMENTED_DEVICE); g_free(name); } } @@ -367,9 +359,8 @@ static void armsse_init(Object *obj) for (i = 0; i < info->num_cpus; i++) { char *name = g_strdup_printf("cpuid%d", i); - sysbus_init_child_obj(obj, name, &s->cpuid[i], - sizeof(s->cpuid[i]), - TYPE_ARMSSE_CPUID); + object_initialize_child(obj, name, &s->cpuid[i], + TYPE_ARMSSE_CPUID); g_free(name); } } @@ -670,7 +661,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) } /* Security controller */ - object_property_set_bool(OBJECT(&s->secctl), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->secctl), &err); if (err) { error_propagate(errp, err); return; @@ -722,7 +713,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(&s->mpc[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->mpc[i]), &err); if (err) { error_propagate(errp, err); return; @@ -765,7 +756,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) * map its upstream ends to the right place in the container. */ qdev_prop_set_uint32(DEVICE(&s->timer0), "pclk-frq", s->mainclk_frq); - object_property_set_bool(OBJECT(&s->timer0), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->timer0), &err); if (err) { error_propagate(errp, err); return; @@ -780,7 +771,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) } qdev_prop_set_uint32(DEVICE(&s->timer1), "pclk-frq", s->mainclk_frq); - object_property_set_bool(OBJECT(&s->timer1), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->timer1), &err); if (err) { error_propagate(errp, err); return; @@ -796,7 +787,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) qdev_prop_set_uint32(DEVICE(&s->dualtimer), "pclk-frq", s->mainclk_frq); - object_property_set_bool(OBJECT(&s->dualtimer), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->dualtimer), &err); if (err) { error_propagate(errp, err); return; @@ -857,7 +848,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) } } - object_property_set_bool(OBJECT(&s->apb_ppc0), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->apb_ppc0), &err); if (err) { error_propagate(errp, err); return; @@ -930,8 +921,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) qdev_prop_set_string(DEVICE(&s->cachectrl[i]), "name", name); g_free(name); qdev_prop_set_uint64(DEVICE(&s->cachectrl[i]), "size", 0x1000); - object_property_set_bool(OBJECT(&s->cachectrl[i]), true, - "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->cachectrl[i]), &err); if (err) { error_propagate(errp, err); return; @@ -949,8 +939,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) qdev_prop_set_string(DEVICE(&s->cpusecctrl[i]), "name", name); g_free(name); qdev_prop_set_uint64(DEVICE(&s->cpusecctrl[i]), "size", 0x1000); - object_property_set_bool(OBJECT(&s->cpusecctrl[i]), true, - "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->cpusecctrl[i]), &err); if (err) { error_propagate(errp, err); return; @@ -965,8 +954,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) MemoryRegion *mr; qdev_prop_set_uint32(DEVICE(&s->cpuid[i]), "CPUID", i); - object_property_set_bool(OBJECT(&s->cpuid[i]), true, - "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->cpuid[i]), &err); if (err) { error_propagate(errp, err); return; @@ -982,7 +970,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) * 0x4002f000: S32K timer */ qdev_prop_set_uint32(DEVICE(&s->s32ktimer), "pclk-frq", S32KCLK); - object_property_set_bool(OBJECT(&s->s32ktimer), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->s32ktimer), &err); if (err) { error_propagate(errp, err); return; @@ -996,7 +984,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) return; } - object_property_set_bool(OBJECT(&s->apb_ppc1), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->apb_ppc1), &err); if (err) { error_propagate(errp, err); return; @@ -1034,7 +1022,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(&s->sysinfo), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->sysinfo), &err); if (err) { error_propagate(errp, err); return; @@ -1050,7 +1038,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) "INITSVTOR0_RST", &err); object_property_set_int(OBJECT(&s->sysctl), s->init_svtor, "INITSVTOR1_RST", &err); - object_property_set_bool(OBJECT(&s->sysctl), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->sysctl), &err); if (err) { error_propagate(errp, err); return; @@ -1094,7 +1082,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) qdev_get_gpio_in_named(DEVICE(&s->armv7m), "NMI", 0)); qdev_prop_set_uint32(DEVICE(&s->s32kwatchdog), "wdogclk-frq", S32KCLK); - object_property_set_bool(OBJECT(&s->s32kwatchdog), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->s32kwatchdog), &err); if (err) { error_propagate(errp, err); return; @@ -1106,7 +1094,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) /* 0x40080000 .. 0x4008ffff : ARMSSE second Base peripheral region */ qdev_prop_set_uint32(DEVICE(&s->nswatchdog), "wdogclk-frq", s->mainclk_frq); - object_property_set_bool(OBJECT(&s->nswatchdog), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->nswatchdog), &err); if (err) { error_propagate(errp, err); return; @@ -1116,7 +1104,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->nswatchdog), 0, 0x40081000); qdev_prop_set_uint32(DEVICE(&s->swatchdog), "wdogclk-frq", s->mainclk_frq); - object_property_set_bool(OBJECT(&s->swatchdog), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->swatchdog), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index f930619f53..6fd672e7d9 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -136,7 +136,7 @@ static void armv7m_instance_init(Object *obj) memory_region_init(&s->container, obj, "armv7m-container", UINT64_MAX); - sysbus_init_child_obj(obj, "nvnic", &s->nvic, sizeof(s->nvic), TYPE_NVIC); + object_initialize_child(obj, "nvnic", &s->nvic, TYPE_NVIC); object_property_add_alias(obj, "num-irq", OBJECT(&s->nvic), "num-irq"); @@ -223,7 +223,7 @@ static void armv7m_realize(DeviceState *dev, Error **errp) } /* Note that we must realize the NVIC after the CPU */ - object_property_set_bool(OBJECT(&s->nvic), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->nvic), &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index b7fdffff20..482fe826c9 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -131,7 +131,7 @@ static void aspeed_soc_ast2600_init(Object *obj) } snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); - sysbus_init_child_obj(obj, "scu", &s->scu, sizeof(s->scu), typename); + object_initialize_child(obj, "scu", &s->scu, typename); qdev_prop_set_uint32(DEVICE(&s->scu), "silicon-rev", sc->silicon_rev); object_property_add_alias(obj, "hw-strap1", OBJECT(&s->scu), @@ -141,36 +141,33 @@ static void aspeed_soc_ast2600_init(Object *obj) object_property_add_alias(obj, "hw-prot-key", OBJECT(&s->scu), "hw-prot-key"); - sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore, - sizeof(s->a7mpcore), TYPE_A15MPCORE_PRIV); + object_initialize_child(obj, "a7mpcore", &s->a7mpcore, + TYPE_A15MPCORE_PRIV); - sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc), - TYPE_ASPEED_RTC); + object_initialize_child(obj, "rtc", &s->rtc, TYPE_ASPEED_RTC); snprintf(typename, sizeof(typename), "aspeed.timer-%s", socname); - sysbus_init_child_obj(obj, "timerctrl", &s->timerctrl, - sizeof(s->timerctrl), typename); + object_initialize_child(obj, "timerctrl", &s->timerctrl, typename); snprintf(typename, sizeof(typename), "aspeed.i2c-%s", socname); - sysbus_init_child_obj(obj, "i2c", &s->i2c, sizeof(s->i2c), typename); + object_initialize_child(obj, "i2c", &s->i2c, typename); snprintf(typename, sizeof(typename), "aspeed.fmc-%s", socname); - sysbus_init_child_obj(obj, "fmc", &s->fmc, sizeof(s->fmc), typename); + object_initialize_child(obj, "fmc", &s->fmc, typename); object_property_add_alias(obj, "num-cs", OBJECT(&s->fmc), "num-cs"); for (i = 0; i < sc->spis_num; i++) { snprintf(typename, sizeof(typename), "aspeed.spi%d-%s", i + 1, socname); - sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], - sizeof(s->spi[i]), typename); + object_initialize_child(obj, "spi[*]", &s->spi[i], typename); } for (i = 0; i < sc->ehcis_num; i++) { - sysbus_init_child_obj(obj, "ehci[*]", &s->ehci[i], - sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI); + object_initialize_child(obj, "ehci[*]", &s->ehci[i], + TYPE_PLATFORM_EHCI); } snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname); - sysbus_init_child_obj(obj, "sdmc", &s->sdmc, sizeof(s->sdmc), typename); + object_initialize_child(obj, "sdmc", &s->sdmc, typename); object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc), "ram-size"); object_property_add_alias(obj, "max-ram-size", OBJECT(&s->sdmc), @@ -178,30 +175,26 @@ static void aspeed_soc_ast2600_init(Object *obj) for (i = 0; i < sc->wdts_num; i++) { snprintf(typename, sizeof(typename), "aspeed.wdt-%s", socname); - sysbus_init_child_obj(obj, "wdt[*]", &s->wdt[i], - sizeof(s->wdt[i]), typename); + object_initialize_child(obj, "wdt[*]", &s->wdt[i], typename); } for (i = 0; i < sc->macs_num; i++) { - sysbus_init_child_obj(obj, "ftgmac100[*]", &s->ftgmac100[i], - sizeof(s->ftgmac100[i]), TYPE_FTGMAC100); + object_initialize_child(obj, "ftgmac100[*]", &s->ftgmac100[i], + TYPE_FTGMAC100); - sysbus_init_child_obj(obj, "mii[*]", &s->mii[i], sizeof(s->mii[i]), - TYPE_ASPEED_MII); + object_initialize_child(obj, "mii[*]", &s->mii[i], TYPE_ASPEED_MII); } - sysbus_init_child_obj(obj, "xdma", &s->xdma, sizeof(s->xdma), - TYPE_ASPEED_XDMA); + object_initialize_child(obj, "xdma", &s->xdma, TYPE_ASPEED_XDMA); snprintf(typename, sizeof(typename), "aspeed.gpio-%s", socname); - sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio), typename); + object_initialize_child(obj, "gpio", &s->gpio, typename); snprintf(typename, sizeof(typename), "aspeed.gpio-%s-1_8v", socname); - sysbus_init_child_obj(obj, "gpio_1_8v", &s->gpio_1_8v, - sizeof(s->gpio_1_8v), typename); + object_initialize_child(obj, "gpio_1_8v", &s->gpio_1_8v, typename); - sysbus_init_child_obj(obj, "sd-controller", &s->sdhci, - sizeof(s->sdhci), TYPE_ASPEED_SDHCI); + object_initialize_child(obj, "sd-controller", &s->sdhci, + TYPE_ASPEED_SDHCI); object_property_set_int(OBJECT(&s->sdhci), 2, "num-slots", &error_abort); @@ -212,8 +205,8 @@ static void aspeed_soc_ast2600_init(Object *obj) sizeof(s->sdhci.slots[i]), TYPE_SYSBUS_SDHCI); } - sysbus_init_child_obj(obj, "emmc-controller", &s->emmc, - sizeof(s->emmc), TYPE_ASPEED_SDHCI); + object_initialize_child(obj, "emmc-controller", &s->emmc, + TYPE_ASPEED_SDHCI); object_property_set_int(OBJECT(&s->emmc), 1, "num-slots", &error_abort); @@ -281,8 +274,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL, "num-irq", &error_abort); - object_property_set_bool(OBJECT(&s->a7mpcore), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, ASPEED_A7MPCORE_ADDR); for (i = 0; i < sc->num_cpus; i++) { @@ -310,7 +302,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) sc->memmap[ASPEED_SRAM], &s->sram); /* SCU */ - object_property_set_bool(OBJECT(&s->scu), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->scu), &err); if (err) { error_propagate(errp, err); return; @@ -318,7 +310,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_SCU]); /* RTC */ - object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->rtc), &err); if (err) { error_propagate(errp, err); return; @@ -330,7 +322,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) /* Timer */ object_property_set_link(OBJECT(&s->timerctrl), OBJECT(&s->scu), "scu", &error_abort); - object_property_set_bool(OBJECT(&s->timerctrl), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->timerctrl), &err); if (err) { error_propagate(errp, err); return; @@ -355,7 +347,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(&s->i2c), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->i2c), &err); if (err) { error_propagate(errp, err); return; @@ -383,7 +375,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(&s->fmc), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->fmc), &err); if (err) { error_propagate(errp, err); return; @@ -403,8 +395,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs", &err); - object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", - &local_err); + sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), &local_err); error_propagate(&err, local_err); if (err) { error_propagate(errp, err); @@ -418,7 +409,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) /* EHCI */ for (i = 0; i < sc->ehcis_num; i++) { - object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &err); if (err) { error_propagate(errp, err); return; @@ -430,7 +421,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) } /* SDMC - SDRAM Memory Controller */ - object_property_set_bool(OBJECT(&s->sdmc), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), &err); if (err) { error_propagate(errp, err); return; @@ -443,7 +434,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) object_property_set_link(OBJECT(&s->wdt[i]), OBJECT(&s->scu), "scu", &error_abort); - object_property_set_bool(OBJECT(&s->wdt[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), &err); if (err) { error_propagate(errp, err); return; @@ -456,8 +447,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) for (i = 0; i < sc->macs_num; i++) { object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed", &err); - object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "realized", - &local_err); + sysbus_realize(SYS_BUS_DEVICE(&s->ftgmac100[i]), &local_err); error_propagate(&err, local_err); if (err) { error_propagate(errp, err); @@ -470,8 +460,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) object_property_set_link(OBJECT(&s->mii[i]), OBJECT(&s->ftgmac100[i]), "nic", &error_abort); - object_property_set_bool(OBJECT(&s->mii[i]), true, "realized", - &err); + sysbus_realize(SYS_BUS_DEVICE(&s->mii[i]), &err); if (err) { error_propagate(errp, err); return; @@ -482,7 +471,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) } /* XDMA */ - object_property_set_bool(OBJECT(&s->xdma), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->xdma), &err); if (err) { error_propagate(errp, err); return; @@ -493,7 +482,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) aspeed_soc_get_irq(s, ASPEED_XDMA)); /* GPIO */ - object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gpio), &err); if (err) { error_propagate(errp, err); return; @@ -502,7 +491,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, aspeed_soc_get_irq(s, ASPEED_GPIO)); - object_property_set_bool(OBJECT(&s->gpio_1_8v), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gpio_1_8v), &err); if (err) { error_propagate(errp, err); return; @@ -513,7 +502,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) aspeed_soc_get_irq(s, ASPEED_GPIO_1_8V)); /* SDHCI */ - object_property_set_bool(OBJECT(&s->sdhci), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), &err); if (err) { error_propagate(errp, err); return; @@ -524,7 +513,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) aspeed_soc_get_irq(s, ASPEED_SDHCI)); /* eMMC */ - object_property_set_bool(OBJECT(&s->emmc), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->emmc), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 5806e5c9b4..c40839c1fb 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -146,7 +146,7 @@ static void aspeed_soc_init(Object *obj) } snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); - sysbus_init_child_obj(obj, "scu", &s->scu, sizeof(s->scu), typename); + object_initialize_child(obj, "scu", &s->scu, typename); qdev_prop_set_uint32(DEVICE(&s->scu), "silicon-rev", sc->silicon_rev); object_property_add_alias(obj, "hw-strap1", OBJECT(&s->scu), @@ -156,36 +156,32 @@ static void aspeed_soc_init(Object *obj) object_property_add_alias(obj, "hw-prot-key", OBJECT(&s->scu), "hw-prot-key"); - sysbus_init_child_obj(obj, "vic", &s->vic, sizeof(s->vic), - TYPE_ASPEED_VIC); + object_initialize_child(obj, "vic", &s->vic, TYPE_ASPEED_VIC); - sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc), - TYPE_ASPEED_RTC); + object_initialize_child(obj, "rtc", &s->rtc, TYPE_ASPEED_RTC); snprintf(typename, sizeof(typename), "aspeed.timer-%s", socname); - sysbus_init_child_obj(obj, "timerctrl", &s->timerctrl, - sizeof(s->timerctrl), typename); + object_initialize_child(obj, "timerctrl", &s->timerctrl, typename); snprintf(typename, sizeof(typename), "aspeed.i2c-%s", socname); - sysbus_init_child_obj(obj, "i2c", &s->i2c, sizeof(s->i2c), typename); + object_initialize_child(obj, "i2c", &s->i2c, typename); snprintf(typename, sizeof(typename), "aspeed.fmc-%s", socname); - sysbus_init_child_obj(obj, "fmc", &s->fmc, sizeof(s->fmc), typename); + object_initialize_child(obj, "fmc", &s->fmc, typename); object_property_add_alias(obj, "num-cs", OBJECT(&s->fmc), "num-cs"); for (i = 0; i < sc->spis_num; i++) { snprintf(typename, sizeof(typename), "aspeed.spi%d-%s", i + 1, socname); - sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], - sizeof(s->spi[i]), typename); + object_initialize_child(obj, "spi[*]", &s->spi[i], typename); } for (i = 0; i < sc->ehcis_num; i++) { - sysbus_init_child_obj(obj, "ehci[*]", &s->ehci[i], - sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI); + object_initialize_child(obj, "ehci[*]", &s->ehci[i], + TYPE_PLATFORM_EHCI); } snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname); - sysbus_init_child_obj(obj, "sdmc", &s->sdmc, sizeof(s->sdmc), typename); + object_initialize_child(obj, "sdmc", &s->sdmc, typename); object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc), "ram-size"); object_property_add_alias(obj, "max-ram-size", OBJECT(&s->sdmc), @@ -193,23 +189,20 @@ static void aspeed_soc_init(Object *obj) for (i = 0; i < sc->wdts_num; i++) { snprintf(typename, sizeof(typename), "aspeed.wdt-%s", socname); - sysbus_init_child_obj(obj, "wdt[*]", &s->wdt[i], - sizeof(s->wdt[i]), typename); + object_initialize_child(obj, "wdt[*]", &s->wdt[i], typename); } for (i = 0; i < sc->macs_num; i++) { - sysbus_init_child_obj(obj, "ftgmac100[*]", &s->ftgmac100[i], - sizeof(s->ftgmac100[i]), TYPE_FTGMAC100); + object_initialize_child(obj, "ftgmac100[*]", &s->ftgmac100[i], + TYPE_FTGMAC100); } - sysbus_init_child_obj(obj, "xdma", &s->xdma, sizeof(s->xdma), - TYPE_ASPEED_XDMA); + object_initialize_child(obj, "xdma", &s->xdma, TYPE_ASPEED_XDMA); snprintf(typename, sizeof(typename), "aspeed.gpio-%s", socname); - sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio), typename); + object_initialize_child(obj, "gpio", &s->gpio, typename); - sysbus_init_child_obj(obj, "sdc", &s->sdhci, sizeof(s->sdhci), - TYPE_ASPEED_SDHCI); + object_initialize_child(obj, "sdc", &s->sdhci, TYPE_ASPEED_SDHCI); object_property_set_int(OBJECT(&s->sdhci), 2, "num-slots", &error_abort); @@ -255,7 +248,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) sc->memmap[ASPEED_SRAM], &s->sram); /* SCU */ - object_property_set_bool(OBJECT(&s->scu), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->scu), &err); if (err) { error_propagate(errp, err); return; @@ -263,7 +256,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_SCU]); /* VIC */ - object_property_set_bool(OBJECT(&s->vic), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->vic), &err); if (err) { error_propagate(errp, err); return; @@ -275,7 +268,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ)); /* RTC */ - object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->rtc), &err); if (err) { error_propagate(errp, err); return; @@ -287,7 +280,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) /* Timer */ object_property_set_link(OBJECT(&s->timerctrl), OBJECT(&s->scu), "scu", &error_abort); - object_property_set_bool(OBJECT(&s->timerctrl), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->timerctrl), &err); if (err) { error_propagate(errp, err); return; @@ -312,7 +305,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(&s->i2c), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->i2c), &err); if (err) { error_propagate(errp, err); return; @@ -333,7 +326,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(&s->fmc), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->fmc), &err); if (err) { error_propagate(errp, err); return; @@ -347,8 +340,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) /* SPI */ for (i = 0; i < sc->spis_num; i++) { object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs", &err); - object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", - &local_err); + sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), &local_err); error_propagate(&err, local_err); if (err) { error_propagate(errp, err); @@ -362,7 +354,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) /* EHCI */ for (i = 0; i < sc->ehcis_num; i++) { - object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &err); if (err) { error_propagate(errp, err); return; @@ -374,7 +366,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) } /* SDMC - SDRAM Memory Controller */ - object_property_set_bool(OBJECT(&s->sdmc), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), &err); if (err) { error_propagate(errp, err); return; @@ -387,7 +379,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) object_property_set_link(OBJECT(&s->wdt[i]), OBJECT(&s->scu), "scu", &error_abort); - object_property_set_bool(OBJECT(&s->wdt[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), &err); if (err) { error_propagate(errp, err); return; @@ -400,8 +392,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) for (i = 0; i < sc->macs_num; i++) { object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed", &err); - object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "realized", - &local_err); + sysbus_realize(SYS_BUS_DEVICE(&s->ftgmac100[i]), &local_err); error_propagate(&err, local_err); if (err) { error_propagate(errp, err); @@ -414,7 +405,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) } /* XDMA */ - object_property_set_bool(OBJECT(&s->xdma), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->xdma), &err); if (err) { error_propagate(errp, err); return; @@ -425,7 +416,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) aspeed_soc_get_irq(s, ASPEED_XDMA)); /* GPIO */ - object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gpio), &err); if (err) { error_propagate(errp, err); return; @@ -435,7 +426,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) aspeed_soc_get_irq(s, ASPEED_GPIO)); /* SDHCI */ - object_property_set_bool(OBJECT(&s->sdhci), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c index 9f2ecc25ed..52a947cb2d 100644 --- a/hw/arm/bcm2835_peripherals.c +++ b/hw/arm/bcm2835_peripherals.c @@ -53,37 +53,34 @@ static void bcm2835_peripherals_init(Object *obj) MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT); /* Interrupt Controller */ - sysbus_init_child_obj(obj, "ic", &s->ic, sizeof(s->ic), TYPE_BCM2835_IC); + object_initialize_child(obj, "ic", &s->ic, TYPE_BCM2835_IC); /* SYS Timer */ - sysbus_init_child_obj(obj, "systimer", &s->systmr, sizeof(s->systmr), - TYPE_BCM2835_SYSTIMER); + object_initialize_child(obj, "systimer", &s->systmr, + TYPE_BCM2835_SYSTIMER); /* UART0 */ - sysbus_init_child_obj(obj, "uart0", &s->uart0, sizeof(s->uart0), - TYPE_PL011); + object_initialize_child(obj, "uart0", &s->uart0, TYPE_PL011); /* AUX / UART1 */ - sysbus_init_child_obj(obj, "aux", &s->aux, sizeof(s->aux), - TYPE_BCM2835_AUX); + object_initialize_child(obj, "aux", &s->aux, TYPE_BCM2835_AUX); /* Mailboxes */ - sysbus_init_child_obj(obj, "mbox", &s->mboxes, sizeof(s->mboxes), - TYPE_BCM2835_MBOX); + object_initialize_child(obj, "mbox", &s->mboxes, TYPE_BCM2835_MBOX); object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr", OBJECT(&s->mbox_mr)); /* Framebuffer */ - sysbus_init_child_obj(obj, "fb", &s->fb, sizeof(s->fb), TYPE_BCM2835_FB); + object_initialize_child(obj, "fb", &s->fb, TYPE_BCM2835_FB); object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size"); object_property_add_const_link(OBJECT(&s->fb), "dma-mr", OBJECT(&s->gpu_bus_mr)); /* Property channel */ - sysbus_init_child_obj(obj, "property", &s->property, sizeof(s->property), - TYPE_BCM2835_PROPERTY); + object_initialize_child(obj, "property", &s->property, + TYPE_BCM2835_PROPERTY); object_property_add_alias(obj, "board-rev", OBJECT(&s->property), "board-rev"); @@ -93,31 +90,25 @@ static void bcm2835_peripherals_init(Object *obj) OBJECT(&s->gpu_bus_mr)); /* Random Number Generator */ - sysbus_init_child_obj(obj, "rng", &s->rng, sizeof(s->rng), - TYPE_BCM2835_RNG); + object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG); /* Extended Mass Media Controller */ - sysbus_init_child_obj(obj, "sdhci", &s->sdhci, sizeof(s->sdhci), - TYPE_SYSBUS_SDHCI); + object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI); /* SDHOST */ - sysbus_init_child_obj(obj, "sdhost", &s->sdhost, sizeof(s->sdhost), - TYPE_BCM2835_SDHOST); + object_initialize_child(obj, "sdhost", &s->sdhost, TYPE_BCM2835_SDHOST); /* DMA Channels */ - sysbus_init_child_obj(obj, "dma", &s->dma, sizeof(s->dma), - TYPE_BCM2835_DMA); + object_initialize_child(obj, "dma", &s->dma, TYPE_BCM2835_DMA); object_property_add_const_link(OBJECT(&s->dma), "dma-mr", OBJECT(&s->gpu_bus_mr)); /* Thermal */ - sysbus_init_child_obj(obj, "thermal", &s->thermal, sizeof(s->thermal), - TYPE_BCM2835_THERMAL); + object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL); /* GPIO */ - sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio), - TYPE_BCM2835_GPIO); + object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO); object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci", OBJECT(&s->sdhci.sdbus)); @@ -161,7 +152,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) } /* Interrupt Controller */ - object_property_set_bool(OBJECT(&s->ic), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->ic), &err); if (err) { error_propagate(errp, err); return; @@ -172,7 +163,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic)); /* Sys Timer */ - object_property_set_bool(OBJECT(&s->systmr), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->systmr), &err); if (err) { error_propagate(errp, err); return; @@ -185,7 +176,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) /* UART0 */ qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0)); - object_property_set_bool(OBJECT(&s->uart0), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->uart0), &err); if (err) { error_propagate(errp, err); return; @@ -200,7 +191,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) /* AUX / UART1 */ qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1)); - object_property_set_bool(OBJECT(&s->aux), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->aux), &err); if (err) { error_propagate(errp, err); return; @@ -213,7 +204,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) INTERRUPT_AUX)); /* Mailboxes */ - object_property_set_bool(OBJECT(&s->mboxes), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->mboxes), &err); if (err) { error_propagate(errp, err); return; @@ -239,7 +230,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) return; } - object_property_set_bool(OBJECT(&s->fb), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->fb), &err); if (err) { error_propagate(errp, err); return; @@ -251,7 +242,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB)); /* Property channel */ - object_property_set_bool(OBJECT(&s->property), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->property), &err); if (err) { error_propagate(errp, err); return; @@ -264,7 +255,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY)); /* Random Number Generator */ - object_property_set_bool(OBJECT(&s->rng), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->rng), &err); if (err) { error_propagate(errp, err); return; @@ -293,7 +284,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) return; } - object_property_set_bool(OBJECT(&s->sdhci), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), &err); if (err) { error_propagate(errp, err); return; @@ -306,7 +297,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) INTERRUPT_ARASANSDIO)); /* SDHOST */ - object_property_set_bool(OBJECT(&s->sdhost), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->sdhost), &err); if (err) { error_propagate(errp, err); return; @@ -319,7 +310,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) INTERRUPT_SDIO)); /* DMA Channels */ - object_property_set_bool(OBJECT(&s->dma), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->dma), &err); if (err) { error_propagate(errp, err); return; @@ -338,7 +329,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) } /* THERMAL */ - object_property_set_bool(OBJECT(&s->thermal), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->thermal), &err); if (err) { error_propagate(errp, err); return; @@ -347,7 +338,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0)); /* GPIO */ - object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gpio), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index 82cd1d2df8..39a63f2565 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -56,11 +56,10 @@ static void bcm2836_init(Object *obj) info->cpu_type); } - sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control), - TYPE_BCM2836_CONTROL); + object_initialize_child(obj, "control", &s->control, TYPE_BCM2836_CONTROL); - sysbus_init_child_obj(obj, "peripherals", &s->peripherals, - sizeof(s->peripherals), TYPE_BCM2835_PERIPHERALS); + object_initialize_child(obj, "peripherals", &s->peripherals, + TYPE_BCM2835_PERIPHERALS); object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals), "board-rev"); object_property_add_alias(obj, "vcram-size", OBJECT(&s->peripherals), @@ -87,7 +86,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) object_property_add_const_link(OBJECT(&s->peripherals), "ram", obj); - object_property_set_bool(OBJECT(&s->peripherals), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->peripherals), &err); if (err) { error_propagate(errp, err); return; @@ -100,7 +99,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) info->peri_base, 1); /* bcm2836 interrupt controller (and mailboxes, etc.) */ - object_property_set_bool(OBJECT(&s->control), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->control), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/arm/digic.c b/hw/arm/digic.c index 6153d5f108..13acd2cf6e 100644 --- a/hw/arm/digic.c +++ b/hw/arm/digic.c @@ -43,12 +43,10 @@ static void digic_init(Object *obj) char name[DIGIC_TIMER_NAME_MLEN]; snprintf(name, DIGIC_TIMER_NAME_MLEN, "timer[%d]", i); - sysbus_init_child_obj(obj, name, &s->timer[i], sizeof(s->timer[i]), - TYPE_DIGIC_TIMER); + object_initialize_child(obj, name, &s->timer[i], TYPE_DIGIC_TIMER); } - sysbus_init_child_obj(obj, "uart", &s->uart, sizeof(s->uart), - TYPE_DIGIC_UART); + object_initialize_child(obj, "uart", &s->uart, TYPE_DIGIC_UART); } static void digic_realize(DeviceState *dev, Error **errp) @@ -71,7 +69,7 @@ static void digic_realize(DeviceState *dev, Error **errp) } for (i = 0; i < DIGIC4_NB_TIMERS; i++) { - object_property_set_bool(OBJECT(&s->timer[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->timer[i]), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -82,7 +80,7 @@ static void digic_realize(DeviceState *dev, Error **errp) } qdev_prop_set_chr(DEVICE(&s->uart), "chardev", serial_hd(0)); - object_property_set_bool(OBJECT(&s->uart), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->uart), &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index d8340e3527..d2c4970074 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -40,52 +40,43 @@ static void fsl_imx25_init(Object *obj) object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm926")); - sysbus_init_child_obj(obj, "avic", &s->avic, sizeof(s->avic), - TYPE_IMX_AVIC); + object_initialize_child(obj, "avic", &s->avic, TYPE_IMX_AVIC); - sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX25_CCM); + object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX25_CCM); for (i = 0; i < FSL_IMX25_NUM_UARTS; i++) { - sysbus_init_child_obj(obj, "uart[*]", &s->uart[i], sizeof(s->uart[i]), - TYPE_IMX_SERIAL); + object_initialize_child(obj, "uart[*]", &s->uart[i], TYPE_IMX_SERIAL); } for (i = 0; i < FSL_IMX25_NUM_GPTS; i++) { - sysbus_init_child_obj(obj, "gpt[*]", &s->gpt[i], sizeof(s->gpt[i]), - TYPE_IMX25_GPT); + object_initialize_child(obj, "gpt[*]", &s->gpt[i], TYPE_IMX25_GPT); } for (i = 0; i < FSL_IMX25_NUM_EPITS; i++) { - sysbus_init_child_obj(obj, "epit[*]", &s->epit[i], sizeof(s->epit[i]), - TYPE_IMX_EPIT); + object_initialize_child(obj, "epit[*]", &s->epit[i], TYPE_IMX_EPIT); } - sysbus_init_child_obj(obj, "fec", &s->fec, sizeof(s->fec), TYPE_IMX_FEC); + object_initialize_child(obj, "fec", &s->fec, TYPE_IMX_FEC); - sysbus_init_child_obj(obj, "rngc", &s->rngc, sizeof(s->rngc), - TYPE_IMX_RNGC); + object_initialize_child(obj, "rngc", &s->rngc, TYPE_IMX_RNGC); for (i = 0; i < FSL_IMX25_NUM_I2CS; i++) { - sysbus_init_child_obj(obj, "i2c[*]", &s->i2c[i], sizeof(s->i2c[i]), - TYPE_IMX_I2C); + object_initialize_child(obj, "i2c[*]", &s->i2c[i], TYPE_IMX_I2C); } for (i = 0; i < FSL_IMX25_NUM_GPIOS; i++) { - sysbus_init_child_obj(obj, "gpio[*]", &s->gpio[i], sizeof(s->gpio[i]), - TYPE_IMX_GPIO); + object_initialize_child(obj, "gpio[*]", &s->gpio[i], TYPE_IMX_GPIO); } for (i = 0; i < FSL_IMX25_NUM_ESDHCS; i++) { - sysbus_init_child_obj(obj, "sdhc[*]", &s->esdhc[i], sizeof(s->esdhc[i]), - TYPE_IMX_USDHC); + object_initialize_child(obj, "sdhc[*]", &s->esdhc[i], TYPE_IMX_USDHC); } for (i = 0; i < FSL_IMX25_NUM_USBS; i++) { - sysbus_init_child_obj(obj, "usb[*]", &s->usb[i], sizeof(s->usb[i]), - TYPE_CHIPIDEA); + object_initialize_child(obj, "usb[*]", &s->usb[i], TYPE_CHIPIDEA); } - sysbus_init_child_obj(obj, "wdt", &s->wdt, sizeof(s->wdt), TYPE_IMX2_WDT); + object_initialize_child(obj, "wdt", &s->wdt, TYPE_IMX2_WDT); } static void fsl_imx25_realize(DeviceState *dev, Error **errp) @@ -100,7 +91,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) return; } - object_property_set_bool(OBJECT(&s->avic), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->avic), &err); if (err) { error_propagate(errp, err); return; @@ -111,7 +102,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 1, qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ)); - object_property_set_bool(OBJECT(&s->ccm), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->ccm), &err); if (err) { error_propagate(errp, err); return; @@ -133,7 +124,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i)); - object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->uart[i]), &err); if (err) { error_propagate(errp, err); return; @@ -158,7 +149,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) s->gpt[i].ccm = IMX_CCM(&s->ccm); - object_property_set_bool(OBJECT(&s->gpt[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), &err); if (err) { error_propagate(errp, err); return; @@ -181,7 +172,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) s->epit[i].ccm = IMX_CCM(&s->ccm); - object_property_set_bool(OBJECT(&s->epit[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), &err); if (err) { error_propagate(errp, err); return; @@ -194,7 +185,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) qdev_set_nic_properties(DEVICE(&s->fec), &nd_table[0]); - object_property_set_bool(OBJECT(&s->fec), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->fec), &err); if (err) { error_propagate(errp, err); return; @@ -203,7 +194,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->fec), 0, qdev_get_gpio_in(DEVICE(&s->avic), FSL_IMX25_FEC_IRQ)); - object_property_set_bool(OBJECT(&s->rngc), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->rngc), &err); if (err) { error_propagate(errp, err); return; @@ -223,7 +214,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) { FSL_IMX25_I2C3_ADDR, FSL_IMX25_I2C3_IRQ } }; - object_property_set_bool(OBJECT(&s->i2c[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->i2c[i]), &err); if (err) { error_propagate(errp, err); return; @@ -246,7 +237,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) { FSL_IMX25_GPIO4_ADDR, FSL_IMX25_GPIO4_IRQ } }; - object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), &err); if (err) { error_propagate(errp, err); return; @@ -272,7 +263,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) &err); object_property_set_uint(OBJECT(&s->esdhc[i]), IMX25_ESDHC_CAPABILITIES, "capareg", &err); - object_property_set_bool(OBJECT(&s->esdhc[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->esdhc[i]), &err); if (err) { error_propagate(errp, err); return; @@ -293,8 +284,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) { FSL_IMX25_USB2_ADDR, FSL_IMX25_USB2_IRQ }, }; - object_property_set_bool(OBJECT(&s->usb[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->usb[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, usb_table[i].addr); sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0, qdev_get_gpio_in(DEVICE(&s->avic), @@ -304,7 +294,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) /* Watchdog */ object_property_set_bool(OBJECT(&s->wdt), true, "pretimeout-support", &error_abort); - object_property_set_bool(OBJECT(&s->wdt), true, "realized", &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->wdt), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt), 0, FSL_IMX25_WDT_ADDR); sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt), 0, qdev_get_gpio_in(DEVICE(&s->avic), diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index 54eec89701..08236c3230 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -35,34 +35,29 @@ static void fsl_imx31_init(Object *obj) object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm1136")); - sysbus_init_child_obj(obj, "avic", &s->avic, sizeof(s->avic), - TYPE_IMX_AVIC); + object_initialize_child(obj, "avic", &s->avic, TYPE_IMX_AVIC); - sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX31_CCM); + object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX31_CCM); for (i = 0; i < FSL_IMX31_NUM_UARTS; i++) { - sysbus_init_child_obj(obj, "uart[*]", &s->uart[i], sizeof(s->uart[i]), - TYPE_IMX_SERIAL); + object_initialize_child(obj, "uart[*]", &s->uart[i], TYPE_IMX_SERIAL); } - sysbus_init_child_obj(obj, "gpt", &s->gpt, sizeof(s->gpt), TYPE_IMX31_GPT); + object_initialize_child(obj, "gpt", &s->gpt, TYPE_IMX31_GPT); for (i = 0; i < FSL_IMX31_NUM_EPITS; i++) { - sysbus_init_child_obj(obj, "epit[*]", &s->epit[i], sizeof(s->epit[i]), - TYPE_IMX_EPIT); + object_initialize_child(obj, "epit[*]", &s->epit[i], TYPE_IMX_EPIT); } for (i = 0; i < FSL_IMX31_NUM_I2CS; i++) { - sysbus_init_child_obj(obj, "i2c[*]", &s->i2c[i], sizeof(s->i2c[i]), - TYPE_IMX_I2C); + object_initialize_child(obj, "i2c[*]", &s->i2c[i], TYPE_IMX_I2C); } for (i = 0; i < FSL_IMX31_NUM_GPIOS; i++) { - sysbus_init_child_obj(obj, "gpio[*]", &s->gpio[i], sizeof(s->gpio[i]), - TYPE_IMX_GPIO); + object_initialize_child(obj, "gpio[*]", &s->gpio[i], TYPE_IMX_GPIO); } - sysbus_init_child_obj(obj, "wdt", &s->wdt, sizeof(s->wdt), TYPE_IMX2_WDT); + object_initialize_child(obj, "wdt", &s->wdt, TYPE_IMX2_WDT); } static void fsl_imx31_realize(DeviceState *dev, Error **errp) @@ -77,7 +72,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) return; } - object_property_set_bool(OBJECT(&s->avic), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->avic), &err); if (err) { error_propagate(errp, err); return; @@ -88,7 +83,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 1, qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ)); - object_property_set_bool(OBJECT(&s->ccm), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->ccm), &err); if (err) { error_propagate(errp, err); return; @@ -107,7 +102,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i)); - object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->uart[i]), &err); if (err) { error_propagate(errp, err); return; @@ -121,7 +116,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) s->gpt.ccm = IMX_CCM(&s->ccm); - object_property_set_bool(OBJECT(&s->gpt), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gpt), &err); if (err) { error_propagate(errp, err); return; @@ -143,7 +138,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) s->epit[i].ccm = IMX_CCM(&s->ccm); - object_property_set_bool(OBJECT(&s->epit[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), &err); if (err) { error_propagate(errp, err); return; @@ -167,7 +162,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) }; /* Initialize the I2C */ - object_property_set_bool(OBJECT(&s->i2c[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->i2c[i]), &err); if (err) { error_propagate(errp, err); return; @@ -193,7 +188,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) object_property_set_bool(OBJECT(&s->gpio[i]), false, "has-edge-sel", &error_abort); - object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), &err); if (err) { error_propagate(errp, err); return; @@ -206,7 +201,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) } /* Watchdog */ - object_property_set_bool(OBJECT(&s->wdt), true, "realized", &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->wdt), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt), 0, FSL_IMX31_WDT_ADDR); /* On a real system, the first 16k is a `secure boot rom' */ diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 88fbba84a4..33b1be4000 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -47,69 +47,59 @@ static void fsl_imx6_init(Object *obj) ARM_CPU_TYPE_NAME("cortex-a9")); } - sysbus_init_child_obj(obj, "a9mpcore", &s->a9mpcore, sizeof(s->a9mpcore), - TYPE_A9MPCORE_PRIV); + object_initialize_child(obj, "a9mpcore", &s->a9mpcore, TYPE_A9MPCORE_PRIV); - sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX6_CCM); + object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX6_CCM); - sysbus_init_child_obj(obj, "src", &s->src, sizeof(s->src), TYPE_IMX6_SRC); + object_initialize_child(obj, "src", &s->src, TYPE_IMX6_SRC); for (i = 0; i < FSL_IMX6_NUM_UARTS; i++) { snprintf(name, NAME_SIZE, "uart%d", i + 1); - sysbus_init_child_obj(obj, name, &s->uart[i], sizeof(s->uart[i]), - TYPE_IMX_SERIAL); + object_initialize_child(obj, name, &s->uart[i], TYPE_IMX_SERIAL); } - sysbus_init_child_obj(obj, "gpt", &s->gpt, sizeof(s->gpt), TYPE_IMX6_GPT); + object_initialize_child(obj, "gpt", &s->gpt, TYPE_IMX6_GPT); for (i = 0; i < FSL_IMX6_NUM_EPITS; i++) { snprintf(name, NAME_SIZE, "epit%d", i + 1); - sysbus_init_child_obj(obj, name, &s->epit[i], sizeof(s->epit[i]), - TYPE_IMX_EPIT); + object_initialize_child(obj, name, &s->epit[i], TYPE_IMX_EPIT); } for (i = 0; i < FSL_IMX6_NUM_I2CS; i++) { snprintf(name, NAME_SIZE, "i2c%d", i + 1); - sysbus_init_child_obj(obj, name, &s->i2c[i], sizeof(s->i2c[i]), - TYPE_IMX_I2C); + object_initialize_child(obj, name, &s->i2c[i], TYPE_IMX_I2C); } for (i = 0; i < FSL_IMX6_NUM_GPIOS; i++) { snprintf(name, NAME_SIZE, "gpio%d", i + 1); - sysbus_init_child_obj(obj, name, &s->gpio[i], sizeof(s->gpio[i]), - TYPE_IMX_GPIO); + object_initialize_child(obj, name, &s->gpio[i], TYPE_IMX_GPIO); } for (i = 0; i < FSL_IMX6_NUM_ESDHCS; i++) { snprintf(name, NAME_SIZE, "sdhc%d", i + 1); - sysbus_init_child_obj(obj, name, &s->esdhc[i], sizeof(s->esdhc[i]), - TYPE_IMX_USDHC); + object_initialize_child(obj, name, &s->esdhc[i], TYPE_IMX_USDHC); } for (i = 0; i < FSL_IMX6_NUM_USB_PHYS; i++) { snprintf(name, NAME_SIZE, "usbphy%d", i); - sysbus_init_child_obj(obj, name, &s->usbphy[i], sizeof(s->usbphy[i]), - TYPE_IMX_USBPHY); + object_initialize_child(obj, name, &s->usbphy[i], TYPE_IMX_USBPHY); } for (i = 0; i < FSL_IMX6_NUM_USBS; i++) { snprintf(name, NAME_SIZE, "usb%d", i); - sysbus_init_child_obj(obj, name, &s->usb[i], sizeof(s->usb[i]), - TYPE_CHIPIDEA); + object_initialize_child(obj, name, &s->usb[i], TYPE_CHIPIDEA); } for (i = 0; i < FSL_IMX6_NUM_ECSPIS; i++) { snprintf(name, NAME_SIZE, "spi%d", i + 1); - sysbus_init_child_obj(obj, name, &s->spi[i], sizeof(s->spi[i]), - TYPE_IMX_SPI); + object_initialize_child(obj, name, &s->spi[i], TYPE_IMX_SPI); } for (i = 0; i < FSL_IMX6_NUM_WDTS; i++) { snprintf(name, NAME_SIZE, "wdt%d", i); - sysbus_init_child_obj(obj, name, &s->wdt[i], sizeof(s->wdt[i]), - TYPE_IMX2_WDT); + object_initialize_child(obj, name, &s->wdt[i], TYPE_IMX2_WDT); } - sysbus_init_child_obj(obj, "eth", &s->eth, sizeof(s->eth), TYPE_IMX_ENET); + object_initialize_child(obj, "eth", &s->eth, TYPE_IMX_ENET); } static void fsl_imx6_realize(DeviceState *dev, Error **errp) @@ -154,7 +144,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) FSL_IMX6_MAX_IRQ + GIC_INTERNAL, "num-irq", &error_abort); - object_property_set_bool(OBJECT(&s->a9mpcore), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->a9mpcore), &err); if (err) { error_propagate(errp, err); return; @@ -168,14 +158,14 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) qdev_get_gpio_in(DEVICE(&s->cpu[i]), ARM_CPU_FIQ)); } - object_property_set_bool(OBJECT(&s->ccm), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->ccm), &err); if (err) { error_propagate(errp, err); return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccm), 0, FSL_IMX6_CCM_ADDR); - object_property_set_bool(OBJECT(&s->src), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->src), &err); if (err) { error_propagate(errp, err); return; @@ -197,7 +187,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i)); - object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->uart[i]), &err); if (err) { error_propagate(errp, err); return; @@ -211,7 +201,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) s->gpt.ccm = IMX_CCM(&s->ccm); - object_property_set_bool(OBJECT(&s->gpt), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gpt), &err); if (err) { error_propagate(errp, err); return; @@ -234,7 +224,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) s->epit[i].ccm = IMX_CCM(&s->ccm); - object_property_set_bool(OBJECT(&s->epit[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), &err); if (err) { error_propagate(errp, err); return; @@ -257,7 +247,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) { FSL_IMX6_I2C3_ADDR, FSL_IMX6_I2C3_IRQ } }; - object_property_set_bool(OBJECT(&s->i2c[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->i2c[i]), &err); if (err) { error_propagate(errp, err); return; @@ -317,7 +307,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) &error_abort); object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-upper-pin-irq", &error_abort); - object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), &err); if (err) { error_propagate(errp, err); return; @@ -349,7 +339,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) &err); object_property_set_uint(OBJECT(&s->esdhc[i]), IMX6_ESDHC_CAPABILITIES, "capareg", &err); - object_property_set_bool(OBJECT(&s->esdhc[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->esdhc[i]), &err); if (err) { error_propagate(errp, err); return; @@ -362,8 +352,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) /* USB */ for (i = 0; i < FSL_IMX6_NUM_USB_PHYS; i++) { - object_property_set_bool(OBJECT(&s->usbphy[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->usbphy[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->usbphy[i]), 0, FSL_IMX6_USBPHY1_ADDR + i * 0x1000); } @@ -375,8 +364,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) FSL_IMX6_USB_HOST3_IRQ, }; - object_property_set_bool(OBJECT(&s->usb[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->usb[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, FSL_IMX6_USBOH3_USB_ADDR + i * 0x200); sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0, @@ -398,7 +386,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) }; /* Initialize the SPI */ - object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), &err); if (err) { error_propagate(errp, err); return; @@ -411,7 +399,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) } qdev_set_nic_properties(DEVICE(&s->eth), &nd_table[0]); - object_property_set_bool(OBJECT(&s->eth), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->eth), &err); if (err) { error_propagate(errp, err); return; @@ -439,8 +427,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) object_property_set_bool(OBJECT(&s->wdt[i]), true, "pretimeout-support", &error_abort); - object_property_set_bool(OBJECT(&s->wdt[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, FSL_IMX6_WDOGn_ADDR[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt[i]), 0, diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index 491f1b7f73..72142cc2b6 100644 --- a/hw/arm/fsl-imx6ul.c +++ b/hw/arm/fsl-imx6ul.c @@ -40,44 +40,40 @@ static void fsl_imx6ul_init(Object *obj) /* * A7MPCORE */ - sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore, sizeof(s->a7mpcore), - TYPE_A15MPCORE_PRIV); + object_initialize_child(obj, "a7mpcore", &s->a7mpcore, + TYPE_A15MPCORE_PRIV); /* * CCM */ - sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX6UL_CCM); + object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX6UL_CCM); /* * SRC */ - sysbus_init_child_obj(obj, "src", &s->src, sizeof(s->src), TYPE_IMX6_SRC); + object_initialize_child(obj, "src", &s->src, TYPE_IMX6_SRC); /* * GPCv2 */ - sysbus_init_child_obj(obj, "gpcv2", &s->gpcv2, sizeof(s->gpcv2), - TYPE_IMX_GPCV2); + object_initialize_child(obj, "gpcv2", &s->gpcv2, TYPE_IMX_GPCV2); /* * SNVS */ - sysbus_init_child_obj(obj, "snvs", &s->snvs, sizeof(s->snvs), - TYPE_IMX7_SNVS); + object_initialize_child(obj, "snvs", &s->snvs, TYPE_IMX7_SNVS); /* * GPR */ - sysbus_init_child_obj(obj, "gpr", &s->gpr, sizeof(s->gpr), - TYPE_IMX7_GPR); + object_initialize_child(obj, "gpr", &s->gpr, TYPE_IMX7_GPR); /* * GPIOs 1 to 5 */ for (i = 0; i < FSL_IMX6UL_NUM_GPIOS; i++) { snprintf(name, NAME_SIZE, "gpio%d", i); - sysbus_init_child_obj(obj, name, &s->gpio[i], sizeof(s->gpio[i]), - TYPE_IMX_GPIO); + object_initialize_child(obj, name, &s->gpio[i], TYPE_IMX_GPIO); } /* @@ -85,8 +81,7 @@ static void fsl_imx6ul_init(Object *obj) */ for (i = 0; i < FSL_IMX6UL_NUM_GPTS; i++) { snprintf(name, NAME_SIZE, "gpt%d", i); - sysbus_init_child_obj(obj, name, &s->gpt[i], sizeof(s->gpt[i]), - TYPE_IMX7_GPT); + object_initialize_child(obj, name, &s->gpt[i], TYPE_IMX7_GPT); } /* @@ -94,8 +89,7 @@ static void fsl_imx6ul_init(Object *obj) */ for (i = 0; i < FSL_IMX6UL_NUM_EPITS; i++) { snprintf(name, NAME_SIZE, "epit%d", i + 1); - sysbus_init_child_obj(obj, name, &s->epit[i], sizeof(s->epit[i]), - TYPE_IMX_EPIT); + object_initialize_child(obj, name, &s->epit[i], TYPE_IMX_EPIT); } /* @@ -103,8 +97,7 @@ static void fsl_imx6ul_init(Object *obj) */ for (i = 0; i < FSL_IMX6UL_NUM_ECSPIS; i++) { snprintf(name, NAME_SIZE, "spi%d", i + 1); - sysbus_init_child_obj(obj, name, &s->spi[i], sizeof(s->spi[i]), - TYPE_IMX_SPI); + object_initialize_child(obj, name, &s->spi[i], TYPE_IMX_SPI); } /* @@ -112,8 +105,7 @@ static void fsl_imx6ul_init(Object *obj) */ for (i = 0; i < FSL_IMX6UL_NUM_I2CS; i++) { snprintf(name, NAME_SIZE, "i2c%d", i + 1); - sysbus_init_child_obj(obj, name, &s->i2c[i], sizeof(s->i2c[i]), - TYPE_IMX_I2C); + object_initialize_child(obj, name, &s->i2c[i], TYPE_IMX_I2C); } /* @@ -121,8 +113,7 @@ static void fsl_imx6ul_init(Object *obj) */ for (i = 0; i < FSL_IMX6UL_NUM_UARTS; i++) { snprintf(name, NAME_SIZE, "uart%d", i); - sysbus_init_child_obj(obj, name, &s->uart[i], sizeof(s->uart[i]), - TYPE_IMX_SERIAL); + object_initialize_child(obj, name, &s->uart[i], TYPE_IMX_SERIAL); } /* @@ -130,20 +121,17 @@ static void fsl_imx6ul_init(Object *obj) */ for (i = 0; i < FSL_IMX6UL_NUM_ETHS; i++) { snprintf(name, NAME_SIZE, "eth%d", i); - sysbus_init_child_obj(obj, name, &s->eth[i], sizeof(s->eth[i]), - TYPE_IMX_ENET); + object_initialize_child(obj, name, &s->eth[i], TYPE_IMX_ENET); } /* USB */ for (i = 0; i < FSL_IMX6UL_NUM_USB_PHYS; i++) { snprintf(name, NAME_SIZE, "usbphy%d", i); - sysbus_init_child_obj(obj, name, &s->usbphy[i], sizeof(s->usbphy[i]), - TYPE_IMX_USBPHY); + object_initialize_child(obj, name, &s->usbphy[i], TYPE_IMX_USBPHY); } for (i = 0; i < FSL_IMX6UL_NUM_USBS; i++) { snprintf(name, NAME_SIZE, "usb%d", i); - sysbus_init_child_obj(obj, name, &s->usb[i], sizeof(s->usb[i]), - TYPE_CHIPIDEA); + object_initialize_child(obj, name, &s->usb[i], TYPE_CHIPIDEA); } /* @@ -151,8 +139,7 @@ static void fsl_imx6ul_init(Object *obj) */ for (i = 0; i < FSL_IMX6UL_NUM_USDHCS; i++) { snprintf(name, NAME_SIZE, "usdhc%d", i); - sysbus_init_child_obj(obj, name, &s->usdhc[i], sizeof(s->usdhc[i]), - TYPE_IMX_USDHC); + object_initialize_child(obj, name, &s->usdhc[i], TYPE_IMX_USDHC); } /* @@ -160,8 +147,7 @@ static void fsl_imx6ul_init(Object *obj) */ for (i = 0; i < FSL_IMX6UL_NUM_WDTS; i++) { snprintf(name, NAME_SIZE, "wdt%d", i); - sysbus_init_child_obj(obj, name, &s->wdt[i], sizeof(s->wdt[i]), - TYPE_IMX2_WDT); + object_initialize_child(obj, name, &s->wdt[i], TYPE_IMX2_WDT); } } @@ -192,8 +178,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) object_property_set_int(OBJECT(&s->a7mpcore), FSL_IMX6UL_MAX_IRQ + GIC_INTERNAL, "num-irq", &error_abort); - object_property_set_bool(OBJECT(&s->a7mpcore), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, FSL_IMX6UL_A7MPCORE_ADDR); sbd = SYS_BUS_DEVICE(&s->a7mpcore); @@ -225,8 +210,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) }; s->gpt[i].ccm = IMX_CCM(&s->ccm); - object_property_set_bool(OBJECT(&s->gpt[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0, FSL_IMX6UL_GPTn_ADDR[i]); @@ -251,8 +235,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) }; s->epit[i].ccm = IMX_CCM(&s->ccm); - object_property_set_bool(OBJECT(&s->epit[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->epit[i]), 0, FSL_IMX6UL_EPITn_ADDR[i]); @@ -290,8 +273,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) FSL_IMX6UL_GPIO5_HIGH_IRQ, }; - object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, FSL_IMX6UL_GPIOn_ADDR[i]); @@ -321,20 +303,19 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) /* * CCM */ - object_property_set_bool(OBJECT(&s->ccm), true, "realized", &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->ccm), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccm), 0, FSL_IMX6UL_CCM_ADDR); /* * SRC */ - object_property_set_bool(OBJECT(&s->src), true, "realized", &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->src), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->src), 0, FSL_IMX6UL_SRC_ADDR); /* * GPCv2 */ - object_property_set_bool(OBJECT(&s->gpcv2), true, - "realized", &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->gpcv2), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpcv2), 0, FSL_IMX6UL_GPC_ADDR); /* Initialize all ECSPI */ @@ -354,8 +335,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) }; /* Initialize the SPI */ - object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, FSL_IMX6UL_SPIn_ADDR[i]); @@ -383,8 +363,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) FSL_IMX6UL_I2C4_IRQ, }; - object_property_set_bool(OBJECT(&s->i2c[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->i2c[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, FSL_IMX6UL_I2Cn_ADDR[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0, @@ -420,8 +399,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i)); - object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->uart[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, FSL_IMX6UL_UARTn_ADDR[i]); @@ -454,8 +432,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) FSL_IMX6UL_ETH_NUM_TX_RINGS, "tx-ring-num", &error_abort); qdev_set_nic_properties(DEVICE(&s->eth[i]), &nd_table[i]); - object_property_set_bool(OBJECT(&s->eth[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->eth[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->eth[i]), 0, FSL_IMX6UL_ENETn_ADDR[i]); @@ -471,8 +448,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) /* USB */ for (i = 0; i < FSL_IMX6UL_NUM_USB_PHYS; i++) { - object_property_set_bool(OBJECT(&s->usbphy[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->usbphy[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->usbphy[i]), 0, FSL_IMX6UL_USBPHY1_ADDR + i * 0x1000); } @@ -482,8 +458,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) FSL_IMX6UL_USB1_IRQ, FSL_IMX6UL_USB2_IRQ, }; - object_property_set_bool(OBJECT(&s->usb[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->usb[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, FSL_IMX6UL_USBO2_USB_ADDR + i * 0x200); sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0, @@ -505,8 +480,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) FSL_IMX6UL_USDHC2_IRQ, }; - object_property_set_bool(OBJECT(&s->usdhc[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->usdhc[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->usdhc[i]), 0, FSL_IMX6UL_USDHCn_ADDR[i]); @@ -519,7 +493,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) /* * SNVS */ - object_property_set_bool(OBJECT(&s->snvs), true, "realized", &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->snvs), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->snvs), 0, FSL_IMX6UL_SNVS_HP_ADDR); /* @@ -539,8 +513,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) object_property_set_bool(OBJECT(&s->wdt[i]), true, "pretimeout-support", &error_abort); - object_property_set_bool(OBJECT(&s->wdt[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, FSL_IMX6UL_WDOGn_ADDR[i]); @@ -552,8 +525,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) /* * GPR */ - object_property_set_bool(OBJECT(&s->gpr), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->gpr), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpr), 0, FSL_IMX6UL_IOMUXC_GPR_ADDR); /* diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index 5cf2b7a808..aa7051307d 100644 --- a/hw/arm/fsl-imx7.c +++ b/hw/arm/fsl-imx7.c @@ -45,16 +45,15 @@ static void fsl_imx7_init(Object *obj) /* * A7MPCORE */ - sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore, sizeof(s->a7mpcore), - TYPE_A15MPCORE_PRIV); + object_initialize_child(obj, "a7mpcore", &s->a7mpcore, + TYPE_A15MPCORE_PRIV); /* * GPIOs 1 to 7 */ for (i = 0; i < FSL_IMX7_NUM_GPIOS; i++) { snprintf(name, NAME_SIZE, "gpio%d", i); - sysbus_init_child_obj(obj, name, &s->gpio[i], sizeof(s->gpio[i]), - TYPE_IMX_GPIO); + object_initialize_child(obj, name, &s->gpio[i], TYPE_IMX_GPIO); } /* @@ -62,38 +61,33 @@ static void fsl_imx7_init(Object *obj) */ for (i = 0; i < FSL_IMX7_NUM_GPTS; i++) { snprintf(name, NAME_SIZE, "gpt%d", i); - sysbus_init_child_obj(obj, name, &s->gpt[i], sizeof(s->gpt[i]), - TYPE_IMX7_GPT); + object_initialize_child(obj, name, &s->gpt[i], TYPE_IMX7_GPT); } /* * CCM */ - sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX7_CCM); + object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX7_CCM); /* * Analog */ - sysbus_init_child_obj(obj, "analog", &s->analog, sizeof(s->analog), - TYPE_IMX7_ANALOG); + object_initialize_child(obj, "analog", &s->analog, TYPE_IMX7_ANALOG); /* * GPCv2 */ - sysbus_init_child_obj(obj, "gpcv2", &s->gpcv2, sizeof(s->gpcv2), - TYPE_IMX_GPCV2); + object_initialize_child(obj, "gpcv2", &s->gpcv2, TYPE_IMX_GPCV2); for (i = 0; i < FSL_IMX7_NUM_ECSPIS; i++) { snprintf(name, NAME_SIZE, "spi%d", i + 1); - sysbus_init_child_obj(obj, name, &s->spi[i], sizeof(s->spi[i]), - TYPE_IMX_SPI); + object_initialize_child(obj, name, &s->spi[i], TYPE_IMX_SPI); } for (i = 0; i < FSL_IMX7_NUM_I2CS; i++) { snprintf(name, NAME_SIZE, "i2c%d", i + 1); - sysbus_init_child_obj(obj, name, &s->i2c[i], sizeof(s->i2c[i]), - TYPE_IMX_I2C); + object_initialize_child(obj, name, &s->i2c[i], TYPE_IMX_I2C); } /* @@ -101,8 +95,7 @@ static void fsl_imx7_init(Object *obj) */ for (i = 0; i < FSL_IMX7_NUM_UARTS; i++) { snprintf(name, NAME_SIZE, "uart%d", i); - sysbus_init_child_obj(obj, name, &s->uart[i], sizeof(s->uart[i]), - TYPE_IMX_SERIAL); + object_initialize_child(obj, name, &s->uart[i], TYPE_IMX_SERIAL); } /* @@ -110,8 +103,7 @@ static void fsl_imx7_init(Object *obj) */ for (i = 0; i < FSL_IMX7_NUM_ETHS; i++) { snprintf(name, NAME_SIZE, "eth%d", i); - sysbus_init_child_obj(obj, name, &s->eth[i], sizeof(s->eth[i]), - TYPE_IMX_ENET); + object_initialize_child(obj, name, &s->eth[i], TYPE_IMX_ENET); } /* @@ -119,37 +111,32 @@ static void fsl_imx7_init(Object *obj) */ for (i = 0; i < FSL_IMX7_NUM_USDHCS; i++) { snprintf(name, NAME_SIZE, "usdhc%d", i); - sysbus_init_child_obj(obj, name, &s->usdhc[i], sizeof(s->usdhc[i]), - TYPE_IMX_USDHC); + object_initialize_child(obj, name, &s->usdhc[i], TYPE_IMX_USDHC); } /* * SNVS */ - sysbus_init_child_obj(obj, "snvs", &s->snvs, sizeof(s->snvs), - TYPE_IMX7_SNVS); + object_initialize_child(obj, "snvs", &s->snvs, TYPE_IMX7_SNVS); /* * Watchdog */ for (i = 0; i < FSL_IMX7_NUM_WDTS; i++) { snprintf(name, NAME_SIZE, "wdt%d", i); - sysbus_init_child_obj(obj, name, &s->wdt[i], sizeof(s->wdt[i]), - TYPE_IMX2_WDT); + object_initialize_child(obj, name, &s->wdt[i], TYPE_IMX2_WDT); } /* * GPR */ - sysbus_init_child_obj(obj, "gpr", &s->gpr, sizeof(s->gpr), TYPE_IMX7_GPR); + object_initialize_child(obj, "gpr", &s->gpr, TYPE_IMX7_GPR); - sysbus_init_child_obj(obj, "pcie", &s->pcie, sizeof(s->pcie), - TYPE_DESIGNWARE_PCIE_HOST); + object_initialize_child(obj, "pcie", &s->pcie, TYPE_DESIGNWARE_PCIE_HOST); for (i = 0; i < FSL_IMX7_NUM_USBS; i++) { snprintf(name, NAME_SIZE, "usb%d", i); - sysbus_init_child_obj(obj, name, &s->usb[i], sizeof(s->usb[i]), - TYPE_CHIPIDEA); + object_initialize_child(obj, name, &s->usb[i], TYPE_CHIPIDEA); } } @@ -199,8 +186,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) FSL_IMX7_MAX_IRQ + GIC_INTERNAL, "num-irq", &error_abort); - object_property_set_bool(OBJECT(&s->a7mpcore), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, FSL_IMX7_A7MPCORE_ADDR); for (i = 0; i < smp_cpus; i++) { @@ -235,8 +221,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) }; s->gpt[i].ccm = IMX_CCM(&s->ccm); - object_property_set_bool(OBJECT(&s->gpt[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0, FSL_IMX7_GPTn_ADDR[i]); } @@ -251,8 +236,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) FSL_IMX7_GPIO7_ADDR, }; - object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, FSL_IMX7_GPIOn_ADDR[i]); } @@ -273,21 +257,19 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) /* * CCM */ - object_property_set_bool(OBJECT(&s->ccm), true, "realized", &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->ccm), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccm), 0, FSL_IMX7_CCM_ADDR); /* * Analog */ - object_property_set_bool(OBJECT(&s->analog), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->analog), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->analog), 0, FSL_IMX7_ANALOG_ADDR); /* * GPCv2 */ - object_property_set_bool(OBJECT(&s->gpcv2), true, - "realized", &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->gpcv2), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpcv2), 0, FSL_IMX7_GPC_ADDR); /* Initialize all ECSPI */ @@ -307,8 +289,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) }; /* Initialize the SPI */ - object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, FSL_IMX7_SPIn_ADDR[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0, @@ -331,8 +312,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) FSL_IMX7_I2C4_IRQ, }; - object_property_set_bool(OBJECT(&s->i2c[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->i2c[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, FSL_IMX7_I2Cn_ADDR[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0, @@ -367,8 +347,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i)); - object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->uart[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, FSL_IMX7_UARTn_ADDR[i]); @@ -388,8 +367,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) object_property_set_uint(OBJECT(&s->eth[i]), FSL_IMX7_ETH_NUM_TX_RINGS, "tx-ring-num", &error_abort); qdev_set_nic_properties(DEVICE(&s->eth[i]), &nd_table[i]); - object_property_set_bool(OBJECT(&s->eth[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->eth[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->eth[i]), 0, FSL_IMX7_ENETn_ADDR[i]); @@ -415,8 +393,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) FSL_IMX7_USDHC3_IRQ, }; - object_property_set_bool(OBJECT(&s->usdhc[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->usdhc[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->usdhc[i]), 0, FSL_IMX7_USDHCn_ADDR[i]); @@ -428,7 +405,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) /* * SNVS */ - object_property_set_bool(OBJECT(&s->snvs), true, "realized", &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->snvs), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->snvs), 0, FSL_IMX7_SNVS_ADDR); /* @@ -455,8 +432,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) object_property_set_bool(OBJECT(&s->wdt[i]), true, "pretimeout-support", &error_abort); - object_property_set_bool(OBJECT(&s->wdt[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, FSL_IMX7_WDOGn_ADDR[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt[i]), 0, @@ -494,12 +470,10 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) create_unimplemented_device("ocotp", FSL_IMX7_OCOTP_ADDR, FSL_IMX7_OCOTP_SIZE); - object_property_set_bool(OBJECT(&s->gpr), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->gpr), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpr), 0, FSL_IMX7_GPR_ADDR); - object_property_set_bool(OBJECT(&s->pcie), true, - "realized", &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->pcie), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->pcie), 0, FSL_IMX7_PCIE_REG_ADDR); irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_PCI_INTA_IRQ); @@ -531,8 +505,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) FSL_IMX7_USB3_IRQ, }; - object_property_set_bool(OBJECT(&s->usb[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->usb[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, FSL_IMX7_USBn_ADDR[i]); diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c index f4579e5a08..3235c76194 100644 --- a/hw/arm/msf2-soc.c +++ b/hw/arm/msf2-soc.c @@ -71,22 +71,17 @@ static void m2sxxx_soc_initfn(Object *obj) MSF2State *s = MSF2_SOC(obj); int i; - sysbus_init_child_obj(obj, "armv7m", &s->armv7m, sizeof(s->armv7m), - TYPE_ARMV7M); + object_initialize_child(obj, "armv7m", &s->armv7m, TYPE_ARMV7M); - sysbus_init_child_obj(obj, "sysreg", &s->sysreg, sizeof(s->sysreg), - TYPE_MSF2_SYSREG); + object_initialize_child(obj, "sysreg", &s->sysreg, TYPE_MSF2_SYSREG); - sysbus_init_child_obj(obj, "timer", &s->timer, sizeof(s->timer), - TYPE_MSS_TIMER); + object_initialize_child(obj, "timer", &s->timer, TYPE_MSS_TIMER); for (i = 0; i < MSF2_NUM_SPIS; i++) { - sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]), - TYPE_MSS_SPI); + object_initialize_child(obj, "spi[*]", &s->spi[i], TYPE_MSS_SPI); } - sysbus_init_child_obj(obj, "emac", &s->emac, sizeof(s->emac), - TYPE_MSS_EMAC); + object_initialize_child(obj, "emac", &s->emac, TYPE_MSS_EMAC); if (nd_table[0].used) { qemu_check_nic_model(&nd_table[0], TYPE_MSS_EMAC); qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]); @@ -130,7 +125,7 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp) qdev_prop_set_bit(armv7m, "enable-bitband", true); object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory()), "memory", &error_abort); - object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->armv7m), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -158,7 +153,7 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp) dev = DEVICE(&s->timer); /* APB0 clock is the timer input clock */ qdev_prop_set_uint32(dev, "clock-frequency", s->m3clk / s->apb0div); - object_property_set_bool(OBJECT(&s->timer), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->timer), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -173,7 +168,7 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp) dev = DEVICE(&s->sysreg); qdev_prop_set_uint32(dev, "apb0divisor", s->apb0div); qdev_prop_set_uint32(dev, "apb1divisor", s->apb1div); - object_property_set_bool(OBJECT(&s->sysreg), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->sysreg), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -184,7 +179,7 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp) for (i = 0; i < MSF2_NUM_SPIS; i++) { gchar *bus_name; - object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -204,7 +199,7 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp) dev = DEVICE(&s->emac); object_property_set_link(OBJECT(&s->emac), OBJECT(get_system_memory()), "ahb-bus", &error_abort); - object_property_set_bool(OBJECT(&s->emac), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->emac), &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index c278827b09..5a8961ddbb 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -71,7 +71,7 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->cpu), &err); if (err) { error_propagate(errp, err); return; @@ -88,7 +88,7 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) memory_region_add_subregion(&s->container, NRF51_SRAM_BASE, &s->sram); /* UART */ - object_property_set_bool(OBJECT(&s->uart), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->uart), &err); if (err) { error_propagate(errp, err); return; @@ -100,7 +100,7 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) BASE_TO_IRQ(NRF51_UART_BASE))); /* RNG */ - object_property_set_bool(OBJECT(&s->rng), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->rng), &err); if (err) { error_propagate(errp, err); return; @@ -120,7 +120,7 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) return; } - object_property_set_bool(OBJECT(&s->nvm), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->nvm), &err); if (err) { error_propagate(errp, err); return; @@ -136,7 +136,7 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) memory_region_add_subregion_overlap(&s->container, NRF51_FLASH_BASE, mr, 0); /* GPIO */ - object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gpio), &err); if (err) { error_propagate(errp, err); return; @@ -155,7 +155,7 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(&s->timer[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->timer[i]), &err); if (err) { error_propagate(errp, err); return; @@ -189,27 +189,23 @@ static void nrf51_soc_init(Object *obj) memory_region_init(&s->container, obj, "nrf51-container", UINT64_MAX); - sysbus_init_child_obj(OBJECT(s), "armv6m", &s->cpu, sizeof(s->cpu), - TYPE_ARMV7M); + object_initialize_child(OBJECT(s), "armv6m", &s->cpu, TYPE_ARMV7M); qdev_prop_set_string(DEVICE(&s->cpu), "cpu-type", ARM_CPU_TYPE_NAME("cortex-m0")); qdev_prop_set_uint32(DEVICE(&s->cpu), "num-irq", 32); - sysbus_init_child_obj(obj, "uart", &s->uart, sizeof(s->uart), - TYPE_NRF51_UART); + object_initialize_child(obj, "uart", &s->uart, TYPE_NRF51_UART); object_property_add_alias(obj, "serial0", OBJECT(&s->uart), "chardev"); - sysbus_init_child_obj(obj, "rng", &s->rng, sizeof(s->rng), - TYPE_NRF51_RNG); + object_initialize_child(obj, "rng", &s->rng, TYPE_NRF51_RNG); - sysbus_init_child_obj(obj, "nvm", &s->nvm, sizeof(s->nvm), TYPE_NRF51_NVM); + object_initialize_child(obj, "nvm", &s->nvm, TYPE_NRF51_NVM); - sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio), - TYPE_NRF51_GPIO); + object_initialize_child(obj, "gpio", &s->gpio, TYPE_NRF51_GPIO); for (i = 0; i < NRF51_NUM_TIMERS; i++) { - sysbus_init_child_obj(obj, "timer[*]", &s->timer[i], - sizeof(s->timer[i]), TYPE_NRF51_TIMER); + object_initialize_child(obj, "timer[*]", &s->timer[i], + TYPE_NRF51_TIMER); } } diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index 118c342559..e2c3479702 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -51,32 +51,28 @@ static void stm32f205_soc_initfn(Object *obj) STM32F205State *s = STM32F205_SOC(obj); int i; - sysbus_init_child_obj(obj, "armv7m", &s->armv7m, sizeof(s->armv7m), - TYPE_ARMV7M); + object_initialize_child(obj, "armv7m", &s->armv7m, TYPE_ARMV7M); - sysbus_init_child_obj(obj, "syscfg", &s->syscfg, sizeof(s->syscfg), - TYPE_STM32F2XX_SYSCFG); + object_initialize_child(obj, "syscfg", &s->syscfg, TYPE_STM32F2XX_SYSCFG); for (i = 0; i < STM_NUM_USARTS; i++) { - sysbus_init_child_obj(obj, "usart[*]", &s->usart[i], - sizeof(s->usart[i]), TYPE_STM32F2XX_USART); + object_initialize_child(obj, "usart[*]", &s->usart[i], + TYPE_STM32F2XX_USART); } for (i = 0; i < STM_NUM_TIMERS; i++) { - sysbus_init_child_obj(obj, "timer[*]", &s->timer[i], - sizeof(s->timer[i]), TYPE_STM32F2XX_TIMER); + object_initialize_child(obj, "timer[*]", &s->timer[i], + TYPE_STM32F2XX_TIMER); } s->adc_irqs = OR_IRQ(object_new(TYPE_OR_IRQ)); for (i = 0; i < STM_NUM_ADCS; i++) { - sysbus_init_child_obj(obj, "adc[*]", &s->adc[i], sizeof(s->adc[i]), - TYPE_STM32F2XX_ADC); + object_initialize_child(obj, "adc[*]", &s->adc[i], TYPE_STM32F2XX_ADC); } for (i = 0; i < STM_NUM_SPIS; i++) { - sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]), - TYPE_STM32F2XX_SPI); + object_initialize_child(obj, "spi[*]", &s->spi[i], TYPE_STM32F2XX_SPI); } } @@ -111,7 +107,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) qdev_prop_set_bit(armv7m, "enable-bitband", true); object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory()), "memory", &error_abort); - object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->armv7m), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -119,7 +115,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) /* System configuration controller */ dev = DEVICE(&s->syscfg); - object_property_set_bool(OBJECT(&s->syscfg), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->syscfg), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -132,7 +128,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) for (i = 0; i < STM_NUM_USARTS; i++) { dev = DEVICE(&(s->usart[i])); qdev_prop_set_chr(dev, "chardev", serial_hd(i)); - object_property_set_bool(OBJECT(&s->usart[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->usart[i]), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -146,7 +142,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) for (i = 0; i < STM_NUM_TIMERS; i++) { dev = DEVICE(&(s->timer[i])); qdev_prop_set_uint64(dev, "clock-frequency", 1000000000); - object_property_set_bool(OBJECT(&s->timer[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->timer[i]), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -169,7 +165,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) for (i = 0; i < STM_NUM_ADCS; i++) { dev = DEVICE(&(s->adc[i])); - object_property_set_bool(OBJECT(&s->adc[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->adc[i]), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -183,7 +179,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) /* SPI 1 and 2 */ for (i = 0; i < STM_NUM_SPIS; i++) { dev = DEVICE(&(s->spi[i])); - object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c index 33a83bd1d4..9f7838a4a3 100644 --- a/hw/arm/stm32f405_soc.c +++ b/hw/arm/stm32f405_soc.c @@ -57,34 +57,29 @@ static void stm32f405_soc_initfn(Object *obj) STM32F405State *s = STM32F405_SOC(obj); int i; - sysbus_init_child_obj(obj, "armv7m", &s->armv7m, sizeof(s->armv7m), - TYPE_ARMV7M); + object_initialize_child(obj, "armv7m", &s->armv7m, TYPE_ARMV7M); - sysbus_init_child_obj(obj, "syscfg", &s->syscfg, sizeof(s->syscfg), - TYPE_STM32F4XX_SYSCFG); + object_initialize_child(obj, "syscfg", &s->syscfg, TYPE_STM32F4XX_SYSCFG); for (i = 0; i < STM_NUM_USARTS; i++) { - sysbus_init_child_obj(obj, "usart[*]", &s->usart[i], - sizeof(s->usart[i]), TYPE_STM32F2XX_USART); + object_initialize_child(obj, "usart[*]", &s->usart[i], + TYPE_STM32F2XX_USART); } for (i = 0; i < STM_NUM_TIMERS; i++) { - sysbus_init_child_obj(obj, "timer[*]", &s->timer[i], - sizeof(s->timer[i]), TYPE_STM32F2XX_TIMER); + object_initialize_child(obj, "timer[*]", &s->timer[i], + TYPE_STM32F2XX_TIMER); } for (i = 0; i < STM_NUM_ADCS; i++) { - sysbus_init_child_obj(obj, "adc[*]", &s->adc[i], sizeof(s->adc[i]), - TYPE_STM32F2XX_ADC); + object_initialize_child(obj, "adc[*]", &s->adc[i], TYPE_STM32F2XX_ADC); } for (i = 0; i < STM_NUM_SPIS; i++) { - sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]), - TYPE_STM32F2XX_SPI); + object_initialize_child(obj, "spi[*]", &s->spi[i], TYPE_STM32F2XX_SPI); } - sysbus_init_child_obj(obj, "exti", &s->exti, sizeof(s->exti), - TYPE_STM32F4XX_EXTI); + object_initialize_child(obj, "exti", &s->exti, TYPE_STM32F4XX_EXTI); } static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) @@ -123,7 +118,7 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) qdev_prop_set_bit(armv7m, "enable-bitband", true); object_property_set_link(OBJECT(&s->armv7m), OBJECT(system_memory), "memory", &error_abort); - object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->armv7m), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -131,7 +126,7 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) /* System configuration controller */ dev = DEVICE(&s->syscfg); - object_property_set_bool(OBJECT(&s->syscfg), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->syscfg), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -144,7 +139,7 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) for (i = 0; i < STM_NUM_USARTS; i++) { dev = DEVICE(&(s->usart[i])); qdev_prop_set_chr(dev, "chardev", serial_hd(i)); - object_property_set_bool(OBJECT(&s->usart[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->usart[i]), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -158,7 +153,7 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) for (i = 0; i < STM_NUM_TIMERS; i++) { dev = DEVICE(&(s->timer[i])); qdev_prop_set_uint64(dev, "clock-frequency", 1000000000); - object_property_set_bool(OBJECT(&s->timer[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->timer[i]), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -188,7 +183,7 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) for (i = 0; i < STM_NUM_ADCS; i++) { dev = DEVICE(&(s->adc[i])); - object_property_set_bool(OBJECT(&s->adc[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->adc[i]), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -202,7 +197,7 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) /* SPI devices */ for (i = 0; i < STM_NUM_SPIS; i++) { dev = DEVICE(&(s->spi[i])); - object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -214,7 +209,7 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) /* EXTI device */ dev = DEVICE(&s->exti); - object_property_set_bool(OBJECT(&s->exti), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->exti), &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 890139d6a2..667c11ac8d 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -237,21 +237,18 @@ static void xlnx_zynqmp_init(Object *obj) ARM_CPU_TYPE_NAME("cortex-a53")); } - sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), - gic_class_name()); + object_initialize_child(obj, "gic", &s->gic, gic_class_name()); for (i = 0; i < XLNX_ZYNQMP_NUM_GEMS; i++) { - sysbus_init_child_obj(obj, "gem[*]", &s->gem[i], sizeof(s->gem[i]), - TYPE_CADENCE_GEM); + object_initialize_child(obj, "gem[*]", &s->gem[i], TYPE_CADENCE_GEM); } for (i = 0; i < XLNX_ZYNQMP_NUM_UARTS; i++) { - sysbus_init_child_obj(obj, "uart[*]", &s->uart[i], sizeof(s->uart[i]), - TYPE_CADENCE_UART); + object_initialize_child(obj, "uart[*]", &s->uart[i], + TYPE_CADENCE_UART); } - sysbus_init_child_obj(obj, "sata", &s->sata, sizeof(s->sata), - TYPE_SYSBUS_AHCI); + object_initialize_child(obj, "sata", &s->sata, TYPE_SYSBUS_AHCI); for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) { sysbus_init_child_obj(obj, "sdhci[*]", &s->sdhci[i], @@ -259,32 +256,25 @@ static void xlnx_zynqmp_init(Object *obj) } for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) { - sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]), - TYPE_XILINX_SPIPS); + object_initialize_child(obj, "spi[*]", &s->spi[i], TYPE_XILINX_SPIPS); } - sysbus_init_child_obj(obj, "qspi", &s->qspi, sizeof(s->qspi), - TYPE_XLNX_ZYNQMP_QSPIPS); + object_initialize_child(obj, "qspi", &s->qspi, TYPE_XLNX_ZYNQMP_QSPIPS); - sysbus_init_child_obj(obj, "xxxdp", &s->dp, sizeof(s->dp), TYPE_XLNX_DP); + object_initialize_child(obj, "xxxdp", &s->dp, TYPE_XLNX_DP); - sysbus_init_child_obj(obj, "dp-dma", &s->dpdma, sizeof(s->dpdma), - TYPE_XLNX_DPDMA); + object_initialize_child(obj, "dp-dma", &s->dpdma, TYPE_XLNX_DPDMA); - sysbus_init_child_obj(obj, "ipi", &s->ipi, sizeof(s->ipi), - TYPE_XLNX_ZYNQMP_IPI); + object_initialize_child(obj, "ipi", &s->ipi, TYPE_XLNX_ZYNQMP_IPI); - sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc), - TYPE_XLNX_ZYNQMP_RTC); + object_initialize_child(obj, "rtc", &s->rtc, TYPE_XLNX_ZYNQMP_RTC); for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) { - sysbus_init_child_obj(obj, "gdma[*]", &s->gdma[i], sizeof(s->gdma[i]), - TYPE_XLNX_ZDMA); + object_initialize_child(obj, "gdma[*]", &s->gdma[i], TYPE_XLNX_ZDMA); } for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) { - sysbus_init_child_obj(obj, "adma[*]", &s->adma[i], sizeof(s->adma[i]), - TYPE_XLNX_ZDMA); + object_initialize_child(obj, "adma[*]", &s->adma[i], TYPE_XLNX_ZDMA); } } @@ -386,7 +376,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) } } - object_property_set_bool(OBJECT(&s->gic), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gic), &err); if (err) { error_propagate(errp, err); return; @@ -482,7 +472,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) &error_abort); object_property_set_int(OBJECT(&s->gem[i]), 2, "num-priority-queues", &error_abort); - object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gem[i]), &err); if (err) { error_propagate(errp, err); return; @@ -494,7 +484,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) for (i = 0; i < XLNX_ZYNQMP_NUM_UARTS; i++) { qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i)); - object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->uart[i]), &err); if (err) { error_propagate(errp, err); return; @@ -506,7 +496,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports", &error_abort); - object_property_set_bool(OBJECT(&s->sata), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->sata), &err); if (err) { error_propagate(errp, err); return; @@ -557,7 +547,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) { gchar *bus_name; - object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), &err); if (err) { error_propagate(errp, err); return; @@ -574,7 +564,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) g_free(bus_name); } - object_property_set_bool(OBJECT(&s->qspi), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->qspi), &err); if (err) { error_propagate(errp, err); return; @@ -596,7 +586,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) g_free(target_bus); } - object_property_set_bool(OBJECT(&s->dp), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->dp), &err); if (err) { error_propagate(errp, err); return; @@ -604,7 +594,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->dp), 0, DP_ADDR); sysbus_connect_irq(SYS_BUS_DEVICE(&s->dp), 0, gic_spi[DP_IRQ]); - object_property_set_bool(OBJECT(&s->dpdma), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->dpdma), &err); if (err) { error_propagate(errp, err); return; @@ -614,7 +604,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->dpdma), 0, DPDMA_ADDR); sysbus_connect_irq(SYS_BUS_DEVICE(&s->dpdma), 0, gic_spi[DPDMA_IRQ]); - object_property_set_bool(OBJECT(&s->ipi), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->ipi), &err); if (err) { error_propagate(errp, err); return; @@ -622,7 +612,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi), 0, IPI_ADDR); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi), 0, gic_spi[IPI_IRQ]); - object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->rtc), &err); if (err) { error_propagate(errp, err); return; @@ -636,7 +626,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(&s->gdma[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gdma[i]), &err); if (err) { error_propagate(errp, err); return; @@ -648,7 +638,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) } for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) { - object_property_set_bool(OBJECT(&s->adma[i]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->adma[i]), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index 4f659115b6..e6085f5d44 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -42,8 +42,7 @@ static void a15mp_priv_initfn(Object *obj) memory_region_init(&s->container, obj, "a15mp-priv-container", 0x8000); sysbus_init_mmio(sbd, &s->container); - sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), - gic_class_name()); + object_initialize_child(obj, "gic", &s->gic, gic_class_name()); qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 2); } @@ -77,7 +76,7 @@ static void a15mp_priv_realize(DeviceState *dev, Error **errp) qdev_prop_set_bit(gicdev, "has-virtualization-extensions", has_el2); } - object_property_set_bool(OBJECT(&s->gic), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gic), &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c index b4f6a7e8a5..642363d2f4 100644 --- a/hw/cpu/a9mpcore.c +++ b/hw/cpu/a9mpcore.c @@ -32,18 +32,15 @@ static void a9mp_priv_initfn(Object *obj) memory_region_init(&s->container, obj, "a9mp-priv-container", 0x2000); sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->container); - sysbus_init_child_obj(obj, "scu", &s->scu, sizeof(s->scu), TYPE_A9_SCU); + object_initialize_child(obj, "scu", &s->scu, TYPE_A9_SCU); - sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), TYPE_ARM_GIC); + object_initialize_child(obj, "gic", &s->gic, TYPE_ARM_GIC); - sysbus_init_child_obj(obj, "gtimer", &s->gtimer, sizeof(s->gtimer), - TYPE_A9_GTIMER); + object_initialize_child(obj, "gtimer", &s->gtimer, TYPE_A9_GTIMER); - sysbus_init_child_obj(obj, "mptimer", &s->mptimer, sizeof(s->mptimer), - TYPE_ARM_MPTIMER); + object_initialize_child(obj, "mptimer", &s->mptimer, TYPE_ARM_MPTIMER); - sysbus_init_child_obj(obj, "wdt", &s->wdt, sizeof(s->wdt), - TYPE_ARM_MPTIMER); + object_initialize_child(obj, "wdt", &s->wdt, TYPE_ARM_MPTIMER); } static void a9mp_priv_realize(DeviceState *dev, Error **errp) @@ -60,7 +57,7 @@ static void a9mp_priv_realize(DeviceState *dev, Error **errp) scudev = DEVICE(&s->scu); qdev_prop_set_uint32(scudev, "num-cpu", s->num_cpu); - object_property_set_bool(OBJECT(&s->scu), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->scu), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -81,7 +78,7 @@ static void a9mp_priv_realize(DeviceState *dev, Error **errp) object_property_get_bool(cpuobj, "has_el3", &error_abort); qdev_prop_set_bit(gicdev, "has-security-extensions", has_el3); - object_property_set_bool(OBJECT(&s->gic), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gic), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -96,7 +93,7 @@ static void a9mp_priv_realize(DeviceState *dev, Error **errp) gtimerdev = DEVICE(&s->gtimer); qdev_prop_set_uint32(gtimerdev, "num-cpu", s->num_cpu); - object_property_set_bool(OBJECT(&s->gtimer), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gtimer), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -105,7 +102,7 @@ static void a9mp_priv_realize(DeviceState *dev, Error **errp) mptimerdev = DEVICE(&s->mptimer); qdev_prop_set_uint32(mptimerdev, "num-cpu", s->num_cpu); - object_property_set_bool(OBJECT(&s->mptimer), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->mptimer), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -114,7 +111,7 @@ static void a9mp_priv_realize(DeviceState *dev, Error **errp) wdtdev = DEVICE(&s->wdt); qdev_prop_set_uint32(wdtdev, "num-cpu", s->num_cpu); - object_property_set_bool(OBJECT(&s->wdt), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->wdt), &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c index ab9fadb67c..a2afb992fb 100644 --- a/hw/cpu/arm11mpcore.c +++ b/hw/cpu/arm11mpcore.c @@ -79,7 +79,7 @@ static void mpcore_priv_realize(DeviceState *dev, Error **errp) Error *err = NULL; qdev_prop_set_uint32(scudev, "num-cpu", s->num_cpu); - object_property_set_bool(OBJECT(&s->scu), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->scu), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -91,7 +91,7 @@ static void mpcore_priv_realize(DeviceState *dev, Error **errp) ARM11MPCORE_NUM_GIC_PRIORITY_BITS); - object_property_set_bool(OBJECT(&s->gic), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gic), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -104,14 +104,14 @@ static void mpcore_priv_realize(DeviceState *dev, Error **errp) qdev_init_gpio_in(dev, mpcore_priv_set_irq, s->num_irq - 32); qdev_prop_set_uint32(mptimerdev, "num-cpu", s->num_cpu); - object_property_set_bool(OBJECT(&s->mptimer), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->mptimer), &err); if (err != NULL) { error_propagate(errp, err); return; } qdev_prop_set_uint32(wdtimerdev, "num-cpu", s->num_cpu); - object_property_set_bool(OBJECT(&s->wdtimer), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->wdtimer), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -129,17 +129,15 @@ static void mpcore_priv_initfn(Object *obj) "mpcore-priv-container", 0x2000); sysbus_init_mmio(sbd, &s->container); - sysbus_init_child_obj(obj, "scu", &s->scu, sizeof(s->scu), TYPE_ARM11_SCU); + object_initialize_child(obj, "scu", &s->scu, TYPE_ARM11_SCU); - sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), TYPE_ARM_GIC); + object_initialize_child(obj, "gic", &s->gic, TYPE_ARM_GIC); /* Request the legacy 11MPCore GIC behaviour: */ qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 0); - sysbus_init_child_obj(obj, "mptimer", &s->mptimer, sizeof(s->mptimer), - TYPE_ARM_MPTIMER); + object_initialize_child(obj, "mptimer", &s->mptimer, TYPE_ARM_MPTIMER); - sysbus_init_child_obj(obj, "wdtimer", &s->wdtimer, sizeof(s->wdtimer), - TYPE_ARM_MPTIMER); + object_initialize_child(obj, "wdtimer", &s->wdtimer, TYPE_ARM_MPTIMER); } static Property mpcore_priv_properties[] = { diff --git a/hw/cpu/realview_mpcore.c b/hw/cpu/realview_mpcore.c index cc2767c716..672d0f8a25 100644 --- a/hw/cpu/realview_mpcore.c +++ b/hw/cpu/realview_mpcore.c @@ -70,7 +70,7 @@ static void realview_mpcore_realize(DeviceState *dev, Error **errp) int i; qdev_prop_set_uint32(priv, "num-cpu", s->num_cpu); - object_property_set_bool(OBJECT(&s->priv), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->priv), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -104,8 +104,7 @@ static void mpcore_rirq_init(Object *obj) SysBusDevice *privbusdev; int i; - sysbus_init_child_obj(obj, "a11priv", &s->priv, sizeof(s->priv), - TYPE_ARM11MPCORE_PRIV); + object_initialize_child(obj, "a11priv", &s->priv, TYPE_ARM11MPCORE_PRIV); privbusdev = SYS_BUS_DEVICE(&s->priv); sysbus_init_mmio(sbd, sysbus_mmio_get_region(privbusdev, 0)); diff --git a/hw/intc/realview_gic.c b/hw/intc/realview_gic.c index 73fe8cd815..f11fb5259a 100644 --- a/hw/intc/realview_gic.c +++ b/hw/intc/realview_gic.c @@ -34,7 +34,7 @@ static void realview_gic_realize(DeviceState *dev, Error **errp) int numirq = 96; qdev_prop_set_uint32(DEVICE(&s->gic), "num-irq", numirq); - object_property_set_bool(OBJECT(&s->gic), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gic), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -62,7 +62,7 @@ static void realview_gic_init(Object *obj) "realview-gic-container", 0x2000); sysbus_init_mmio(sbd, &s->container); - sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), TYPE_ARM_GIC); + object_initialize_child(obj, "gic", &s->gic, TYPE_ARM_GIC); qdev_prop_set_uint32(DEVICE(&s->gic), "num-cpu", 1); } diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c index 30ad133ec3..e74b047380 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -63,14 +63,12 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj) object_initialize_child(obj, "pmu-cpu", &s->cpu, TYPE_MICROBLAZE_CPU); - sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc), - TYPE_XLNX_PMU_IO_INTC); + object_initialize_child(obj, "intc", &s->intc, TYPE_XLNX_PMU_IO_INTC); /* Create the IPI device */ for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { char *name = g_strdup_printf("ipi%d", i); - sysbus_init_child_obj(obj, name, &s->ipi[i], sizeof(s->ipi[i]), - TYPE_XLNX_ZYNQMP_IPI); + object_initialize_child(obj, name, &s->ipi[i], TYPE_XLNX_ZYNQMP_IPI); g_free(name); } } @@ -110,7 +108,7 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp) &error_abort); object_property_set_uint(OBJECT(&s->intc), 0xffff, "intc-positive", &error_abort); - object_property_set_bool(OBJECT(&s->intc), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->intc), &err); if (err) { error_propagate(errp, err); return; @@ -121,8 +119,7 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp) /* Connect the IPI device */ for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { - object_property_set_bool(OBJECT(&s->ipi[i]), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->ipi[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi[i]), 0, ipi_addr[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi[i]), 0, qdev_get_gpio_in(DEVICE(&s->intc), ipi_irq[i])); diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index 763a785f1a..34aa9dd5a0 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -31,6 +31,7 @@ #include "hw/input/adb.h" #include "hw/misc/mos6522.h" #include "hw/misc/macio/cuda.h" +#include "qapi/error.h" #include "qemu/timer.h" #include "sysemu/runstate.h" #include "qapi/error.h" @@ -526,8 +527,7 @@ static void cuda_realize(DeviceState *dev, Error **errp) SysBusDevice *sbd; struct tm tm; - object_property_set_bool(OBJECT(&s->mos6522_cuda), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->mos6522_cuda), &error_abort); /* Pass IRQ from 6522 */ sbd = SYS_BUS_DEVICE(s); @@ -549,8 +549,8 @@ static void cuda_init(Object *obj) CUDAState *s = CUDA(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); - sysbus_init_child_obj(obj, "mos6522-cuda", &s->mos6522_cuda, - sizeof(s->mos6522_cuda), TYPE_MOS6522_CUDA); + object_initialize_child(obj, "mos6522-cuda", &s->mos6522_cuda, + TYPE_MOS6522_CUDA); memory_region_init_io(&s->mem, obj, &mos6522_cuda_ops, s, "cuda", 0x2000); sysbus_init_mmio(sbd, &s->mem); diff --git a/hw/misc/macio/pmu.c b/hw/misc/macio/pmu.c index 4264779396..461d0296c7 100644 --- a/hw/misc/macio/pmu.c +++ b/hw/misc/macio/pmu.c @@ -38,6 +38,7 @@ #include "hw/misc/mos6522.h" #include "hw/misc/macio/gpio.h" #include "hw/misc/macio/pmu.h" +#include "qapi/error.h" #include "qemu/timer.h" #include "sysemu/runstate.h" #include "qapi/error.h" @@ -743,8 +744,7 @@ static void pmu_realize(DeviceState *dev, Error **errp) SysBusDevice *sbd; struct tm tm; - object_property_set_bool(OBJECT(&s->mos6522_pmu), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->mos6522_pmu), &error_abort); /* Pass IRQ from 6522 */ sbd = SYS_BUS_DEVICE(s); @@ -775,8 +775,8 @@ static void pmu_init(Object *obj) qdev_prop_allow_set_link_before_realize, 0); - sysbus_init_child_obj(obj, "mos6522-pmu", &s->mos6522_pmu, - sizeof(s->mos6522_pmu), TYPE_MOS6522_PMU); + object_initialize_child(obj, "mos6522-pmu", &s->mos6522_pmu, + TYPE_MOS6522_PMU); memory_region_init_io(&s->mem, obj, &mos6522_pmu_ops, s, "via-pmu", 0x2000); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 3eb40ad8f8..b64baf71ca 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1309,8 +1309,7 @@ static void pnv_chip_power9_instance_init(Object *obj) PnvChipClass *pcc = PNV_CHIP_GET_CLASS(obj); int i; - sysbus_init_child_obj(obj, "xive", &chip9->xive, sizeof(chip9->xive), - TYPE_PNV_XIVE); + object_initialize_child(obj, "xive", &chip9->xive, TYPE_PNV_XIVE); object_property_add_alias(obj, "xive-fabric", OBJECT(&chip9->xive), "xive-fabric"); @@ -1470,8 +1469,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) "tm-bar", &error_fatal); object_property_set_link(OBJECT(&chip9->xive), OBJECT(chip), "chip", &error_abort); - object_property_set_bool(OBJECT(&chip9->xive), true, "realized", - &local_err); + sysbus_realize(SYS_BUS_DEVICE(&chip9->xive), &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index 0369cb5d53..95f90582b5 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -118,13 +118,11 @@ static void riscv_sifive_e_soc_init(Object *obj) MachineState *ms = MACHINE(qdev_get_machine()); SiFiveESoCState *s = RISCV_E_SOC(obj); - sysbus_init_child_obj(obj, "cpus", &s->cpus, - sizeof(s->cpus), TYPE_RISCV_HART_ARRAY); + object_initialize_child(obj, "cpus", &s->cpus, TYPE_RISCV_HART_ARRAY); object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts", &error_abort); - sysbus_init_child_obj(obj, "riscv.sifive.e.gpio0", - &s->gpio, sizeof(s->gpio), - TYPE_SIFIVE_GPIO); + object_initialize_child(obj, "riscv.sifive.e.gpio0", &s->gpio, + TYPE_SIFIVE_GPIO); } static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp) @@ -138,8 +136,7 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp) object_property_set_str(OBJECT(&s->cpus), ms->cpu_type, "cpu-type", &error_abort); - object_property_set_bool(OBJECT(&s->cpus), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_abort); /* Mask ROM */ memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.e.mrom", @@ -168,7 +165,7 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp) /* GPIO */ - object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gpio), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 1cecd28514..1d3b2be9eb 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -487,9 +487,8 @@ static void riscv_sifive_u_soc_init(Object *obj) object_initialize_child(obj, "e-cluster", &s->e_cluster, TYPE_CPU_CLUSTER); qdev_prop_set_uint32(DEVICE(&s->e_cluster), "cluster-id", 0); - sysbus_init_child_obj(OBJECT(&s->e_cluster), "e-cpus", - &s->e_cpus, sizeof(s->e_cpus), - TYPE_RISCV_HART_ARRAY); + object_initialize_child(OBJECT(&s->e_cluster), "e-cpus", &s->e_cpus, + TYPE_RISCV_HART_ARRAY); qdev_prop_set_uint32(DEVICE(&s->e_cpus), "num-harts", 1); qdev_prop_set_uint32(DEVICE(&s->e_cpus), "hartid-base", 0); qdev_prop_set_string(DEVICE(&s->e_cpus), "cpu-type", SIFIVE_E_CPU); @@ -497,19 +496,15 @@ static void riscv_sifive_u_soc_init(Object *obj) object_initialize_child(obj, "u-cluster", &s->u_cluster, TYPE_CPU_CLUSTER); qdev_prop_set_uint32(DEVICE(&s->u_cluster), "cluster-id", 1); - sysbus_init_child_obj(OBJECT(&s->u_cluster), "u-cpus", - &s->u_cpus, sizeof(s->u_cpus), - TYPE_RISCV_HART_ARRAY); + object_initialize_child(OBJECT(&s->u_cluster), "u-cpus", &s->u_cpus, + TYPE_RISCV_HART_ARRAY); qdev_prop_set_uint32(DEVICE(&s->u_cpus), "num-harts", ms->smp.cpus - 1); qdev_prop_set_uint32(DEVICE(&s->u_cpus), "hartid-base", 1); qdev_prop_set_string(DEVICE(&s->u_cpus), "cpu-type", SIFIVE_U_CPU); - sysbus_init_child_obj(obj, "prci", &s->prci, sizeof(s->prci), - TYPE_SIFIVE_U_PRCI); - sysbus_init_child_obj(obj, "otp", &s->otp, sizeof(s->otp), - TYPE_SIFIVE_U_OTP); - sysbus_init_child_obj(obj, "gem", &s->gem, sizeof(s->gem), - TYPE_CADENCE_GEM); + object_initialize_child(obj, "prci", &s->prci, TYPE_SIFIVE_U_PRCI); + object_initialize_child(obj, "otp", &s->otp, TYPE_SIFIVE_U_OTP); + object_initialize_child(obj, "gem", &s->gem, TYPE_CADENCE_GEM); } static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) @@ -527,10 +522,8 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) Error *err = NULL; NICInfo *nd = &nd_table[0]; - object_property_set_bool(OBJECT(&s->e_cpus), true, "realized", - &error_abort); - object_property_set_bool(OBJECT(&s->u_cpus), true, "realized", - &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->e_cpus), &error_abort); + sysbus_realize(SYS_BUS_DEVICE(&s->u_cpus), &error_abort); /* * The cluster must be realized after the RISC-V hart array container, * as the container's CPU object is only created on realize, and the @@ -597,11 +590,11 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) memmap[SIFIVE_U_CLINT].size, ms->smp.cpus, SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE, false); - object_property_set_bool(OBJECT(&s->prci), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->prci), &err); sysbus_mmio_map(SYS_BUS_DEVICE(&s->prci), 0, memmap[SIFIVE_U_PRCI].base); qdev_prop_set_uint32(DEVICE(&s->otp), "serial", s->serial); - object_property_set_bool(OBJECT(&s->otp), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->otp), &err); sysbus_mmio_map(SYS_BUS_DEVICE(&s->otp), 0, memmap[SIFIVE_U_OTP].base); for (i = 0; i < SIFIVE_U_PLIC_NUM_SOURCES; i++) { @@ -614,7 +607,7 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) } object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision", &error_abort); - object_property_set_bool(OBJECT(&s->gem), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gem), &err); if (err) { error_propagate(errp, err); return; From patchwork Fri May 29 13:45:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578871 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 885CD159A for ; Fri, 29 May 2020 14:06:30 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4F1EF20707 for ; Fri, 29 May 2020 14:06:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="Xjr3f0fN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4F1EF20707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:47762 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefeX-0005NZ-Fb for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:06:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49300) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKa-0003FH-6t for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:52 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:60077 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00076x-Hw for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:51 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=q29xO1jESqWkt5yqmDVisH92OIYlLGNNRhreuk/uWaw=; b=Xjr3f0fN+phEUQply3ZjEVUmrrzY8J0REJG4e8Af7AeDSU02jJnAggI5quvKuE2YKuCNf1 Z0Y6NBr+h0jMIJrBNdizMBDRwIiVgSUQulGtbuETfghv6MnncsOX3Urvdt5LnKlU6IyD5K F64zmZv3VP6PpFJLt+F2ISm0oJPWyhQ= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-26-3Vy-ULCjPiKgk_hD7aGRPw-1; Fri, 29 May 2020 09:45:35 -0400 X-MC-Unique: 3Vy-ULCjPiKgk_hD7aGRPw-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 2DEE8835B46 for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A48EC768DF for ; Fri, 29 May 2020 13:45:33 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 94A3E1135248; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 49/58] sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 3 Date: Fri, 29 May 2020 15:45:14 +0200 Message-Id: <20200529134523.8477-50-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/28 23:43:13 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" These are init/realize pairs produced by the previous commit's Coccinelle script where the argument test doesn't quite match. They need even more careful review. Signed-off-by: Markus Armbruster --- hw/arm/armsse.c | 33 +++++++++++++-------------------- hw/arm/armv7m.c | 6 +++--- hw/arm/microbit.c | 12 ++++++------ hw/arm/xlnx-versal.c | 6 +++--- hw/arm/xlnx-zynqmp.c | 6 +++--- hw/cpu/realview_mpcore.c | 5 ++--- hw/display/sm501.c | 4 ++-- hw/intc/armv7m_nvic.c | 7 +++---- 8 files changed, 35 insertions(+), 44 deletions(-) diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index a00764759f..38c99913cf 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -257,9 +257,8 @@ static void armsse_init(Object *obj) g_free(name); name = g_strdup_printf("armv7m%d", i); - sysbus_init_child_obj(OBJECT(&s->cluster[i]), name, - &s->armv7m[i], sizeof(s->armv7m[i]), - TYPE_ARMV7M); + object_initialize_child(OBJECT(&s->cluster[i]), name, &s->armv7m[i], + TYPE_ARMV7M); qdev_prop_set_string(DEVICE(&s->armv7m[i]), "cpu-type", ARM_CPU_TYPE_NAME("cortex-m33")); g_free(name); @@ -309,31 +308,26 @@ static void armsse_init(Object *obj) object_initialize_child(obj, "armsse-sysinfo", &s->sysinfo, TYPE_IOTKIT_SYSINFO); if (info->has_mhus) { - sysbus_init_child_obj(obj, "mhu0", &s->mhu[0], sizeof(s->mhu[0]), - TYPE_ARMSSE_MHU); - sysbus_init_child_obj(obj, "mhu1", &s->mhu[1], sizeof(s->mhu[1]), - TYPE_ARMSSE_MHU); + object_initialize_child(obj, "mhu0", &s->mhu[0], TYPE_ARMSSE_MHU); + object_initialize_child(obj, "mhu1", &s->mhu[1], TYPE_ARMSSE_MHU); } if (info->has_ppus) { for (i = 0; i < info->num_cpus; i++) { char *name = g_strdup_printf("CPU%dCORE_PPU", i); int ppuidx = CPU0CORE_PPU + i; - sysbus_init_child_obj(obj, name, &s->ppu[ppuidx], - sizeof(s->ppu[ppuidx]), - TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(obj, name, &s->ppu[ppuidx], + TYPE_UNIMPLEMENTED_DEVICE); g_free(name); } - sysbus_init_child_obj(obj, "DBG_PPU", &s->ppu[DBG_PPU], - sizeof(s->ppu[DBG_PPU]), - TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(obj, "DBG_PPU", &s->ppu[DBG_PPU], + TYPE_UNIMPLEMENTED_DEVICE); for (i = 0; i < info->sram_banks; i++) { char *name = g_strdup_printf("RAM%d_PPU", i); int ppuidx = RAM0_PPU + i; - sysbus_init_child_obj(obj, name, &s->ppu[ppuidx], - sizeof(s->ppu[ppuidx]), - TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(obj, name, &s->ppu[ppuidx], + TYPE_UNIMPLEMENTED_DEVICE); g_free(name); } } @@ -429,7 +423,7 @@ static void map_ppu(ARMSSE *s, int ppuidx, const char *name, hwaddr addr) qdev_prop_set_string(dev, "name", name); qdev_prop_set_uint64(dev, "size", 0x1000); - qdev_init_nofail(dev); + sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->ppu[ppuidx]), 0, addr); } @@ -580,7 +574,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(cpuobj, true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(cpuobj), &err); if (err) { error_propagate(errp, err); return; @@ -816,8 +810,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) int cpunum; SysBusDevice *mhu_sbd = SYS_BUS_DEVICE(&s->mhu[i]); - object_property_set_bool(OBJECT(&s->mhu[i]), true, - "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->mhu[i]), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index 6fd672e7d9..5cdd0b9b51 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -141,8 +141,8 @@ static void armv7m_instance_init(Object *obj) OBJECT(&s->nvic), "num-irq"); for (i = 0; i < ARRAY_SIZE(s->bitband); i++) { - sysbus_init_child_obj(obj, "bitband[*]", &s->bitband[i], - sizeof(s->bitband[i]), TYPE_BITBAND); + object_initialize_child(obj, "bitband[*]", &s->bitband[i], + TYPE_BITBAND); } } @@ -257,7 +257,7 @@ static void armv7m_realize(DeviceState *dev, Error **errp) } object_property_set_link(obj, OBJECT(s->board_memory), "source-memory", &error_abort); - object_property_set_bool(obj, true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(obj), &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c index 72fab429c4..d20ebd3aad 100644 --- a/hw/arm/microbit.c +++ b/hw/arm/microbit.c @@ -39,21 +39,21 @@ static void microbit_init(MachineState *machine) Object *soc = OBJECT(&s->nrf51); Object *i2c = OBJECT(&s->i2c); - sysbus_init_child_obj(OBJECT(machine), "nrf51", &s->nrf51, sizeof(s->nrf51), - TYPE_NRF51_SOC); + object_initialize_child(OBJECT(machine), "nrf51", &s->nrf51, + TYPE_NRF51_SOC); qdev_prop_set_chr(DEVICE(&s->nrf51), "serial0", serial_hd(0)); object_property_set_link(soc, OBJECT(system_memory), "memory", &error_fatal); - object_property_set_bool(soc, true, "realized", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(soc), &error_fatal); /* * Overlap the TWI stub device into the SoC. This is a microbit-specific * hack until we implement the nRF51 TWI controller properly and the * magnetometer/accelerometer devices. */ - sysbus_init_child_obj(OBJECT(machine), "microbit.twi", &s->i2c, - sizeof(s->i2c), TYPE_MICROBIT_I2C); - object_property_set_bool(i2c, true, "realized", &error_fatal); + object_initialize_child(OBJECT(machine), "microbit.twi", &s->i2c, + TYPE_MICROBIT_I2C); + sysbus_realize(SYS_BUS_DEVICE(i2c), &error_fatal); mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(i2c), 0); memory_region_add_subregion_overlap(&s->nrf51.container, NRF51_TWI_BASE, mr, -1); diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index a27c315a6b..20f0121ab0 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -238,10 +238,10 @@ static void versal_create_rtc(Versal *s, qemu_irq *pic) SysBusDevice *sbd; MemoryRegion *mr; - sysbus_init_child_obj(OBJECT(s), "rtc", &s->pmc.rtc, sizeof(s->pmc.rtc), - TYPE_XLNX_ZYNQMP_RTC); + object_initialize_child(OBJECT(s), "rtc", &s->pmc.rtc, + TYPE_XLNX_ZYNQMP_RTC); sbd = SYS_BUS_DEVICE(&s->pmc.rtc); - qdev_init_nofail(DEVICE(sbd)); + sysbus_realize(SYS_BUS_DEVICE(sbd), &error_fatal); mr = sysbus_mmio_get_region(sbd, 0); memory_region_add_subregion(&s->mr_ps, MM_PMC_RTC, mr); diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 667c11ac8d..446b75a7aa 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -251,8 +251,8 @@ static void xlnx_zynqmp_init(Object *obj) object_initialize_child(obj, "sata", &s->sata, TYPE_SYSBUS_AHCI); for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) { - sysbus_init_child_obj(obj, "sdhci[*]", &s->sdhci[i], - sizeof(s->sdhci[i]), TYPE_SYSBUS_SDHCI); + object_initialize_child(obj, "sdhci[*]", &s->sdhci[i], + TYPE_SYSBUS_SDHCI); } for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) { @@ -530,7 +530,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(sdhci, true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(sdhci), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/cpu/realview_mpcore.c b/hw/cpu/realview_mpcore.c index 672d0f8a25..d2e426fa45 100644 --- a/hw/cpu/realview_mpcore.c +++ b/hw/cpu/realview_mpcore.c @@ -81,7 +81,7 @@ static void realview_mpcore_realize(DeviceState *dev, Error **errp) } /* ??? IRQ routing is hardcoded to "normal" mode. */ for (n = 0; n < 4; n++) { - object_property_set_bool(OBJECT(&s->gic[n]), true, "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->gic[n]), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -109,8 +109,7 @@ static void mpcore_rirq_init(Object *obj) sysbus_init_mmio(sbd, sysbus_mmio_get_region(privbusdev, 0)); for (i = 0; i < 4; i++) { - sysbus_init_child_obj(obj, "gic[*]", &s->gic[i], sizeof(s->gic[i]), - TYPE_REALVIEW_GIC); + object_initialize_child(obj, "gic[*]", &s->gic[i], TYPE_REALVIEW_GIC); } } diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 1dadfca5c0..bea14c9b67 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1960,7 +1960,7 @@ static void sm501_realize_sysbus(DeviceState *dev, Error **errp) sysbus_pass_irq(sbd, SYS_BUS_DEVICE(usb_dev)); /* bridge to serial emulation module */ - qdev_init_nofail(DEVICE(&s->serial)); + sysbus_realize(SYS_BUS_DEVICE(&s->serial), &error_fatal); mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->serial), 0); memory_region_add_subregion(&s->state.mmio_region, SM501_UART0, mr); /* TODO : chain irq to IRL */ @@ -2006,7 +2006,7 @@ static void sm501_sysbus_init(Object *o) SM501SysBusState *sm501 = SYSBUS_SM501(o); SerialMM *smm = &sm501->serial; - sysbus_init_child_obj(o, "serial", smm, sizeof(*smm), TYPE_SERIAL_MM); + object_initialize_child(o, "serial", smm, TYPE_SERIAL_MM); qdev_set_legacy_instance_id(DEVICE(smm), SM501_UART0, 2); qdev_prop_set_uint8(DEVICE(smm), "regshift", 2); qdev_prop_set_uint8(DEVICE(smm), "endianness", DEVICE_LITTLE_ENDIAN); diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index f035079168..af9f4c5a85 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -2640,8 +2640,7 @@ static void armv7m_nvic_realize(DeviceState *dev, Error **errp) s->num_prio_bits = arm_feature(&s->cpu->env, ARM_FEATURE_V7) ? 8 : 2; - object_property_set_bool(OBJECT(&s->systick[M_REG_NS]), true, - "realized", &err); + sysbus_realize(SYS_BUS_DEVICE(&s->systick[M_REG_NS]), &err); if (err != NULL) { error_propagate(errp, err); return; @@ -2735,8 +2734,8 @@ static void armv7m_nvic_instance_init(Object *obj) NVICState *nvic = NVIC(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); - sysbus_init_child_obj(obj, "systick-reg-ns", &nvic->systick[M_REG_NS], - sizeof(nvic->systick[M_REG_NS]), TYPE_SYSTICK); + object_initialize_child(obj, "systick-reg-ns", &nvic->systick[M_REG_NS], + TYPE_SYSTICK); /* We can't initialize the secure systick here, as we don't know * yet if we need it. */ From patchwork Fri May 29 13:45:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578883 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0A18F1392 for ; Fri, 29 May 2020 14:09:24 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D363A20814 for ; Fri, 29 May 2020 14:09:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="ZpePtVOz" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D363A20814 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:34004 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefhK-0002vx-UZ for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:09:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49288) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKZ-0003CD-2V for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:51 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:28081 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00077A-NB for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:50 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759937; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7ITrFGRVm01P+L9Z7P7AfbfDxMyWIas1ich5GgB3emo=; b=ZpePtVOzppHHaylTUQ4B+24dBkGV6Mkzb4pq6Eu5qXkUUP9WXqU+ts9nKwbjGxoMp24Bsp QvMCCAvrL5C8XMRjPoAdiPvbYXa2LmXao6I1zpjssqS7fXdqYB4wc0PdZ8Phf4+Qaq6msJ O99kUyqSnjfUqeMx4Q8szrZs5yzBo0I= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-102-P6IaTZLoOxSM725aDwHVyQ-1; Fri, 29 May 2020 09:45:35 -0400 X-MC-Unique: P6IaTZLoOxSM725aDwHVyQ-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 0E8D3107ACF4 for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D578919C79 for ; Fri, 29 May 2020 13:45:33 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 98E7A1135249; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 50/58] sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 4 Date: Fri, 29 May 2020 15:45:15 +0200 Message-Id: <20200529134523.8477-51-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" This is still the same transformation as in the previous commits, but here the sysbus_init_child_obj() and its matching realize in are in separate files. Fortunately, there's just one realize left to convert. Signed-off-by: Markus Armbruster --- hw/arm/aspeed_ast2600.c | 9 ++++----- hw/arm/aspeed_soc.c | 4 ++-- hw/sd/aspeed_sdhci.c | 2 +- 3 files changed, 7 insertions(+), 8 deletions(-) diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 482fe826c9..d465743247 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -200,9 +200,8 @@ static void aspeed_soc_ast2600_init(Object *obj) /* Init sd card slot class here so that they're under the correct parent */ for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { - sysbus_init_child_obj(obj, "sd-controller.sdhci[*]", - &s->sdhci.slots[i], - sizeof(s->sdhci.slots[i]), TYPE_SYSBUS_SDHCI); + object_initialize_child(obj, "sd-controller.sdhci[*]", + &s->sdhci.slots[i], TYPE_SYSBUS_SDHCI); } object_initialize_child(obj, "emmc-controller", &s->emmc, @@ -210,8 +209,8 @@ static void aspeed_soc_ast2600_init(Object *obj) object_property_set_int(OBJECT(&s->emmc), 1, "num-slots", &error_abort); - sysbus_init_child_obj(obj, "emmc-controller.sdhci", - &s->emmc.slots[0], sizeof(s->emmc.slots[0]), TYPE_SYSBUS_SDHCI); + object_initialize_child(obj, "emmc-controller.sdhci", &s->emmc.slots[0], + TYPE_SYSBUS_SDHCI); } /* diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index c40839c1fb..d1e48b7a5d 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -208,8 +208,8 @@ static void aspeed_soc_init(Object *obj) /* Init sd card slot class here so that they're under the correct parent */ for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { - sysbus_init_child_obj(obj, "sdhci[*]", &s->sdhci.slots[i], - sizeof(s->sdhci.slots[i]), TYPE_SYSBUS_SDHCI); + object_initialize_child(obj, "sdhci[*]", &s->sdhci.slots[i], + TYPE_SYSBUS_SDHCI); } } diff --git a/hw/sd/aspeed_sdhci.c b/hw/sd/aspeed_sdhci.c index 6a039a1d2f..538d3bad3d 100644 --- a/hw/sd/aspeed_sdhci.c +++ b/hw/sd/aspeed_sdhci.c @@ -145,7 +145,7 @@ static void aspeed_sdhci_realize(DeviceState *dev, Error **errp) return; } - object_property_set_bool(sdhci_slot, true, "realized", &err); + sysbus_realize(sbd_slot, &err); if (err) { error_propagate(errp, err); return; From patchwork Fri May 29 13:45:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578863 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 323BF14C0 for ; Fri, 29 May 2020 14:04:59 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 08FD020707 for ; Fri, 29 May 2020 14:04:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="UkfTonTQ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 08FD020707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:40426 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefd4-0000hc-3g for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:04:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49284) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKY-00039X-5L for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:50 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:25810 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00076Y-N2 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:49 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EagmjqcyP2tc0MiviW9ypswkXQ0js1KSxtXQh3BdIbk=; b=UkfTonTQvyd0IhH7FhY4wfxxd/XquXzuwT4W86bEyvKQqIQqm+SCful4r1uLSRIlxt+X7X kKHrzg4FKfK+4efa6SVdbOpNJzdrY1nLZR7gYeyw2dfqfqIM0vpC0aJPIlhZtKgBxlWnwx B7Sdqi0R7xxz6kfT6iZ/kSmr2cii1+Q= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-21-j1B2u7p6NMu8m-5C8J_Fgw-1; Fri, 29 May 2020 09:45:35 -0400 X-MC-Unique: j1B2u7p6NMu8m-5C8J_Fgw-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 182F18015D2 for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id DFF4D100164C for ; Fri, 29 May 2020 13:45:33 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 9CD60113524A; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 51/58] sysbus: sysbus_init_child_obj() is now unused, drop Date: Fri, 29 May 2020 15:45:16 +0200 Message-Id: <20200529134523.8477-52-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Markus Armbruster --- include/hw/sysbus.h | 17 ----------------- hw/core/sysbus.c | 8 -------- 2 files changed, 25 deletions(-) diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h index 606095ba35..da9f85c58c 100644 --- a/include/hw/sysbus.h +++ b/include/hw/sysbus.h @@ -93,23 +93,6 @@ MemoryRegion *sysbus_address_space(SysBusDevice *dev); bool sysbus_realize(SysBusDevice *dev, Error **errp); bool sysbus_realize_and_unref(SysBusDevice *dev, Error **errp); -/** - * sysbus_init_child_obj: - * @parent: The parent object - * @childname: Used as name of the "child<>" property in the parent - * @child: A pointer to the memory to be used for the object. - * @childsize: The maximum size available at @child for the object. - * @childtype: The name of the type of the object to instantiate. - * - * This function will initialize an object and attach it to the main system - * bus. The memory for the object should have already been allocated. The - * object will then be added as child to the given parent. The returned object - * has a reference count of 1 (for the "child<...>" property from the parent), - * so the object will be finalized automatically when the parent gets removed. - */ -void sysbus_init_child_obj(Object *parent, const char *childname, void *child, - size_t childsize, const char *childtype); - /* Call func for every dynamically created sysbus device in the system */ void foreach_dynamic_sysbus_device(FindSysbusDeviceFunc *func, void *opaque); diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index 1220298e8f..70239b7e7d 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -355,14 +355,6 @@ BusState *sysbus_get_default(void) return main_system_bus; } -void sysbus_init_child_obj(Object *parent, const char *childname, void *child, - size_t childsize, const char *childtype) -{ - object_initialize_child_with_props(parent, childname, child, childsize, - childtype, &error_abort, NULL); - qdev_set_parent_bus(DEVICE(child), sysbus_get_default()); -} - static void sysbus_register_types(void) { type_register_static(&system_bus_info); From patchwork Fri May 29 13:45:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578869 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C233514F6 for ; Fri, 29 May 2020 14:06:01 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9841920707 for ; Fri, 29 May 2020 14:06:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="GFlEMAVb" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9841920707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:45196 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefe4-000428-Ny for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:06:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49276) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKW-00035V-Kk for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:48 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:22625 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00076j-D1 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:48 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sBsOyXEg7BDh46YGGFC03EhnHDgS64scOT/4Votrba8=; b=GFlEMAVbXrEie3mF9d4GIKKv16tm111jkhcFvoYCArgYtqDSS2AxjGcTeAXBV/EtR0eNQo 1Z9c7bao4baQ3X9tI+4oHLZcHWdsxlwh97rzUxEetY4VIt65TfzNUU1OZX1XU5Ppy0k1FK pPgPQ0ZOdHBP4aNKKemAlWQimzpQLmc= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-26-3trEphbDN02HZK-PxRLCeQ-1; Fri, 29 May 2020 09:45:35 -0400 X-MC-Unique: 3trEphbDN02HZK-PxRLCeQ-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 3008B100726D for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 02BB319D71; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id A0462113524C; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 52/58] microbit: Eliminate two local variables in microbit_init() Date: Fri, 29 May 2020 15:45:17 +0200 Message-Id: <20200529134523.8477-53-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/28 23:43:13 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Suggested-by: Philippe Mathieu-Daudé Signed-off-by: Markus Armbruster --- hw/arm/microbit.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c index d20ebd3aad..8fe42c9d6a 100644 --- a/hw/arm/microbit.c +++ b/hw/arm/microbit.c @@ -36,15 +36,13 @@ static void microbit_init(MachineState *machine) MicrobitMachineState *s = MICROBIT_MACHINE(machine); MemoryRegion *system_memory = get_system_memory(); MemoryRegion *mr; - Object *soc = OBJECT(&s->nrf51); - Object *i2c = OBJECT(&s->i2c); object_initialize_child(OBJECT(machine), "nrf51", &s->nrf51, TYPE_NRF51_SOC); qdev_prop_set_chr(DEVICE(&s->nrf51), "serial0", serial_hd(0)); - object_property_set_link(soc, OBJECT(system_memory), "memory", - &error_fatal); - sysbus_realize(SYS_BUS_DEVICE(soc), &error_fatal); + object_property_set_link(OBJECT(&s->nrf51), OBJECT(system_memory), + "memory", &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&s->nrf51), &error_fatal); /* * Overlap the TWI stub device into the SoC. This is a microbit-specific @@ -53,13 +51,13 @@ static void microbit_init(MachineState *machine) */ object_initialize_child(OBJECT(machine), "microbit.twi", &s->i2c, TYPE_MICROBIT_I2C); - sysbus_realize(SYS_BUS_DEVICE(i2c), &error_fatal); - mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(i2c), 0); + sysbus_realize(SYS_BUS_DEVICE(&s->i2c), &error_fatal); + mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->i2c), 0); memory_region_add_subregion_overlap(&s->nrf51.container, NRF51_TWI_BASE, mr, -1); armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, - NRF51_SOC(soc)->flash_size); + s->nrf51.flash_size); } static void microbit_machine_class_init(ObjectClass *oc, void *data) From patchwork Fri May 29 13:45:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578901 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 766B91392 for ; Fri, 29 May 2020 14:12:20 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4C8FD20707 for ; Fri, 29 May 2020 14:12:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="ClvjJjZ1" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4C8FD20707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:46736 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefkB-0000A0-B2 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:12:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49332) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKf-0003V1-FE for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:57 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:35370 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKO-0007B4-NF for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:56 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759940; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=upiqqFuB2dyOIQ4QelVIktUWX3XeH9kJD2GVaQbMWs8=; b=ClvjJjZ1hYZEoMxYM+bFYcq34N3OQtBLM6LnncTfQ5//7GUcaCqbuP5tmTLQILIadg9TH4 1lnu0ntSX4Tg0Uv2OfdbnVULWWWNYCox9a2Y+6MiWQP0gErjcDkHUOGctEHi5rttcqyN8W pWh4BDEvRh2z9tcqS3nsykyxHeU9G1k= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-473-vqXg0TeJPKKPQURt0x7Y_Q-1; Fri, 29 May 2020 09:45:38 -0400 X-MC-Unique: vqXg0TeJPKKPQURt0x7Y_Q-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 20886100726A; Fri, 29 May 2020 13:45:37 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 0C2979F9B7; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id A3AE9113524D; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 53/58] s390x/event-facility: Simplify creation of SCLP event devices Date: Fri, 29 May 2020 15:45:18 +0200 Message-Id: <20200529134523.8477-54-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:27:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Hildenbrand , Cornelia Huck , Halil Pasic , Christian Borntraeger , qemu-s390x@nongnu.org, Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" init_event_facility() creates the SCLP events bus with two SCLP event devices (sclpquiesce and sclp-cpu-hotplug). It leaves the devices unrealized. A comment explains they will be realized "via the bus". The bus's realize method sclp_events_bus_realize() indeed realizes all unrealized devices on this bus. It carries a TODO comment claiming this "has to be done in common code". No other bus realize method realizes its devices. The common code in question is bus_set_realized(), which has a TODO comment asking for recursive realization. It's been asking for years. The only devices sclp_events_bus_realize() will ever realize are the two init_event_facility() puts there. Simplify as follows: * Make the devices members of the event facility instance struct, just like the bus. object_initialize_child() is simpler than object_property_add_child() and object_unref(). * Realize them in the event facility realize method. This is in line with how such things are done elsewhere. Cc: Cornelia Huck Cc: Halil Pasic Cc: Christian Borntraeger Cc: Richard Henderson Cc: David Hildenbrand Cc: qemu-s390x@nongnu.org Signed-off-by: Markus Armbruster Reviewed-by: David Hildenbrand Acked-by: Cornelia Huck --- hw/s390x/event-facility.c | 64 ++++++++++++++++++--------------------- 1 file changed, 29 insertions(+), 35 deletions(-) diff --git a/hw/s390x/event-facility.c b/hw/s390x/event-facility.c index 97a4f0b1f5..164b1fd295 100644 --- a/hw/s390x/event-facility.c +++ b/hw/s390x/event-facility.c @@ -39,6 +39,7 @@ typedef struct SCLPEventsBus { struct SCLPEventFacility { SysBusDevice parent_obj; SCLPEventsBus sbus; + SCLPEvent quiesce, cpu_hotplug; /* guest's receive mask */ union { uint32_t receive_mask_pieces[2]; @@ -328,34 +329,9 @@ static void write_event_mask(SCLPEventFacility *ef, SCCB *sccb) #define TYPE_SCLP_EVENTS_BUS "s390-sclp-events-bus" -static void sclp_events_bus_realize(BusState *bus, Error **errp) -{ - Error *err = NULL; - BusChild *kid; - - /* TODO: recursive realization has to be done in common code */ - QTAILQ_FOREACH(kid, &bus->children, sibling) { - DeviceState *dev = kid->child; - - object_property_set_bool(OBJECT(dev), true, "realized", &err); - if (err) { - error_propagate(errp, err); - return; - } - } -} - -static void sclp_events_bus_class_init(ObjectClass *klass, void *data) -{ - BusClass *bc = BUS_CLASS(klass); - - bc->realize = sclp_events_bus_realize; -} - static const TypeInfo sclp_events_bus_info = { .name = TYPE_SCLP_EVENTS_BUS, .parent = TYPE_BUS, - .class_init = sclp_events_bus_class_init, }; static void command_handler(SCLPEventFacility *ef, SCCB *sccb, uint64_t code) @@ -443,27 +419,44 @@ static void init_event_facility(Object *obj) { SCLPEventFacility *event_facility = EVENT_FACILITY(obj); DeviceState *sdev = DEVICE(obj); - Object *new; event_facility->mask_length = 4; event_facility->allow_all_mask_sizes = true; object_property_add_bool(obj, "allow_all_mask_sizes", sclp_event_get_allow_all_mask_sizes, sclp_event_set_allow_all_mask_sizes); + /* Spawn a new bus for SCLP events */ qbus_create_inplace(&event_facility->sbus, sizeof(event_facility->sbus), TYPE_SCLP_EVENTS_BUS, sdev, NULL); - new = object_new(TYPE_SCLP_QUIESCE); - object_property_add_child(obj, TYPE_SCLP_QUIESCE, new); - object_unref(new); - qdev_set_parent_bus(DEVICE(new), BUS(&event_facility->sbus)); + object_initialize_child(obj, TYPE_SCLP_QUIESCE, + &event_facility->quiesce, + TYPE_SCLP_QUIESCE); - new = object_new(TYPE_SCLP_CPU_HOTPLUG); - object_property_add_child(obj, TYPE_SCLP_CPU_HOTPLUG, new); - object_unref(new); - qdev_set_parent_bus(DEVICE(new), BUS(&event_facility->sbus)); - /* the facility will automatically realize the devices via the bus */ + object_initialize_child(obj, TYPE_SCLP_CPU_HOTPLUG, + &event_facility->cpu_hotplug, + TYPE_SCLP_CPU_HOTPLUG); +} + +static void realize_event_facility(DeviceState *dev, Error **errp) +{ + SCLPEventFacility *event_facility = EVENT_FACILITY(dev); + Error *local_err = NULL; + + qdev_realize(DEVICE(&event_facility->quiesce), + BUS(&event_facility->sbus), &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + qdev_realize(DEVICE(&event_facility->cpu_hotplug), + BUS(&event_facility->sbus), &local_err); + if (local_err) { + error_propagate(errp, local_err); + qdev_unrealize(DEVICE(&event_facility->quiesce)); + return; + } } static void reset_event_facility(DeviceState *dev) @@ -479,6 +472,7 @@ static void init_event_facility_class(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(sbdc); SCLPEventFacilityClass *k = EVENT_FACILITY_CLASS(dc); + dc->realize = realize_event_facility; dc->reset = reset_event_facility; dc->vmsd = &vmstate_event_facility; set_bit(DEVICE_CATEGORY_MISC, dc->categories); From patchwork Fri May 29 13:45:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578891 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D12E31391 for ; Fri, 29 May 2020 14:11:22 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A645220707 for ; Fri, 29 May 2020 14:11:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="iDN1jZks" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A645220707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:42556 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefjF-0006dq-RN for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:11:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49292) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKZ-0003DA-Ce for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:51 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:46599 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00076t-H3 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:50 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sXROpCUXgrvHyVyz6Kt1auwiAIA3jkDztMYy9GiXZCI=; b=iDN1jZkshl5lhyHLqyKC4RpoOYdW1a55Oou4cQZlFVBEAdRJUMqB3h4K2LKKmGULARpdF4 Q7iu5+IEEnwg/wcLRP5Eaw9R5Porz2hgpSVMRMfdEQbLr8JLi2YjZOmYa/lWW46ZzDXZx9 r/0mfeT0GIKIdNoKP6RldmYv9zt5l3Y= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-228-dN4zhh7ePDuWgkLOGmDDOg-1; Fri, 29 May 2020 09:45:35 -0400 X-MC-Unique: dN4zhh7ePDuWgkLOGmDDOg-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 3E6F518FE86C for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 10EFB707A0 for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id A7F67113524F; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 54/58] qdev: Make qdev_realize() support bus-less devices Date: Fri, 29 May 2020 15:45:19 +0200 Message-Id: <20200529134523.8477-55-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" So far, qdev_realize() supports only devices that plug into a bus: argument @bus cannot be null. Extend it to support bus-less devices, too. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- hw/core/qdev.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 78a06db76e..50336168f2 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -408,7 +408,7 @@ void qdev_init_nofail(DeviceState *dev) /* * Realize @dev. * @dev must not be plugged into a bus. - * Plug @dev into @bus. This takes a reference to @dev. + * If @bus, plug @dev into @bus. This takes a reference to @dev. * If @dev has no QOM parent, make one up, taking another reference. * On success, return true. * On failure, store an error through @errp and return false. @@ -418,9 +418,12 @@ bool qdev_realize(DeviceState *dev, BusState *bus, Error **errp) Error *err = NULL; assert(!dev->realized && !dev->parent_bus); - assert(bus); - qdev_set_parent_bus(dev, bus); + if (bus) { + qdev_set_parent_bus(dev, bus); + } else { + assert(!DEVICE_GET_CLASS(dev)->bus_type); + } object_property_set_bool(OBJECT(dev), true, "realized", &err); if (err) { From patchwork Fri May 29 13:45:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578873 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 88E35159A for ; Fri, 29 May 2020 14:06:41 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5DAA120707 for ; Fri, 29 May 2020 14:06:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="WXjJ46zJ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5DAA120707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:48900 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefei-0005wl-Cl for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:06:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49290) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKZ-0003D2-D3 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:51 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:23272 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00077E-Nh for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:50 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759937; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8WL6y76NR7AedUc65fNKAAG3yobQErQtuzUveeGQT8w=; b=WXjJ46zJJLde+3MD5O9JMDsvT/k3S2xfVqASdQugCXM93Xw5NLIHKlJDusINzTuLBNUDJT Wi3LSskvlvzhZcVWmHbh6CFro4bErU+1LnYsC6idMo7ptSON9T7DGqVGAp/W7906k5YJg2 1RtVi0+3+CTw6DjTVx/I53uU5GJ5bGg= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-254-UGcsHWWGMh2HwE5GMt2TwA-1; Fri, 29 May 2020 09:45:35 -0400 X-MC-Unique: UGcsHWWGMh2HwE5GMt2TwA-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 55AD818FE86D for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 28CCD100164C for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id AB4761135250; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 55/58] qdev: Use qdev_realize() in qdev_device_add() Date: Fri, 29 May 2020 15:45:20 +0200 Message-Id: <20200529134523.8477-56-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 03:05:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Markus Armbruster --- qdev-monitor.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/qdev-monitor.c b/qdev-monitor.c index 20cfa7615b..22da107484 100644 --- a/qdev-monitor.c +++ b/qdev-monitor.c @@ -661,9 +661,7 @@ DeviceState *qdev_device_add(QemuOpts *opts, Error **errp) goto err_del_dev; } - if (bus) { - qdev_set_parent_bus(dev, bus); - } else if (qdev_hotplug && !qdev_get_machine_hotplug_handler(dev)) { + if (!bus && qdev_hotplug && !qdev_get_machine_hotplug_handler(dev)) { /* No bus, no machine hotplug handler --> device is not hotpluggable */ error_setg(&err, "Device '%s' can not be hotplugged on this machine", driver); @@ -678,7 +676,7 @@ DeviceState *qdev_device_add(QemuOpts *opts, Error **errp) } dev->opts = opts; - object_property_set_bool(OBJECT(dev), true, "realized", &err); + qdev_realize(DEVICE(dev), bus, &err); if (err != NULL) { dev->opts = NULL; goto err_del_dev; From patchwork Fri May 29 13:45:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578905 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C4A0B1392 for ; Fri, 29 May 2020 14:14:13 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 79E122072D for ; Fri, 29 May 2020 14:14:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="EHKf7xq6" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 79E122072D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:53590 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefm0-00039C-K0 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:14:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49340) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKg-0003YS-NB for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:58 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:23423 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKP-0007Bc-3u for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:58 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759940; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Wy0nFG8Pq6Mq1W3i/HGwJjLFN/jXgJQmiVw9aU5tmC0=; b=EHKf7xq6itnTigasz5dKns0KcanyoPzwZwdJQ3pS8xT5cpPExHFfPHK+O2m9UUwt9w9CMZ miiH39ASO4xJMTHf4lkefSh9yeos7Ru9AGzTKxw0pem19a0VSaiFmqOUtab19MPgydMvW3 bGSgL6aZMhMr+jG0mMx4+ZUA1oc0CII= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-299-KoapAfuCPeKShSdTDEssLg-1; Fri, 29 May 2020 09:45:35 -0400 X-MC-Unique: KoapAfuCPeKShSdTDEssLg-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id EFFAE107ACCA; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 29E7E60C81; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id AF5C01135252; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 56/58] qdev: Convert bus-less devices to qdev_realize() with Coccinelle Date: Fri, 29 May 2020 15:45:21 +0200 Message-Id: <20200529134523.8477-57-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:34:27 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" All remaining conversions to qdev_realize() are for bus-less devices. Coccinelle script: // only correct for bus-less @dev! @@ expression errp; expression dev; @@ - qdev_init_nofail(dev); + qdev_realize(dev, NULL, &error_fatal); @ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@ expression errp; expression dev; symbol true; @@ - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize(DEVICE(dev), NULL, errp); @ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@ expression errp; expression dev; symbol true; @@ - object_property_set_bool(dev, true, "realized", errp); + qdev_realize(DEVICE(dev), NULL, errp); Note that Coccinelle chokes on ARMSSE typedef vs. macro in hw/arm/armsse.c. Worked around by temporarily renaming the macro for the spatch run. Signed-off-by: Markus Armbruster Acked-by: Alistair Francis --- hw/arm/allwinner-a10.c | 2 +- hw/arm/allwinner-h3.c | 2 +- hw/arm/armsse.c | 20 ++++++--------- hw/arm/armv7m.c | 2 +- hw/arm/aspeed.c | 3 +-- hw/arm/aspeed_ast2600.c | 2 +- hw/arm/aspeed_soc.c | 2 +- hw/arm/bcm2836.c | 3 +-- hw/arm/cubieboard.c | 2 +- hw/arm/digic.c | 2 +- hw/arm/digic_boards.c | 2 +- hw/arm/exynos4210.c | 4 +-- hw/arm/fsl-imx25.c | 2 +- hw/arm/fsl-imx31.c | 2 +- hw/arm/fsl-imx6.c | 2 +- hw/arm/fsl-imx6ul.c | 3 +-- hw/arm/fsl-imx7.c | 2 +- hw/arm/highbank.c | 2 +- hw/arm/imx25_pdk.c | 2 +- hw/arm/integratorcp.c | 2 +- hw/arm/kzm.c | 2 +- hw/arm/mcimx6ul-evk.c | 2 +- hw/arm/mcimx7d-sabre.c | 2 +- hw/arm/mps2-tz.c | 9 +++---- hw/arm/mps2.c | 7 +++--- hw/arm/musca.c | 6 ++--- hw/arm/orangepi.c | 2 +- hw/arm/raspi.c | 2 +- hw/arm/realview.c | 2 +- hw/arm/sabrelite.c | 2 +- hw/arm/sbsa-ref.c | 2 +- hw/arm/stm32f205_soc.c | 2 +- hw/arm/stm32f405_soc.c | 2 +- hw/arm/versatilepb.c | 2 +- hw/arm/vexpress.c | 2 +- hw/arm/virt.c | 2 +- hw/arm/xilinx_zynq.c | 2 +- hw/arm/xlnx-versal.c | 2 +- hw/arm/xlnx-zcu102.c | 2 +- hw/arm/xlnx-zynqmp.c | 10 +++----- hw/block/nand.c | 2 +- hw/char/serial-isa.c | 2 +- hw/char/serial-pci-multi.c | 2 +- hw/char/serial-pci.c | 2 +- hw/char/serial.c | 4 +-- hw/core/cpu.c | 2 +- hw/hyperv/hyperv.c | 2 +- hw/i386/x86.c | 2 +- hw/ide/microdrive.c | 3 ++- hw/intc/pnv_xive.c | 4 +-- hw/intc/spapr_xive.c | 4 +-- hw/intc/xics.c | 2 +- hw/intc/xive.c | 2 +- hw/microblaze/petalogix_ml605_mmu.c | 2 +- hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +- hw/microblaze/xlnx-zynqmp-pmu.c | 4 +-- hw/pci-host/pnv_phb3.c | 6 ++--- hw/pci-host/pnv_phb4.c | 2 +- hw/pci-host/pnv_phb4_pec.c | 2 +- hw/pci-host/prep.c | 3 +-- hw/ppc/pnv.c | 32 ++++++++++-------------- hw/ppc/pnv_bmc.c | 2 +- hw/ppc/pnv_core.c | 2 +- hw/ppc/pnv_psi.c | 4 +-- hw/ppc/spapr.c | 5 ++-- hw/ppc/spapr_cpu_core.c | 2 +- hw/ppc/spapr_drc.c | 2 +- hw/ppc/spapr_iommu.c | 2 +- hw/ppc/spapr_irq.c | 2 +- hw/riscv/riscv_hart.c | 3 +-- hw/riscv/sifive_e.c | 3 +-- hw/riscv/sifive_u.c | 9 +++---- hw/s390x/s390-skeys.c | 2 +- hw/s390x/s390-stattrib.c | 2 +- hw/s390x/s390-virtio-ccw.c | 4 +-- hw/s390x/sclp.c | 2 +- hw/s390x/tod.c | 2 +- target/i386/cpu.c | 3 +-- tests/test-qdev-global-props.c | 9 ++++--- 79 files changed, 123 insertions(+), 150 deletions(-) diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c index e05099c757..52e0d83760 100644 --- a/hw/arm/allwinner-a10.c +++ b/hw/arm/allwinner-a10.c @@ -74,7 +74,7 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) SysBusDevice *sysbusdev; Error *err = NULL; - object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); + qdev_realize(DEVICE(&s->cpu), NULL, &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c index 91d22640e4..8e09468e86 100644 --- a/hw/arm/allwinner-h3.c +++ b/hw/arm/allwinner-h3.c @@ -250,7 +250,7 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) qdev_prop_set_bit(DEVICE(&s->cpus[i]), "has_el2", true); /* Mark realized */ - qdev_init_nofail(DEVICE(&s->cpus[i])); + qdev_realize(DEVICE(&s->cpus[i]), NULL, &error_fatal); } /* Generic Interrupt Controller */ diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 38c99913cf..e8f8f60abc 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -585,8 +585,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) * CPU must exist and have been parented into the cluster before * the cluster is realized. */ - object_property_set_bool(OBJECT(&s->cluster[i]), - true, "realized", &err); + qdev_realize(DEVICE(&s->cluster[i]), NULL, &err); if (err) { error_propagate(errp, err); return; @@ -622,7 +621,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(splitter, true, "realized", &err); + qdev_realize(DEVICE(splitter), NULL, &err); if (err) { error_propagate(errp, err); return; @@ -678,8 +677,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(&s->sec_resp_splitter), true, - "realized", &err); + qdev_realize(DEVICE(&s->sec_resp_splitter), NULL, &err); if (err) { error_propagate(errp, err); return; @@ -730,8 +728,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(&s->mpc_irq_orgate), true, - "realized", &err); + qdev_realize(DEVICE(&s->mpc_irq_orgate), NULL, &err); if (err) { error_propagate(errp, err); return; @@ -890,8 +887,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(&s->ppc_irq_orgate), true, - "realized", &err); + qdev_realize(DEVICE(&s->ppc_irq_orgate), NULL, &err); if (err) { error_propagate(errp, err); return; @@ -1066,7 +1062,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(&s->nmi_orgate), true, "realized", &err); + qdev_realize(DEVICE(&s->nmi_orgate), NULL, &err); if (err) { error_propagate(errp, err); return; @@ -1114,7 +1110,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(splitter, true, "realized", &err); + qdev_realize(DEVICE(splitter), NULL, &err); if (err) { error_propagate(errp, err); return; @@ -1161,7 +1157,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(splitter), true, "realized", &err); + qdev_realize(DEVICE(splitter), NULL, &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index 5cdd0b9b51..ce83586e03 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -216,7 +216,7 @@ static void armv7m_realize(DeviceState *dev, Error **errp) s->cpu->env.nvic = &s->nvic; s->nvic.cpu = s->cpu; - object_property_set_bool(OBJECT(s->cpu), true, "realized", &err); + qdev_realize(DEVICE(s->cpu), NULL, &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index c548d24621..ee346b27c8 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -302,8 +302,7 @@ static void aspeed_machine_init(MachineState *machine) object_property_set_int(OBJECT(&bmc->soc), ASPEED_SCU_PROT_KEY, "hw-prot-key", &error_abort); } - object_property_set_bool(OBJECT(&bmc->soc), true, "realized", - &error_abort); + qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort); memory_region_add_subregion(get_system_memory(), sc->memmap[ASPEED_SDRAM], diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index d465743247..6da687299f 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -259,7 +259,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) * is needed when using -kernel */ - object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err); + qdev_realize(DEVICE(&s->cpu[i]), NULL, &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index d1e48b7a5d..810cf9b6cc 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -230,7 +230,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) /* CPU */ for (i = 0; i < sc->num_cpus; i++) { - object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err); + qdev_realize(DEVICE(&s->cpu[i]), NULL, &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index 39a63f2565..ed1793f7b7 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -133,8 +133,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) return; } - object_property_set_bool(OBJECT(&s->cpu[n].core), true, - "realized", &err); + qdev_realize(DEVICE(&s->cpu[n].core), NULL, &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c index 4bc4f08caf..a96c860575 100644 --- a/hw/arm/cubieboard.c +++ b/hw/arm/cubieboard.c @@ -80,7 +80,7 @@ static void cubieboard_init(MachineState *machine) exit(1); } - object_property_set_bool(OBJECT(a10), true, "realized", &err); + qdev_realize(DEVICE(a10), NULL, &err); if (err != NULL) { error_reportf_err(err, "Couldn't realize Allwinner A10: "); exit(1); diff --git a/hw/arm/digic.c b/hw/arm/digic.c index 13acd2cf6e..13a83f7430 100644 --- a/hw/arm/digic.c +++ b/hw/arm/digic.c @@ -62,7 +62,7 @@ static void digic_realize(DeviceState *dev, Error **errp) return; } - object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); + qdev_realize(DEVICE(&s->cpu), NULL, &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c index 518a63e61d..b6452d918c 100644 --- a/hw/arm/digic_boards.c +++ b/hw/arm/digic_boards.c @@ -62,7 +62,7 @@ static void digic4_board_init(MachineState *machine, DigicBoard *board) exit(EXIT_FAILURE); } - object_property_set_bool(OBJECT(s), true, "realized", &err); + qdev_realize(DEVICE(s), NULL, &err); if (err != NULL) { error_reportf_err(err, "Couldn't realize DIGIC SoC: "); exit(1); diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 2afeb73776..b888a5c9ab 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -190,7 +190,7 @@ static DeviceState *pl330_create(uint32_t base, qemu_or_irq *orgate, object_property_set_int(OBJECT(orgate), nevents + 1, "num-lines", &error_abort); - object_property_set_bool(OBJECT(orgate), true, "realized", &error_abort); + qdev_realize(DEVICE(orgate), NULL, &error_abort); for (i = 0; i < nevents + 1; i++) { sysbus_connect_irq(busdev, i, qdev_get_gpio_in(DEVICE(orgate), i)); @@ -223,7 +223,7 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) "mp-affinity", &error_abort); object_property_set_int(cpuobj, EXYNOS4210_SMP_PRIVATE_BASE_ADDR, "reset-cbar", &error_abort); - object_property_set_bool(cpuobj, true, "realized", &error_fatal); + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); } /*** IRQs ***/ diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index d2c4970074..fb516bdbac 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -85,7 +85,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) uint8_t i; Error *err = NULL; - object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); + qdev_realize(DEVICE(&s->cpu), NULL, &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index 08236c3230..42cca529c3 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -66,7 +66,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) uint16_t i; Error *err = NULL; - object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); + qdev_realize(DEVICE(&s->cpu), NULL, &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 33b1be4000..17593485b7 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -130,7 +130,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) "start-powered-off", &error_abort); } - object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err); + qdev_realize(DEVICE(&s->cpu[i]), NULL, &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index 72142cc2b6..f8c564033e 100644 --- a/hw/arm/fsl-imx6ul.c +++ b/hw/arm/fsl-imx6ul.c @@ -168,8 +168,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) object_property_set_int(OBJECT(&s->cpu), QEMU_PSCI_CONDUIT_SMC, "psci-conduit", &error_abort); - object_property_set_bool(OBJECT(&s->cpu), true, - "realized", &error_abort); + qdev_realize(DEVICE(&s->cpu), NULL, &error_abort); /* * A7MPCORE diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index aa7051307d..ca8b5cc358 100644 --- a/hw/arm/fsl-imx7.c +++ b/hw/arm/fsl-imx7.c @@ -174,7 +174,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) "start-powered-off", &error_abort); } - object_property_set_bool(o, true, "realized", &error_abort); + qdev_realize(DEVICE(o), NULL, &error_abort); } /* diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index 7f279d7f93..c7ef48ecde 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -280,7 +280,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) object_property_set_int(cpuobj, MPCORE_PERIPHBASE, "reset-cbar", &error_abort); } - object_property_set_bool(cpuobj, true, "realized", &error_fatal); + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ); cpu_fiq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_FIQ); cpu_virq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_VIRQ); diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c index 69b95711e4..af8f7f969c 100644 --- a/hw/arm/imx25_pdk.c +++ b/hw/arm/imx25_pdk.c @@ -75,7 +75,7 @@ static void imx25_pdk_init(MachineState *machine) object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX25); - object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); + qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); /* We need to initialize our memory */ if (machine->ram_size > (FSL_IMX25_SDRAM0_SIZE + FSL_IMX25_SDRAM1_SIZE)) { diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index a55d2c31e3..b11a846355 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -607,7 +607,7 @@ static void integratorcp_init(MachineState *machine) object_property_set_bool(cpuobj, false, "has_el3", &error_fatal); } - object_property_set_bool(cpuobj, true, "realized", &error_fatal); + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); cpu = ARM_CPU(cpuobj); diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c index 0275d63079..e3f7d4ead2 100644 --- a/hw/arm/kzm.c +++ b/hw/arm/kzm.c @@ -73,7 +73,7 @@ static void kzm_init(MachineState *machine) object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX31); - object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); + qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); /* Check the amount of memory is compatible with the SOC */ if (machine->ram_size > (FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE)) { diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c index 769fe6d802..3d1d2e3c04 100644 --- a/hw/arm/mcimx6ul-evk.c +++ b/hw/arm/mcimx6ul-evk.c @@ -40,7 +40,7 @@ static void mcimx6ul_evk_init(MachineState *machine) s = FSL_IMX6UL(object_new(TYPE_FSL_IMX6UL)); object_property_add_child(OBJECT(machine), "soc", OBJECT(s)); - object_property_set_bool(OBJECT(s), true, "realized", &error_fatal); + qdev_realize(DEVICE(s), NULL, &error_fatal); memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_MMDC_ADDR, machine->ram); diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c index 645ad5470f..365f8183bc 100644 --- a/hw/arm/mcimx7d-sabre.c +++ b/hw/arm/mcimx7d-sabre.c @@ -42,7 +42,7 @@ static void mcimx7d_sabre_init(MachineState *machine) s = FSL_IMX7(object_new(TYPE_FSL_IMX7)); object_property_add_child(OBJECT(machine), "soc", OBJECT(s)); - object_property_set_bool(OBJECT(s), true, "realized", &error_fatal); + qdev_realize(DEVICE(s), NULL, &error_fatal); memory_region_add_subregion(get_system_memory(), FSL_IMX7_MMDC_ADDR, machine->ram); diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index a2b20fff37..8155c35418 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -414,8 +414,7 @@ static void mps2tz_common_init(MachineState *machine) object_property_set_int(OBJECT(splitter), 2, "num-lines", &error_fatal); - object_property_set_bool(OBJECT(splitter), true, "realized", - &error_fatal); + qdev_realize(DEVICE(splitter), NULL, &error_fatal); qdev_connect_gpio_out(DEVICE(splitter), 0, qdev_get_gpio_in_named(DEVICE(&mms->iotkit), "EXP_IRQ", i)); @@ -433,8 +432,7 @@ static void mps2tz_common_init(MachineState *machine) object_property_set_int(OBJECT(&mms->sec_resp_splitter), ARRAY_SIZE(mms->ppc) + ARRAY_SIZE(mms->msc), "num-lines", &error_fatal); - object_property_set_bool(OBJECT(&mms->sec_resp_splitter), true, - "realized", &error_fatal); + qdev_realize(DEVICE(&mms->sec_resp_splitter), NULL, &error_fatal); dev_splitter = DEVICE(&mms->sec_resp_splitter); qdev_connect_gpio_out_named(iotkitdev, "sec_resp_cfg", 0, qdev_get_gpio_in(dev_splitter, 0)); @@ -466,8 +464,7 @@ static void mps2tz_common_init(MachineState *machine) &mms->uart_irq_orgate, TYPE_OR_IRQ); object_property_set_int(OBJECT(&mms->uart_irq_orgate), 10, "num-lines", &error_fatal); - object_property_set_bool(OBJECT(&mms->uart_irq_orgate), true, - "realized", &error_fatal); + qdev_realize(DEVICE(&mms->uart_irq_orgate), NULL, &error_fatal); qdev_connect_gpio_out(DEVICE(&mms->uart_irq_orgate), 0, get_sse_irq_in(mms, 15)); diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index 735f44c7a3..daa55f730b 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -229,7 +229,7 @@ static void mps2_common_init(MachineState *machine) orgate = object_new(TYPE_OR_IRQ); object_property_set_int(orgate, 6, "num-lines", &error_fatal); - object_property_set_bool(orgate, true, "realized", &error_fatal); + qdev_realize(DEVICE(orgate), NULL, &error_fatal); orgate_dev = DEVICE(orgate); qdev_connect_gpio_out(orgate_dev, 0, qdev_get_gpio_in(armv7m, 12)); @@ -266,7 +266,7 @@ static void mps2_common_init(MachineState *machine) orgate = object_new(TYPE_OR_IRQ); object_property_set_int(orgate, 10, "num-lines", &error_fatal); - object_property_set_bool(orgate, true, "realized", &error_fatal); + qdev_realize(DEVICE(orgate), NULL, &error_fatal); orgate_dev = DEVICE(orgate); qdev_connect_gpio_out(orgate_dev, 0, qdev_get_gpio_in(armv7m, 12)); @@ -281,8 +281,7 @@ static void mps2_common_init(MachineState *machine) txrx_orgate = object_new(TYPE_OR_IRQ); object_property_set_int(txrx_orgate, 2, "num-lines", &error_fatal); - object_property_set_bool(txrx_orgate, true, "realized", - &error_fatal); + qdev_realize(DEVICE(txrx_orgate), NULL, &error_fatal); txrx_orgate_dev = DEVICE(txrx_orgate); qdev_connect_gpio_out(txrx_orgate_dev, 0, qdev_get_gpio_in(armv7m, uart_txrx_irqno[i])); diff --git a/hw/arm/musca.c b/hw/arm/musca.c index d74042356d..34376328fc 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -405,8 +405,7 @@ static void musca_init(MachineState *machine) object_property_set_int(OBJECT(splitter), 2, "num-lines", &error_fatal); - object_property_set_bool(OBJECT(splitter), true, "realized", - &error_fatal); + qdev_realize(DEVICE(splitter), NULL, &error_fatal); qdev_connect_gpio_out(DEVICE(splitter), 0, qdev_get_gpio_in_named(ssedev, "EXP_IRQ", i)); qdev_connect_gpio_out(DEVICE(splitter), 1, @@ -425,8 +424,7 @@ static void musca_init(MachineState *machine) object_property_set_int(OBJECT(&mms->sec_resp_splitter), ARRAY_SIZE(mms->ppc), "num-lines", &error_fatal); - object_property_set_bool(OBJECT(&mms->sec_resp_splitter), true, - "realized", &error_fatal); + qdev_realize(DEVICE(&mms->sec_resp_splitter), NULL, &error_fatal); dev_splitter = DEVICE(&mms->sec_resp_splitter); qdev_connect_gpio_out_named(ssedev, "sec_resp_cfg", 0, qdev_get_gpio_in(dev_splitter, 0)); diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index 44a333a6eb..678c93033e 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -86,7 +86,7 @@ static void orangepi_init(MachineState *machine) &error_abort); /* Mark H3 object realized */ - object_property_set_bool(OBJECT(h3), true, "realized", &error_abort); + qdev_realize(DEVICE(h3), NULL, &error_abort); /* Retrieve SD bus */ di = drive_get_next(IF_SD); diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index 78cb995251..380978fc27 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -287,7 +287,7 @@ static void raspi_machine_init(MachineState *machine) object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(machine->ram)); object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev", &error_abort); - object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abort); + qdev_realize(DEVICE(&s->soc), NULL, &error_abort); /* Create and plug in the SD cards */ di = drive_get_next(IF_SD); diff --git a/hw/arm/realview.c b/hw/arm/realview.c index aee7989037..f3c00fe00c 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -114,7 +114,7 @@ static void realview_init(MachineState *machine, &error_fatal); } - object_property_set_bool(cpuobj, true, "realized", &error_fatal); + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpuobj), ARM_CPU_IRQ); } diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c index 33d731549d..a27e5baf60 100644 --- a/hw/arm/sabrelite.c +++ b/hw/arm/sabrelite.c @@ -51,7 +51,7 @@ static void sabrelite_init(MachineState *machine) s = FSL_IMX6(object_new(TYPE_FSL_IMX6)); object_property_add_child(OBJECT(machine), "soc", OBJECT(s)); - object_property_set_bool(OBJECT(s), true, "realized", &error_fatal); + qdev_realize(DEVICE(s), NULL, &error_fatal); memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR, machine->ram); diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 3fd3536796..e40c868a82 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -680,7 +680,7 @@ static void sbsa_ref_init(MachineState *machine) object_property_set_link(cpuobj, OBJECT(secure_sysmem), "secure-memory", &error_abort); - object_property_set_bool(cpuobj, true, "realized", &error_fatal); + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); object_unref(cpuobj); } diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index e2c3479702..19487544f0 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -155,7 +155,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) /* ADC 1 to 3 */ object_property_set_int(OBJECT(s->adc_irqs), STM_NUM_ADCS, "num-lines", &err); - object_property_set_bool(OBJECT(s->adc_irqs), true, "realized", &err); + qdev_realize(DEVICE(s->adc_irqs), NULL, &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c index 9f7838a4a3..c12d9f999d 100644 --- a/hw/arm/stm32f405_soc.c +++ b/hw/arm/stm32f405_soc.c @@ -173,7 +173,7 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) } object_property_set_int(OBJECT(&s->adc_irqs), STM_NUM_ADCS, "num-lines", &err); - object_property_set_bool(OBJECT(&s->adc_irqs), true, "realized", &err); + qdev_realize(DEVICE(&s->adc_irqs), NULL, &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 29e3bc6bd0..2ebdcbd8ac 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -215,7 +215,7 @@ static void versatile_init(MachineState *machine, int board_id) object_property_set_bool(cpuobj, false, "has_el3", &error_fatal); } - object_property_set_bool(cpuobj, true, "realized", &error_fatal); + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); cpu = ARM_CPU(cpuobj); diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index bebb0ed5a4..7ca5d523a4 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -229,7 +229,7 @@ static void init_cpus(MachineState *ms, const char *cpu_type, object_property_set_int(cpuobj, periphbase, "reset-cbar", &error_abort); } - object_property_set_bool(cpuobj, true, "realized", &error_fatal); + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); } /* Create the private peripheral devices (including the GIC); diff --git a/hw/arm/virt.c b/hw/arm/virt.c index c3e80bcbce..caceb1e4a0 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1819,7 +1819,7 @@ static void machvirt_init(MachineState *machine) "secure-memory", &error_abort); } - object_property_set_bool(cpuobj, true, "realized", &error_fatal); + qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); object_unref(cpuobj); } fdt_add_timer_nodes(vms); diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 69d62ee24b..4247c4dbd8 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -202,7 +202,7 @@ static void zynq_init(MachineState *machine) &error_fatal); object_property_set_int(OBJECT(cpu), MPCORE_PERIPHBASE, "reset-cbar", &error_fatal); - object_property_set_bool(OBJECT(cpu), true, "realized", &error_fatal); + qdev_realize(DEVICE(cpu), NULL, &error_fatal); /* DDR remapped to address zero. */ memory_region_add_subregion(address_space_mem, 0, machine->ram); diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 20f0121ab0..fed9d07ca2 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -47,7 +47,7 @@ static void versal_create_apu_cpus(Versal *s) "core-count", &error_abort); object_property_set_link(obj, OBJECT(&s->fpd.apu.mr), "memory", &error_abort); - object_property_set_bool(obj, true, "realized", &error_fatal); + qdev_realize(DEVICE(obj), NULL, &error_fatal); } } diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 822e24af65..b920bcee94 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -125,7 +125,7 @@ static void xlnx_zcu102_init(MachineState *machine) object_property_set_bool(OBJECT(&s->soc), s->virt, "virtualization", &error_fatal); - object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal); + qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); /* Create and plug in the SD cards */ for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) { diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 446b75a7aa..1de9d4a89d 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -209,15 +209,14 @@ static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s, object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "reset-hivecs", &error_abort); - object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "realized", - &err); + qdev_realize(DEVICE(&s->rpu_cpu[i]), NULL, &err); if (err) { error_propagate(errp, err); return; } } - qdev_init_nofail(DEVICE(&s->rpu_cluster)); + qdev_realize(DEVICE(&s->rpu_cluster), NULL, &error_fatal); } static void xlnx_zynqmp_init(Object *obj) @@ -341,7 +340,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) qdev_prop_set_bit(DEVICE(&s->gic), "has-virtualization-extensions", s->virt); - qdev_init_nofail(DEVICE(&s->apu_cluster)); + qdev_realize(DEVICE(&s->apu_cluster), NULL, &error_fatal); /* Realize APUs before realizing the GIC. KVM requires this. */ for (i = 0; i < num_apus; i++) { @@ -368,8 +367,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) "reset-cbar", &error_abort); object_property_set_int(OBJECT(&s->apu_cpu[i]), num_apus, "core-count", &error_abort); - object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized", - &err); + qdev_realize(DEVICE(&s->apu_cpu[i]), NULL, &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/block/nand.c b/hw/block/nand.c index cdf3429ce6..7e25681d59 100644 --- a/hw/block/nand.c +++ b/hw/block/nand.c @@ -651,7 +651,7 @@ DeviceState *nand_init(BlockBackend *blk, int manf_id, int chip_id) qdev_prop_set_drive(dev, "drive", blk, &error_fatal); } - qdev_init_nofail(dev); + qdev_realize(dev, NULL, &error_fatal); return dev; } diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index 7630a874a8..01f9245b9b 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -74,7 +74,7 @@ static void serial_isa_realizefn(DeviceState *dev, Error **errp) index++; isa_init_irq(isadev, &s->irq, isa->isairq); - object_property_set_bool(OBJECT(s), true, "realized", errp); + qdev_realize(DEVICE(s), NULL, errp); qdev_set_legacy_instance_id(dev, isa->iobase, 3); memory_region_init_io(&s->io, OBJECT(isa), &serial_io_ops, s, "serial", 8); diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 1d65d64c4e..56f915e7c9 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -106,7 +106,7 @@ static void multi_serial_pci_realize(PCIDevice *dev, Error **errp) for (i = 0; i < nports; i++) { s = pci->state + i; - object_property_set_bool(OBJECT(s), true, "realized", &err); + qdev_realize(DEVICE(s), NULL, &err); if (err != NULL) { error_propagate(errp, err); multi_serial_pci_exit(dev); diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index 5f5ff10a75..298f3adba7 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -49,7 +49,7 @@ static void serial_pci_realize(PCIDevice *dev, Error **errp) SerialState *s = &pci->state; Error *err = NULL; - object_property_set_bool(OBJECT(s), true, "realized", &err); + qdev_realize(DEVICE(s), NULL, &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/char/serial.c b/hw/char/serial.c index 4582d488d0..9eebcb27e7 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -991,7 +991,7 @@ static void serial_io_realize(DeviceState *dev, Error **errp) SerialState *s = &sio->serial; Error *local_err = NULL; - object_property_set_bool(OBJECT(s), true, "realized", &local_err); + qdev_realize(DEVICE(s), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1098,7 +1098,7 @@ static void serial_mm_realize(DeviceState *dev, Error **errp) SerialState *s = &smm->serial; Error *local_err = NULL; - object_property_set_bool(OBJECT(s), true, "realized", &local_err); + qdev_realize(DEVICE(s), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 5284d384fb..211b0827c0 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -59,7 +59,7 @@ CPUState *cpu_create(const char *typename) { Error *err = NULL; CPUState *cpu = CPU(object_new(typename)); - object_property_set_bool(OBJECT(cpu), true, "realized", &err); + qdev_realize(DEVICE(cpu), NULL, &err); if (err != NULL) { error_report_err(err); object_unref(OBJECT(cpu)); diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c index 4b11f7a76b..d527aa823f 100644 --- a/hw/hyperv/hyperv.c +++ b/hw/hyperv/hyperv.c @@ -133,7 +133,7 @@ void hyperv_synic_add(CPUState *cs) synic->cs = cs; object_property_add_child(OBJECT(cs), "synic", obj); object_unref(obj); - object_property_set_bool(obj, true, "realized", &error_abort); + qdev_realize(DEVICE(obj), NULL, &error_abort); } void hyperv_synic_reset(CPUState *cs) diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 9b6ebd92b5..bb31935f70 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -124,7 +124,7 @@ void x86_cpu_new(X86MachineState *x86ms, int64_t apic_id, Error **errp) cpu = object_new(MACHINE(x86ms)->cpu_type); object_property_set_uint(cpu, apic_id, "apic-id", &local_err); - object_property_set_bool(cpu, true, "realized", &local_err); + qdev_realize(DEVICE(cpu), NULL, &local_err); object_unref(cpu); error_propagate(errp, local_err); diff --git a/hw/ide/microdrive.c b/hw/ide/microdrive.c index 6b30e36ed8..c4cc0a84eb 100644 --- a/hw/ide/microdrive.c +++ b/hw/ide/microdrive.c @@ -26,6 +26,7 @@ #include "qemu/osdep.h" #include "hw/pcmcia.h" #include "migration/vmstate.h" +#include "qapi/error.h" #include "qemu/module.h" #include "sysemu/dma.h" @@ -560,7 +561,7 @@ PCMCIACardState *dscm1xxxx_init(DriveInfo *dinfo) MicroDriveState *md; md = MICRODRIVE(object_new(TYPE_DSCM1XXXX)); - qdev_init_nofail(DEVICE(md)); + qdev_realize(DEVICE(md), NULL, &error_fatal); if (dinfo != NULL) { ide_create_drive(&md->bus, 0, dinfo); diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index 892c78069d..85ba0b4655 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -1833,7 +1833,7 @@ static void pnv_xive_realize(DeviceState *dev, Error **errp) &error_fatal); object_property_set_link(OBJECT(xsrc), OBJECT(xive), "xive", &error_abort); - object_property_set_bool(OBJECT(xsrc), true, "realized", &local_err); + qdev_realize(DEVICE(xsrc), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1843,7 +1843,7 @@ static void pnv_xive_realize(DeviceState *dev, Error **errp) &error_fatal); object_property_set_link(OBJECT(end_xsrc), OBJECT(xive), "xive", &error_abort); - object_property_set_bool(OBJECT(end_xsrc), true, "realized", &local_err); + qdev_realize(DEVICE(end_xsrc), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 263cd1253c..b7fc8dde7a 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -312,7 +312,7 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) &error_fatal); object_property_set_link(OBJECT(xsrc), OBJECT(xive), "xive", &error_abort); - object_property_set_bool(OBJECT(xsrc), true, "realized", &local_err); + qdev_realize(DEVICE(xsrc), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -326,7 +326,7 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) &error_fatal); object_property_set_link(OBJECT(end_xsrc), OBJECT(xive), "xive", &error_abort); - object_property_set_bool(OBJECT(end_xsrc), true, "realized", &local_err); + qdev_realize(DEVICE(end_xsrc), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/hw/intc/xics.c b/hw/intc/xics.c index d5032c8f8a..d365eeca66 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -384,7 +384,7 @@ Object *icp_create(Object *cpu, const char *type, XICSFabric *xi, Error **errp) object_unref(obj); object_property_set_link(obj, OBJECT(xi), ICP_PROP_XICS, &error_abort); object_property_set_link(obj, cpu, ICP_PROP_CPU, &error_abort); - object_property_set_bool(obj, true, "realized", &local_err); + qdev_realize(DEVICE(obj), NULL, &local_err); if (local_err) { object_unparent(obj); error_propagate(errp, local_err); diff --git a/hw/intc/xive.c b/hw/intc/xive.c index 8f2b4050cb..2c30dc53d8 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -765,7 +765,7 @@ Object *xive_tctx_create(Object *cpu, XivePresenter *xptr, Error **errp) object_unref(obj); object_property_set_link(obj, cpu, "cpu", &error_abort); object_property_set_link(obj, OBJECT(xptr), "presenter", &error_abort); - object_property_set_bool(obj, true, "realized", &local_err); + qdev_realize(DEVICE(obj), NULL, &local_err); if (local_err) { goto error; } diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c index 4d80a691bc..23420028f5 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -91,7 +91,7 @@ petalogix_ml605_init(MachineState *machine) object_property_set_bool(OBJECT(cpu), true, "dcache-writeback", &error_abort); object_property_set_bool(OBJECT(cpu), true, "endianness", &error_abort); - object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort); + qdev_realize(DEVICE(cpu), NULL, &error_abort); /* Attach emulated BRAM through the LMB. */ memory_region_init_ram(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram", diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c index 793006a822..a43c980fc9 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -71,7 +71,7 @@ petalogix_s3adsp1800_init(MachineState *machine) cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU)); object_property_set_str(OBJECT(cpu), "7.10.d", "version", &error_abort); - object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort); + qdev_realize(DEVICE(cpu), NULL, &error_abort); /* Attach emulated BRAM through the LMB. */ memory_region_init_ram(phys_lmb_bram, NULL, diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c index e74b047380..abebc7e2ef 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -96,7 +96,7 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp) object_property_set_str(OBJECT(&s->cpu), "8.40.b", "version", &error_abort); object_property_set_uint(OBJECT(&s->cpu), 0, "pvr", &error_abort); - object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); + qdev_realize(DEVICE(&s->cpu), NULL, &err); if (err) { error_propagate(errp, err); return; @@ -172,7 +172,7 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine) /* Create the PMU device */ object_initialize_child(OBJECT(machine), "pmu", pmu, TYPE_XLNX_ZYNQMP_PMU_SOC); - object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal); + qdev_realize(DEVICE(pmu), NULL, &error_fatal); /* Load the kernel */ microblaze_load_kernel(&pmu->cpu, XLNX_ZYNQMP_PMU_RAM_ADDR, diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 6e2b0174f6..3ec904a55f 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -1003,7 +1003,7 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) &error_abort); object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs", &error_abort); - object_property_set_bool(OBJECT(&phb->lsis), true, "realized", &local_err); + qdev_realize(DEVICE(&phb->lsis), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1022,7 +1022,7 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) &error_abort); object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs", &error_abort); - object_property_set_bool(OBJECT(&phb->msis), true, "realized", &local_err); + qdev_realize(DEVICE(&phb->msis), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1031,7 +1031,7 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) /* Power Bus Common Queue */ object_property_set_link(OBJECT(&phb->pbcq), OBJECT(phb), "phb", &error_abort); - object_property_set_bool(OBJECT(&phb->pbcq), true, "realized", &local_err); + qdev_realize(DEVICE(&phb->pbcq), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 368ae9eacd..10716d759d 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1218,7 +1218,7 @@ static void pnv_phb4_realize(DeviceState *dev, Error **errp) } object_property_set_int(OBJECT(xsrc), nr_irqs, "nr-irqs", &error_fatal); object_property_set_link(OBJECT(xsrc), OBJECT(phb), "xive", &error_fatal); - object_property_set_bool(OBJECT(xsrc), true, "realized", &local_err); + qdev_realize(DEVICE(xsrc), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c index f9b41c5042..2d634c838e 100644 --- a/hw/pci-host/pnv_phb4_pec.c +++ b/hw/pci-host/pnv_phb4_pec.c @@ -390,7 +390,7 @@ static void pnv_pec_realize(DeviceState *dev, Error **errp) object_property_set_int(stk_obj, i, "stack-no", &error_abort); object_property_set_link(stk_obj, OBJECT(pec), "pec", &error_abort); - object_property_set_bool(stk_obj, true, "realized", &local_err); + qdev_realize(DEVICE(stk_obj), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 42c7e63a60..1af0ebee45 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -238,8 +238,7 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp) s->or_irq = OR_IRQ(object_new(TYPE_OR_IRQ)); object_property_set_int(OBJECT(s->or_irq), PCI_NUM_PINS, "num-lines", &error_fatal); - object_property_set_bool(OBJECT(s->or_irq), true, "realized", - &error_fatal); + qdev_realize(DEVICE(s->or_irq), NULL, &error_fatal); sysbus_init_irq(dev, &s->or_irq->out_irq); for (i = 0; i < PCI_NUM_PINS; i++) { diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index b64baf71ca..80b4afd211 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1138,7 +1138,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) "bar", &error_fatal); object_property_set_link(OBJECT(&chip8->psi), OBJECT(chip8->xics), ICS_PROP_XICS, &error_abort); - object_property_set_bool(OBJECT(&chip8->psi), true, "realized", &local_err); + qdev_realize(DEVICE(&chip8->psi), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1149,8 +1149,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) /* Create LPC controller */ object_property_set_link(OBJECT(&chip8->lpc), OBJECT(&chip8->psi), "psi", &error_abort); - object_property_set_bool(OBJECT(&chip8->lpc), true, "realized", - &error_fatal); + qdev_realize(DEVICE(&chip8->lpc), NULL, &error_fatal); pnv_xscom_add_subregion(chip, PNV_XSCOM_LPC_BASE, &chip8->lpc.xscom_regs); chip->dt_isa_nodename = g_strdup_printf("/xscom@%" PRIx64 "/isa@%x", @@ -1170,7 +1169,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) /* Create the simplified OCC model */ object_property_set_link(OBJECT(&chip8->occ), OBJECT(&chip8->psi), "psi", &error_abort); - object_property_set_bool(OBJECT(&chip8->occ), true, "realized", &local_err); + qdev_realize(DEVICE(&chip8->occ), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1184,8 +1183,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) /* HOMER */ object_property_set_link(OBJECT(&chip8->homer), OBJECT(chip), "chip", &error_abort); - object_property_set_bool(OBJECT(&chip8->homer), true, "realized", - &local_err); + qdev_realize(DEVICE(&chip8->homer), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1352,7 +1350,7 @@ static void pnv_chip_quad_realize(Pnv9Chip *chip9, Error **errp) &error_fatal, NULL); object_property_set_int(OBJECT(eq), core_id, "id", &error_fatal); - object_property_set_bool(OBJECT(eq), true, "realized", &error_fatal); + qdev_realize(DEVICE(eq), NULL, &error_fatal); pnv_xscom_add_subregion(chip, PNV9_XSCOM_EQ_BASE(eq->id), &eq->xscom_regs); @@ -1384,7 +1382,7 @@ static void pnv_chip_power9_phb_realize(PnvChip *chip, Error **errp) &error_fatal); object_property_set_link(OBJECT(pec), OBJECT(get_system_memory()), "system-memory", &error_abort); - object_property_set_bool(OBJECT(pec), true, "realized", &local_err); + qdev_realize(DEVICE(pec), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1480,7 +1478,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) /* Processor Service Interface (PSI) Host Bridge */ object_property_set_int(OBJECT(&chip9->psi), PNV9_PSIHB_BASE(chip), "bar", &error_fatal); - object_property_set_bool(OBJECT(&chip9->psi), true, "realized", &local_err); + qdev_realize(DEVICE(&chip9->psi), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1491,7 +1489,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) /* LPC */ object_property_set_link(OBJECT(&chip9->lpc), OBJECT(&chip9->psi), "psi", &error_abort); - object_property_set_bool(OBJECT(&chip9->lpc), true, "realized", &local_err); + qdev_realize(DEVICE(&chip9->lpc), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1505,7 +1503,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) /* Create the simplified OCC model */ object_property_set_link(OBJECT(&chip9->occ), OBJECT(&chip9->psi), "psi", &error_abort); - object_property_set_bool(OBJECT(&chip9->occ), true, "realized", &local_err); + qdev_realize(DEVICE(&chip9->occ), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1519,8 +1517,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) /* HOMER */ object_property_set_link(OBJECT(&chip9->homer), OBJECT(chip), "chip", &error_abort); - object_property_set_bool(OBJECT(&chip9->homer), true, "realized", - &local_err); + qdev_realize(DEVICE(&chip9->homer), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1602,8 +1599,7 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) /* Processor Service Interface (PSI) Host Bridge */ object_property_set_int(OBJECT(&chip10->psi), PNV10_PSIHB_BASE(chip), "bar", &error_fatal); - object_property_set_bool(OBJECT(&chip10->psi), true, "realized", - &local_err); + qdev_realize(DEVICE(&chip10->psi), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1614,8 +1610,7 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) /* LPC */ object_property_set_link(OBJECT(&chip10->lpc), OBJECT(&chip10->psi), "psi", &error_abort); - object_property_set_bool(OBJECT(&chip10->lpc), true, "realized", - &local_err); + qdev_realize(DEVICE(&chip10->lpc), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -1734,8 +1729,7 @@ static void pnv_chip_core_realize(PnvChip *chip, Error **errp) "hrmor", &error_fatal); object_property_set_link(OBJECT(pnv_core), OBJECT(chip), "chip", &error_abort); - object_property_set_bool(OBJECT(pnv_core), true, "realized", - &error_fatal); + qdev_realize(DEVICE(pnv_core), NULL, &error_fatal); /* Each core has an XSCOM MMIO region */ xscom_core_base = pcc->xscom_core_base(chip, core_hwid); diff --git a/hw/ppc/pnv_bmc.c b/hw/ppc/pnv_bmc.c index 5f86453b6a..2e1a03daa4 100644 --- a/hw/ppc/pnv_bmc.c +++ b/hw/ppc/pnv_bmc.c @@ -235,7 +235,7 @@ IPMIBmc *pnv_bmc_create(PnvPnor *pnor) obj = object_new(TYPE_IPMI_BMC_SIMULATOR); object_ref(OBJECT(pnor)); object_property_add_const_link(obj, "pnor", OBJECT(pnor)); - object_property_set_bool(obj, true, "realized", &error_fatal); + qdev_realize(DEVICE(obj), NULL, &error_fatal); /* Install the HIOMAP protocol handlers to access the PNOR */ ipmi_sim_register_netfn(IPMI_BMC_SIMULATOR(obj), IPMI_NETFN_OEM, diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 96a446f001..c986c16db1 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -173,7 +173,7 @@ static void pnv_core_cpu_realize(PnvCore *pc, PowerPCCPU *cpu, Error **errp) Error *local_err = NULL; PnvChipClass *pcc = PNV_CHIP_GET_CLASS(pc->chip); - object_property_set_bool(OBJECT(cpu), true, "realized", &local_err); + qdev_realize(DEVICE(cpu), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 20e54ad5ac..75b8ae9703 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -510,7 +510,7 @@ static void pnv_psi_power8_realize(DeviceState *dev, Error **errp) error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(ics), true, "realized", &err); + qdev_realize(DEVICE(ics), NULL, &err); if (err) { error_propagate(errp, err); return; @@ -851,7 +851,7 @@ static void pnv_psi_power9_realize(DeviceState *dev, Error **errp) object_property_set_int(OBJECT(xsrc), PSIHB9_NUM_IRQS, "nr-irqs", &error_fatal); object_property_set_link(OBJECT(xsrc), OBJECT(psi), "xive", &error_abort); - object_property_set_bool(OBJECT(xsrc), true, "realized", &local_err); + qdev_realize(DEVICE(xsrc), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index c381bb6fb5..8d630baa5d 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1730,8 +1730,7 @@ static void spapr_rtc_create(SpaprMachineState *spapr) object_initialize_child_with_props(OBJECT(spapr), "rtc", &spapr->rtc, sizeof(spapr->rtc), TYPE_SPAPR_RTC, &error_fatal, NULL); - object_property_set_bool(OBJECT(&spapr->rtc), true, "realized", - &error_fatal); + qdev_realize(DEVICE(&spapr->rtc), NULL, &error_fatal); object_property_add_alias(OBJECT(spapr), "rtc-time", OBJECT(&spapr->rtc), "date"); } @@ -2629,7 +2628,7 @@ static void spapr_init_cpus(SpaprMachineState *spapr) &error_fatal); object_property_set_int(core, core_id, CPU_CORE_PROP_CORE_ID, &error_fatal); - object_property_set_bool(core, true, "realized", &error_fatal); + qdev_realize(DEVICE(core), NULL, &error_fatal); object_unref(core); } diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 9c8c1b14cf..26ad566f42 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -239,7 +239,7 @@ static void spapr_realize_vcpu(PowerPCCPU *cpu, SpaprMachineState *spapr, CPUState *cs = CPU(cpu); Error *local_err = NULL; - object_property_set_bool(OBJECT(cpu), true, "realized", &local_err); + qdev_realize(DEVICE(cpu), NULL, &local_err); if (local_err) { goto error; } diff --git a/hw/ppc/spapr_drc.c b/hw/ppc/spapr_drc.c index b958f8acb5..2689104295 100644 --- a/hw/ppc/spapr_drc.c +++ b/hw/ppc/spapr_drc.c @@ -567,7 +567,7 @@ SpaprDrc *spapr_dr_connector_new(Object *owner, const char *type, spapr_drc_index(drc)); object_property_add_child(owner, prop_name, OBJECT(drc)); object_unref(OBJECT(drc)); - object_property_set_bool(OBJECT(drc), true, "realized", NULL); + qdev_realize(DEVICE(drc), NULL, NULL); g_free(prop_name); return drc; diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c index 7e1d6d59ac..0fecabc135 100644 --- a/hw/ppc/spapr_iommu.c +++ b/hw/ppc/spapr_iommu.c @@ -369,7 +369,7 @@ SpaprTceTable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn) g_free(tmp); object_unref(OBJECT(tcet)); - object_property_set_bool(OBJECT(tcet), true, "realized", NULL); + qdev_realize(DEVICE(tcet), NULL, NULL); return tcet; } diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 79b0e40b66..897bf98587 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -311,7 +311,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **errp) object_property_set_link(obj, OBJECT(spapr), ICS_PROP_XICS, &error_abort); object_property_set_int(obj, smc->nr_xirqs, "nr-irqs", &error_abort); - object_property_set_bool(obj, true, "realized", &local_err); + qdev_realize(DEVICE(obj), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c index 56c2be5312..e26c382259 100644 --- a/hw/riscv/riscv_hart.c +++ b/hw/riscv/riscv_hart.c @@ -48,8 +48,7 @@ static void riscv_hart_realize(RISCVHartArrayState *s, int idx, object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx], cpu_type); s->harts[idx].env.mhartid = s->hartid_base + idx; qemu_register_reset(riscv_harts_cpu_reset, &s->harts[idx]); - object_property_set_bool(OBJECT(&s->harts[idx]), true, - "realized", &err); + qdev_realize(DEVICE(&s->harts[idx]), NULL, &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index 95f90582b5..ccd8910a1b 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -86,8 +86,7 @@ static void riscv_sifive_e_init(MachineState *machine) /* Initialize SoC */ object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_E_SOC); - object_property_set_bool(OBJECT(&s->soc), true, "realized", - &error_abort); + qdev_realize(DEVICE(&s->soc), NULL, &error_abort); /* Data Tightly Integrated Memory */ memory_region_init_ram(main_mem, NULL, "riscv.sifive.e.ram", diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 1d3b2be9eb..6f93cff246 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -331,8 +331,7 @@ static void sifive_u_machine_init(MachineState *machine) object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_U_SOC); object_property_set_uint(OBJECT(&s->soc), s->serial, "serial", &error_abort); - object_property_set_bool(OBJECT(&s->soc), true, "realized", - &error_abort); + qdev_realize(DEVICE(&s->soc), NULL, &error_abort); /* register RAM */ memory_region_init_ram(main_mem, NULL, "riscv.sifive.u.ram", @@ -530,10 +529,8 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) * CPU must exist and have been parented into the cluster before the * cluster is realized. */ - object_property_set_bool(OBJECT(&s->e_cluster), true, "realized", - &error_abort); - object_property_set_bool(OBJECT(&s->u_cluster), true, "realized", - &error_abort); + qdev_realize(DEVICE(&s->e_cluster), NULL, &error_abort); + qdev_realize(DEVICE(&s->u_cluster), NULL, &error_abort); /* boot rom */ memory_region_init_rom(mask_rom, OBJECT(dev), "riscv.sifive.u.mrom", diff --git a/hw/s390x/s390-skeys.c b/hw/s390x/s390-skeys.c index d304b85640..1e036cc602 100644 --- a/hw/s390x/s390-skeys.c +++ b/hw/s390x/s390-skeys.c @@ -48,7 +48,7 @@ void s390_skeys_init(void) obj); object_unref(obj); - qdev_init_nofail(DEVICE(obj)); + qdev_realize(DEVICE(obj), NULL, &error_fatal); } static void write_keys(FILE *f, uint8_t *keys, uint64_t startgfn, diff --git a/hw/s390x/s390-stattrib.c b/hw/s390x/s390-stattrib.c index 6d1e587527..0144b9021c 100644 --- a/hw/s390x/s390-stattrib.c +++ b/hw/s390x/s390-stattrib.c @@ -50,7 +50,7 @@ void s390_stattrib_init(void) obj); object_unref(obj); - qdev_init_nofail(DEVICE(obj)); + qdev_realize(DEVICE(obj), NULL, &error_fatal); } /* Console commands: */ diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index 3429d9f82a..7325c04bdd 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -75,7 +75,7 @@ static S390CPU *s390x_new_cpu(const char *typename, uint32_t core_id, if (err != NULL) { goto out; } - object_property_set_bool(OBJECT(cpu), true, "realized", &err); + qdev_realize(DEVICE(cpu), NULL, &err); out: object_unref(OBJECT(cpu)); @@ -210,7 +210,7 @@ static void s390_init_ipl_dev(const char *kernel_filename, object_property_add_child(qdev_get_machine(), TYPE_S390_IPL, new); object_unref(new); - qdev_init_nofail(dev); + qdev_realize(dev, NULL, &error_fatal); } static void s390_create_virtio_net(BusState *bus, const char *name) diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c index b66afb35c8..d39f6d7785 100644 --- a/hw/s390x/sclp.c +++ b/hw/s390x/sclp.c @@ -322,7 +322,7 @@ void s390_sclp_init(void) object_property_add_child(qdev_get_machine(), TYPE_SCLP, new); object_unref(new); - qdev_init_nofail(DEVICE(new)); + qdev_realize(DEVICE(new), NULL, &error_fatal); } static void sclp_realize(DeviceState *dev, Error **errp) diff --git a/hw/s390x/tod.c b/hw/s390x/tod.c index 7324e37b5e..3c2979175e 100644 --- a/hw/s390x/tod.c +++ b/hw/s390x/tod.c @@ -29,7 +29,7 @@ void s390_init_tod(void) object_property_add_child(qdev_get_machine(), TYPE_S390_TOD, obj); object_unref(obj); - qdev_init_nofail(DEVICE(obj)); + qdev_realize(DEVICE(obj), NULL, &error_fatal); } S390TODState *s390_get_todstate(void) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 3733d9a279..bbc2e9cc76 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6135,8 +6135,7 @@ static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp) if (cpu->apic_state == NULL) { return; } - object_property_set_bool(OBJECT(cpu->apic_state), true, "realized", - errp); + qdev_realize(DEVICE(cpu->apic_state), NULL, errp); /* Map APIC MMIO area */ apic = APIC_COMMON(cpu->apic_state); diff --git a/tests/test-qdev-global-props.c b/tests/test-qdev-global-props.c index 42d3dd7030..1e6b0f33ff 100644 --- a/tests/test-qdev-global-props.c +++ b/tests/test-qdev-global-props.c @@ -26,6 +26,7 @@ #include "hw/qdev-properties.h" #include "qom/object.h" +#include "qapi/error.h" #include "qapi/visitor.h" @@ -76,7 +77,7 @@ static void test_static_prop_subprocess(void) MyType *mt; mt = STATIC_TYPE(object_new(TYPE_STATIC_PROPS)); - qdev_init_nofail(DEVICE(mt)); + qdev_realize(DEVICE(mt), NULL, &error_fatal); g_assert_cmpuint(mt->prop1, ==, PROP_DEFAULT); } @@ -111,7 +112,7 @@ static void test_static_globalprop_subprocess(void) register_global_properties(props); mt = STATIC_TYPE(object_new(TYPE_STATIC_PROPS)); - qdev_init_nofail(DEVICE(mt)); + qdev_realize(DEVICE(mt), NULL, &error_fatal); g_assert_cmpuint(mt->prop1, ==, 200); g_assert_cmpuint(mt->prop2, ==, PROP_DEFAULT); @@ -229,7 +230,7 @@ static void test_dynamic_globalprop_subprocess(void) register_global_properties(props); mt = DYNAMIC_TYPE(object_new(TYPE_DYNAMIC_PROPS)); - qdev_init_nofail(DEVICE(mt)); + qdev_realize(DEVICE(mt), NULL, &error_fatal); g_assert_cmpuint(mt->prop1, ==, 101); g_assert_cmpuint(mt->prop2, ==, 102); @@ -272,7 +273,7 @@ static void test_subclass_global_props(void) register_global_properties(props); mt = STATIC_TYPE(object_new(TYPE_SUBCLASS)); - qdev_init_nofail(DEVICE(mt)); + qdev_realize(DEVICE(mt), NULL, &error_fatal); g_assert_cmpuint(mt->prop1, ==, 102); g_assert_cmpuint(mt->prop2, ==, 104); From patchwork Fri May 29 13:45:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578879 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BDB5C1391 for ; Fri, 29 May 2020 14:08:13 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 942B520707 for ; Fri, 29 May 2020 14:08:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="aQTtmUkK" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 942B520707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:57350 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefgC-0000zW-Jr for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:08:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49304) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKa-0003GA-Eh for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:52 -0400 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:48745 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00077S-P2 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:52 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759937; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RdBhkXWUq6/grcJDQFCjBUO29xQZ91Bx/YvZIkfGuyo=; b=aQTtmUkK7Sx9uFhBmneH/NJY/gYbIF4tj5ecAMdi8IgrHV6VqxVNbzAjGFv+eGupaY1YZd thoKtNUxtmNWlvGWPa2GF1EN3uDbdirCYIPwHzJJxulWV2qQ5U0lig2Q4rnxpxc9V3W5q4 Vhgt5xvISblCkd9ko8+uEdhI2HoktzI= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-291-FhCPdk5lOvu4fFgv6zmu1Q-1; Fri, 29 May 2020 09:45:35 -0400 X-MC-Unique: FhCPdk5lOvu4fFgv6zmu1Q-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 835821007271 for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 579075D9D5 for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id B35931135253; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 57/58] qdev: qdev_init_nofail() is now unused, drop Date: Fri, 29 May 2020 15:45:22 +0200 Message-Id: <20200529134523.8477-58-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/29 01:27:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Markus Armbruster --- include/hw/qdev-core.h | 3 +-- hw/core/qdev.c | 29 ----------------------------- 2 files changed, 1 insertion(+), 31 deletions(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index ef6137b6a8..7dc10be46f 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -57,7 +57,7 @@ typedef void (*BusUnrealize)(BusState *bus); * After successful realization, setting static properties will fail. * * As an interim step, the #DeviceState:realized property can also be - * set with qdev_realize() or qdev_init_nofail(). + * set with qdev_realize(). * In the future, devices will propagate this state change to their children * and along busses they expose. * The point in time will be deferred to machine creation, so that values @@ -322,7 +322,6 @@ compat_props_add(GPtrArray *arr, DeviceState *qdev_new(const char *name); DeviceState *qdev_try_new(const char *name); -void qdev_init_nofail(DeviceState *dev); bool qdev_realize(DeviceState *dev, BusState *bus, Error **errp); bool qdev_realize_and_unref(DeviceState *dev, BusState *bus, Error **errp); void qdev_unrealize(DeviceState *dev); diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 50336168f2..2131c7f951 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -376,35 +376,6 @@ void qdev_simple_device_unplug_cb(HotplugHandler *hotplug_dev, qdev_unrealize(dev); } -/* - * Realize @dev. - * Device properties should be set before calling this function. IRQs - * and MMIO regions should be connected/mapped after calling this - * function. - * On failure, report an error with error_report() and terminate the - * program. This is okay during machine creation. Don't use for - * hotplug, because there callers need to recover from failure. - * Exception: if you know the device's init() callback can't fail, - * then qdev_init_nofail() can't fail either, and is therefore usable - * even then. But relying on the device implementation that way is - * somewhat unclean, and best avoided. - */ -void qdev_init_nofail(DeviceState *dev) -{ - Error *err = NULL; - - assert(!dev->realized); - - object_ref(OBJECT(dev)); - object_property_set_bool(OBJECT(dev), true, "realized", &err); - if (err) { - error_reportf_err(err, "Initialization of device %s failed: ", - object_get_typename(OBJECT(dev))); - exit(1); - } - object_unref(OBJECT(dev)); -} - /* * Realize @dev. * @dev must not be plugged into a bus. From patchwork Fri May 29 13:45:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11578903 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 868E51391 for ; Fri, 29 May 2020 14:12:52 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5DD4120707 for ; Fri, 29 May 2020 14:12:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="P+43Agmy" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5DD4120707 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:48290 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jefkh-0000zt-6P for patchwork-qemu-devel@patchwork.kernel.org; Fri, 29 May 2020 10:12:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49298) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jefKZ-0003EE-R4 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:51 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:60575 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jefKM-00077e-U3 for qemu-devel@nongnu.org; Fri, 29 May 2020 09:45:51 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1590759937; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ug8yBTzrHkvkZSzVumb275tBiReOAOTh0oPppLyV6vQ=; b=P+43Agmy8MPaZefw608ljURj5AbQWKU9Nlidv74KN/AGq5eJ1LSfxajV++bcIKLCl2Ae2o +iBR01NoZ0rprG5MCL1f7n9NMgTX8MjXkzWsTD3sB23Y654iT2etF5eY6EAdKsq1tRzX52 FpH8oQtghq2NA7+fVL9ejiUyuv1TS9Q= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-238-tz07iP5RMo62MmQVaR_adA-1; Fri, 29 May 2020 09:45:35 -0400 X-MC-Unique: tz07iP5RMo62MmQVaR_adA-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id A2DD28005AA for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-32.ams2.redhat.com [10.36.112.32]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 76179610EC for ; Fri, 29 May 2020 13:45:34 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id B82C81135254; Fri, 29 May 2020 15:45:24 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v2 58/58] MAINTAINERS: Make section QOM cover hw/core/*bus.c as well Date: Fri, 29 May 2020 15:45:23 +0200 Message-Id: <20200529134523.8477-59-armbru@redhat.com> In-Reply-To: <20200529134523.8477-1-armbru@redhat.com> References: <20200529134523.8477-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/28 23:43:13 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index bb9861f33b..e6957dac1a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2279,6 +2279,8 @@ R: Eduardo Habkost S: Supported F: docs/qdev-device-use.txt F: hw/core/qdev* +F: hw/core/bus.c +F: hw/core/sysbus.c F: include/hw/qdev* F: include/monitor/qdev.h F: include/qom/