From patchwork Tue Jun 9 08:37:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pradeep P V K X-Patchwork-Id: 11594909 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E967890 for ; Tue, 9 Jun 2020 08:38:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CF37020814 for ; Tue, 9 Jun 2020 08:38:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728185AbgFIIiG (ORCPT ); Tue, 9 Jun 2020 04:38:06 -0400 Received: from alexa-out-blr-01.qualcomm.com ([103.229.18.197]:5312 "EHLO alexa-out-blr-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728170AbgFIIiG (ORCPT ); Tue, 9 Jun 2020 04:38:06 -0400 Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by alexa-out-blr-01.qualcomm.com with ESMTP/TLS/AES256-SHA; 09 Jun 2020 14:07:58 +0530 Received: from c-ppvk-linux.qualcomm.com ([10.206.24.34]) by ironmsg01-blr.qualcomm.com with ESMTP; 09 Jun 2020 14:07:30 +0530 Received: by c-ppvk-linux.qualcomm.com (Postfix, from userid 2304101) id 3D8414FB9; Tue, 9 Jun 2020 14:07:29 +0530 (IST) From: Pradeep P V K To: bjorn.andersson@linaro.org, adrian.hunter@intel.com, robh+dt@kernel.org, ulf.hansson@linaro.org, vbadigan@codeaurora.org, sboyd@kernel.org, georgi.djakov@linaro.org, mka@chromium.org Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-mmc-owner@vger.kernel.org, rnayak@codeaurora.org, sibis@codeaurora.org, matthias@chromium.org, Pradeep P V K Subject: [PATCH V4 1/2] mmc: sdhci-msm: Add interconnect bandwidth scaling support Date: Tue, 9 Jun 2020 14:07:25 +0530 Message-Id: <1591691846-7578-2-git-send-email-ppvk@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1591691846-7578-1-git-send-email-ppvk@codeaurora.org> References: <1591691846-7578-1-git-send-email-ppvk@codeaurora.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Interconnect bandwidth scaling support is now added as a part of OPP. So, make sure interconnect driver is ready before handling interconnect scaling. Signed-off-by: Pradeep P V K Reviewed-by: Sibi Sankar Reviewed-by: Matthias Kaehlcke --- This change is based on [1] [Patch v8] Introduce OPP bandwidth bindings (https://lkml.org/lkml/2020/5/12/493) [2] [Patch v3] mmc: sdhci-msm: Fix error handling for dev_pm_opp_of_add_table() (https://lkml.org/lkml/2020/5/5/491) drivers/mmc/host/sdhci-msm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index b277dd7..15c42b0 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -14,6 +14,7 @@ #include #include #include +#include #include "sdhci-pltfm.h" #include "cqhci.h" @@ -2070,6 +2071,11 @@ static int sdhci_msm_probe(struct platform_device *pdev) } msm_host->bulk_clks[0].clk = clk; + /* Check for optional interconnect paths */ + ret = dev_pm_opp_of_find_icc_paths(&pdev->dev, NULL); + if (ret) + goto bus_clk_disable; + msm_host->opp_table = dev_pm_opp_set_clkname(&pdev->dev, "core"); if (IS_ERR(msm_host->opp_table)) { ret = PTR_ERR(msm_host->opp_table); From patchwork Tue Jun 9 08:37:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pradeep P V K X-Patchwork-Id: 11594915 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 55E46739 for ; Tue, 9 Jun 2020 08:38:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3C28720814 for ; Tue, 9 Jun 2020 08:38:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728101AbgFIIiD (ORCPT ); Tue, 9 Jun 2020 04:38:03 -0400 Received: from alexa-out-blr-01.qualcomm.com ([103.229.18.197]:5312 "EHLO alexa-out-blr-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726463AbgFIIiC (ORCPT ); Tue, 9 Jun 2020 04:38:02 -0400 Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by alexa-out-blr-01.qualcomm.com with ESMTP/TLS/AES256-SHA; 09 Jun 2020 14:07:58 +0530 Received: from c-ppvk-linux.qualcomm.com ([10.206.24.34]) by ironmsg01-blr.qualcomm.com with ESMTP; 09 Jun 2020 14:07:31 +0530 Received: by c-ppvk-linux.qualcomm.com (Postfix, from userid 2304101) id 4E1434F2E; Tue, 9 Jun 2020 14:07:30 +0530 (IST) From: Pradeep P V K To: bjorn.andersson@linaro.org, adrian.hunter@intel.com, robh+dt@kernel.org, ulf.hansson@linaro.org, vbadigan@codeaurora.org, sboyd@kernel.org, georgi.djakov@linaro.org, mka@chromium.org Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-mmc-owner@vger.kernel.org, rnayak@codeaurora.org, sibis@codeaurora.org, matthias@chromium.org, Pradeep P V K Subject: [PATCH V4 2/2] dt-bindings: mmc: sdhci-msm: Add interconnect BW scaling strings Date: Tue, 9 Jun 2020 14:07:26 +0530 Message-Id: <1591691846-7578-3-git-send-email-ppvk@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1591691846-7578-1-git-send-email-ppvk@codeaurora.org> References: <1591691846-7578-1-git-send-email-ppvk@codeaurora.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Add interconnect bandwidth scaling supported strings for qcom-sdhci controller. Signed-off-by: Pradeep P V K Acked-by: Rob Herring Reviewed-by: Bjorn Andersson --- Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt index b8e1d2b..3b602fd 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt @@ -54,6 +54,21 @@ Required properties: - qcom,dll-config: Chipset and Platform specific value. Use this field to specify the DLL_CONFIG register value as per Hardware Programming Guide. +Optional Properties: +* Following bus parameters are required for interconnect bandwidth scaling: +- interconnects: Pairs of phandles and interconnect provider specifier + to denote the edge source and destination ports of + the interconnect path. + +- interconnect-names: For sdhc, we have two main paths. + 1. Data path : sdhc to ddr + 2. Config path : cpu to sdhc + For Data interconnect path the name supposed to be + is "sdhc-ddr" and for config interconnect path it is + "cpu-sdhc". + Please refer to Documentation/devicetree/bindings/ + interconnect/ for more details. + Example: sdhc_1: sdhci@f9824900 { @@ -71,6 +86,9 @@ Example: clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>; clock-names = "core", "iface"; + interconnects = <&qnoc MASTER_SDCC_ID &qnoc SLAVE_DDR_ID>, + <&qnoc MASTER_CPU_ID &qnoc SLAVE_SDCC_ID>; + interconnect-names = "sdhc-ddr","cpu-sdhc"; qcom,dll-config = <0x000f642c>; qcom,ddr-config = <0x80040868>;