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Fri, 12 Jun 2020 17:54:03 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 12 Jun 2020 17:54:01 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 12 Jun 2020 17:54:01 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05CMs1VI119270; Fri, 12 Jun 2020 17:54:01 -0500 Received: from localhost ([10.250.48.148]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 05CMs1vW063928; Fri, 12 Jun 2020 17:54:01 -0500 From: Suman Anna To: Bjorn Andersson , Rob Herring , Mathieu Poirier Subject: [PATCH v3 1/2] dt-bindings: remoteproc: k3-dsp: Update bindings for C71x DSPs Date: Fri, 12 Jun 2020 17:53:56 -0500 Message-ID: <20200612225357.8251-2-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200612225357.8251-1-s-anna@ti.com> References: <20200612225357.8251-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200612_155404_730348_7884CA6C X-CRM114-Status: GOOD ( 11.78 ) X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [198.47.19.142 listed in list.dnswl.org] 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [198.47.19.142 listed in wl.mailspike.net] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Lokesh Vutla , linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, Suman Anna , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Some Texas Instruments K3 family of SoCs have one of more newer generation TMS320C71x CorePac processor subsystem in addition to the existing TMS320C66x CorePac processor subsystems. Update the device tree bindings document for the C71x DSP devices. The example is also updated to show the single C71 DSP present on J721E SoCs. Signed-off-by: Suman Anna Reviewed-by: Rob Herring --- v3: - Dropped Rob's previous Reviewed-by tag due to decent changes in the patch - Replaced the minItems and maxItems from reg with actual items list - Dropped C71 reserved memory nodes from example v2: https://patchwork.kernel.org/patch/11563231/ .../bindings/remoteproc/ti,k3-dsp-rproc.yaml | 68 +++++++++++++++---- 1 file changed, 55 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml index f03e88c42a6e..8eaf326b5a7f 100644 --- a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml @@ -30,21 +30,12 @@ allOf: properties: compatible: - const: ti,j721e-c66-dsp + enum: + - ti,j721e-c66-dsp + - ti,j721e-c71-dsp description: Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs - - reg: - items: - - description: Address and Size of the L2 SRAM internal memory region - - description: Address and Size of the L1 PRAM internal memory region - - description: Address and Size of the L1 DRAM internal memory region - - reg-names: - items: - - const: l2sram - - const: l1pram - - const: l1dram + Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs resets: description: | @@ -92,6 +83,40 @@ properties: should be defined as per the generic bindings in, Documentation/devicetree/bindings/sram/sram.yaml +if: + properties: + compatible: + enum: + - ti,j721e-c66-dsp +then: + properties: + reg: + items: + - description: Address and Size of the L2 SRAM internal memory region + - description: Address and Size of the L1 PRAM internal memory region + - description: Address and Size of the L1 DRAM internal memory region + reg-names: + items: + - const: l2sram + - const: l1pram + - const: l1dram +else: + if: + properties: + compatible: + enum: + - ti,j721e-c71-dsp + then: + properties: + reg: + items: + - description: Address and Size of the L2 SRAM internal memory region + - description: Address and Size of the L1 DRAM internal memory region + reg-names: + items: + - const: l2sram + - const: l1dram + required: - compatible - reg @@ -116,6 +141,7 @@ examples: #address-cells = <2>; #size-cells = <2>; ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ + <0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71_0 */ <0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */ <0x4d 0x81800000 0x4d 0x81800000 0x00 0x00800000>; /* C66_1 */ @@ -135,5 +161,21 @@ examples: <&c66_0_memory_region>; mboxes = <&mailbox0_cluster3 &mbox_c66_0>; }; + + /* J721E C71_0 DSP node */ + c71_0: dsp@64800000 { + compatible = "ti,j721e-c71-dsp"; + reg = <0x00 0x64800000 0x00 0x00080000>, + <0x00 0x64e00000 0x00 0x0000c000>; + reg-names = "l2sram", "l1dram"; + ti,sci = <&dmsc>; + ti,sci-dev-id = <15>; + ti,sci-proc-ids = <0x30 0xFF>; + resets = <&k3_reset 15 1>; + firmware-name = "j7-c71_0-fw"; + memory-region = <&c71_0_dma_memory_region>, + <&c71_0_memory_region>; + mboxes = <&mailbox0_cluster4 &mbox_c71_0>; + }; }; }; From patchwork Fri Jun 12 22:53:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 11602353 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6D9B4618 for ; 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Fri, 12 Jun 2020 17:54:02 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05CMs2is040959; Fri, 12 Jun 2020 17:54:02 -0500 Received: from localhost ([10.250.48.148]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 05CMs2YB063955; Fri, 12 Jun 2020 17:54:02 -0500 From: Suman Anna To: Bjorn Andersson , Rob Herring , Mathieu Poirier Subject: [PATCH v3 2/2] remoteproc: k3-dsp: Add support for C71x DSPs Date: Fri, 12 Jun 2020 17:53:57 -0500 Message-ID: <20200612225357.8251-3-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200612225357.8251-1-s-anna@ti.com> References: <20200612225357.8251-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200612_155404_669447_2AD42097 X-CRM114-Status: GOOD ( 16.71 ) X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [198.47.19.142 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [198.47.19.142 listed in wl.mailspike.net] -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Lokesh Vutla , linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, Suman Anna , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The Texas Instrument's K3 J721E SoCs have a newer next-generation C71x DSP Subsystem in the MAIN voltage domain in addition to the previous generation C66x DSP subsystems. The C71x DSP subsystem is based on the TMS320C71x DSP CorePac module. The C71x CPU is a true 64-bit machine including 64-bit memory addressing and single-cycle 64-bit base arithmetic operations and supports vector signal processing providing a significant lift in DSP processing power over C66x DSPs. J721E SoCs use a C711 (a one-core 512-bit vector width CPU core) DSP that is cache coherent with the A72 Arm cores. Each subsystem has one or more Fixed/Floating-Point DSP CPUs, with 32 KB of L1P Cache, 48 KB of L1D SRAM that can be configured and partitioned as either RAM and/or Cache, and 512 KB of L2 SRAM configurable as either RAM and/or Cache. The CorePac also includes a Matrix Multiplication Accelerator (MMA), a Stream Engine (SE) and a C71x Memory Management Unit (CMMU), an Interrupt Controller (INTC) and a Powerdown Management Unit (PMU) modules. Update the existing K3 DSP remoteproc driver to add support for this C71x DSP subsystem. The firmware loading support is provided by using the newly added 64-bit ELF loader support, and is limited to images using only external DDR memory at the moment. The L1D and L2 SRAMs are used as scratch memory when using as RAMs, and cannot be used for loadable segments. The CMMU is also not supported to begin with, and the driver is designed to treat the MMU as if it is in bypass mode. Signed-off-by: Suman Anna Reviewed-by: Mathieu Poirier --- v3: - No code changes, rebased patch - Picked up review tags - Switched from remoteproc/k3-dsp to remoteproc: k3-dsp in patch title v2: https://patchwork.kernel.org/patch/11563233/ drivers/remoteproc/ti_k3_dsp_remoteproc.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/ti_k3_dsp_remoteproc.c b/drivers/remoteproc/ti_k3_dsp_remoteproc.c index 668bb45b3fe8..861cc9126241 100644 --- a/drivers/remoteproc/ti_k3_dsp_remoteproc.c +++ b/drivers/remoteproc/ti_k3_dsp_remoteproc.c @@ -407,8 +407,6 @@ static void *k3_dsp_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len) } static const struct rproc_ops k3_dsp_rproc_ops = { - .prepare = k3_dsp_rproc_prepare, - .unprepare = k3_dsp_rproc_unprepare, .start = k3_dsp_rproc_start, .stop = k3_dsp_rproc_stop, .kick = k3_dsp_rproc_kick, @@ -618,6 +616,10 @@ static int k3_dsp_rproc_probe(struct platform_device *pdev) rproc->has_iommu = false; rproc->recovery_disabled = true; + if (data->uses_lreset) { + rproc->ops->prepare = k3_dsp_rproc_prepare; + rproc->ops->unprepare = k3_dsp_rproc_unprepare; + } kproc = rproc->priv; kproc->rproc = rproc; kproc->dev = dev; @@ -745,6 +747,12 @@ static const struct k3_dsp_mem_data c66_mems[] = { { .name = "l1dram", .dev_addr = 0xf00000 }, }; +/* C71x cores only have a L1P Cache, there are no L1P SRAMs */ +static const struct k3_dsp_mem_data c71_mems[] = { + { .name = "l2sram", .dev_addr = 0x800000 }, + { .name = "l1dram", .dev_addr = 0xe00000 }, +}; + static const struct k3_dsp_dev_data c66_data = { .mems = c66_mems, .num_mems = ARRAY_SIZE(c66_mems), @@ -752,8 +760,16 @@ static const struct k3_dsp_dev_data c66_data = { .uses_lreset = true, }; +static const struct k3_dsp_dev_data c71_data = { + .mems = c71_mems, + .num_mems = ARRAY_SIZE(c71_mems), + .boot_align_addr = SZ_2M, + .uses_lreset = false, +}; + static const struct of_device_id k3_dsp_of_match[] = { { .compatible = "ti,j721e-c66-dsp", .data = &c66_data, }, + { .compatible = "ti,j721e-c71-dsp", .data = &c71_data, }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, k3_dsp_of_match);